| Published | Title | Version | Author | Status |
|---|---|---|---|---|
| 2025-10-21 11:30 UTC | drm: Reduce page tables overhead with THP | 5 | loic.molinari@collabora.com |
finished
in 42m0s
[1 findings] |
| 2025-10-16 10:08 UTC | arm64: dts: mediatek: Add Openwrt One AP functionality | 1 | sjoerd@collabora.com | finished in 42m0s |
| 2025-10-15 15:30 UTC | drm: Reduce page tables overhead with THP | 4 | loic.molinari@collabora.com | finished in 30m0s |
| 2025-10-14 15:49 UTC | net: stmmac: dwmac-rk: Fix disabling set_clock_selection | 1 | sebastian.reichel@collabora.com | finished in 47m0s |
| 2025-10-04 09:30 UTC | drm: Reduce page tables overhead with THP | 3 | loic.molinari@collabora.com | skipped |
| 2025-10-01 18:33 UTC | dt-bindings: net: Convert Marvell 8897/8997 bindings to DT schema | 3 | ariel.dalessandro@collabora.com | finished in 38m0s |
| 2025-09-29 20:03 UTC | drm: Optimize page tables overhead with THP | 1 | loic.molinari@collabora.com | skipped |
| 2025-09-15 15:19 UTC | Add support for MT8196 clock controllers | 6 | laura.nao@collabora.com | finished in 1h44m0s |
| 2025-09-12 12:51 UTC | selftests/mm: centralize the __always_unused macro | 1 | usama.anjum@collabora.com | finished in 49m0s |
| 2025-09-12 12:30 UTC | selftests/mm: Add -Wunreachable-code and fix warnings | 1 | usama.anjum@collabora.com | finished in 54m0s |
| 2025-09-11 15:09 UTC | MediaTek dt-bindings sanitization (MT8173) | 2 | ariel.dalessandro@collabora.com | finished in 38m0s |
| 2025-08-29 09:18 UTC | Add support for MT8196 clock controllers | 5 | laura.nao@collabora.com | finished in 41m0s |
| 2025-08-25 08:28 UTC | BYEWORD_UPDATE: unifying (most) HIWORD_UPDATE macros | 3 | nicolas.frattaroli@collabora.com | finished in 36m0s |
| 2025-08-22 08:20 UTC | selftests/mm: Add compiler flags and fix found warnings | 3 | usama.anjum@collabora.com | finished in 50m0s |
| 2025-08-20 17:12 UTC | MediaTek dt-bindings sanitization (MT8173) | 1 | ariel.dalessandro@collabora.com | finished in 41m0s |
| 2025-08-05 13:54 UTC | Add support for MT8196 clock controllers | 4 | laura.nao@collabora.com | finished in 1h41m0s |
| 2025-07-30 10:56 UTC | Add support for MT8196 clock controllers | 3 | laura.nao@collabora.com | finished in 1h26m0s |
| 2025-07-24 14:39 UTC | net: phy: realtek: Reset after clock enable | 2 | sebastian.reichel@collabora.com | finished in 1h35m0s |