Patch Series

Subject	riscv: add initial support for hardware breakpoints
Author	jesse@rivosinc.com
Date	2025-08-05 19:39:48 +0000 UTC
Version	1
Cc	acme@kernel.org adrian.hunter@intel.com ajones@ventanamicro.com akihiko.odaki@daynix.com akpm@linux-foundation.org alex@ghiti.fr alexander.shishkin@linux.intel.com aou@eecs.berkeley.edu apatel@ventanamicro.com arnd@arndb.de atishp@rivosinc.com bigeasy@linutronix.de charlie@rivosinc.com chenhuacai@kernel.org cleger@rivosinc.com coelacanthushex@gmail.com conor.dooley@microchip.com cuiyunhui@bytedance.com debug@rivosinc.com evan@rivosinc.com hchauhan@ventanamicro.com irogers@google.com jesse@rivosinc.com joel.granados@kernel.org joey.gouly@arm.com jolsa@kernel.org kan.liang@linux.intel.com kees@kernel.org linux-kernel@vger.kernel.org linux-kselftest@vger.kernel.org linux-mm@kvack.org linux-perf-users@vger.kernel.org linux-riscv@lists.infradead.org mark.rutland@arm.com mcgrof@kernel.org mchitale@ventanamicro.com mingo@redhat.com namcao@linutronix.de namhyung@kernel.org nylon.chen@sifive.com oleg@redhat.com palmer@dabbelt.com paul.walmsley@sifive.com peterz@infradead.org ravi.bangoria@amd.com rppt@kernel.org samuel.holland@sifive.com shuah@kernel.org tglx@linutronix.de thomas.weissschuh@linutronix.de

Patches (8)

Name	Content
[PATCH 1/8] riscv: Add insn.c, consolidate instruction decoding	[Body]
[PATCH 2/8] riscv: Add SBI debug trigger extension and function ids	[Body]
[PATCH 3/8] riscv: insn: Add get_insn_nofault	[Body]
[PATCH 4/8] riscv: Introduce support for hardware break/watchpoints	[Body]
[PATCH 5/8] riscv: hw_breakpoint: Use icount for single stepping	[Body]
[PATCH 6/8] riscv: ptrace: Add hw breakpoint support	[Body]
[PATCH 7/8] riscv: ptrace: Add hw breakpoint regset	[Body]
[PATCH 8/8] selftests: riscv: Add test for hardware breakpoints	[Body]

Session 2025-08-12

ID (for dev)	a22479d5-48fe-468e-af97-cd706d68d9b9
Status	skipped
Triaged	Skipped: failed to find a base commit: series does not apply [Log]
Execution Log	[Link]

Test	Base	Patched	Verdict