Published Title Version Author Status
2025-12-11 08:11 UTC mm: Always use set_pXX() helpers to write page tables 1 samuel.holland@sifive.com finished in 4h9m0s
2025-12-08 03:49 UTC RISC-V: add percpu.h to include/asm 2 cuiyunhui@bytedance.com finished in 49m0s
2025-11-13 01:45 UTC riscv: Memory type control for platforms with physical memory aliases 3 samuel.holland@sifive.com finished in 37m0s
[1 findings]
2025-10-26 09:19 UTC riscv: Fix memory leak in module_frob_arch_sections() 1 linmq006@gmail.com finished in 46m0s
2025-10-16 11:27 UTC mm: add huge pfnmap support for remap_pfn_range() 2 yintirui@huawei.com finished in 3h50m0s
[1 findings]
2025-10-16 00:17 UTC RISC-V: KVM: Fix check for local interrupts on riscv32 1 samuel.holland@sifive.com finished in 40m0s
2025-10-09 01:57 UTC riscv: Memory type control for platforms with physical memory aliases 2 samuel.holland@sifive.com skipped
2025-09-23 13:31 UTC mm: add huge pfnmap support for remap_pfn_range() 1 yintirui@huawei.com finished in 3h45m0s
[2 findings]
2025-09-15 05:34 UTC RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm 1 samuel.holland@sifive.com skipped
2025-08-26 16:29 UTC Add Zilsd/Zclsd support in hwprobe and KVM 2 pincheng.plct@isrc.iscas.ac.cn finished in 48m0s
2025-08-22 17:47 UTC riscv: add initial support for hardware breakpoints 1 jesse@rivosinc.com skipped
2025-08-21 14:01 UTC RISC-V: Add Zilsd/Zclsd support in hwprobe and KVM 1 pincheng.plct@isrc.iscas.ac.cn finished in 50m0s
2025-08-21 13:55 UTC RISC-V: Add Zilsd/Zclsd support in hwprobe and KVM 1 pincheng.plct@isrc.iscas.ac.cn finished in 43m0s
2025-08-10 22:24 UTC net: cadence: macb: convert from round_rate() to determine_rate() 1 bmasney@redhat.com finished in 1h47m0s
2025-08-05 19:39 UTC riscv: add initial support for hardware breakpoints 1 jesse@rivosinc.com skipped
2025-06-27 09:08 UTC Support the Cadence MACB/GEM instances on Mobileye EyeQ5 SoCs 2 theo.lebrun@bootlin.com skipped