| 2026-06-02 23:16 UTC |
riscv: hwprobe: Expose RVA23U64 base behavior |
3 |
docular.xu@gmail.com |
finished
in 1h15m0s
|
| 2026-06-01 08:43 UTC |
RISC-V: KVM: Add Svadu/Zicfiss/Zicfilp FWFT support |
2 |
inochiama@gmail.com |
finished
in 1h48m0s
|
| 2026-05-11 13:44 UTC |
riscv: hwprobe: Expose RVA23U64 base behavior |
2 |
guodong@riscstar.com |
finished
in 1h39m0s
|
| 2026-05-05 06:20 UTC |
riscv: improve percpu helpers and PIO mapping |
4 |
cuiyunhui@bytedance.com |
finished
in 1h9m0s
|
| 2026-04-21 09:24 UTC |
riscv: add Svnapot-based contiguous PTE support |
1 |
cuiyunhui@bytedance.com |
finished
in 1h11m0s
|
| 2026-02-25 16:13 UTC |
mm: arch/shstk: Common shadow stack mapping helper and VM_NOHUGEPAGE |
2 |
catalin.marinas@arm.com |
finished
in 4h10m0s
|
| 2026-02-24 17:57 UTC |
mm: arch/shstk: Common shadow stack mapping helper and VM_NOHUGEPAGE |
1 |
catalin.marinas@arm.com |
finished
in 4h17m0s
|
| 2025-12-16 01:47 UTC |
RISC-V: add percpu.h to include/asm |
3 |
cuiyunhui@bytedance.com |
finished
in 59m0s
|
| 2025-12-11 17:20 UTC |
riscv control-flow integrity for usermode |
26 |
devnull@kernel.org |
skipped
|
| 2025-12-08 03:49 UTC |
RISC-V: add percpu.h to include/asm |
2 |
cuiyunhui@bytedance.com |
finished
in 49m0s
|
| 2025-12-05 18:41 UTC |
riscv control-flow integrity for usermode |
25 |
devnull@kernel.org |
finished
in 4h7m0s
|
| 2025-12-04 20:03 UTC |
riscv control-flow integrity for usermode |
24 |
debug@rivosinc.com |
finished
in 3h51m0s
|
| 2025-11-13 07:28 UTC |
mm: Add soft-dirty and uffd-wp support for RISC-V |
1 |
zhangchunyan@iscas.ac.cn |
finished
in 1h3m0s
|
| 2025-11-13 00:42 UTC |
riscv control-flow integrity for usermode |
23 |
devnull@kernel.org |
finished
in 54m0s
|
| 2025-10-23 16:51 UTC |
riscv control-flow integrity for usermode |
22 |
devnull@kernel.org |
finished
in 3h43m0s
|
| 2025-10-15 18:13 UTC |
riscv control-flow integrity for usermode |
21 |
debug@rivosinc.com |
finished
in 3h40m0s
|
| 2025-10-13 21:55 UTC |
riscv control-flow integrity for usermode |
20 |
debug@rivosinc.com |
finished
in 3h58m0s
|
| 2025-09-18 08:37 UTC |
riscv: mm: Add soft-dirty and uffd-wp support |
1 |
zhangchunyan@iscas.ac.cn |
finished
in 3h51m0s
|
| 2025-09-17 03:36 UTC |
riscv: mm: Add soft-dirty and uffd-wp support |
1 |
zhangchunyan@iscas.ac.cn |
finished
in 3h46m0s
|
| 2025-09-15 10:13 UTC |
riscv: mm: Add soft-dirty and uffd-wp support |
1 |
zhangchunyan@iscas.ac.cn |
finished
in 3h38m0s
|
| 2025-09-11 09:55 UTC |
riscv: mm: Add soft-dirty and uffd-wp support |
11 |
zhangchunyan@iscas.ac.cn |
finished
in 3h39m0s
|
| 2025-09-09 09:56 UTC |
riscv: mm: Add soft-dirty and uffd-wp support |
1 |
zhangchunyan@iscas.ac.cn |
finished
in 3h44m0s
|
| 2025-09-05 10:36 UTC |
riscv: mm: Add soft-dirty and uffd-wp support |
9 |
zhangchunyan@iscas.ac.cn |
finished
in 3h47m0s
|
| 2025-08-22 17:47 UTC |
riscv: add initial support for hardware breakpoints |
1 |
jesse@rivosinc.com |
skipped
|
| 2025-08-05 19:39 UTC |
riscv: add initial support for hardware breakpoints |
1 |
jesse@rivosinc.com |
skipped
|