| Published | Title | Version | Author | Status |
|---|---|---|---|---|
| 2025-11-18 10:15 UTC | amd_iommu: support up to 2048 MSI vectors per IRT | 1 | sarunkod@amd.com | skipped |
| 2025-09-01 17:04 UTC | x86/cpu/topology: Fix the preferred order of initial APIC ID parsing on AMD/Hygon | 5 | kprateek.nayak@amd.com | finished in 1h13m0s |
| 2025-08-25 07:57 UTC | x86/cpu/topology: Fix the preferred order of initial APIC ID parsing on AMD/Hygon | 4 | kprateek.nayak@amd.com | finished in 1h8m0s |
| 2025-08-18 06:04 UTC | x86/cpu/topology: Work around the nuances of virtualization on AMD/Hygon | 3 | kprateek.nayak@amd.com | finished in 1h14m0s |