Patch Series

Subject	amd_iommu: support up to 2048 MSI vectors per IRT
Author	sarunkod@amd.com
Date	2025-11-18 10:15:28 +0000 UTC
Version	1
Cc	alejandro.j.jimenez@oracle.com anisinha@redhat.com cohuck@redhat.com eduardo@habkost.net eric.auger@redhat.com imammedo@redhat.com iommu@lists.linux.dev joro@8bytes.org kevin.tian@intel.com kvm@vger.kernel.org marcel.apfelbaum@gmail.com mst@redhat.com pbonzini@redhat.com qemu-devel@nongnu.org richard.henderson@linaro.org sarunkod@amd.com seanjc@google.com suravee.suthikulpanit@amd.com vasant.hegde@amd.com yi.l.liu@intel.com zhenzhong.duan@intel.com

Patches (5)

Name	Content [All]
[RFC PATCH RESEND 1/5] [DO NOT MERGE] linux-headers: Introduce struct iommu_hw_info_amd	[Body]
[RFC PATCH RESEND 2/5] vfio/iommufd: Add amd specific hardware info struct to vendor capability	[Body]
[RFC PATCH RESEND 3/5] amd-iommu: Add support for set/unset IOMMU for VFIO PCI devices	[Body]
[RFC PATCH RESEND 4/5] amd_iommu: Add support for extended feature register 2	[Body]
[RFC PATCH RESEND 5/5] amd_iommu: Add support for upto 2048 interrupts per IRT	[Body]

Session 2025-11-18

ID (for dev)	9a6324ac-4b4b-4f29-8ebf-e7d663096754
Status	skipped
Triaged	Skipped: failed to find a base commit: series does not apply [Log]
Execution Log	[Link]

Test	Base	Patched	Verdict