Syzbot CI

Subject	dpll: add SiTime SiT9531x DPLL clock driver
Author	arouhi@sitime.com
Date	2026-11-10 20:26:09 +0000 UTC
Version
Cc	arkadiusz.kubalewski@intel.com arouhi@sitime.com cjubran@nvidia.com conor@kernel.org devicetree@vger.kernel.org ivecera@redhat.com jiri@resnulli.us krzk@kernel.org kuba@kernel.org linux-kernel@vger.kernel.org netdev@vger.kernel.org oleg.zadorozhnyi@devoxsoftware.com pabeni@redhat.com prabhakar.mahadev-lad.rj@bp.renesas.com robh@kernel.org vadim.fedorenko@linux.dev

Patches (13)

Expand

Name	Content [All]
[PATCH net-next v15 01/13] dpll: omit pin phase attributes the driver has no value for	[Body]
[PATCH net-next v15 02/13] dt-bindings: vendor-prefixes: add SiTime Corporation	[Body]
[PATCH net-next v15 03/13] dt-bindings: dpll: add SiTime SiT95316 clock generator	[Body]
[PATCH net-next v15 04/13] dpll: add basic SiTime SiT9531x support	[Body]
[PATCH net-next v15 05/13] dpll: sit9531x: read DPLL types and pin properties from system firmware	[Body]
[PATCH net-next v15 06/13] dpll: sit9531x: register DPLL devices and pins	[Body]
[PATCH net-next v15 07/13] dpll: sit9531x: implement input pin state on a DPLL	[Body]
[PATCH net-next v15 08/13] dpll: sit9531x: add support to get and set priority on input pins	[Body]
[PATCH net-next v15 09/13] dpll: sit9531x: add support to get and set frequency on pins	[Body]
[PATCH net-next v15 10/13] dpll: sit9531x: implement output pin state on a DPLL	[Body]
[PATCH net-next v15 11/13] dpll: sit9531x: add support to adjust output phase	[Body]
[PATCH net-next v15 12/13] dpll: sit9531x: add support to get phase offset on the connected input pin	[Body]
[PATCH net-next v15 13/13] dpll: sit9531x: model the inter-PLL sync line as a pair of pins	[Body]

Series Summary

waiting

Status: waiting

Sessions

Session 2026-11-10

waiting

ID (for dev)	35f3c668-175f-43bb-a81c-0482ca3898cb
Status	waiting

Test	Base	Patched	Verdict