Subject dpll: zl3073x: add PTP clock support
Author ivecera@redhat.com
Date 2026-08-07 09:58:24 +0000 UTC
Version
Cc arkadiusz.kubalewski@intel.com chris.duquesnay@microchip.com ivecera@redhat.com jiri@resnulli.us kuba@kernel.org linux-kernel@vger.kernel.org min.li@microchip.com netdev@vger.kernel.org pabeni@redhat.com poros@redhat.com richardcochran@gmail.com vadim.fedorenko@linux.dev
Patches (3)
Name Content [All]
[PATCH net-next v5 1/3] dpll: zl3073x: scale poll interval proportionally to timeout [Body]
[PATCH net-next v5 2/3] dpll: zl3073x: add channel ToD, phase step and TIE operations [Body]
[PATCH net-next v5 3/3] dpll: zl3073x: add PTP clock support [Body]
Series Summary
Passed
✓ All tests passed. No findings.
Sessions
Session 2026-08-07
Passed
ID (for dev) c286ff22-e634-4e47-9a0d-8c4fb0df0135
Status finished
Triaged OK [Log] [Trajectory]
Execution Log [Link]
Test Base Patched Verdict
[KASAN] Build Base 4fa4977a0d900f936bcae5cd2c510be5554e8dd6 [Config] passed [Log]
[KASAN] Boot test: Base 4fa4977a0d900f936bcae5cd2c510be5554e8dd6 [Config] passed [Log]
[KASAN] Build Patched 4fa4977a0d900f936bcae5cd2c510be5554e8dd6 [Config] [patched] passed [Log]
[KASAN] Boot test: Patched 4fa4977a0d900f936bcae5cd2c510be5554e8dd6 [Config] [patched] passed [Log]
[KASAN] Fuzz 4fa4977a0d900f936bcae5cd2c510be5554e8dd6 [Config] 4fa4977a0d900f936bcae5cd2c510be5554e8dd6 [Config] [patched] passed [Log] [Artifacts]