| Subject | SoCFPGA Agilex5: enable stmmac per-queue IRQs |
|---|---|
| Author | muhammad.nazim.amirul.nazle.asmade@altera.com |
| Date | 2026-08-17 07:42:20 +0000 UTC |
| Version | |
| Cc | andrew@lunn.ch conor@kernel.org davem@davemloft.net devicetree@vger.kernel.org dinguyen@kernel.org edumazet@google.com krzk@kernel.org kuba@kernel.org linux-arm-kernel@lists.infradead.org linux-kernel@vger.kernel.org maxime.chevallier@bootlin.com muhammad.nazim.amirul.nazle.asmade@altera.com netdev@vger.kernel.org pabeni@redhat.com robh@kernel.org |
| Name | Content [All] |
|---|---|
| [PATCH net-next 1/2] net: stmmac: dwmac-socfpga: Enable multi-IRQ when per-queue IRQs present | [Body] |
| [PATCH 2/2] arm64: dts: intel: agilex5: Add per-queue GMAC interrupts | [Body] |
| ID (for dev) | 35015810-dba4-4770-91ef-27b1aee9de14 |
|---|---|
| Status | skipped |
| Triaged | Skipped: AI determined the patch has no functional impact [Log] [Trajectory] |
| Execution Log | [Link] |
| Test | Base | Patched | Verdict |
|---|