Subject	ice: expose TSPLL state on E825 through dpll subsystem
Author	grzegorz.nitka@intel.com
Date	2026-07-31 12:12:14 +0000 UTC
Version	Version 1 Version 2
Cc	andrew@lunn.ch anthony.l.nguyen@intel.com arkadiusz.kubalewski@intel.com davem@davemloft.net edumazet@google.com grzegorz.nitka@intel.com intel-wired-lan@lists.osuosl.org kuba@kernel.org linux-kernel@vger.kernel.org netdev@vger.kernel.org pabeni@redhat.com przemyslaw.kitszel@intel.com przemyslaw.korba@intel.com richardcochran@gmail.com

Patches (3)

Name	Content [All]
[PATCH v2 iwl-next 1/3] ice: monitor TSPLL lock from PTP periodic worker	[Body]
[PATCH v2 iwl-next 2/3] ice: add TSPLL DPLL device and TIME_REF pin for E825	[Body]
[PATCH v2 iwl-next 3/3] ice: use per-interface clock_id for E825 generic DPLLs	[Body]

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