Syzbot CI

Subject	KVM: arm64: Add GICv5 IRS support
Author	sascha.bischoff@arm.com
Date	2026-07-03 15:51:03 +0000 UTC
Version
Cc	joey.gouly@arm.com kvm@vger.kernel.org kvmarm@lists.linux.dev linux-arm-kernel@lists.infradead.org lpieralisi@kernel.org maz@kernel.org nd@arm.com oliver.upton@linux.dev peter.maydell@linaro.org sascha.bischoff@arm.com suzuki.poulose@arm.com timothy.hayes@arm.com yuzenghui@huawei.com

Name	Content [All]
[PATCH v3 01/40] irqchip/gic-v5: Allow KVM setup without a maintenance IRQ	[Body]
[PATCH v3 02/40] irqchip/gic-v5: Provide OF IRS config frame attrs to KVM	[Body]
[PATCH v3 03/40] irqchip/gic-v5: Set up gic_kvm_info on ACPI hosts	[Body]
[PATCH v3 04/40] KVM: arm64: gic-v5: Define remaining IRS MMIO registers	[Body]
[PATCH v3 05/40] arm64/sysreg: Add GICv5 GIC VDPEND and VDRCFG encodings	[Body]
[PATCH v3 06/40] arm64/sysreg: Update ICC_CR0_EL1 with LINK and LINK_IDLE fields	[Body]
[PATCH v3 07/40] KVM: arm64: gic-v5: Extract host IRS caps from IRS config frame	[Body]
[PATCH v3 08/40] KVM: arm64: gic-v5: Add VPE doorbell domain	[Body]
[PATCH v3 09/40] KVM: arm64: gic-v5: Create and manage VM and VPE tables	[Body]
[PATCH v3 10/40] KVM: arm64: gic-v5: Introduce guest IST alloc and management	[Body]
[PATCH v3 11/40] KVM: arm64: gic-v5: Implement VMT/vIST IRS MMIO Ops	[Body]
[PATCH v3 12/40] KVM: arm64: gic-v5: Keep GICv5 vCPU limit model-specific	[Body]
[PATCH v3 13/40] KVM: arm64: gic-v5: Implement VPE IRS MMIO Ops	[Body]
[PATCH v3 14/40] KVM: arm64: gic-v5: Set up VMTEs and VPE doorbells	[Body]
[PATCH v3 15/40] KVM: arm64: gic-v5: Add resident/non-resident hyp calls	[Body]
[PATCH v3 16/40] KVM: arm64: gic-v5: Request doorbells when VPEs enter WFI	[Body]
[PATCH v3 17/40] KVM: arm64: gic-v5: Introduce struct vgic_v5_irs and IRS base address	[Body]
[PATCH v3 18/40] KVM: arm64: gic-v5: Add IRS IODEV support to MMIO handlers	[Body]
[PATCH v3 19/40] KVM: arm64: gic-v5: Add KVM_VGIC_V5_ADDR_TYPE_IRS to UAPI	[Body]
[PATCH v3 20/40] KVM: arm64: gic-v5: Add GICv5 IRS IODEV and MMIO emulation	[Body]
[PATCH v3 21/40] KVM: arm64: gic-v5: Initialise per-VM IRS state	[Body]
[PATCH v3 22/40] KVM: arm64: gic-v5: Register the IRS IODEV	[Body]
[PATCH v3 23/40] KVM: arm64: gic-v5: Set IRICHPPIDIS based on IRS enable state	[Body]
[PATCH v3 24/40] KVM: arm64: selftests: Update vGICv5 selftest to set IRS address	[Body]
[PATCH v3 25/40] KVM: arm64: gic-v5: Introduce SPI AP list	[Body]
[PATCH v3 26/40] KVM: arm64: gic-v5: Add GIC VDPEND and GIC VDRCFG hyp calls	[Body]
[PATCH v3 27/40] KVM: arm64: gic-v5: Track SPI state for in-flight SPIs	[Body]
[PATCH v3 28/40] KVM: arm64: gic: Introduce set_pending_state() to irq_op	[Body]
[PATCH v3 29/40] KVM: arm64: gic-v5: Support SPI injection	[Body]
[PATCH v3 30/40] Documentation: KVM: Extend VGICv5 docs for KVM_VGIC_V5_ADDR_TYPE_IRS	[Body]
[PATCH v3 31/40] KVM: arm64: gic-v5: Add GICv5 SPI injection to irqfd	[Body]
[PATCH v3 32/40] KVM: arm64: gic-v5: Mask per-vcpu PPI state in vgic_v5_finalize_ppi_state()	[Body]
[PATCH v3 33/40] KVM: arm64: gic-v5: Add GICv5 EL1 sysreg userspace accessors	[Body]
[PATCH v3 34/40] KVM: arm64: gic-v5: Handle userspace accesses to IRS MMIO region	[Body]
[PATCH v3 35/40] KVM: arm64: gic-v5: Add CoreSight MMIO regs to IRS	[Body]
[PATCH v3 36/40] KVM: arm64: gic-v5: Implement save/restore mechanisms for ISTs	[Body]
[PATCH v3 37/40] Documentation: KVM: Document KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS for VGICv5	[Body]
[PATCH v3 38/40] Documentation: KVM: Add KVM_DEV_ARM_VGIC_GRP_IRS_REGS to VGICv5 docs	[Body]
[PATCH v3 39/40] Documentation: KVM: Add docs for KVM_DEV_ARM_VGIC_GRP_IST	[Body]
[PATCH v3 40/40] Documentation: KVM: Add the VGICv5 IRS save/restore sequences	[Body]

Session 2026-07-03

Passed

ID (for dev)	ffaea323-a9a9-4776-8230-bfda5640ff4a
Status	finished
Triaged	OK [Log] [Trajectory]
Execution Log	[Link]

Test	Base	Patched	Verdict

Patches (40)

Series Summary

Sessions

Session 2026-07-03