Subject	dpll: zl3073x: add PTP clock support
Author	ivecera@redhat.com
Date	2026-07-30 13:21:48 +0000 UTC
Version	Version 1 Version 2 Version 3
Cc	arkadiusz.kubalewski@intel.com chris.duquesnay@microchip.com ivecera@redhat.com jiri@resnulli.us kuba@kernel.org linux-kernel@vger.kernel.org netdev@vger.kernel.org pabeni@redhat.com poros@redhat.com prathosh.satish@microchip.com richardcochran@gmail.com vadim.fedorenko@linux.dev

Patches (3)

Name	Content [All]
[PATCH net-next v3 1/3] dpll: zl3073x: add channel ToD, phase step and TIE operations	[Body]
[PATCH net-next v3 2/3] dpll: zl3073x: refactor output pin frequency set for internal use	[Body]
[PATCH net-next v3 3/3] dpll: zl3073x: add PTP clock support	[Body]

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