Syzbot CI

Subject	dpll: add SiTime SiT9531x DPLL clock driver
Author	arouhi@sitime.com
Date	2026-10-09 18:31:53 +0000 UTC
Version
Cc	arkadiusz.kubalewski@intel.com arouhi@sitime.com cjubran@nvidia.com conor@kernel.org devicetree@vger.kernel.org ivecera@redhat.com jiri@resnulli.us krzk@kernel.org kuba@kernel.org linux-kernel@vger.kernel.org netdev@vger.kernel.org oleg.zadorozhnyi@devoxsoftware.com pabeni@redhat.com robh@kernel.org vadim.fedorenko@linux.dev

Patches (12)

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Name	Content [All]
[PATCH net-next v12 01/12] dt-bindings: vendor-prefixes: add SiTime Corporation	[Body]
[PATCH net-next v12 02/12] dt-bindings: dpll: add SiTime SiT95316 clock generator	[Body]
[PATCH net-next v12 03/12] dpll: add basic SiTime SiT9531x support	[Body]
[PATCH net-next v12 04/12] dpll: sit9531x: read DPLL types and pin properties from system firmware	[Body]
[PATCH net-next v12 05/12] dpll: sit9531x: register DPLL devices and pins	[Body]
[PATCH net-next v12 06/12] dpll: sit9531x: implement input pin state on a DPLL	[Body]
[PATCH net-next v12 07/12] dpll: sit9531x: add support to get and set priority on input pins	[Body]
[PATCH net-next v12 08/12] dpll: sit9531x: add support to get and set frequency on pins	[Body]
[PATCH net-next v12 09/12] dpll: sit9531x: implement output pin state on a DPLL	[Body]
[PATCH net-next v12 10/12] dpll: sit9531x: add support to adjust output phase	[Body]
[PATCH net-next v12 11/12] dpll: sit9531x: add support to get phase offset on the connected input pin	[Body]
[PATCH net-next v12 12/12] dpll: sit9531x: model the inter-PLL sync net as a pair of pins	[Body]

Series Summary

skipped

Session skipped: AI determined the patch has no functional impact

Sessions

Session 2026-10-09

skipped

ID (for dev)	a166062e-e29e-4185-96c4-76f8c6d4c50f
Status	skipped
Triaged	Skipped: AI determined the patch has no functional impact [Log] [Trajectory]
Execution Log	[Link]

Test	Base	Patched	Verdict