Syzbot CI

Subject	vfio/pci: Add CXL Type-2 device passthrough support
Author	mhonap@nvidia.com
Date	2026-09-16 18:35:14 +0000 UTC
Version
Cc	alejandro.lucero-palau@amd.com alex@shazbot.org alison.schofield@intel.com ankita@nvidia.com bhelgaas@google.com cjia@nvidia.com corbet@lwn.net dave.jiang@intel.com dave@stgolabs.net dmatlack@google.com gustavoars@kernel.org iweiny@kernel.org jgg@ziepe.ca jic23@kernel.org kees@kernel.org kevin.tian@intel.com kjaju@nvidia.com kvm@vger.kernel.org linux-cxl@vger.kernel.org linux-doc@vger.kernel.org linux-hardening@vger.kernel.org linux-kernel@vger.kernel.org linux-kselftest@vger.kernel.org linux-pci@vger.kernel.org mhonap@nvidia.com ming.li@zohomail.com skhan@linuxfoundation.org skolothumtho@nvidia.com smadhavan@nvidia.com vishal.l.verma@intel.com vsethi@nvidia.com yishaih@nvidia.com zhiw@nvidia.com

Name	Content [All]
[PATCH v5 01/27] cxl/regs: Split the BAR block request and ioremap helpers	[Body]
[PATCH v5 02/27] cxl/regs: Let a BAR-owning driver own the component register block	[Body]
[PATCH v5 03/27] cxl: Move component register defines to uapi/cxl/cxl_regs.h	[Body]
[PATCH v5 04/27] cxl: Add cxl_reset_dvsec_sequence() for vfio-pci	[Body]
[PATCH v5 05/27] vfio/pci: Add the CXL provider ops registration interface	[Body]
[PATCH v5 06/27] vfio/pci: Detect CXL devices and load the CXL provider on demand	[Body]
[PATCH v5 07/27] vfio/pci: Honor -EPROBE_DEFER from CXL provider probe	[Body]
[PATCH v5 08/27] vfio/pci: Fall back to plain vfio-pci when CXL init fails	[Body]
[PATCH v5 09/27] vfio/pci: Add a generic excluded-range list	[Body]
[PATCH v5 10/27] vfio/pci: Migrate MSI-X exclusion onto the generic excluded-range list	[Body]
[PATCH v5 11/27] vfio/pci: Virtualize the CXL DVSEC in vfio_pci_config.c	[Body]
[PATCH v5 12/27] vfio/pci: Call the CXL open and close hooks around device use	[Body]
[PATCH v5 13/27] vfio/pci: Bracket PCI resets with the CXL reset hooks	[Body]
[PATCH v5 14/27] vfio/pci: Provide an opt-out for the CXL Type-2 extensions	[Body]
[PATCH v5 15/27] vfio/cxl: Add the vfio-cxl provider module skeleton	[Body]
[PATCH v5 16/27] vfio/cxl: Create the CXL memdev and set media ready at bind	[Body]
[PATCH v5 17/27] vfio/cxl: Own the whole component register BAR	[Body]
[PATCH v5 18/27] vfio/cxl: Expose the HDM memory region to the guest	[Body]
[PATCH v5 19/27] vfio/cxl: Contain HDM memory errors with memory_failure()	[Body]
[PATCH v5 20/27] vfio/cxl: Expose the HDM decoder registers read-only to the guest	[Body]
[PATCH v5 21/27] vfio/cxl: Exclude the HDM decoder registers from direct BAR access	[Body]
[PATCH v5 22/27] vfio/cxl: Clear the HDM access gate after a hot reset	[Body]
[PATCH v5 23/27] vfio/cxl: Describe the CXL device and decoder geometry to userspace	[Body]
[PATCH v5 24/27] vfio/cxl: Export the HDM memory region as a dma-buf	[Body]
[PATCH v5 25/27] vfio/cxl: Run the CXL reset at the vfio reset points	[Body]
[PATCH v5 26/27] Documentation: vfio-pci: Document CXL Type-2 device passthrough	[Body]
[PATCH v5 27/27] selftests/vfio: Add CXL Type-2 passthrough tests	[Body]

Series Summary

skipped

Session skipped: failed to find a base commit: series does not apply

Sessions

Session 2026-09-16

skipped

ID (for dev)	0bc81457-5e3c-494f-a1c3-fc83686c2b94
Status	skipped
Triaged	Skipped: failed to find a base commit: series does not apply [Log]
Execution Log	[Link]

Test	Base	Patched	Verdict

Patches (27)

Series Summary

Sessions

Session 2026-09-16