Subject target/i386: Fix Hygon vendor-specific CPU behavior
Author zhang_wei@open-hieco.net
Date 2026-07-06 05:55:22 +0000 UTC
Version
Cc kvm@vger.kernel.org mst@redhat.com mtosatti@redhat.com pbonzini@redhat.com qemu-devel@nongnu.org zhang_wei@open-hieco.net zhouyanjing@hygon.cn
Patches (9)
Name Content [All]
[PATCH v1 1/9] target/i386: Sync AMD CPUID aliases for Hygon [Body]
[PATCH v1 2/9] target/i386: Hide Intel cache CPUID leaves for Hygon [Body]
[PATCH v1 3/9] target/i386: Hide ARCH_CAPABILITIES for Hygon [Body]
[PATCH v1 4/9] target/i386/kvm: Use AMD MCE status encoding for Hygon [Body]
[PATCH v1 5/9] target/i386/kvm: Use AMD PMU MSR paths for Hygon [Body]
[PATCH v1 6/9] target/i386: Do not broadcast injected MCEs for Hygon [Body]
[PATCH v1 7/9] hw/i386: Apply AMD IOMMU HT GPA hole to Hygon [Body]
[PATCH v1 8/9] target/i386: Use AMD legacy cache fallback for Hygon [Body]
[PATCH v1 9/9] target/i386: Use AMD ucode-rev default for Hygon [Body]
Session 2026-07-06
ID (for dev) 5707568c-df76-4476-bc62-b666fc8f135d
Status skipped
Triaged Skipped: failed to find a base commit: series does not apply [Log]
Execution Log [Link]
Test Base Patched Verdict