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Published Title Version Author Status
2026-10-15 08:47 UTC net: axienet: release every RX buffer in axienet_dma_bd_release() 1 maimon.sagi@gmail.com skipped
2026-10-14 14:57 UTC kexec,mm/cma: do not run the next kernel from a fixed-base CMA area 1 radhey.shyam.pandey@amd.com finished in 4h26m0s
2026-10-13 18:25 UTC net: axienet: don't advance the TX ring head before the descriptor is ready 1 josef@toxicpanda.com skipped
2026-10-07 03:46 UTC net: axienet: free outstanding TX buffers in axienet_dma_bd_release() 4 maimon.sagi@gmail.com skipped
2026-10-06 11:05 UTC net: xilinx: axienet: Add 10G/25G (XXV) ethernet support 4 suraj.gupta2@amd.com skipped
2026-10-05 09:01 UTC net: axienet: Clear stale AXI DMA TX/RX status before re-enabling interrupts 1 kusuma.vasana@amd.com skipped
2026-10-04 08:37 UTC net: axienet: free outstanding TX buffers in axienet_dma_bd_release() 3 maimon.sagi@gmail.com skipped
2026-10-04 06:59 UTC net: axienet: do not report TX completions as NAPI work 5 maimon.sagi@gmail.com skipped
2026-09-30 13:38 UTC net: axienet: free outstanding TX buffers in axienet_dma_bd_release() 2 maimon.sagi@gmail.com skipped
2026-09-30 07:15 UTC net: axienet: cap the TX poll return value at the NAPI budget 4 maimon.sagi@gmail.com skipped
2026-09-29 08:13 UTC net: xilinx: axienet: Derive RX frame length from residue in dmaengine path 1 srinivas.neeli@amd.com skipped
2026-09-28 18:42 UTC net: xilinx: axienet: Free outstanding DMA buffers on dmaengine stop 4 suraj.gupta2@amd.com skipped
2026-09-28 07:42 UTC net: axienet: allow instantiation without a device tree 2 maimon.sagi@gmail.com skipped
2026-09-27 08:10 UTC net: axienet: free outstanding TX buffers in axienet_dma_bd_release() 1 maimon.sagi@gmail.com skipped
2026-09-27 07:38 UTC net: axienet: allow instantiation without a device tree 1 maimon.sagi@gmail.com skipped
2026-09-24 13:51 UTC net: axienet: fix TX queue handling around a DMA error reset 2 maimon.sagi@gmail.com skipped
2026-09-24 13:50 UTC net: axienet: bound TX completion cleanup by the NAPI budget 3 maimon.sagi@gmail.com skipped
2026-09-24 08:54 UTC net: xilinx: axienet: Free outstanding DMA buffers on dmaengine stop 3 suraj.gupta2@amd.com skipped
2026-09-17 12:13 UTC net: axienet: restart the TX queue after a DMA error reset 1 maimon.sagi@gmail.com skipped
2026-09-17 11:56 UTC net: axienet: bound TX completion cleanup by the NAPI budget 2 maimon.sagi@gmail.com skipped
2026-09-17 10:05 UTC net: xilinx: axienet: Free outstanding DMA buffers on dmaengine stop 2 suraj.gupta2@amd.com skipped
2026-09-15 06:55 UTC net: axienet: add a TX timeout handler to recover a lost DMA interrupt 1 maimon.sagi@gmail.com skipped
2026-09-14 11:48 UTC net: axienet: bound TX completion cleanup by the NAPI budget 1 maimon.sagi@gmail.com skipped
2026-09-10 14:19 UTC net: xilinx: axienet: Free outstanding DMA buffers on dmaengine stop 1 suraj.gupta2@amd.com skipped
2026-09-09 04:54 UTC net: xilinx: axienet: Fix IRQ error handling 6 phucduc.bui@gmail.com skipped
2026-09-06 15:32 UTC net: axienet: Clear stale AXI DMA TX/RX status before re-enabling interrupts 1 kusuma.vasana@amd.com skipped
2026-09-03 07:32 UTC net: xilinx: axienet: Fix IRQ error handling 5 phucduc.bui@gmail.com skipped
2026-08-31 15:08 UTC net: xilinx: axienet: Add 10G/25G (XXV) ethernet support 3 suraj.gupta2@amd.com skipped
2026-08-21 12:32 UTC net: xilinx: axienet: Fix IRQ error handling 4 phucduc.bui@gmail.com skipped
2026-08-18 17:41 UTC dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements 1 srinivas.neeli@amd.com finished in 3h3m0s
2026-08-17 10:52 UTC net: xilinx: axienet: Propagate errors from optional IRQ lookup 3 phucduc.bui@gmail.com skipped
2026-08-13 04:20 UTC net: xilinx: axienet: Propagate errors from optional IRQ lookup 2 phucduc.bui@gmail.com skipped
2026-08-11 03:47 UTC net: xilinx: axienet: Propagate errors from optional IRQ lookup 1 phucduc.bui@gmail.com skipped
2026-08-06 18:11 UTC net: xilinx: axienet: Add 10G/25G (XXV) ethernet support 2 suraj.gupta2@amd.com skipped
2026-08-06 17:02 UTC net: xilinx: axienet: Treat xlnx,rxmem as a required property 1 suraj.gupta2@amd.com skipped
2026-07-23 12:38 UTC net: xilinx: axienet: Add 10G/25G (XXV) ethernet support 1 suraj.gupta2@amd.com skipped
2026-07-17 09:08 UTC dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements 5 srinivas.neeli@amd.com finished in 1h46m0s
2026-07-16 12:48 UTC net: axienet: Clear stale AXI DMA TX/RX status before re-enabling interrupts 1 kusuma.vasana@amd.com skipped
2026-07-13 07:21 UTC dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements 4 srinivas.neeli@amd.com skipped
2026-07-08 10:06 UTC dmaengine: xilinx_dma: MCDMA descriptor and metadata handling improvements 1 srinivas.neeli@amd.com skipped
2026-06-01 12:44 UTC net: axienet: Use dedicated ethtool_ops for the dmaengine path 1 suraj.gupta2@amd.com finished in 1h46m0s
2026-03-27 07:32 UTC Correct BD length masks and BQL accounting for multi-BD TX packets 1 suraj.gupta2@amd.com finished in 2h2m0s
2026-03-26 18:55 UTC Correct BD length masks and BQL accounting for multi-BD TX packets 1 suraj.gupta2@amd.com finished in 1h24m0s
2026-03-24 14:53 UTC Correct BD length masks and BQL accounting for multi-BD TX packets 1 suraj.gupta2@amd.com finished in 1h27m0s
2026-01-16 19:27 UTC Add devm_clk_bulk_get_optional_enable() helper and use in AXI Ethernet driver 1 suraj.gupta2@amd.com finished in 2h7m0s
2026-01-13 18:10 UTC Add devm_clk_bulk_get_optional_enable() helper and use in AXI Ethernet driver 1 suraj.gupta2@amd.com finished in 1h58m0s
2026-01-09 07:10 UTC Add devm_clk_bulk_get_optional_enable() helper and use in AXI Ethernet driver 1 suraj.gupta2@amd.com finished in 1h47m0s
2026-01-02 08:54 UTC Add devm_clk_bulk_get_optional_enable() helper and use in AXI Ethernet driver 1 suraj.gupta2@amd.com finished in 1h43m0s
2025-09-19 10:37 UTC net: xilinx: axienet: Fix kernel-doc warnings for missing return descriptions 1 suraj.gupta2@amd.com finished in 39m0s
2025-09-17 12:49 UTC net: xilinx: axienet: Fix kernel-doc warning for axienet_free_tx_chain return value 1 suraj.gupta2@amd.com finished in 52m0s
2025-09-11 07:28 UTC Fix Linux style violations 1 suraj.gupta2@amd.com finished in 47m0s
2025-09-03 02:52 UTC net: xilinx: axienet: Add error handling for RX metadata pointer retrieval 3 abin.joseph@amd.com finished in 46m0s
2025-09-02 01:32 UTC net: xilinx: axienet: Add error handling for RX metadata pointer retrieval 2 abin.joseph@amd.com finished in 36m0s
2025-08-26 18:05 UTC net: xilinx: axienet: Add error handling for RX metadata pointer retrieval 1 abin.joseph@amd.com finished in 45m0s
2025-08-13 13:55 UTC net: xilinx: axienet: Fix RX skb ring management in DMAengine mode 1 suraj.gupta2@amd.com finished in 1h34m0s
2025-08-05 19:19 UTC net: xilinx: axienet: Increment Rx skb ring head pointer after BD is successfully allocated in dmaengine flow 1 suraj.gupta2@amd.com finished in 34m0s
[1 findings]
2025-08-05 15:34 UTC net: axienet: Fix deferred probe loop 4 sean.anderson@linux.dev finished in 1h28m0s
2025-07-28 22:18 UTC net: axienet: Fix deferred probe loop 3 sean.anderson@linux.dev finished in 1h45m0s
2025-07-16 00:01 UTC net: axienet: Fix deferred probe loop 2 sean.anderson@linux.dev finished in 3h42m0s
2025-07-10 18:37 UTC net: ll_temac: Fix incorrect PHY node reference in debug message 1 alok.a.tiwari@oracle.com finished in 3h36m0s
2025-07-10 18:06 UTC net: ll_temac: Fix missing tx_pending check in ethtools_set_ringparam() 1 alok.a.tiwari@oracle.com finished in 3h40m0s
2025-07-10 17:38 UTC net: emaclite: Fix missing pointer increment in aligned_read() 1 alok.a.tiwari@oracle.com finished in 3h37m0s
2025-07-10 10:12 UTC Add ethtool support to configure irq coalescing count and delay 1 suraj.gupta2@amd.com finished in 3h41m0s