| Published | Title | Version | Author | Status |
|---|---|---|---|---|
| 2026-03-26 18:55 UTC | Correct BD length masks and BQL accounting for multi-BD TX packets | 1 | suraj.gupta2@amd.com | finished in 1h24m0s |
| 2026-03-24 14:53 UTC | Correct BD length masks and BQL accounting for multi-BD TX packets | 1 | suraj.gupta2@amd.com | finished in 1h27m0s |
| 2026-03-18 06:36 UTC | net: macb: Fix two lock warnings when WOL is used | 2 | haokexin@gmail.com | finished in 1h4m0s |
| 2026-03-15 11:44 UTC | net: macb: Fix two lock warnings when WOL is used | 1 | haokexin@gmail.com | finished in 58m0s |
| 2025-09-19 10:37 UTC | net: xilinx: axienet: Fix kernel-doc warnings for missing return descriptions | 1 | suraj.gupta2@amd.com | finished in 39m0s |
| 2025-09-17 12:49 UTC | net: xilinx: axienet: Fix kernel-doc warning for axienet_free_tx_chain return value | 1 | suraj.gupta2@amd.com | finished in 52m0s |
| 2025-09-11 07:28 UTC | Fix Linux style violations | 1 | suraj.gupta2@amd.com | finished in 47m0s |
| 2025-08-13 13:55 UTC | net: xilinx: axienet: Fix RX skb ring management in DMAengine mode | 1 | suraj.gupta2@amd.com | finished in 1h34m0s |
| 2025-08-05 19:19 UTC | net: xilinx: axienet: Increment Rx skb ring head pointer after BD is successfully allocated in dmaengine flow | 1 | suraj.gupta2@amd.com |
finished
in 34m0s
[1 findings] |
| 2025-07-10 10:12 UTC | Add ethtool support to configure irq coalescing count and delay | 1 | suraj.gupta2@amd.com | finished in 3h41m0s |