| 2026-01-09 08:22 UTC |
KVM: selftests: Alignment fixes and arm64 MMU cleanup |
4 |
tabba@google.com |
finished
in 54m0s
|
| 2026-01-06 16:28 UTC |
RISC-V: KVM: fix __le64 type assignments |
1 |
ben.dooks@codethink.co.uk |
finished
in 49m0s
|
| 2026-01-05 14:32 UTC |
Support runtime configuration for per-VM's HGATP mode |
2 |
fangyu.yu@linux.alibaba.com |
skipped
|
| 2026-01-04 13:59 UTC |
riscv: fix timer update hazards on RV32 |
3 |
naohiko.shimizu@gmail.com |
finished
in 1h4m0s
|
| 2026-01-04 13:34 UTC |
irqchip/riscv-imsic: Adjust the number of available guest irq files |
5 |
luxu.kernel@bytedance.com |
finished
in 1h3m0s
|
| 2026-01-03 15:23 UTC |
riscv: Fix potential spurious timer interrupts on RV32 |
2 |
naohiko.shimizu@gmail.com |
finished
in 50m0s
|
| 2026-01-03 09:44 UTC |
riscv: Fix potential spurious timer interrupts on RV32 |
1 |
naohiko.shimizu@gmail.com |
finished
in 51m0s
|
| 2025-12-29 07:25 UTC |
RISC-V: KVM: Remove unnecessary 'ret' assignments |
1 |
maqianga@uniontech.com |
finished
in 57m0s
|
| 2025-12-22 09:37 UTC |
irqchip/riscv-imsic: Adjust the number of available guest irq files |
4 |
luxu.kernel@bytedance.com |
finished
in 49m0s
|
| 2025-12-20 16:37 UTC |
irqchip/riscv-imsic: Adjust the number of available guest irq files |
3 |
luxu.kernel@bytedance.com |
finished
in 50m0s
|
| 2025-12-20 09:08 UTC |
irqchip/riscv-imsic: Adjust vs irq files num according to MMIO resources |
2 |
luxu.kernel@bytedance.com |
finished
in 50m0s
|
| 2025-12-20 08:55 UTC |
irqchip/riscv-imsic: Adjust vs irq files num according to MMIO resources |
1 |
luxu.kernel@bytedance.com |
finished
in 59m0s
|
| 2025-12-01 00:30 UTC |
RISC-V: Add PARAVIRT_SPINLOCKS support |
1 |
guoren@kernel.org |
finished
in 49m0s
|
| 2025-11-27 08:51 UTC |
RISC-V: KVM: Transparent huge page support |
4 |
liu.xuemei1@zte.com.cn |
finished
in 55m0s
|
| 2025-11-22 07:50 UTC |
RISC-V: KVM: Allow to downgrade HGATP mode via SATP mode |
1 |
fangyu.yu@linux.alibaba.com |
finished
in 49m0s
|
| 2025-11-21 13:35 UTC |
RISC-V: KVM: Fix guest page fault within HLV* instructions |
3 |
fangyu.yu@linux.alibaba.com |
finished
in 1h0m0s
|
| 2025-11-17 08:45 UTC |
RISC-V: KVM: Flush VS-stage TLB after VCPU migration for split two-stage TLBs |
4 |
minachou@andestech.com |
finished
in 1h0m0s
|
| 2025-11-11 13:55 UTC |
RISC-V: KVM: Fix guest page fault within HLV* instructions |
2 |
fangyu.yu@linux.alibaba.com |
finished
in 45m0s
|
| 2025-11-11 04:49 UTC |
RISC-V: KVM: Transparent huge page support |
3 |
liu.xuemei1@zte.com.cn |
finished
in 36m0s
|
| 2025-10-23 03:25 UTC |
RISC-V: KVM: flush VS-stage TLB after VCPU migration to prevent stale entries |
3 |
minachou@andestech.com |
finished
in 38m0s
|
| 2025-10-21 14:21 UTC |
RISC-V: KVM: Remove automatic I/O mapping for VM_PFNMAP |
2 |
fangyu.yu@linux.alibaba.com |
finished
in 46m0s
|
| 2025-10-21 08:31 UTC |
RISC-V: KVM: flush VS-stage TLB after VCPU migration to prevent stale entries |
2 |
minachou@andestech.com |
finished
in 51m0s
|
| 2025-10-20 13:08 UTC |
RISC-V: KVM: Remove automatic I/O mapping for VM_PFNMAP |
1 |
fangyu.yu@linux.alibaba.com |
finished
in 49m0s
|
| 2025-10-17 15:59 UTC |
SBI MPXY support for KVM Guest |
1 |
apatel@ventanamicro.com |
finished
in 52m0s
|
| 2025-10-16 01:26 UTC |
RISC-V: KVM: Read HGEIP CSR on the correct cpu |
1 |
fangyu.yu@linux.alibaba.com |
finished
in 54m0s
|
| 2025-10-16 00:17 UTC |
RISC-V: KVM: Fix check for local interrupts on riscv32 |
1 |
samuel.holland@sifive.com |
finished
in 40m0s
|
| 2025-10-02 03:34 UTC |
RISC-V: KVM: flush VS-stage TLB after VCPU migration to prevent stale entries |
1 |
ben717@andestech.com |
finished
in 39m0s
|
| 2025-09-30 16:36 UTC |
KVM Selftest Runner |
3 |
vipinsh@google.com |
finished
in 40m0s
|
| 2025-09-23 05:38 UTC |
RISC-V: KVM: Introduce KVM_EXIT_FAIL_ENTRY_NO_VSFILE |
2 |
xiangwencheng@lanxincomputing.com |
finished
in 42m0s
|
| 2025-09-20 20:38 UTC |
iommu/riscv: Add irqbypass support |
2 |
ajones@ventanamicro.com |
finished
in 1h8m0s
|
| 2025-09-19 07:37 UTC |
riscv: Add Zalasr ISA extension support |
3 |
luxu.kernel@bytedance.com |
finished
in 36m0s
|
| 2025-09-18 07:39 UTC |
RISCV: KVM: Add support for userspace to suspend a vCPU |
1 |
qiaozhe@iscas.ac.cn |
finished
in 39m0s
|
| 2025-09-15 15:27 UTC |
kvm/riscv: Add ctxsstatus and ctxhstatus for migration |
1 |
tjytimi@163.com |
finished
in 1h43m0s
|
| 2025-09-15 12:23 UTC |
KVM: riscv: Power on secondary vCPUs from migration |
1 |
tjytimi@163.com |
finished
in 48m0s
|
| 2025-09-15 05:34 UTC |
RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm |
1 |
samuel.holland@sifive.com |
skipped
|
| 2025-09-12 14:01 UTC |
RISC-V: KVM: Fix guest page fault within HLV* instructions |
1 |
fangyu.yu@linux.alibaba.com |
skipped
|
| 2025-09-12 13:43 UTC |
RISC-V: KVM: Fix guest page fault within HLV* instructions |
1 |
fangyu.yu@linux.alibaba.com |
finished
in 1h3m0s
|
| 2025-09-01 07:35 UTC |
KVM: riscv: selftests: Enable supported test cases |
3 |
dayss1224@gmail.com |
finished
in 46m0s
|
| 2025-08-25 12:14 UTC |
riscv: skip csr restore if vcpu preempted reload |
3 |
tjytimi@163.com |
finished
in 37m0s
|
| 2025-08-25 11:07 UTC |
riscv: skip csr restore if vcpu preempted reload |
2 |
tjytimi@163.com |
finished
in 36m0s
|
| 2025-08-23 15:59 UTC |
ONE_REG interface for SBI FWFT extension |
3 |
apatel@ventanamicro.com |
skipped
|
| 2025-08-21 14:25 UTC |
Fixup & optimize hgatp mode & vmid detect functions |
1 |
guoren@kernel.org |
finished
in 42m0s
|
| 2025-08-21 03:17 UTC |
Fixup & optimize hgatp mode & vmid detect functions |
1 |
guoren@kernel.org |
finished
in 45m0s
|
| 2025-08-20 12:59 UTC |
Fix hgatp mode settings within kvm_riscv_gstage_vmid_detect |
3 |
fangyu.yu@linux.alibaba.com |
finished
in 36m0s
|
| 2025-08-19 06:44 UTC |
RISC-V KVM: Remove unnecessary HGATP csr_read |
1 |
guoren@kernel.org |
skipped
|
| 2025-08-19 02:01 UTC |
RISC-V: KVM: Prevent HGATP_MODE_BARE passed |
1 |
fangyu.yu@linux.alibaba.com |
skipped
|
| 2025-08-19 00:46 UTC |
RISC-V: KVM: Prevent HGATP_MODE_BARE passed |
1 |
guoren@kernel.org |
finished
in 3h45m0s
|
| 2025-08-18 05:42 UTC |
RISC-V: KVM: Write hgatp register with valid mode bits |
1 |
fangyu.yu@linux.alibaba.com |
finished
in 1h13m0s
|
| 2025-08-17 12:33 UTC |
ONE_REG interface for SBI FWFT extension |
2 |
apatel@ventanamicro.com |
skipped
|
| 2025-08-16 07:32 UTC |
RISC-V: KVM: Write hgatp register with valid mode bits |
1 |
fangyu.yu@linux.alibaba.com |
finished
in 1h14m0s
|
| 2025-08-14 15:55 UTC |
ONE_REG interface for SBI FWFT extension |
1 |
apatel@ventanamicro.com |
skipped
|
| 2025-08-07 14:59 UTC |
KVM: riscv: selftests: Enable supported test cases |
2 |
dayss1224@gmail.com |
finished
in 1h5m0s
|
| 2025-08-07 11:42 UTC |
riscv: skip csr restore if vcpu preempted reload |
1 |
tjytimi@163.com |
finished
in 1h5m0s
|
| 2025-08-07 07:07 UTC |
RISC-V: KVM: Using user-mode pte within kvm_riscv_gstage_ioremap |
1 |
fangyu.yu@linux.alibaba.com |
skipped
|