| Seq | Timestamp | Type | Name | Duration |
|---|---|---|---|---|
| 0/0 | 2026/09/10 05:35 | flow | patch-triage |
1mArgs:null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"KMSANReasoning": "",
"NeedsKMSAN": false,
"Reasoning": "The patch modifies Tx DMA mapping error unwinding logic in `stmmac_xmit()` within the STMicroelectronics / Synopsys DesignWare Ethernet MAC (stmmac) driver (`drivers/net/ethernet/stmicro/stmmac/stmmac_main.c`). This driver targets specific SoC/PCI hardware IP blocks (STMMAC/DWMAC) that are not emulated in standard QEMU/GCE virtualized fuzzing environments, making the modified code structurally unreachable.",
"WorthFuzzing": false
} |
| 1/1 | 2026/09/10 05:35 | action | read-patch-diff |
0mArgs:null Results: {
"PatchDiff": "commit 4a6c9ab74a37829d5d0dbd8a0b8619a27a1bd8d0\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Thu Sep 10 05:35:40 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\nindex 24656b35350b1..2e36c27e2cfb4 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n@@ -4769,12 +4769,12 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)\n \tunsigned int nopaged_len = skb_headlen(skb);\n \tu32 queue = skb_get_queue_mapping(skb);\n \tint nfrags = skb_shinfo(skb)-\u003enr_frags;\n-\tunsigned int first_entry, tx_packets;\n+\tunsigned int first_entry, entry, tx_packets;\n \tstruct stmmac_txq_stats *txq_stats;\n \tstruct dma_desc *desc, *first_desc;\n \tstruct stmmac_tx_queue *tx_q;\n \tint i, csum_insertion = 0;\n-\tint entry, first_tx;\n+\tint first_tx, ret;\n \tdma_addr_t dma_addr;\n \tu32 sdu_len;\n \n@@ -4832,9 +4832,10 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)\n \tcsum_insertion = skb-\u003eip_summed == CHECKSUM_PARTIAL;\n \n \tif (unlikely(is_jumbo)) {\n-\t\tentry = stmmac_jumbo_frm(priv, tx_q, skb, csum_insertion);\n-\t\tif (unlikely(entry \u003c 0) \u0026\u0026 (entry != -EINVAL))\n+\t\tret = stmmac_jumbo_frm(priv, tx_q, skb, csum_insertion);\n+\t\tif (unlikely(ret \u003c 0) \u0026\u0026 (ret != -EINVAL))\n \t\t\tgoto dma_map_err;\n+\t\tentry = ret;\n \t} else {\n \t\tbool last_segment = (nfrags == 0);\n \n@@ -4984,6 +4985,26 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)\n \n dma_map_err:\n \tnetdev_err(priv-\u003edev, \"Tx DMA map failed\\n\");\n+\n+\t/* entry points one past the last descriptor written for this frame:\n+\t * on failure it is the descriptor whose DMA mapping failed, so walk\n+\t * from first_entry up to, but not including, entry. Reset cur_tx\n+\t * unconditionally as both stmmac_vlan_insert() and stmmac_jumbo_frm()\n+\t * may have advanced it, and release the VLAN context descriptor.\n+\t */\n+\twhile (first_entry != entry) {\n+\t\tdesc = stmmac_get_tx_desc(priv, tx_q, first_entry);\n+\t\tstmmac_release_tx_desc(priv, desc, priv-\u003edescriptor_mode);\n+\t\tstmmac_free_tx_buffer(priv, \u0026priv-\u003edma_conf, queue, first_entry);\n+\t\tfirst_entry = STMMAC_NEXT_ENTRY(first_entry,\n+\t\t\t\t\t\tpriv-\u003edma_conf.dma_tx_size);\n+\t}\n+\n+\ttx_q-\u003ecur_tx = first_tx;\n+\tif (has_vlan) {\n+\t\tdesc = stmmac_get_tx_desc(priv, tx_q, first_tx);\n+\t\tstmmac_release_tx_desc(priv, desc, priv-\u003edescriptor_mode);\n+\t}\n max_sdu_err:\n \tdev_kfree_skb(skb);\n \tpriv-\u003exstats.tx_dropped++;\n"
} |
| 2/1 | 2026/09/10 05:35 | agent | patch-evaluator |
0mModel:core Args: null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch modifies Tx DMA mapping error unwinding logic in `stmmac_xmit()` within the STMicroelectronics / Synopsys DesignWare Ethernet MAC (stmmac) driver (`drivers/net/ethernet/stmicro/stmmac/stmmac_main.c`). This driver targets specific SoC/PCI hardware IP blocks (STMMAC/DWMAC) that are not emulated in standard QEMU/GCE virtualized fuzzing environments, making the modified code structurally unreachable.",
"WorthFuzzing": false
}Instruction: You are an expert Linux kernel maintainer and security engineer.
Your job is to review a provided patch series and evaluate whether it warrants fuzzing with syzkaller.
IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in
your workspace. Do NOT rely on internal assumptions. You must actively use your code access
tools to inspect the actual source code, callers, and surrounding context.
================================================================================
1. CORE TRIAGE PHILOSOPHY
================================================================================
The goal of patch fuzzing is to discover crashes, regressions, exposed latent bugs,
and newly triggered assertions introduced by the patch series.
- REACHABILITY IS THE PRIMARY GATE:
Fuzzing can only discover bugs in code that can actually execute in standard virtualized
environments (GCE or QEMU, utilizing software-emulated devices like USB gadgets, netdev, tun/tap).
If the modified code is structurally unreachable (see Section 2), it MUST NOT be fuzzed,
regardless of whether it adds assertions or complex logic.
- DO NOT BLINDLY TRUST "NO FUNCTIONAL CHANGE" (NFCI) OR "REFACTORING" CLAIMS:
Patch authors routinely label changes as "cleanups", "refactorings", or state
"No functional change intended". Do NOT take these claims at face value.
Code refactorings that rearrange logic, introduce helper functions, or alter state management
in core subsystems frequently introduce subtle semantic shifts or uncover latent kernel bugs.
If reachable executable code is modified or refactored, it MUST be fuzzed.
- NEW OR MODIFIED ASSERTIONS IN REACHABLE CODE MUST BE FUZZED:
When a patch introduces or modifies runtime checks or assertions (e.g., WARN_ON*, VM_WARN_ON*,
BUG_ON*, lockdep_assert*) in reachable code paths, it enforces new or stricter invariants.
Even if the author believes the invariant always holds, fuzzing is essential to verify whether
an unusual sequence of operations can violate it.
================================================================================
2. WHEN TO RETURN WorthFuzzing=false (NEGATIVE CRITERIA)
================================================================================
Return WorthFuzzing=false ONLY IF all modified code falls strictly into one or more of these categories:
- Non-kernel and non-executable changes:
* Modifications to Documentation/, comments, or spelling fixes.
* User-space directories, self-tests, samples, or scripts (e.g., tools/, samples/, scripts/, usr/)
that do not affect the compiled kernel image (vmlinux) or kernel modules.
* Purely decorative logging (e.g., message strings in pr_err, printk, dev_info) or tracepoints
that do not alter control flow or data structures.
* Build system or Kconfig changes that do not alter compiled C logic.
- Structurally unreachable hardware:
* Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed,
ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU.
- Unreachable execution paths:
* Driver teardown callbacks (.remove, .shutdown, pci_unregister_driver) executed only during
physical PCI hot-unplug or manual sysfs driver unbinding.
* Code paths exclusive to architectures other than the target architecture.
================================================================================
3. WHEN TO RETURN WorthFuzzing=true (POSITIVE CRITERIA)
================================================================================
Return WorthFuzzing=true whenever the patch touches reachable executable code, including:
- Core Subsystems:
* Any logic modifications in memory management (mm/), synchronization/locking (kernel/locking/),
BPF, scheduler, core networking, VFS, or syscall handling.
- Refactorings and Code Cleanups:
* Any restructuring of reachable data structures, helper abstractions, or algorithm flows.
- Runtime Assertions and Defensive Checks:
* Any introduction or alteration of assertions (WARN_ON*, VM_WARN_ON*, BUG_ON*, etc.) in reachable paths.
- Reachable Drivers and Protocols:
* Drivers accessible via virtual buses (virtio, USB gadget, loopback, netlink, binder, sockets, etc.).
================================================================================
4. EXTRACTING FocusSymbols (PREVENTING DILUTION)
================================================================================
When WorthFuzzing=true, you must extract specific kernel functions into FocusSymbols to guide the fuzzer:
- AVOID UBIQUITOUS LIFECYCLE HOT-PATHS:
Do NOT list generic, ubiquitous functions called by almost every program in the corpus
(including, but not limited to: general memory allocators and deallocators, page fault
and trap handlers, or core synchronization primitives; this is not an exhaustive list).
Listing ubiquitous functions causes the fuzzer to classify thousands of unrelated tests as "focused",
which severely dilutes fuzzing effort away from the actual changes.
- TARGET SPECIFIC FEATURE LOGIC AND ENTRYPOINTS:
List functions that specifically implement the logic being added or altered, or direct API entrypoints
for the subsystem feature under review.
- HANDLING STATIC INLINE FUNCTIONS IN HEADERS (.h):
Compiler-inlined static functions (such as static inlines in mm/*.h or include/linux/*.h) lack
distinct symbol addresses in vmlinux and cannot be targeted directly by symbol coverage filters.
If the changes are primarily in static inline helpers, identify non-static, feature-specific caller
functions in .c files that exercise them (avoiding ubiquitous lifecycle wrappers).
================================================================================
5. IDENTIFYING EnableConfigs
================================================================================
Identify any specific CONFIG_ options required to properly compile and reach the modified code:
- Inspect Kconfig files and #ifdef guards; do not make assumptions.
- Check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed.
- Strip any 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4").
Prefer calling several tools at the same time to save round-trips.
Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.
Prompt: Target architecture: amd64
For your convenience, here is the diff of the changes:
commit 4a6c9ab74a37829d5d0dbd8a0b8619a27a1bd8d0
Author: syz-cluster <triage@syzkaller.com>
Date: Thu Sep 10 05:35:40 2026 +0000
syz-cluster: applied patch under review
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 24656b35350b1..2e36c27e2cfb4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -4769,12 +4769,12 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
unsigned int nopaged_len = skb_headlen(skb);
u32 queue = skb_get_queue_mapping(skb);
int nfrags = skb_shinfo(skb)->nr_frags;
- unsigned int first_entry, tx_packets;
+ unsigned int first_entry, entry, tx_packets;
struct stmmac_txq_stats *txq_stats;
struct dma_desc *desc, *first_desc;
struct stmmac_tx_queue *tx_q;
int i, csum_insertion = 0;
- int entry, first_tx;
+ int first_tx, ret;
dma_addr_t dma_addr;
u32 sdu_len;
@@ -4832,9 +4832,10 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
csum_insertion = skb->ip_summed == CHECKSUM_PARTIAL;
if (unlikely(is_jumbo)) {
- entry = stmmac_jumbo_frm(priv, tx_q, skb, csum_insertion);
- if (unlikely(entry < 0) && (entry != -EINVAL))
+ ret = stmmac_jumbo_frm(priv, tx_q, skb, csum_insertion);
+ if (unlikely(ret < 0) && (ret != -EINVAL))
goto dma_map_err;
+ entry = ret;
} else {
bool last_segment = (nfrags == 0);
@@ -4984,6 +4985,26 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
dma_map_err:
netdev_err(priv->dev, "Tx DMA map failed\n");
+
+ /* entry points one past the last descriptor written for this frame:
+ * on failure it is the descriptor whose DMA mapping failed, so walk
+ * from first_entry up to, but not including, entry. Reset cur_tx
+ * unconditionally as both stmmac_vlan_insert() and stmmac_jumbo_frm()
+ * may have advanced it, and release the VLAN context descriptor.
+ */
+ while (first_entry != entry) {
+ desc = stmmac_get_tx_desc(priv, tx_q, first_entry);
+ stmmac_release_tx_desc(priv, desc, priv->descriptor_mode);
+ stmmac_free_tx_buffer(priv, &priv->dma_conf, queue, first_entry);
+ first_entry = STMMAC_NEXT_ENTRY(first_entry,
+ priv->dma_conf.dma_tx_size);
+ }
+
+ tx_q->cur_tx = first_tx;
+ if (has_vlan) {
+ desc = stmmac_get_tx_desc(priv, tx_q, first_tx);
+ stmmac_release_tx_desc(priv, desc, priv->descriptor_mode);
+ }
max_sdu_err:
dev_kfree_skb(skb);
priv->xstats.tx_dropped++;
|
| 3/2 | 2026/09/10 05:35 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 3697 output: 40 thoughts: 150 Thoughts: **Analyzing the Patch for Fuzzing Potential** Okay, let's dive into this. The goal is to figure out if this patch is a good candidate for fuzzing, and if so, how to approach it. First, I need to understand what we're dealing with. The patch modifies `drivers/net/ethernet/stmicro/stmmac/stmmac_main.c` specifically, the `stmmac_xmit` function. Right, so this is the STMicroelectronics Multi-channel Ethernet MAC driver, also known as Synopsys DesignWare Ethernet MAC / STMMAC. My immediate questions are: is this hardware-dependent, or can I reach this in a standard QEMU environment? Is the hardware abstracted enough that it will be easily reachable? I need to know if I can reliably trigger this code. To answer this, I'll need to double-check if I can run this in a virtual environment. I'll need to use either `grepper` or check the Kconfig, ideally looking at dependencies, to see how easily this can be configured and whether it is tied to specific hardware. That's the first hurdle, determining the target's reachability. |
| 4/2 | 2026/09/10 05:35 | tool | grepper |
0mArgs:{
"Expression": "config STMMAC_ETH",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/Kconfig-1-# SPDX-License-Identifier: GPL-2.0-only\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:2:config STMMAC_ETH\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-3-\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n"
} |
| 5/2 | 2026/09/10 05:35 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 4246 output: 42 thoughts: 22 Thoughts: Here's a summary of my thought process, as if I were considering the `drivers/net/ethernet/stmicro/stmmac/Kconfig` file: **Analyzing the STMMAC Kconfig** Okay, time to dive into the `Kconfig` for the STMMAC Ethernet driver. I'm already anticipating some interesting configurations. This is where I'll see how they've structured the feature selection for this specific hardware and if there are any gotchas I need to be aware of. I'll be looking for any unusual dependencies or limitations, and assessing the level of granularity in their configuration options. I'm particularly curious about how they handle the various STMicroelectronics SoCs that utilize this MAC. Are they using a fine-grained, device-specific approach, or a more generalized, feature-based system? I'll be paying close attention to the `CONFIG_STMMAC_*` options, of course. I'll mentally map them to the corresponding registers and functionalities I'm familiar with – PHY interfaces, interrupt handling, DMA settings, and any offload capabilities. I'll want to see how they've handled various features such as Jumbo frames, checksum offloading, VLAN support, and any power management considerations. I'm hoping to see a well-commented file, that follows standard kernel conventions and clearly delineates the configuration options' implications. A well-organized `Kconfig` is a sign of a well-designed driver, so I'm hoping for good design principles to be evident. This should be a fairly quick review if it's well-organized; I'm hoping it's straightforward so I can keep making progress on my project. |
| 6/2 | 2026/09/10 05:35 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 1,
"LineCount": 80
}Results: {
"Contents": " 1:\t# SPDX-License-Identifier: GPL-2.0-only\n 2:\tconfig STMMAC_ETH\n 3:\t\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n 4:\t\tdepends on HAS_IOMEM \u0026\u0026 HAS_DMA\n 5:\t\tdepends on PTP_1588_CLOCK_OPTIONAL\n 6:\t\tdepends on ETHTOOL_NETLINK\n 7:\t\tselect MII\n 8:\t\tselect PCS_XPCS\n 9:\t\tselect PAGE_POOL\n 10:\t\tselect PHYLINK\n 11:\t\tselect CRC32\n 12:\t\tselect RESET_CONTROLLER\n 13:\t\tselect NET_DEVLINK\n 14:\t\thelp\n 15:\t\t This is the driver for the Ethernet IPs built around a\n 16:\t\t Synopsys IP Core.\n 17:\t\n 18:\tif STMMAC_ETH\n 19:\t\n 20:\tconfig STMMAC_SELFTESTS\n 21:\t\tbool \"Support for STMMAC Selftests\"\n 22:\t\tdepends on INET\n 23:\t\tdefault n\n 24:\t\thelp\n 25:\t\t This adds support for STMMAC Selftests using ethtool. Enable this\n 26:\t\t feature if you are facing problems with your HW and submit the test\n 27:\t\t results to the netdev Mailing List.\n 28:\t\n 29:\tconfig STMMAC_PLATFORM\n 30:\t\ttristate \"STMMAC Platform bus support\"\n 31:\t\tselect MFD_SYSCON\n 32:\t\tdefault y\n 33:\t\thelp\n 34:\t\t This selects the platform specific bus support for the stmmac driver.\n 35:\t\t This is the driver used on several SoCs:\n 36:\t\t STi, Allwinner, Amlogic Meson, Altera SOCFPGA.\n 37:\t\n 38:\t\t If you have a controller with this interface, say Y or M here.\n 39:\t\n 40:\t\t If unsure, say N.\n 41:\t\n 42:\tif STMMAC_PLATFORM\n 43:\t\n 44:\tconfig DWMAC_DWC_QOS_ETH\n 45:\t\ttristate \"Support for snps,dwc-qos-ethernet.txt DT binding.\"\n 46:\t\tselect CRC32\n 47:\t\tselect MII\n 48:\t\tdepends on OF \u0026\u0026 HAS_DMA\n 49:\t\thelp\n 50:\t\t Support for chips using the snps,dwc-qos-ethernet.txt DT binding.\n 51:\t\n 52:\tconfig DWMAC_GENERIC\n 53:\t\ttristate \"Generic driver for DWMAC\"\n 54:\t\tdefault STMMAC_PLATFORM\n 55:\t\thelp\n 56:\t\t Generic DWMAC driver for platforms that don't require any\n 57:\t\t platform specific code to function or is using platform\n 58:\t\t data for setup.\n 59:\t\n 60:\tconfig DWMAC_ANARION\n 61:\t\ttristate \"Adaptrum Anarion GMAC support\"\n 62:\t\tdefault ARC\n 63:\t\tdepends on OF \u0026\u0026 (ARC || COMPILE_TEST)\n 64:\t\thelp\n 65:\t\t Support for Adaptrum Anarion GMAC Ethernet controller.\n 66:\t\n 67:\t\t This selects the Anarion SoC glue layer support for the stmmac driver.\n 68:\t\n 69:\tconfig DWMAC_EIC7700\n 70:\t\ttristate \"Support for Eswin eic7700 ethernet driver\"\n 71:\t\tdepends on OF \u0026\u0026 HAS_DMA \u0026\u0026 ARCH_ESWIN || COMPILE_TEST\n 72:\t\thelp\n 73:\t\t This driver supports the Eswin EIC7700 Ethernet controller,\n 74:\t\t which integrates Synopsys DesignWare QoS features. It enables\n 75:\t\t high-speed networking with DMA acceleration and is optimized\n 76:\t\t for embedded systems.\n 77:\t\n 78:\tconfig DWMAC_INGENIC\n 79:\t\ttristate \"Ingenic MAC support\"\n 80:\t\tdefault MACH_INGENIC\n"
} |
| 7/2 | 2026/09/10 05:35 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 5750 output: 43 thoughts: 58 Thoughts: Okay, here's my take on those thoughts, framed as an expert's internal monologue: **Investigating the stmmac Driver** Alright, stmmac... that rings a bell. Right, it's the driver for Synopsys DesignWare Ethernet MACs, and it's also used for STMicroelectronics' own MAC implementations. A solid, fairly well-established piece of the networking stack, I believe. Now, the question is, *where* does it live? Is this a PCI-based interface, or is this a platform driver? Let's quickly verify by examining the build configuration, and the best place to start is the `drivers/net/ethernet/stmicro/stmmac/Kconfig` file. That should give me a solid clue about the device binding method. That'll tell me a lot about how this driver integrates with the broader system and how it's typically used. Let's see what the Kconfig says. |
| 8/2 | 2026/09/10 05:36 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 81,
"LineCount": 80
}Results: {
"Contents": " 81:\t\tdepends on OF \u0026\u0026 HAS_IOMEM \u0026\u0026 (MACH_INGENIC || COMPILE_TEST)\n 82:\t\tselect MFD_SYSCON\n 83:\t\thelp\n 84:\t\t Support for ethernet controller on Ingenic SoCs.\n 85:\t\n 86:\t\t This selects Ingenic SoCs glue layer support for the stmmac\n 87:\t\t device driver. This driver is used on for the Ingenic SoCs\n 88:\t\t MAC ethernet controller.\n 89:\t\n 90:\tconfig DWMAC_IPQ806X\n 91:\t\ttristate \"QCA IPQ806x DWMAC support\"\n 92:\t\tdefault ARCH_QCOM\n 93:\t\tdepends on OF \u0026\u0026 (ARCH_QCOM || COMPILE_TEST)\n 94:\t\tselect MFD_SYSCON\n 95:\t\thelp\n 96:\t\t Support for QCA IPQ806X DWMAC Ethernet.\n 97:\t\n 98:\t\t This selects the IPQ806x SoC glue layer support for the stmmac\n 99:\t\t device driver. This driver does not use any of the hardware\n 100:\t\t acceleration features available on this SoC. Network devices\n 101:\t\t will behave like standard non-accelerated ethernet interfaces.\n 102:\t\n 103:\t\t Select the QCOM_SOCINFO config flag to enable specific dwmac\n 104:\t\t fixup based on the ipq806x SoC revision.\n 105:\t\n 106:\tconfig DWMAC_LPC18XX\n 107:\t\ttristate \"NXP LPC18xx/43xx DWMAC support\"\n 108:\t\tdefault ARCH_LPC18XX\n 109:\t\tdepends on OF \u0026\u0026 (ARCH_LPC18XX || COMPILE_TEST)\n 110:\t\tselect MFD_SYSCON\n 111:\t\thelp\n 112:\t\t Support for NXP LPC18xx/43xx DWMAC Ethernet.\n 113:\t\n 114:\tconfig DWMAC_MEDIATEK\n 115:\t\ttristate \"MediaTek MT27xx GMAC support\"\n 116:\t\tdepends on OF \u0026\u0026 (ARCH_MEDIATEK || COMPILE_TEST)\n 117:\t\thelp\n 118:\t\t Support for MediaTek GMAC Ethernet controller.\n 119:\t\n 120:\t\t This selects the MT2712 SoC support for the stmmac driver.\n 121:\t\n 122:\tconfig DWMAC_MESON\n 123:\t\ttristate \"Amlogic Meson dwmac support\"\n 124:\t\tdefault ARCH_MESON\n 125:\t\tdepends on OF \u0026\u0026 COMMON_CLK \u0026\u0026 (ARCH_MESON || COMPILE_TEST)\n 126:\t\thelp\n 127:\t\t Support for Ethernet controller on Amlogic Meson SoCs.\n 128:\t\n 129:\t\t This selects the Amlogic Meson SoC glue layer support for\n 130:\t\t the stmmac device driver. This driver is used for Meson6,\n 131:\t\t Meson8, Meson8b and GXBB SoCs.\n 132:\t\n 133:\tconfig DWMAC_NUVOTON\n 134:\t\ttristate \"Nuvoton MA35 dwmac support\"\n 135:\t\tdefault ARCH_MA35\n 136:\t\tdepends on OF \u0026\u0026 (ARCH_MA35 || COMPILE_TEST)\n 137:\t\tselect MFD_SYSCON\n 138:\t\thelp\n 139:\t\t Support for Ethernet controller on Nuvoton MA35 series SoC.\n 140:\t\n 141:\t\t This selects the Nuvoton MA35 series SoC glue layer support\n 142:\t\t for the stmmac device driver. The nuvoton-dwmac driver is\n 143:\t\t used for MA35 series SoCs.\n 144:\t\n 145:\tconfig DWMAC_QCOM_ETHQOS\n 146:\t\ttristate \"Qualcomm ETHQOS support\"\n 147:\t\tdefault ARCH_QCOM\n 148:\t\tdepends on OF \u0026\u0026 (ARCH_QCOM || COMPILE_TEST)\n 149:\t\thelp\n 150:\t\t Support for the Qualcomm ETHQOS core.\n 151:\t\n 152:\t\t This selects the Qualcomm ETHQOS glue layer support for the\n 153:\t\t stmmac device driver.\n 154:\t\n 155:\tconfig DWMAC_RENESAS_GBETH\n 156:\t\ttristate \"Renesas RZ/V2H(P) GBETH and RZ/T2H, RZ/N2H GMAC support\"\n 157:\t\tdefault ARCH_RENESAS\n 158:\t\tdepends on OF \u0026\u0026 (ARCH_RENESAS || COMPILE_TEST)\n 159:\t\tselect PCS_RZN1_MIIC\n 160:\t\thelp\n"
} |
| 9/2 | 2026/09/10 05:36 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 7357 output: 44 thoughts: 20 Thoughts: Here's my attempt at summarizing the thought process, tailored for an expert audience: **Diving Deeper into the Kconfig Structure** Okay, so I've been focusing on some specific areas of the Kconfig, but now I need to broaden the scope a bit. Time to move beyond the immediate stuff and get a more complete view of how things are structured. Let's see how the STMMAC_PCI configuration option, and other related configurations, fit into the overall picture. I need to understand the dependencies, relationships, and broader implications of these configurations within the broader Kconfig framework. This is crucial for a robust understanding, especially when dealing with complex hardware abstractions. Knowing the context of related Kconfig options is the only way to effectively diagnose issues, evaluate design choices, and make informed modifications. |
| 10/2 | 2026/09/10 05:36 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 161,
"LineCount": 80
}Results: {
"Contents": " 161:\t\t Support for Gigabit Ethernet Interface (GBETH)/ Ethernet MAC (GMAC)\n 162:\t\t on Renesas SoCs.\n 163:\t\n 164:\t\t This selects Renesas SoC glue layer support for the stmmac device\n 165:\t\t driver. This driver is used for the RZ/V2H(P) family, RZ/T2H and\n 166:\t\t RZ/N2H SoCs.\n 167:\t\n 168:\tconfig DWMAC_ROCKCHIP\n 169:\t\ttristate \"Rockchip dwmac support\"\n 170:\t\tdefault ARCH_ROCKCHIP\n 171:\t\tdepends on OF \u0026\u0026 (ARCH_ROCKCHIP || COMPILE_TEST)\n 172:\t\tselect MFD_SYSCON\n 173:\t\thelp\n 174:\t\t Support for Ethernet controller on Rockchip RK3288 SoC.\n 175:\t\n 176:\t\t This selects the Rockchip RK3288 SoC glue layer support for\n 177:\t\t the stmmac device driver.\n 178:\t\n 179:\tconfig DWMAC_RZN1\n 180:\t\ttristate \"Renesas RZ/N1 dwmac support\"\n 181:\t\tdefault ARCH_RZN1\n 182:\t\tdepends on OF \u0026\u0026 (ARCH_RZN1 || COMPILE_TEST)\n 183:\t\tselect PCS_RZN1_MIIC\n 184:\t\thelp\n 185:\t\t Support for Ethernet controller on Renesas RZ/N1 SoC family.\n 186:\t\n 187:\t\t This selects the Renesas RZ/N1 SoC glue layer support for\n 188:\t\t the stmmac device driver. This support can make use of a custom MII\n 189:\t\t converter PCS device.\n 190:\t\n 191:\tconfig DWMAC_S32\n 192:\t\ttristate \"NXP S32G/S32R GMAC support\"\n 193:\t\tdefault ARCH_S32\n 194:\t\tdepends on OF \u0026\u0026 (ARCH_S32 || COMPILE_TEST)\n 195:\t\thelp\n 196:\t\t Support for ethernet controller on NXP S32CC SOCs.\n 197:\t\n 198:\t\t This selects NXP SoC glue layer support for the stmmac\n 199:\t\t device driver. This driver is used for the S32CC series\n 200:\t\t SOCs GMAC ethernet controller, ie. S32G2xx, S32G3xx and\n 201:\t\t S32R45.\n 202:\t\n 203:\tconfig DWMAC_SOCFPGA\n 204:\t\ttristate \"SOCFPGA dwmac support\"\n 205:\t\tdefault ARCH_INTEL_SOCFPGA\n 206:\t\tdepends on OF \u0026\u0026 (ARCH_INTEL_SOCFPGA || COMPILE_TEST)\n 207:\t\tselect MFD_SYSCON\n 208:\t\tselect MDIO_REGMAP\n 209:\t\tselect REGMAP_MMIO\n 210:\t\tselect PCS_LYNX\n 211:\t\thelp\n 212:\t\t Support for ethernet controller on Altera SOCFPGA\n 213:\t\n 214:\t\t This selects the Altera SOCFPGA SoC glue layer support\n 215:\t\t for the stmmac device driver. This driver is used for\n 216:\t\t arria5 and cyclone5 FPGA SoCs.\n 217:\t\n 218:\tconfig DWMAC_SOPHGO\n 219:\t\ttristate \"Sophgo dwmac support\"\n 220:\t\tdepends on OF \u0026\u0026 (ARCH_SOPHGO || COMPILE_TEST)\n 221:\t\tdefault m if ARCH_SOPHGO\n 222:\t\thelp\n 223:\t\t Support for ethernet controllers on Sophgo RISC-V SoCs\n 224:\t\n 225:\t\t This selects the Sophgo SoC specific glue layer support\n 226:\t\t for the stmmac device driver. This driver is used for the\n 227:\t\t ethernet controllers on various Sophgo SoCs.\n 228:\t\n 229:\tconfig DWMAC_SPACEMIT\n 230:\t\ttristate \"Spacemit dwmac support\"\n 231:\t\tdepends on OF \u0026\u0026 (ARCH_SPACEMIT || COMPILE_TEST)\n 232:\t\tselect MFD_SYSCON\n 233:\t\tdefault m if ARCH_SPACEMIT\n 234:\t\thelp\n 235:\t\t Support for ethernet controllers on Spacemit RISC-V SoCs\n 236:\t\n 237:\t\t This selects the Spacemit platform specific glue layer support\n 238:\t\t for the stmmac device driver. This driver is used for the\n 239:\t\t Spacemit K3 ethernet controllers.\n 240:\t\n"
} |
| 11/2 | 2026/09/10 05:36 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 8878 output: 44 thoughts: 17 Thoughts: Okay, let's dive into this Kconfig file, picking up from line 241 onwards. I need to get a comprehensive understanding of what's defined and how things are being configured here. I'm looking for the key dependencies, the boolean expressions, any defaults set – everything that influences the final configuration. Where are the important features defined? Are there any obvious areas for optimization or potential conflicts based on my previous experience? I'll need to dissect the logic, identify any potential gotchas, and mentally build a mental model of how this module behaves. Let's see what gems we can find here. |
| 12/2 | 2026/09/10 05:36 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 241,
"LineCount": 80
}Results: {
"Contents": " 241:\tconfig DWMAC_STARFIVE\n 242:\t\ttristate \"StarFive dwmac support\"\n 243:\t\tdepends on OF \u0026\u0026 (ARCH_STARFIVE || COMPILE_TEST)\n 244:\t\tselect MFD_SYSCON\n 245:\t\tdefault m if ARCH_STARFIVE\n 246:\t\thelp\n 247:\t\t Support for ethernet controllers on StarFive RISC-V SoCs\n 248:\t\n 249:\t\t This selects the StarFive platform specific glue layer support\n 250:\t\t for the stmmac device driver. This driver is used for the\n 251:\t\t StarFive JH7100 and JH7110 ethernet controllers.\n 252:\t\n 253:\tconfig DWMAC_STI\n 254:\t\ttristate \"STi GMAC support\"\n 255:\t\tdefault ARCH_STI\n 256:\t\tdepends on OF \u0026\u0026 (ARCH_STI || COMPILE_TEST)\n 257:\t\tselect MFD_SYSCON\n 258:\t\thelp\n 259:\t\t Support for ethernet controller on STi SOCs.\n 260:\t\n 261:\t\t This selects STi SoC glue layer support for the stmmac\n 262:\t\t device driver. This driver is used on for the STi series\n 263:\t\t SOCs GMAC ethernet controller.\n 264:\t\n 265:\tconfig DWMAC_STM32\n 266:\t\ttristate \"STM32 DWMAC support\"\n 267:\t\tdefault ARCH_STM32\n 268:\t\tdepends on OF \u0026\u0026 HAS_IOMEM \u0026\u0026 (ARCH_STM32 || COMPILE_TEST)\n 269:\t\tselect MFD_SYSCON\n 270:\t\thelp\n 271:\t\t Support for ethernet controller on STM32 SOCs.\n 272:\t\n 273:\t\t This selects STM32 SoC glue layer support for the stmmac\n 274:\t\t device driver. This driver is used on for the STM32 series\n 275:\t\t SOCs GMAC ethernet controller.\n 276:\t\n 277:\tconfig DWMAC_SUNXI\n 278:\t\ttristate \"Allwinner GMAC support\"\n 279:\t\tdefault ARCH_SUNXI\n 280:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI || COMPILE_TEST)\n 281:\t\thelp\n 282:\t\t Support for Allwinner A20/A31 GMAC ethernet controllers.\n 283:\t\n 284:\t\t This selects Allwinner SoC glue layer support for the\n 285:\t\t stmmac device driver. This driver is used for A20/A31\n 286:\t\t GMAC ethernet controller.\n 287:\t\n 288:\tconfig DWMAC_SUN8I\n 289:\t\ttristate \"Allwinner sun8i GMAC support\"\n 290:\t\tdefault ARCH_SUNXI\n 291:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI || COMPILE_TEST)\n 292:\t\tselect MDIO_BUS_MUX\n 293:\t\thelp\n 294:\t\t Support for Allwinner H3 A83T A64 EMAC ethernet controllers.\n 295:\t\n 296:\t\t This selects Allwinner SoC glue layer support for the\n 297:\t\t stmmac device driver. This driver is used for H3/A83T/A64\n 298:\t\t EMAC ethernet controller.\n 299:\t\n 300:\tconfig DWMAC_SUN55I\n 301:\t\ttristate \"Allwinner sun55i GMAC200 support\"\n 302:\t\tdefault ARCH_SUNXI\n 303:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI || COMPILE_TEST)\n 304:\t\tselect MDIO_BUS_MUX\n 305:\t\thelp\n 306:\t\t Support for Allwinner A523/T527 GMAC200 ethernet controllers.\n 307:\t\n 308:\t\t This selects Allwinner SoC glue layer support for the\n 309:\t\t stmmac device driver. This driver is used for A523/T527\n 310:\t\t GMAC200 ethernet controller.\n 311:\t\n 312:\tconfig DWMAC_THEAD\n 313:\t\ttristate \"T-HEAD dwmac support\"\n 314:\t\tdepends on OF \u0026\u0026 (ARCH_THEAD || COMPILE_TEST)\n 315:\t\thelp\n 316:\t\t Support for ethernet controllers on T-HEAD RISC-V SoCs\n 317:\t\n 318:\t\t This selects the T-HEAD platform specific glue layer support for\n 319:\t\t the stmmac device driver. This driver is used for T-HEAD TH1520\n 320:\t\t ethernet controller.\n"
} |
| 13/2 | 2026/09/10 05:36 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 10340 output: 44 thoughts: 17 Thoughts: Okay, let's dive into this Kconfig file, picking up where we left off. I need to get a handle on what's defined in the remaining lines, from line 321 onward. This section is key to understanding the full scope of the configuration options, dependencies, and ultimately, how this particular module or feature is governed. I'm looking for the specifics, the underlying logic, and the relationships that exist within this structure. Let's see what gems we can unearth. |
| 14/2 | 2026/09/10 05:36 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 321,
"LineCount": 80
}Results: {
"Contents": " 321:\t\n 322:\tconfig DWMAC_IMX8\n 323:\t\ttristate \"NXP IMX8 DWMAC support\"\n 324:\t\tdefault ARCH_MXC\n 325:\t\tdepends on OF \u0026\u0026 (ARCH_MXC || COMPILE_TEST)\n 326:\t\tselect MFD_SYSCON\n 327:\t\thelp\n 328:\t\t Support for ethernet controller on NXP i.MX8 SOCs.\n 329:\t\n 330:\t\t This selects NXP SoC glue layer support for the stmmac\n 331:\t\t device driver. This driver is used for i.MX8 series like\n 332:\t\t iMX8MP/iMX8DXL GMAC ethernet controller.\n 333:\t\n 334:\tconfig DWMAC_INTEL_PLAT\n 335:\t\ttristate \"Intel dwmac support\"\n 336:\t\tdepends on OF \u0026\u0026 COMMON_CLK\n 337:\t\thelp\n 338:\t\t Support for ethernet controllers on Intel SoCs\n 339:\t\n 340:\t\t This selects the Intel platform specific glue layer support for\n 341:\t\t the stmmac device driver. This driver is used for the Intel Keem Bay\n 342:\t\t SoC.\n 343:\t\n 344:\tconfig DWMAC_LOONGSON1\n 345:\t\ttristate \"Loongson1 GMAC support\"\n 346:\t\tdefault MACH_LOONGSON32\n 347:\t\tdepends on OF \u0026\u0026 (MACH_LOONGSON32 || COMPILE_TEST)\n 348:\t\thelp\n 349:\t\t Support for ethernet controller on Loongson1 SoC.\n 350:\t\n 351:\t\t This selects Loongson1 SoC glue layer support for the stmmac\n 352:\t\t device driver. This driver is used for Loongson1-based boards\n 353:\t\t like Loongson LS1B/LS1C.\n 354:\t\n 355:\tconfig DWMAC_TEGRA\n 356:\t\ttristate \"NVIDIA Tegra MGBE support\"\n 357:\t\tdepends on ARCH_TEGRA || COMPILE_TEST\n 358:\t\thelp\n 359:\t\t This selects the Multi-GigaBit Ethernet (MGBE) Controller that is\n 360:\t\t found on the NVIDIA Tegra SoC devices. This driver provides the glue\n 361:\t\t layer on top of the stmmac driver required for these NVIDIA Tegra SoC\n 362:\t\t devices.\n 363:\t\n 364:\tconfig DWMAC_VISCONTI\n 365:\t\ttristate \"Toshiba Visconti DWMAC support\"\n 366:\t\tdefault ARCH_VISCONTI\n 367:\t\tdepends on OF \u0026\u0026 COMMON_CLK \u0026\u0026 (ARCH_VISCONTI || COMPILE_TEST)\n 368:\t\thelp\n 369:\t\t Support for ethernet controller on Visconti SoCs.\n 370:\t\n 371:\tendif # STMMAC_PLATFORM\n 372:\t\n 373:\tconfig STMMAC_LIBPCI\n 374:\t\ttristate\n 375:\t\thelp\n 376:\t\t This option enables the PCI bus helpers for the stmmac driver.\n 377:\t\n 378:\tconfig DWMAC_INTEL\n 379:\t\ttristate \"Intel GMAC support\"\n 380:\t\tdefault X86\n 381:\t\tdepends on X86 \u0026\u0026 PCI\n 382:\t\tdepends on COMMON_CLK\n 383:\t\tdepends on ACPI\n 384:\t\thelp\n 385:\t\t This selects the Intel platform specific bus support for the\n 386:\t\t stmmac driver. This driver is used for Intel Quark/EHL/TGL.\n 387:\t\n 388:\tconfig DWMAC_LOONGSON\n 389:\t\ttristate \"Loongson PCI DWMAC support\"\n 390:\t\tdefault MACH_LOONGSON64\n 391:\t\tdepends on (MACH_LOONGSON64 || COMPILE_TEST) \u0026\u0026 PCI\n 392:\t\tdepends on COMMON_CLK\n 393:\t\tselect STMMAC_LIBPCI\n 394:\t\thelp\n 395:\t\t This selects the LOONGSON PCI bus support for the stmmac driver,\n 396:\t\t Support for ethernet controller on Loongson-2K1000 SoC and LS7A1000 bridge.\n 397:\t\n 398:\tconfig DWMAC_MOTORCOMM\n 399:\t\ttristate \"Motorcomm PCI DWMAC support\"\n 400:\t\tdepends on PCI\n"
} |
| 15/2 | 2026/09/10 05:36 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 11730 output: 26 thoughts: 409 Thoughts: **My Investigation into QEMU and DWMAC/STMMAC Emulation** Okay, let's break this down. I'm trying to figure out if I can emulate DWMAC (DesignWare MAC) or STMMAC (STMicroelectronics MAC) ethernet controllers within standard QEMU or Google Compute Engine environments. My initial thought process is to list out some DWMAC implementations I'm aware of: `DWMAC_INTEL`, `DWMAC_LOONGSON`, etc. Just cataloging known implementations to understand the scope. My next line of thinking is centered around QEMU virtualization. Does the standard QEMU environment, or even GCE, provide virtualized emulation for DWMAC or STMMAC? I need to know if the devices exist in the virtual world. Okay, wait, what *does* QEMU emulate? I quickly recall common virtualized network devices: e1000, igb, virtio-net, the usual suspects. But, do any of these cover what I need? No, that's not what I'm looking for. A specific question is surfacing: does QEMU emulate STMMAC or DWMAC? I need to check. Digging a bit deeper, I remember that QEMU might emulate dwmac on some ARM SoC machines, but what about amd64 (x86)? That's the crucial question. It seems like it's unlikely for x86. Now, I need to consult the rules. This takes me to Section 2, which outlines structurally unreachable hardware. I'm focusing on that list: "Vendor-specific PCIe switches, SmartNICs, or GPU drivers..." devices that require physical hardware that standard QEMU doesn't emulate. This is critical. Does STMMAC fall into this category? I need to carefully evaluate: is STMMAC *structurally* unreachable? I'm trying to figure out if it can be instantiated through virtual buses (like virtio) or if it relies *only* on physical hardware. I need to know if I can get to it through a dummy or USB path. So, are there any USB or virtual devices that use STMMAC? I must check. The final step in this process is to do a detailed search using `grep` within the kernel tree to see where STMMAC is used and how. I can find an answer this way. |
| 16/2 | 2026/09/10 05:36 | tool | grepper |
0mArgs:{
"Expression": "stmmac_",
"PathPrefix": "drivers/"
}Results: {
"Output": "\nFull output is too long, showing 500 out of 10832 lines.\nUse more precise expression if possible.\n\ndrivers/net/ethernet/stmicro/stmmac/Makefile=2=obj-$(CONFIG_STMMAC_ETH) += stmmac.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:3:stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-4-\t chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-5-\t dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:6:\t mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-7-\t dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:8:\t stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:9:\t stmmac_xdp.o stmmac_est.o stmmac_fpe.o stmmac_vlan.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:10:\t stmmac_pcs.o $(stmmac-y)\ndrivers/net/ethernet/stmicro/stmmac/Makefile-11-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:12:stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-13-\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=45=obj-$(CONFIG_DWMAC_VISCONTI)\t+= dwmac-visconti.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:46:stmmac-platform-objs:= stmmac_platform.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-47-dwmac-altr-socfpga-objs := dwmac-socfpga.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-48-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:49:obj-$(CONFIG_STMMAC_LIBPCI)\t+= stmmac_libpci.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-50-obj-$(CONFIG_STMMAC_PCI)\t+= stmmac-pci.o\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=53=obj-$(CONFIG_DWMAC_MOTORCOMM)\t+= dwmac-motorcomm.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:54:stmmac-pci-objs:= stmmac_pci.o\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-16-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:17:static int jumbo_frm(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-18-\t\t int csum)\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-20-\tunsigned int nopaged_len = skb_headlen(skb);\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:21:\tstruct stmmac_priv *priv = tx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-22-\tunsigned int entry = tx_q-\u003ecur_tx;\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-45-\t/* do not close the descriptor and do not set own bit */\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:46:\tstmmac_prepare_tx_desc(priv, desc, 1, buf_len, csum, STMMAC_CHAIN_MODE,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-47-\t\t\t0, false, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-62-\t\t\ttx_q-\u003etx_skbuff_dma[entry].len = bmax;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:63:\t\t\tstmmac_prepare_tx_desc(priv, desc, 0, bmax, csum,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-64-\t\t\t\t\tSTMMAC_CHAIN_MODE, 1, false, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-76-\t\t\t/* last descriptor can be set now */\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:77:\t\t\tstmmac_prepare_tx_desc(priv, desc, 0, len, csum,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-78-\t\t\t\t\tSTMMAC_CHAIN_MODE, 1, true, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c=99=static void init_dma_chain(void *des, dma_addr_t phy_addr,\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-128-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:129:static void refill_desc3(struct stmmac_rx_queue *rx_q, struct dma_desc *p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-130-{\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:131:\tstruct stmmac_priv *priv = rx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-132-\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-143-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:144:static void clean_desc3(struct stmmac_tx_queue *tx_q, struct dma_desc *p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-145-{\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:146:\tstruct stmmac_priv *priv = tx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-147-\tunsigned int entry = tx_q-\u003edirty_tx;\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-160-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:161:const struct stmmac_mode_ops chain_mode_ops = {\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-162-\t.init = init_dma_chain,\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=49=static inline bool dwmac_is_xmac(enum dwmac_core_type core_type)\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-70-\ndrivers/net/ethernet/stmicro/stmmac/common.h:71:struct stmmac_q_tx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-72-\tu64_stats_t tx_bytes;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-77-\ndrivers/net/ethernet/stmicro/stmmac/common.h:78:struct stmmac_napi_tx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-79-\tu64_stats_t tx_packets;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-85-\ndrivers/net/ethernet/stmicro/stmmac/common.h:86:struct stmmac_txq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-87-\t/* Updates protected by tx queue lock. */\ndrivers/net/ethernet/stmicro/stmmac/common.h-88-\tstruct u64_stats_sync q_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:89:\tstruct stmmac_q_tx_stats q;\ndrivers/net/ethernet/stmicro/stmmac/common.h-90-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-92-\tstruct u64_stats_sync napi_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:93:\tstruct stmmac_napi_tx_stats napi;\ndrivers/net/ethernet/stmicro/stmmac/common.h-94-} ____cacheline_aligned_in_smp;\ndrivers/net/ethernet/stmicro/stmmac/common.h-95-\ndrivers/net/ethernet/stmicro/stmmac/common.h:96:struct stmmac_napi_rx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-97-\tu64_stats_t rx_bytes;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-102-\ndrivers/net/ethernet/stmicro/stmmac/common.h:103:struct stmmac_rxq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-104-\t/* Updates protected by NAPI poll logic. */\ndrivers/net/ethernet/stmicro/stmmac/common.h-105-\tstruct u64_stats_sync napi_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:106:\tstruct stmmac_napi_rx_stats napi;\ndrivers/net/ethernet/stmicro/stmmac/common.h-107-} ____cacheline_aligned_in_smp;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-109-/* Updates on each CPU protected by not allowing nested irqs. */\ndrivers/net/ethernet/stmicro/stmmac/common.h:110:struct stmmac_pcpu_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-111-\tstruct u64_stats_sync syncp;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-116-/* Extra statistic and debug information exposed by ethtool */\ndrivers/net/ethernet/stmicro/stmmac/common.h:117:struct stmmac_extra_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-118-\t/* Transmit errors */\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-237-\t/* per queue statistics */\ndrivers/net/ethernet/stmicro/stmmac/common.h:238:\tstruct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:239:\tstruct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:240:\tstruct stmmac_pcpu_stats __percpu *pcpu_stats;\ndrivers/net/ethernet/stmicro/stmmac/common.h-241-\tunsigned long rx_dropped;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-247-/* Safety Feature statistics exposed by ethtool */\ndrivers/net/ethernet/stmicro/stmmac/common.h:248:struct stmmac_safety_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-249-\tunsigned long mac_errors[32];\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-256-#define STMMAC_SAFETY_FEAT_SIZE\t\\\ndrivers/net/ethernet/stmicro/stmmac/common.h:257:\t(sizeof(struct stmmac_safety_stats) / sizeof(unsigned long))\ndrivers/net/ethernet/stmicro/stmmac/common.h-258-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=416=struct dma_features {\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-564-\ndrivers/net/ethernet/stmicro/stmmac/common.h:565:void stmmac_axi_blen_to_mask(u32 *regval, const u32 *blen, size_t len);\ndrivers/net/ethernet/stmicro/stmmac/common.h-566-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=613=struct mac_device_info {\ndrivers/net/ethernet/stmicro/stmmac/common.h:614:\tconst struct stmmac_ops *mac;\ndrivers/net/ethernet/stmicro/stmmac/common.h:615:\tconst struct stmmac_desc_ops *desc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:616:\tconst struct stmmac_dma_ops *dma;\ndrivers/net/ethernet/stmicro/stmmac/common.h:617:\tconst struct stmmac_mode_ops *mode;\ndrivers/net/ethernet/stmicro/stmmac/common.h:618:\tconst struct stmmac_hwtimestamp *ptp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:619:\tconst struct stmmac_tc_ops *tc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:620:\tconst struct stmmac_mmc_ops *mmc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:621:\tconst struct stmmac_est_ops *est;\ndrivers/net/ethernet/stmicro/stmmac/common.h:622:\tconst struct stmmac_vlan_ops *vlan;\ndrivers/net/ethernet/stmicro/stmmac/common.h-623-\tstruct dw_xpcs *xpcs;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-644-\ndrivers/net/ethernet/stmicro/stmmac/common.h:645:struct stmmac_rx_routing {\ndrivers/net/ethernet/stmicro/stmmac/common.h-646-\tu32 reg_mask;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-649-\ndrivers/net/ethernet/stmicro/stmmac/common.h:650:int dwmac100_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:651:int dwmac1000_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:652:int dwmac4_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:653:int dwxgmac2_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:654:int dwxlgmac2_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h-655-\ndrivers/net/ethernet/stmicro/stmmac/common.h:656:void stmmac_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],\ndrivers/net/ethernet/stmicro/stmmac/common.h-657-\t\t\t unsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:658:void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,\ndrivers/net/ethernet/stmicro/stmmac/common.h-659-\t\t\t unsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:660:void stmmac_set_mac(void __iomem *ioaddr, bool enable);\ndrivers/net/ethernet/stmicro/stmmac/common.h-661-\ndrivers/net/ethernet/stmicro/stmmac/common.h:662:void stmmac_dwmac4_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],\ndrivers/net/ethernet/stmicro/stmmac/common.h-663-\t\t\t\tunsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:664:void stmmac_dwmac4_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,\ndrivers/net/ethernet/stmicro/stmmac/common.h-665-\t\t\t\tunsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:666:void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool enable);\ndrivers/net/ethernet/stmicro/stmmac/common.h-667-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-14-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:15:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-16-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=93=static int anarion_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-97-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:98:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-99-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:100:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-101-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-103-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:104:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-105-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-115-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:116:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-117-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=125=static struct platform_driver anarion_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-128-\t\t.name = \"anarion-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:129:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-130-\t\t.of_match_table = anarion_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-23-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:24:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-25-#include \"dwmac4.h\"\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=36=static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-43-\t\tplat_dat-\u003eaxi = devm_kzalloc(\u0026pdev-\u003edev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:44:\t\t\t\t\t sizeof(struct stmmac_axi),\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-45-\t\t\t\t\t GFP_KERNEL);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=96=static int dwc_qos_probe(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-97-\t\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:98:\t\t\t struct stmmac_resources *stmmac_res)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-99-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:100:\tplat_dat-\u003epclk = stmmac_pltfr_find_clk(plat_dat, \"phy_ref_clk\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-101-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=115=static void tegra_eqos_fix_speed(void *bsp_priv, phy_interface_t interface,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-119-\tbool needs_calibration = false;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:120:\tstruct stmmac_priv *priv;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-121-\tu32 value;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-141-\t\t/* Calibration should be done with the MDIO bus idle */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:142:\t\tstmmac_mdio_lock(priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-143-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-177-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:178:\t\tstmmac_mdio_unlock(priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-179-\t} else {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=186=static int tegra_eqos_probe(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-187-\t\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:188:\t\t\t struct stmmac_resources *res)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-189-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-203-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:204:\tplat_dat-\u003eclk_tx_i = stmmac_pltfr_find_clk(plat_dat, \"tx\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-205-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-237-\tplat_dat-\u003efix_mac_speed = tegra_eqos_fix_speed;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:238:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-239-\tplat_dat-\u003ebsp_priv = eqos;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=252=static void tegra_eqos_remove(struct platform_device *pdev)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-253-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:254:\tstruct tegra_eqos *eqos = get_stmmac_bsp_priv(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-255-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=260=struct dwc_eth_dwmac_data {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-262-\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:263:\t\t struct stmmac_resources *res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-264-\tvoid (*remove)(struct platform_device *pdev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:265:\tconst char *stmmac_clk_name;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-266-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=268=static const struct dwc_eth_dwmac_data dwc_qos_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-269-\t.probe = dwc_qos_probe,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:270:\t.stmmac_clk_name = \"apb_pclk\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-271-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=273=static const struct dwc_eth_dwmac_data tegra_eqos_data = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-275-\t.remove = tegra_eqos_remove,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:276:\t.stmmac_clk_name = \"slave_bus\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-277-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=279=static const struct dwc_eth_dwmac_data fsd_eqos_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:280:\t.stmmac_clk_name = \"slave_bus\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-281-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=283=static int dwc_eth_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-286-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:287:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-288-\tint ret;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-291-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:292:\tmemset(\u0026stmmac_res, 0, sizeof(struct stmmac_resources));\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-293-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-294-\t/**\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:295:\t * Since stmmac_platform supports name IRQ only, basic platform\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-296-\t * resource initialization is done in the glue logic.\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-297-\t */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:298:\tstmmac_res.irq = platform_get_irq(pdev, 0);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:299:\tif (stmmac_res.irq \u003c 0)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:300:\t\treturn stmmac_res.irq;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:301:\tstmmac_res.wol_irq = stmmac_res.irq;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-302-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:303:\tstmmac_res.addr = devm_platform_ioremap_resource(pdev, 0);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:304:\tif (IS_ERR(stmmac_res.addr))\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:305:\t\treturn PTR_ERR(stmmac_res.addr);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-306-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:307:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-308-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-315-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:316:\tplat_dat-\u003estmmac_clk = stmmac_pltfr_find_clk(plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:317:\t\t\t\t\t\t data-\u003estmmac_clk_name);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-318-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-319-\tif (data-\u003eprobe)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:320:\t\tret = data-\u003eprobe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-321-\tif (ret \u003c 0) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-329-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:330:\tret = stmmac_dvr_probe(\u0026pdev-\u003edev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-331-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=343=static void dwc_eth_dwmac_remove(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-346-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:347:\tstmmac_dvr_remove(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-348-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=361=static struct platform_driver dwc_eth_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-365-\t\t.name = \"dwc-eth-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:366:\t\t.pm = \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-367-\t\t.of_match_table = dwc_eth_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-19-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:20:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-21-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c=167=static int eic7700_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-170-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:171:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-172-\tstruct eic7700_qos_priv *dwc_priv;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-175-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:176:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-177-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-180-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:181:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-182-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-323-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:324:\tplat_dat-\u003eclk_tx_i = stmmac_pltfr_find_clk(plat_dat, \"tx\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:325:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-326-\tplat_dat-\u003eclks_config = eic7700_clks_config;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-334-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:335:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-336-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c=362=static struct platform_driver eic7700_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-365-\t\t.name = \"eic7700-eth-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:366:\t\t.pm = \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-367-\t\t.of_match_table = eic7700_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-16-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:17:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-18-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c=19=static int dwmac_generic_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-21-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:22:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-23-\tint ret;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-24-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:25:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-26-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-29-\tif (pdev-\u003edev.of_node) {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:30:\t\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-31-\t\tif (IS_ERR(plat_dat)) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-48-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:49:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-50-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c=69=static struct platform_driver dwmac_generic_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-72-\t\t.name = STMMAC_RESOURCE_NAME,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:73:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-74-\t\t.of_match_table = dwmac_generic_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-22-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:23:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-24-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=44=struct imx_dwmac_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-48-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:49:\tint (*fix_soc_reset)(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-50-\tint (*set_intf_mode)(struct imx_priv_data *dwmac, u8 phy_intf_sel);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=154=static int imx_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-160-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:161:\treturn stmmac_set_clk_tx_rate(bsp_priv, clk_tx_i, interface, speed);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-162-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=190=static void imx93_dwmac_fix_speed(void *priv, phy_interface_t interface,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-228-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:229:static int imx_dwmac_mx93_reset(struct stmmac_priv *priv)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-230-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=293=static int imx_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-295-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:296:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-297-\tstruct imx_priv_data *dwmac;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-300-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:301:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-302-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-308-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:309:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-310-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-338-\tdwmac-\u003eplat_dat = plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:339:\tdwmac-\u003ebase_addr = stmmac_res.addr;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-340-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-353-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:354:\tret = stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-355-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=392=static struct platform_driver imx_dwmac_driver = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-393-\t.probe = imx_dwmac_probe,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:394:\t.remove = stmmac_pltfr_remove,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-395-\t.driver = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-396-\t\t.name = \"imx-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:397:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-398-\t\t.of_match_table = imx_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-20-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:21:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-22-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c=154=static int ingenic_mac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-156-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:157:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-158-\tstruct ingenic_mac *mac;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-162-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:163:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-164-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-166-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:167:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-168-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-214-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:215:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-216-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c=272=static struct platform_driver ingenic_mac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-275-\t\t.name\t= \"ingenic-mac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:276:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-277-\t\t.of_match_table = ingenic_mac_of_matches,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-15-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:16:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-17-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c=42=static int intel_eth_plat_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-44-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:45:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-46-\tstruct intel_dwmac *dwmac;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-49-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:50:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-51-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-53-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:54:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-55-\tif (IS_ERR(plat_dat)) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-114-\tplat_dat-\u003eclk_tx_i = dwmac-\u003etx_clk;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:115:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-116-\tplat_dat-\u003ebsp_priv = dwmac;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-117-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:118:\tret = stmmac_dvr_probe(\u0026pdev-\u003edev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-119-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c=130=static void intel_eth_plat_remove(struct platform_device *pdev)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-131-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:132:\tstruct intel_dwmac *dwmac = get_stmmac_bsp_priv(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-133-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:134:\tstmmac_pltfr_remove(pdev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-135-\tif (dwmac-\u003edata-\u003etx_clk_en)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c=139=static struct platform_driver intel_eth_plat_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-143-\t\t.name\t\t= \"intel-eth-plat\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:144:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-145-\t\t.of_match_table = intel_eth_plat_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-12-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:13:#include \"stmmac_ptp.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-14-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=25=struct intel_priv_data {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-39- */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:40:struct stmmac_pci_func_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-41-\tunsigned int func;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-44-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:45:struct stmmac_pci_dmi_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:46:\tconst struct stmmac_pci_func_data *func;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-47-\tsize_t nfuncs;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-49-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:50:struct stmmac_pci_info {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-51-\tint (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=91=static const int adln_tsn_lane_regs[] = {6};\n\n"
} |
| 17/2 | 2026/09/10 05:36 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 28055 output: 40 thoughts: 509 Thoughts: **My Assessment of `stmmac` Fuzzing Feasibility** Okay, so I'm looking at `stmmac`, the Ethernet driver for a bunch of different Systems on a Chip (SoCs): Allwinner, STi, Amlogic, Intel Quark/EHL/TGL, NXP i.MX8, Loongson, you name it. The immediate question is, can I even *reach* this thing in a standard fuzzing setup, like Google Compute Engine (GCE) or QEMU on x86_64? That's the first hurdle, as per my usual triage approach. Let's quickly recap my core criteria. Structurally unreachable hardware is a no-go, right? Think vendor-specific PCIe switches, SmartNICs, or GPU drivers like `mlxsw`, `pds_core`, `qed`, `ionic`, or `amdgpu`. These need physical cards, which obviously aren't emulated in standard QEMU. Reachability is key. I can only expect to find bugs in code that can actually *execute* in a standard virtual environment using software-emulated devices like USB gadgets, netdev, or tun/tap. Any modifications to structurally unreachable code, even with added assertions, are completely off the table. Now, back to `stmmac`. This driver is specifically for Synopsys DesignWare Ethernet MAC hardware, or Intel PCI dwmac, Loongson PCI dwmac and the like. So, the crucial question: are there virtual or emulated instances of `stmmac` that I can use in a standard QEMU environment on x86/amd64? The answer is...no. QEMU for x86/amd64 doesn't emulate the Synopsys DesignWare MAC (that's `stmmac`), and I should note that it only emulates things like e1000, e1000e, rtl8139, pcnet, ne2k_pci, eepro100, sungem, tulip, vmxnet3, igb, virtio-net, etc. So, I need to know if I can somehow probe or instantiate `stmmac` without real hardware or a devicetree on an actual SoC. I need to know if I can load it or test it in an isolated manner. Let's look at `stmmac_xmit`. That's the `ndo_start_xmit` function from `stmmac_main.c`. I need to figure out where that's called or registered to understand the dependencies. |
| 18/2 | 2026/09/10 05:36 | tool | grepper |
0mArgs:{
"Expression": "stmmac_xmit",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c=4745=static bool stmmac_has_ip_ethertype(struct sk_buff *skb)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-4757-/**\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:4758: * stmmac_xmit - Tx entry point of the driver\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-4759- * @skb : the socket buffer\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-4764- */\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:4765:static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-4766-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=7332=static const struct net_device_ops stmmac_netdev_ops = {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7333-\t.ndo_open = stmmac_open,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:7334:\t.ndo_start_xmit = stmmac_xmit,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7335-\t.ndo_features_check = stmmac_features_check,\n"
} |
| 19/2 | 2026/09/10 05:36 | llm | patch-evaluator |
0mModel:gemini-3.7-flash Args: null Results: null Tokens: input: 29626 output: 136 thoughts: 1750 Thoughts: **Analysis of `stmmac_xmit` Reachability for Fuzzing** Okay, so I'm looking at this patch for `stmmac_xmit`, which is the transmit handler for STMMAC/DWMAC ethernet devices. My understanding is that this function, `stmmac_xmit`, only gets called if the STMMAC netdevice is successfully created, opened, and packets are being transmitted over it. The creation of such a netdevice relies on the driver probing successfully. And for the driver to probe, there needs to be a hardware device present – specifically, a platform device with MMIO registers, IRQs, a PHY, or a PCI device with matching STMMAC/DWMAC PCI IDs, like those found in Intel Elkhart Lake/Tiger Lake/Quark SoCs. This involves accessing hardware MMIO registers. The key here is that to get this far, you absolutely need the physical hardware or a very specific, full QEMU emulation of DWMAC. Standard QEMU on x86_64 doesn't provide this level of emulation. Thus, the driver will never probe and never register a network interface. That means the code in `stmmac_xmit` will never be executed. Now, let's go back and reference the triage instructions, especially the "REACHABILITY IS THE PRIMARY GATE". The instructions clearly state that fuzzing is only viable for code that can run in standard virtualized environments. If the code is unreachable due to hardware requirements, we should not be fuzzing it. And specifically under "WHEN TO RETURN WorthFuzzing=false (NEGATIVE CRITERIA)", this directly applies: It's "structurally unreachable hardware". The STMMAC driver is the classic example – it needs physical ASICs/PCIe cards not emulated in standard QEMU. I've checked the diff and the only file modified is `drivers/net/ethernet/stmicro/stmmac/stmmac_main.c`. It's all about `stmmac_xmit`, and specifically cleaning up DMA mapping errors. But since the underlying device won't probe, we can't get there in a standard fuzzing setup. Therefore, because this code is unreachable in a standard fuzzing environment, I'm going to set `WorthFuzzing=false`. The `FocusSymbols` will be empty, and so will `EnableConfigs`. |
| 20/2 | 2026/09/10 05:36 | tool | set-results |
0mArgs:{
"EnableConfigs": [],
"FocusSymbols": [],
"Reasoning": "The patch modifies Tx DMA mapping error unwinding logic in `stmmac_xmit()` within the STMicroelectronics / Synopsys DesignWare Ethernet MAC (stmmac) driver (`drivers/net/ethernet/stmicro/stmmac/stmmac_main.c`). This driver targets specific SoC/PCI hardware IP blocks (STMMAC/DWMAC) that are not emulated in standard QEMU/GCE virtualized fuzzing environments, making the modified code structurally unreachable.",
"WorthFuzzing": false
}Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch modifies Tx DMA mapping error unwinding logic in `stmmac_xmit()` within the STMicroelectronics / Synopsys DesignWare Ethernet MAC (stmmac) driver (`drivers/net/ethernet/stmicro/stmmac/stmmac_main.c`). This driver targets specific SoC/PCI hardware IP blocks (STMMAC/DWMAC) that are not emulated in standard QEMU/GCE virtualized fuzzing environments, making the modified code structurally unreachable.",
"WorthFuzzing": false
} |
| 21/1 | 2026/09/10 05:36 | action | If |
0mArgs:{
"WorthFuzzing": false
}Results: null |
| Total Calls | Total Tokens | Avg Tokens | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|
| Total Calls | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|