| Seq | Timestamp | Type | Name | Duration |
|---|---|---|---|---|
| 0/0 | 2026/09/20 21:06 | flow | patch-triage |
1mArgs:null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"KMSANReasoning": "",
"NeedsKMSAN": false,
"Reasoning": "The changes modify the receive path and buffer management of the STMMAC (Synopsys DesignWare MAC / STMicroelectronics) Ethernet driver (stmmac_rx, stmmac_build_skb, stmmac_build_xdp_frags, stmmac_rx_refill, stmmac_init_rx_buffers). This driver controls physical SoC/PCI hardware and is not emulated in standard QEMU or GCE virtualized environments, making the modified code structurally unreachable for syzkaller fuzzing.",
"WorthFuzzing": false
} |
| 1/1 | 2026/09/20 21:06 | action | read-patch-diff |
0mArgs:null Results: {
"PatchDiff": "commit 86fe0d89f57cb319d9dfb06281a44af10871ba89\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Sun Sep 20 21:06:23 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h\nindex 4fc96b317d79c..69bdbbf4b9201 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h\n@@ -132,7 +132,7 @@ struct stmmac_rx_queue {\n \tdma_addr_t dma_rx_phy;\n \tunsigned int state_saved;\n \tstruct {\n-\t\tstruct sk_buff *skb;\n+\t\tstruct xdp_buff xdp;\n \t\tunsigned int len;\n \t\tunsigned int error;\n \t} state;\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\nindex bf9e7e4cb1c31..1de8d9626c640 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n@@ -1695,7 +1695,8 @@ static int stmmac_init_rx_buffers(struct stmmac_priv *priv,\n \t\tif (!buf-\u003esec_page)\n \t\t\treturn -ENOMEM;\n \n-\t\tbuf-\u003esec_addr = page_pool_get_dma_addr(buf-\u003esec_page);\n+\t\tbuf-\u003esec_addr = page_pool_get_dma_addr(buf-\u003esec_page) +\n+\t\t\t\tbuf-\u003epage_offset;\n \t\tstmmac_set_desc_sec_addr(priv, p, buf-\u003esec_addr, true);\n \t} else {\n \t\tbuf-\u003esec_page = NULL;\n@@ -5140,7 +5141,8 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)\n \t\t\tif (!buf-\u003esec_page)\n \t\t\t\tbreak;\n \n-\t\t\tbuf-\u003esec_addr = page_pool_get_dma_addr(buf-\u003esec_page);\n+\t\t\tbuf-\u003esec_addr = page_pool_get_dma_addr(buf-\u003esec_page) +\n+\t\t\t\t\tbuf-\u003epage_offset;\n \t\t}\n \n \t\tbuf-\u003eaddr = page_pool_get_dma_addr(buf-\u003epage) + buf-\u003epage_offset;\n@@ -5735,6 +5737,82 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \treturn failure ? limit : (int)count;\n }\n \n+static void\n+stmmac_xdp_put_buff(struct stmmac_rx_queue *rx_q, struct xdp_buff *xdp,\n+\t\t int sync_len)\n+{\n+\tstruct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);\n+\tint i;\n+\n+\tif (likely(!xdp_buff_has_frags(xdp)))\n+\t\tgoto out;\n+\n+\tfor (i = 0; i \u003c sinfo-\u003enr_frags; i++)\n+\t\tpage_pool_put_full_page(rx_q-\u003epage_pool,\n+\t\t\t\t\tskb_frag_page(\u0026sinfo-\u003efrags[i]), true);\n+out:\n+\tpage_pool_put_page(rx_q-\u003epage_pool, virt_to_head_page(xdp-\u003edata),\n+\t\t\t sync_len, true);\n+}\n+\n+static struct sk_buff *stmmac_build_skb(struct xdp_buff *xdp)\n+{\n+\tstruct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);\n+\tu32 metasize = xdp-\u003edata - xdp-\u003edata_meta;\n+\tstruct sk_buff *skb;\n+\tu8 num_frags;\n+\n+\tif (unlikely(xdp_buff_has_frags(xdp)))\n+\t\tnum_frags = sinfo-\u003enr_frags;\n+\n+\tskb = napi_build_skb(xdp-\u003edata_hard_start, xdp-\u003eframe_sz);\n+\tif (!skb)\n+\t\treturn ERR_PTR(-ENOMEM);\n+\n+\tskb_mark_for_recycle(skb);\n+\tskb_reserve(skb, xdp-\u003edata - xdp-\u003edata_hard_start);\n+\tskb_put(skb, xdp-\u003edata_end - xdp-\u003edata);\n+\tif (metasize)\n+\t\tskb_metadata_set(skb, metasize);\n+\n+\tif (unlikely(xdp_buff_has_frags(xdp)))\n+\t\txdp_update_skb_frags_info(skb, num_frags, sinfo-\u003exdp_frags_size,\n+\t\t\t\t\t num_frags * xdp-\u003eframe_sz,\n+\t\t\t\t\t xdp_buff_get_skb_flags(xdp));\n+\treturn skb;\n+}\n+\n+static void stmmac_build_xdp_frags(struct stmmac_priv *priv,\n+\t\t\t\t struct stmmac_rx_queue *rx_q,\n+\t\t\t\t unsigned int len, struct page *page,\n+\t\t\t\t unsigned int offset,\n+\t\t\t\t enum dma_data_direction dma_dir,\n+\t\t\t\t struct xdp_buff *xdp)\n+{\n+\tstruct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);\n+\tdma_addr_t dma_addr = page_pool_get_dma_addr(page) + offset;\n+\n+\tdma_sync_single_for_cpu(priv-\u003edevice, dma_addr, len, dma_dir);\n+\n+\tif (!xdp_buff_has_frags(xdp)) {\n+\t\txdp_buff_set_frags_flag(xdp);\n+\t\tsinfo-\u003exdp_frags_size = 0;\n+\t\tsinfo-\u003enr_frags = 0;\n+\t}\n+\n+\tif (sinfo-\u003enr_frags \u003c MAX_SKB_FRAGS) {\n+\t\tskb_frag_t *frag = \u0026sinfo-\u003efrags[sinfo-\u003enr_frags++];\n+\n+\t\tskb_frag_fill_page_desc(frag, page, offset, len);\n+\t\tsinfo-\u003exdp_frags_size += len;\n+\n+\t\tif (page_is_pfmemalloc(page))\n+\t\t\txdp_buff_set_frag_pfmemalloc(xdp);\n+\t} else {\n+\t\tpage_pool_put_full_page(rx_q-\u003epage_pool, page, true);\n+\t}\n+}\n+\n /**\n * stmmac_rx - manage the receive process\n * @priv: driver private structure\n@@ -5756,11 +5834,12 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \tunsigned int desc_size;\n \tstruct sk_buff *skb = NULL;\n \tstruct stmmac_xdp_buff ctx;\n+\tbool first_desc = true;\n \tint xdp_status = 0;\n \tint bufsz;\n \n \tdma_dir = page_pool_get_dma_dir(rx_q-\u003epage_pool);\n-\tbufsz = DIV_ROUND_UP(priv-\u003edma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;\n+\tbufsz = rx_q-\u003enapi_skb_frag_size;\n \n \tif (netif_msg_rx_status(priv)) {\n \t\tvoid *rx_head = stmmac_get_rx_desc(priv, rx_q, 0);\n@@ -5780,9 +5859,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tu32 hash;\n \n \t\tif (!count \u0026\u0026 rx_q-\u003estate_saved) {\n-\t\t\tskb = rx_q-\u003estate.skb;\n+\t\t\tctx.xdp = rx_q-\u003estate.xdp;\n \t\t\terror = rx_q-\u003estate.error;\n \t\t\tlen = rx_q-\u003estate.len;\n+\t\t\tfirst_desc = false;\n \t\t} else {\n \t\t\trx_q-\u003estate_saved = false;\n \t\t\tskb = NULL;\n@@ -5831,6 +5911,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tif (unlikely(error \u0026\u0026 (status \u0026 rx_not_ls)))\n \t\t\tgoto read_again;\n \t\tif (unlikely(error)) {\n+\t\t\tif (!first_desc) {\n+\t\t\t\tstmmac_xdp_put_buff(rx_q, \u0026ctx.xdp, -1);\n+\t\t\t\tfirst_desc = true;\n+\t\t\t}\n \t\t\tdev_kfree_skb(skb);\n \t\t\tskb = NULL;\n \t\t\tcount++;\n@@ -5855,9 +5939,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\t\t}\n \t\t}\n \n-\t\tif (!skb) {\n-\t\t\tunsigned int pre_len, sync_len;\n-\n+\t\tif (first_desc) {\n \t\t\tdma_sync_single_for_cpu(priv-\u003edevice, buf-\u003eaddr,\n \t\t\t\t\t\tbuf1_len, dma_dir);\n \t\t\tnet_prefetch(page_address(buf-\u003epage) +\n@@ -5866,6 +5948,28 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\t\txdp_init_buff(\u0026ctx.xdp, bufsz, \u0026rx_q-\u003exdp_rxq);\n \t\t\txdp_prepare_buff(\u0026ctx.xdp, page_address(buf-\u003epage),\n \t\t\t\t\t buf-\u003epage_offset, buf1_len, true);\n+\t\t\tfirst_desc = false;\n+\t\t\tbuf-\u003epage = NULL;\n+\t\t} else if (buf1_len) {\n+\t\t\tstmmac_build_xdp_frags(priv, rx_q, buf1_len, buf-\u003epage,\n+\t\t\t\t\t buf-\u003epage_offset, dma_dir,\n+\t\t\t\t\t \u0026ctx.xdp);\n+\t\t\tbuf-\u003epage = NULL;\n+\t\t}\n+\n+\t\tif (buf2_len) {\n+\t\t\tstmmac_build_xdp_frags(priv, rx_q, buf2_len,\n+\t\t\t\t\t buf-\u003esec_page, buf-\u003epage_offset,\n+\t\t\t\t\t dma_dir, \u0026ctx.xdp);\n+\t\t\tbuf-\u003esec_page = NULL;\n+\t\t}\n+\n+\t\tif (likely(status \u0026 rx_not_ls))\n+\t\t\tgoto read_again;\n+\n+\t\tfirst_desc = true;\n+\t\tif (!skb) {\n+\t\t\tunsigned int pre_len, sync_len;\n \n \t\t\tpre_len = ctx.xdp.data_end - ctx.xdp.data_hard_start -\n \t\t\t\t buf-\u003epage_offset;\n@@ -5887,10 +5991,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\t\t\tunsigned int xdp_res = -PTR_ERR(skb);\n \n \t\t\t\tif (xdp_res \u0026 STMMAC_XDP_CONSUMED) {\n-\t\t\t\t\tpage_pool_put_page(rx_q-\u003epage_pool,\n-\t\t\t\t\t\t\t virt_to_head_page(ctx.xdp.data),\n-\t\t\t\t\t\t\t sync_len, true);\n-\t\t\t\t\tbuf-\u003epage = NULL;\n+\t\t\t\t\tstmmac_xdp_put_buff(rx_q, \u0026ctx.xdp, sync_len);\n \t\t\t\t\trx_dropped++;\n \n \t\t\t\t\t/* Clear skb as it was set as\n@@ -5906,7 +6007,6 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\t\t\t} else if (xdp_res \u0026 (STMMAC_XDP_TX |\n \t\t\t\t\t\t STMMAC_XDP_REDIRECT)) {\n \t\t\t\t\txdp_status |= xdp_res;\n-\t\t\t\t\tbuf-\u003epage = NULL;\n \t\t\t\t\tskb = NULL;\n \t\t\t\t\tcount++;\n \t\t\t\t\tcontinue;\n@@ -5914,51 +6014,13 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\t\t}\n \t\t}\n \n-\t\tif (!skb) {\n-\t\t\tunsigned int head_pad_len;\n-\n-\t\t\t/* XDP program may expand or reduce tail */\n-\t\t\tbuf1_len = ctx.xdp.data_end - ctx.xdp.data;\n-\n-\t\t\tskb = napi_build_skb(page_address(buf-\u003epage),\n-\t\t\t\t\t rx_q-\u003enapi_skb_frag_size);\n-\t\t\tif (!skb) {\n-\t\t\t\tpage_pool_recycle_direct(rx_q-\u003epage_pool,\n-\t\t\t\t\t\t\t buf-\u003epage);\n-\t\t\t\trx_dropped++;\n-\t\t\t\tcount++;\n-\t\t\t\tgoto drain_data;\n-\t\t\t}\n-\n-\t\t\t/* XDP program may adjust header */\n-\t\t\thead_pad_len = ctx.xdp.data - ctx.xdp.data_hard_start;\n-\t\t\tskb_reserve(skb, head_pad_len);\n-\t\t\tskb_put(skb, buf1_len);\n-\t\t\tskb_mark_for_recycle(skb);\n-\t\t\tbuf-\u003epage = NULL;\n-\t\t} else if (buf1_len) {\n-\t\t\tdma_sync_single_for_cpu(priv-\u003edevice, buf-\u003eaddr,\n-\t\t\t\t\t\tbuf1_len, dma_dir);\n-\t\t\tskb_add_rx_frag(skb, skb_shinfo(skb)-\u003enr_frags,\n-\t\t\t\t\tbuf-\u003epage, buf-\u003epage_offset, buf1_len,\n-\t\t\t\t\tpriv-\u003edma_conf.dma_buf_sz);\n-\t\t\tbuf-\u003epage = NULL;\n-\t\t}\n-\n-\t\tif (buf2_len) {\n-\t\t\tdma_sync_single_for_cpu(priv-\u003edevice, buf-\u003esec_addr,\n-\t\t\t\t\t\tbuf2_len, dma_dir);\n-\t\t\tskb_add_rx_frag(skb, skb_shinfo(skb)-\u003enr_frags,\n-\t\t\t\t\tbuf-\u003esec_page, 0, buf2_len,\n-\t\t\t\t\tpriv-\u003edma_conf.dma_buf_sz);\n-\t\t\tbuf-\u003esec_page = NULL;\n-\t\t}\n-\n-drain_data:\n-\t\tif (likely(status \u0026 rx_not_ls))\n+\t\tskb = stmmac_build_skb(\u0026ctx.xdp);\n+\t\tif (IS_ERR(skb)) {\n+\t\t\tstmmac_xdp_put_buff(rx_q, \u0026ctx.xdp, -1);\n+\t\t\trx_dropped++;\n+\t\t\tcount++;\n \t\t\tgoto read_again;\n-\t\tif (!skb)\n-\t\t\tcontinue;\n+\t\t}\n \n \t\t/* Got entire packet into SKB. Finish it. */\n \n@@ -5991,9 +6053,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tcount++;\n \t}\n \n-\tif (status \u0026 rx_not_ls || skb) {\n-\t\trx_q-\u003estate_saved = true;\n-\t\trx_q-\u003estate.skb = skb;\n+\trx_q-\u003estate_saved = !first_desc;\n+\tif (!first_desc) {\n+\t\trx_q-\u003estate.xdp = ctx.xdp;\n \t\trx_q-\u003estate.error = error;\n \t\trx_q-\u003estate.len = len;\n \t}\n"
} |
| 2/1 | 2026/09/20 21:06 | agent | patch-evaluator |
1mModel:core Args: null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The changes modify the receive path and buffer management of the STMMAC (Synopsys DesignWare MAC / STMicroelectronics) Ethernet driver (stmmac_rx, stmmac_build_skb, stmmac_build_xdp_frags, stmmac_rx_refill, stmmac_init_rx_buffers). This driver controls physical SoC/PCI hardware and is not emulated in standard QEMU or GCE virtualized environments, making the modified code structurally unreachable for syzkaller fuzzing.",
"WorthFuzzing": false
}Instruction: You are an expert Linux kernel maintainer and security engineer.
Your job is to review a provided patch series and evaluate whether it warrants fuzzing with syzkaller.
IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in
your workspace. Do NOT rely on internal assumptions. You must actively use your code access
tools to inspect the actual source code, callers, and surrounding context.
================================================================================
1. CORE TRIAGE PHILOSOPHY
================================================================================
The goal of patch fuzzing is to discover crashes, regressions, exposed latent bugs,
and newly triggered assertions introduced by the patch series.
- REACHABILITY IS THE PRIMARY GATE:
Fuzzing can only discover bugs in code that can actually execute in standard virtualized
environments (GCE or QEMU, utilizing software-emulated devices like USB gadgets, netdev, tun/tap).
If the modified code is structurally unreachable (see Section 2), it MUST NOT be fuzzed,
regardless of whether it adds assertions or complex logic.
- DO NOT BLINDLY TRUST "NO FUNCTIONAL CHANGE" (NFCI) OR "REFACTORING" CLAIMS:
Patch authors routinely label changes as "cleanups", "refactorings", or state
"No functional change intended". Do NOT take these claims at face value.
Code refactorings that rearrange logic, introduce helper functions, or alter state management
in core subsystems frequently introduce subtle semantic shifts or uncover latent kernel bugs.
If reachable executable code is modified or refactored, it MUST be fuzzed.
- NEW OR MODIFIED ASSERTIONS IN REACHABLE CODE MUST BE FUZZED:
When a patch introduces or modifies runtime checks or assertions (e.g., WARN_ON*, VM_WARN_ON*,
BUG_ON*, lockdep_assert*) in reachable code paths, it enforces new or stricter invariants.
Even if the author believes the invariant always holds, fuzzing is essential to verify whether
an unusual sequence of operations can violate it.
================================================================================
2. WHEN TO RETURN WorthFuzzing=false (NEGATIVE CRITERIA)
================================================================================
Return WorthFuzzing=false ONLY IF all modified code falls strictly into one or more of these categories:
- Non-kernel and non-executable changes:
* Modifications to Documentation/, comments, or spelling fixes.
* User-space directories, self-tests, samples, or scripts (e.g., tools/, samples/, scripts/, usr/)
that do not affect the compiled kernel image (vmlinux) or kernel modules.
* Purely decorative logging (e.g., message strings in pr_err, printk, dev_info) or tracepoints
that do not alter control flow or data structures.
* Build system or Kconfig changes that do not alter compiled C logic.
- Structurally unreachable hardware:
* Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed,
ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU.
- Unreachable execution paths:
* Driver teardown callbacks (.remove, .shutdown, pci_unregister_driver) executed only during
physical PCI hot-unplug or manual sysfs driver unbinding.
* Code paths exclusive to architectures other than the target architecture.
================================================================================
3. WHEN TO RETURN WorthFuzzing=true (POSITIVE CRITERIA)
================================================================================
Return WorthFuzzing=true whenever the patch touches reachable executable code, including:
- Core Subsystems:
* Any logic modifications in memory management (mm/), synchronization/locking (kernel/locking/),
BPF, scheduler, core networking, VFS, or syscall handling.
- Refactorings and Code Cleanups:
* Any restructuring of reachable data structures, helper abstractions, or algorithm flows.
- Runtime Assertions and Defensive Checks:
* Any introduction or alteration of assertions (WARN_ON*, VM_WARN_ON*, BUG_ON*, etc.) in reachable paths.
- Reachable Drivers and Protocols:
* Drivers accessible via virtual buses (virtio, USB gadget, loopback, netlink, binder, sockets, etc.).
================================================================================
4. EXTRACTING FocusSymbols (PREVENTING DILUTION)
================================================================================
When WorthFuzzing=true, you must extract specific kernel functions into FocusSymbols to guide the fuzzer:
- AVOID UBIQUITOUS LIFECYCLE HOT-PATHS:
Do NOT list generic, ubiquitous functions called by almost every program in the corpus
(including, but not limited to: general memory allocators and deallocators, page fault
and trap handlers, or core synchronization primitives; this is not an exhaustive list).
Listing ubiquitous functions causes the fuzzer to classify thousands of unrelated tests as "focused",
which severely dilutes fuzzing effort away from the actual changes.
- TARGET SPECIFIC FEATURE LOGIC AND ENTRYPOINTS:
List functions that specifically implement the logic being added or altered, or direct API entrypoints
for the subsystem feature under review.
- HANDLING STATIC INLINE FUNCTIONS IN HEADERS (.h):
Compiler-inlined static functions (such as static inlines in mm/*.h or include/linux/*.h) lack
distinct symbol addresses in vmlinux and cannot be targeted directly by symbol coverage filters.
If the changes are primarily in static inline helpers, identify non-static, feature-specific caller
functions in .c files that exercise them (avoiding ubiquitous lifecycle wrappers).
================================================================================
5. IDENTIFYING EnableConfigs
================================================================================
Identify any specific CONFIG_ options required to properly compile and reach the modified code:
- Inspect Kconfig files and #ifdef guards; do not make assumptions.
- Check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed.
- Strip any 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4").
Prefer calling several tools at the same time to save round-trips.
Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.
Prompt: Target architecture: amd64
For your convenience, here is the diff of the changes:
commit 86fe0d89f57cb319d9dfb06281a44af10871ba89
Author: syz-cluster <triage@syzkaller.com>
Date: Sun Sep 20 21:06:23 2026 +0000
syz-cluster: applied patch under review
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 4fc96b317d79c..69bdbbf4b9201 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -132,7 +132,7 @@ struct stmmac_rx_queue {
dma_addr_t dma_rx_phy;
unsigned int state_saved;
struct {
- struct sk_buff *skb;
+ struct xdp_buff xdp;
unsigned int len;
unsigned int error;
} state;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index bf9e7e4cb1c31..1de8d9626c640 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1695,7 +1695,8 @@ static int stmmac_init_rx_buffers(struct stmmac_priv *priv,
if (!buf->sec_page)
return -ENOMEM;
- buf->sec_addr = page_pool_get_dma_addr(buf->sec_page);
+ buf->sec_addr = page_pool_get_dma_addr(buf->sec_page) +
+ buf->page_offset;
stmmac_set_desc_sec_addr(priv, p, buf->sec_addr, true);
} else {
buf->sec_page = NULL;
@@ -5140,7 +5141,8 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
if (!buf->sec_page)
break;
- buf->sec_addr = page_pool_get_dma_addr(buf->sec_page);
+ buf->sec_addr = page_pool_get_dma_addr(buf->sec_page) +
+ buf->page_offset;
}
buf->addr = page_pool_get_dma_addr(buf->page) + buf->page_offset;
@@ -5735,6 +5737,82 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
return failure ? limit : (int)count;
}
+static void
+stmmac_xdp_put_buff(struct stmmac_rx_queue *rx_q, struct xdp_buff *xdp,
+ int sync_len)
+{
+ struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
+ int i;
+
+ if (likely(!xdp_buff_has_frags(xdp)))
+ goto out;
+
+ for (i = 0; i < sinfo->nr_frags; i++)
+ page_pool_put_full_page(rx_q->page_pool,
+ skb_frag_page(&sinfo->frags[i]), true);
+out:
+ page_pool_put_page(rx_q->page_pool, virt_to_head_page(xdp->data),
+ sync_len, true);
+}
+
+static struct sk_buff *stmmac_build_skb(struct xdp_buff *xdp)
+{
+ struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
+ u32 metasize = xdp->data - xdp->data_meta;
+ struct sk_buff *skb;
+ u8 num_frags;
+
+ if (unlikely(xdp_buff_has_frags(xdp)))
+ num_frags = sinfo->nr_frags;
+
+ skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
+ if (!skb)
+ return ERR_PTR(-ENOMEM);
+
+ skb_mark_for_recycle(skb);
+ skb_reserve(skb, xdp->data - xdp->data_hard_start);
+ skb_put(skb, xdp->data_end - xdp->data);
+ if (metasize)
+ skb_metadata_set(skb, metasize);
+
+ if (unlikely(xdp_buff_has_frags(xdp)))
+ xdp_update_skb_frags_info(skb, num_frags, sinfo->xdp_frags_size,
+ num_frags * xdp->frame_sz,
+ xdp_buff_get_skb_flags(xdp));
+ return skb;
+}
+
+static void stmmac_build_xdp_frags(struct stmmac_priv *priv,
+ struct stmmac_rx_queue *rx_q,
+ unsigned int len, struct page *page,
+ unsigned int offset,
+ enum dma_data_direction dma_dir,
+ struct xdp_buff *xdp)
+{
+ struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
+ dma_addr_t dma_addr = page_pool_get_dma_addr(page) + offset;
+
+ dma_sync_single_for_cpu(priv->device, dma_addr, len, dma_dir);
+
+ if (!xdp_buff_has_frags(xdp)) {
+ xdp_buff_set_frags_flag(xdp);
+ sinfo->xdp_frags_size = 0;
+ sinfo->nr_frags = 0;
+ }
+
+ if (sinfo->nr_frags < MAX_SKB_FRAGS) {
+ skb_frag_t *frag = &sinfo->frags[sinfo->nr_frags++];
+
+ skb_frag_fill_page_desc(frag, page, offset, len);
+ sinfo->xdp_frags_size += len;
+
+ if (page_is_pfmemalloc(page))
+ xdp_buff_set_frag_pfmemalloc(xdp);
+ } else {
+ page_pool_put_full_page(rx_q->page_pool, page, true);
+ }
+}
+
/**
* stmmac_rx - manage the receive process
* @priv: driver private structure
@@ -5756,11 +5834,12 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
unsigned int desc_size;
struct sk_buff *skb = NULL;
struct stmmac_xdp_buff ctx;
+ bool first_desc = true;
int xdp_status = 0;
int bufsz;
dma_dir = page_pool_get_dma_dir(rx_q->page_pool);
- bufsz = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
+ bufsz = rx_q->napi_skb_frag_size;
if (netif_msg_rx_status(priv)) {
void *rx_head = stmmac_get_rx_desc(priv, rx_q, 0);
@@ -5780,9 +5859,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
u32 hash;
if (!count && rx_q->state_saved) {
- skb = rx_q->state.skb;
+ ctx.xdp = rx_q->state.xdp;
error = rx_q->state.error;
len = rx_q->state.len;
+ first_desc = false;
} else {
rx_q->state_saved = false;
skb = NULL;
@@ -5831,6 +5911,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
if (unlikely(error && (status & rx_not_ls)))
goto read_again;
if (unlikely(error)) {
+ if (!first_desc) {
+ stmmac_xdp_put_buff(rx_q, &ctx.xdp, -1);
+ first_desc = true;
+ }
dev_kfree_skb(skb);
skb = NULL;
count++;
@@ -5855,9 +5939,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
}
}
- if (!skb) {
- unsigned int pre_len, sync_len;
-
+ if (first_desc) {
dma_sync_single_for_cpu(priv->device, buf->addr,
buf1_len, dma_dir);
net_prefetch(page_address(buf->page) +
@@ -5866,6 +5948,28 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
xdp_init_buff(&ctx.xdp, bufsz, &rx_q->xdp_rxq);
xdp_prepare_buff(&ctx.xdp, page_address(buf->page),
buf->page_offset, buf1_len, true);
+ first_desc = false;
+ buf->page = NULL;
+ } else if (buf1_len) {
+ stmmac_build_xdp_frags(priv, rx_q, buf1_len, buf->page,
+ buf->page_offset, dma_dir,
+ &ctx.xdp);
+ buf->page = NULL;
+ }
+
+ if (buf2_len) {
+ stmmac_build_xdp_frags(priv, rx_q, buf2_len,
+ buf->sec_page, buf->page_offset,
+ dma_dir, &ctx.xdp);
+ buf->sec_page = NULL;
+ }
+
+ if (likely(status & rx_not_ls))
+ goto read_again;
+
+ first_desc = true;
+ if (!skb) {
+ unsigned int pre_len, sync_len;
pre_len = ctx.xdp.data_end - ctx.xdp.data_hard_start -
buf->page_offset;
@@ -5887,10 +5991,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
unsigned int xdp_res = -PTR_ERR(skb);
if (xdp_res & STMMAC_XDP_CONSUMED) {
- page_pool_put_page(rx_q->page_pool,
- virt_to_head_page(ctx.xdp.data),
- sync_len, true);
- buf->page = NULL;
+ stmmac_xdp_put_buff(rx_q, &ctx.xdp, sync_len);
rx_dropped++;
/* Clear skb as it was set as
@@ -5906,7 +6007,6 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
} else if (xdp_res & (STMMAC_XDP_TX |
STMMAC_XDP_REDIRECT)) {
xdp_status |= xdp_res;
- buf->page = NULL;
skb = NULL;
count++;
continue;
@@ -5914,51 +6014,13 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
}
}
- if (!skb) {
- unsigned int head_pad_len;
-
- /* XDP program may expand or reduce tail */
- buf1_len = ctx.xdp.data_end - ctx.xdp.data;
-
- skb = napi_build_skb(page_address(buf->page),
- rx_q->napi_skb_frag_size);
- if (!skb) {
- page_pool_recycle_direct(rx_q->page_pool,
- buf->page);
- rx_dropped++;
- count++;
- goto drain_data;
- }
-
- /* XDP program may adjust header */
- head_pad_len = ctx.xdp.data - ctx.xdp.data_hard_start;
- skb_reserve(skb, head_pad_len);
- skb_put(skb, buf1_len);
- skb_mark_for_recycle(skb);
- buf->page = NULL;
- } else if (buf1_len) {
- dma_sync_single_for_cpu(priv->device, buf->addr,
- buf1_len, dma_dir);
- skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
- buf->page, buf->page_offset, buf1_len,
- priv->dma_conf.dma_buf_sz);
- buf->page = NULL;
- }
-
- if (buf2_len) {
- dma_sync_single_for_cpu(priv->device, buf->sec_addr,
- buf2_len, dma_dir);
- skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
- buf->sec_page, 0, buf2_len,
- priv->dma_conf.dma_buf_sz);
- buf->sec_page = NULL;
- }
-
-drain_data:
- if (likely(status & rx_not_ls))
+ skb = stmmac_build_skb(&ctx.xdp);
+ if (IS_ERR(skb)) {
+ stmmac_xdp_put_buff(rx_q, &ctx.xdp, -1);
+ rx_dropped++;
+ count++;
goto read_again;
- if (!skb)
- continue;
+ }
/* Got entire packet into SKB. Finish it. */
@@ -5991,9 +6053,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
count++;
}
- if (status & rx_not_ls || skb) {
- rx_q->state_saved = true;
- rx_q->state.skb = skb;
+ rx_q->state_saved = !first_desc;
+ if (!first_desc) {
+ rx_q->state.xdp = ctx.xdp;
rx_q->state.error = error;
rx_q->state.len = len;
}
|
| 3/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 6738 output: 39 thoughts: 259 Thoughts: **Evaluating the Fuzzing Potential of This Patch Series** Okay, so I need to decide if this patch series is a good candidate for syzkaller fuzzing. The core principle here is reachability; can the modified code actually *execute* in a standard virtualized environment like GCE or QEMU, using software-emulated devices? If it relies on hardware that's not emulated, then it's a no-go. No point in pouring resources into something that's structurally unreachable. Alright, the instructions say to check for drivers. Let's see... the path provided is `drivers/net/ethernet/stmicro/stmmac/`. Right, stmmac. That's Synopsys DesignWare Ethernet MAC, or STMicroelectronics. The key question is whether QEMU *emulates* the stmmac hardware, or if it's dependent on physical hardware or a very specific SoC implementation. Hold on, before I jump to conclusions, let me double-check QEMU emulation and look for PCI devices associated with stmmac. Or is it a platform device? I need to investigate thoroughly, so I'll probably need to use codesearch/grep to delve deeper and see how this driver is integrated. Gotta be certain before I make a decision. |
| 4/2 | 2026/09/20 21:06 | tool | grepper |
0mArgs:{
"Expression": "CONFIG_STMMAC",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/Makefile-1-# SPDX-License-Identifier: GPL-2.0\ndrivers/net/ethernet/stmicro/stmmac/Makefile:2:obj-$(CONFIG_STMMAC_ETH) += stmmac.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-3-stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o\t\\\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile-11-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:12:stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-13-\ndrivers/net/ethernet/stmicro/stmmac/Makefile-14-# Ordering matters. Generic driver must be last.\ndrivers/net/ethernet/stmicro/stmmac/Makefile:15:obj-$(CONFIG_STMMAC_PLATFORM)\t+= stmmac-platform.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-16-obj-$(CONFIG_DWMAC_ANARION)\t+= dwmac-anarion.o\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=48=dwmac-altr-socfpga-objs := dwmac-socfpga.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-49-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:50:obj-$(CONFIG_STMMAC_LIBPCI)\t+= stmmac_libpci.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:51:obj-$(CONFIG_STMMAC_PCI)\t+= stmmac-pci.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-52-obj-$(CONFIG_DWMAC_INTEL)\t+= dwmac-intel.o\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h=439=struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-442-\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h:443:#if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-444-void stmmac_selftest_run(struct net_device *dev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h=459=static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-462-}\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h:463:#endif /* CONFIG_STMMAC_SELFTESTS */\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-464-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c=381=int stmmac_mdio_reset(struct mii_bus *bus)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c-382-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c:383:#if IS_ENABLED(CONFIG_STMMAC_PLATFORM)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c-384-\tstruct stmmac_priv *priv = netdev_priv(bus-\u003epriv);\n"
} |
| 5/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 8294 output: 42 thoughts: 17 Thoughts: Okay, let's dive into this. Here's my take on those initial thoughts: **Analyzing the STMMAC's Kconfig Options and Hardware Context** Alright, so the first step in understanding this STMMAC situation is to get a handle on the landscape. I'm thinking, "Okay, where are we with this? What's the context?" Specifically, I need to pinpoint the relevant Kconfig options. I need to see what knobs are available, what configurations are possible. What can be turned on or off? What are the dependencies? I know that's the key to truly understanding how this thing is put together, and how it behaves. Next, I have to figure out the hardware context for the STMMAC. I have to see what hardware this is designed for. Does this refer to a specific hardware family or vendor? What are the key features and constraints of the hardware? Knowing this helps me interpret the Kconfig options, figure out which ones are important, and what the overall design intent is. Getting a good understanding of the hardware side will give me that essential layer of clarity that I need before I move forward. Basically, I want to identify the core components, their limitations, their capabilities, and then how they relate to the STMMAC configurations. This is critical for getting a grasp on its function. |
| 6/2 | 2026/09/20 21:06 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 1,
"LineCount": 80
}Results: {
"Contents": " 1:\t# SPDX-License-Identifier: GPL-2.0-only\n 2:\tconfig STMMAC_ETH\n 3:\t\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n 4:\t\tdepends on HAS_IOMEM \u0026\u0026 HAS_DMA\n 5:\t\tdepends on PTP_1588_CLOCK_OPTIONAL\n 6:\t\tdepends on ETHTOOL_NETLINK\n 7:\t\tselect MII\n 8:\t\tselect PCS_XPCS\n 9:\t\tselect PAGE_POOL\n 10:\t\tselect PHYLINK\n 11:\t\tselect CRC32\n 12:\t\tselect RESET_CONTROLLER\n 13:\t\tselect NET_DEVLINK\n 14:\t\thelp\n 15:\t\t This is the driver for the Ethernet IPs built around a\n 16:\t\t Synopsys IP Core.\n 17:\t\n 18:\tif STMMAC_ETH\n 19:\t\n 20:\tconfig STMMAC_SELFTESTS\n 21:\t\tbool \"Support for STMMAC Selftests\"\n 22:\t\tdepends on INET\n 23:\t\tdefault n\n 24:\t\thelp\n 25:\t\t This adds support for STMMAC Selftests using ethtool. Enable this\n 26:\t\t feature if you are facing problems with your HW and submit the test\n 27:\t\t results to the netdev Mailing List.\n 28:\t\n 29:\tconfig STMMAC_PLATFORM\n 30:\t\ttristate \"STMMAC Platform bus support\"\n 31:\t\tselect MFD_SYSCON\n 32:\t\tdefault y\n 33:\t\thelp\n 34:\t\t This selects the platform specific bus support for the stmmac driver.\n 35:\t\t This is the driver used on several SoCs:\n 36:\t\t STi, Allwinner, Amlogic Meson, Altera SOCFPGA.\n 37:\t\n 38:\t\t If you have a controller with this interface, say Y or M here.\n 39:\t\n 40:\t\t If unsure, say N.\n 41:\t\n 42:\tif STMMAC_PLATFORM\n 43:\t\n 44:\tconfig DWMAC_DWC_QOS_ETH\n 45:\t\ttristate \"Support for snps,dwc-qos-ethernet.txt DT binding.\"\n 46:\t\tselect CRC32\n 47:\t\tselect MII\n 48:\t\tdepends on OF \u0026\u0026 HAS_DMA\n 49:\t\thelp\n 50:\t\t Support for chips using the snps,dwc-qos-ethernet.txt DT binding.\n 51:\t\n 52:\tconfig DWMAC_GENERIC\n 53:\t\ttristate \"Generic driver for DWMAC\"\n 54:\t\tdefault STMMAC_PLATFORM\n 55:\t\thelp\n 56:\t\t Generic DWMAC driver for platforms that don't require any\n 57:\t\t platform specific code to function or is using platform\n 58:\t\t data for setup.\n 59:\t\n 60:\tconfig DWMAC_ANARION\n 61:\t\ttristate \"Adaptrum Anarion GMAC support\"\n 62:\t\tdefault ARC\n 63:\t\tdepends on OF \u0026\u0026 (ARC || COMPILE_TEST)\n 64:\t\thelp\n 65:\t\t Support for Adaptrum Anarion GMAC Ethernet controller.\n 66:\t\n 67:\t\t This selects the Anarion SoC glue layer support for the stmmac driver.\n 68:\t\n 69:\tconfig DWMAC_EIC7700\n 70:\t\ttristate \"Support for Eswin eic7700 ethernet driver\"\n 71:\t\tdepends on OF \u0026\u0026 HAS_DMA \u0026\u0026 ARCH_ESWIN || COMPILE_TEST\n 72:\t\thelp\n 73:\t\t This driver supports the Eswin EIC7700 Ethernet controller,\n 74:\t\t which integrates Synopsys DesignWare QoS features. It enables\n 75:\t\t high-speed networking with DMA acceleration and is optimized\n 76:\t\t for embedded systems.\n 77:\t\n 78:\tconfig DWMAC_INGENIC\n 79:\t\ttristate \"Ingenic MAC support\"\n 80:\t\tdefault MACH_INGENIC\n"
} |
| 7/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 9716 output: 43 thoughts: 25 Thoughts: Here's my attempt at summarizing the thought process, tailored for an expert audience: **Diving into Kconfig for PCI Insights** Alright, let's drill down into the Kconfig files. My initial focus is on uncovering any traces of PCI support or emulation specifically within the QEMU context. I'm thinking, "Is there a config option, maybe tucked away somewhere, that enables a simulated PCI bus or related devices?" I need to understand how the system's configured at a fundamental level. I'm looking for clues that might reveal how PCI devices, or their equivalent within a virtualized environment, are represented and integrated. This should give a good clue about the system's architecture. |
| 8/2 | 2026/09/20 21:06 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 81,
"LineCount": 80
}Results: {
"Contents": " 81:\t\tdepends on OF \u0026\u0026 HAS_IOMEM \u0026\u0026 (MACH_INGENIC || COMPILE_TEST)\n 82:\t\tselect MFD_SYSCON\n 83:\t\thelp\n 84:\t\t Support for ethernet controller on Ingenic SoCs.\n 85:\t\n 86:\t\t This selects Ingenic SoCs glue layer support for the stmmac\n 87:\t\t device driver. This driver is used on for the Ingenic SoCs\n 88:\t\t MAC ethernet controller.\n 89:\t\n 90:\tconfig DWMAC_IPQ806X\n 91:\t\ttristate \"QCA IPQ806x DWMAC support\"\n 92:\t\tdefault ARCH_QCOM\n 93:\t\tdepends on OF \u0026\u0026 (ARCH_QCOM || COMPILE_TEST)\n 94:\t\tselect MFD_SYSCON\n 95:\t\thelp\n 96:\t\t Support for QCA IPQ806X DWMAC Ethernet.\n 97:\t\n 98:\t\t This selects the IPQ806x SoC glue layer support for the stmmac\n 99:\t\t device driver. This driver does not use any of the hardware\n 100:\t\t acceleration features available on this SoC. Network devices\n 101:\t\t will behave like standard non-accelerated ethernet interfaces.\n 102:\t\n 103:\t\t Select the QCOM_SOCINFO config flag to enable specific dwmac\n 104:\t\t fixup based on the ipq806x SoC revision.\n 105:\t\n 106:\tconfig DWMAC_LPC18XX\n 107:\t\ttristate \"NXP LPC18xx/43xx DWMAC support\"\n 108:\t\tdefault ARCH_LPC18XX\n 109:\t\tdepends on OF \u0026\u0026 (ARCH_LPC18XX || COMPILE_TEST)\n 110:\t\tselect MFD_SYSCON\n 111:\t\thelp\n 112:\t\t Support for NXP LPC18xx/43xx DWMAC Ethernet.\n 113:\t\n 114:\tconfig DWMAC_MEDIATEK\n 115:\t\ttristate \"MediaTek MT27xx GMAC support\"\n 116:\t\tdepends on OF \u0026\u0026 (ARCH_MEDIATEK || COMPILE_TEST)\n 117:\t\thelp\n 118:\t\t Support for MediaTek GMAC Ethernet controller.\n 119:\t\n 120:\t\t This selects the MT2712 SoC support for the stmmac driver.\n 121:\t\n 122:\tconfig DWMAC_MESON\n 123:\t\ttristate \"Amlogic Meson dwmac support\"\n 124:\t\tdefault ARCH_MESON\n 125:\t\tdepends on OF \u0026\u0026 COMMON_CLK \u0026\u0026 (ARCH_MESON || COMPILE_TEST)\n 126:\t\thelp\n 127:\t\t Support for Ethernet controller on Amlogic Meson SoCs.\n 128:\t\n 129:\t\t This selects the Amlogic Meson SoC glue layer support for\n 130:\t\t the stmmac device driver. This driver is used for Meson6,\n 131:\t\t Meson8, Meson8b and GXBB SoCs.\n 132:\t\n 133:\tconfig DWMAC_NUVOTON\n 134:\t\ttristate \"Nuvoton MA35 dwmac support\"\n 135:\t\tdefault ARCH_MA35\n 136:\t\tdepends on OF \u0026\u0026 (ARCH_MA35 || COMPILE_TEST)\n 137:\t\tselect MFD_SYSCON\n 138:\t\thelp\n 139:\t\t Support for Ethernet controller on Nuvoton MA35 series SoC.\n 140:\t\n 141:\t\t This selects the Nuvoton MA35 series SoC glue layer support\n 142:\t\t for the stmmac device driver. The nuvoton-dwmac driver is\n 143:\t\t used for MA35 series SoCs.\n 144:\t\n 145:\tconfig DWMAC_QCOM_ETHQOS\n 146:\t\ttristate \"Qualcomm ETHQOS support\"\n 147:\t\tdefault ARCH_QCOM\n 148:\t\tdepends on OF \u0026\u0026 (ARCH_QCOM || COMPILE_TEST)\n 149:\t\thelp\n 150:\t\t Support for the Qualcomm ETHQOS core.\n 151:\t\n 152:\t\t This selects the Qualcomm ETHQOS glue layer support for the\n 153:\t\t stmmac device driver.\n 154:\t\n 155:\tconfig DWMAC_RENESAS_GBETH\n 156:\t\ttristate \"Renesas RZ/V2H(P) GBETH and RZ/T2H, RZ/N2H GMAC support\"\n 157:\t\tdefault ARCH_RENESAS\n 158:\t\tdepends on OF \u0026\u0026 (ARCH_RENESAS || COMPILE_TEST)\n 159:\t\tselect PCS_RZN1_MIIC\n 160:\t\thelp\n"
} |
| 9/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 11231 output: 44 thoughts: 8 Thoughts: Okay, here's my attempt at summarizing the thought process, tailored for an expert audience, and written in the first person: **Diving Back into the Kconfig Depths** Right, back to Kconfig. I'm feeling this deep dive again. Let's see what interesting tidbits and subtleties we can glean this time. Hopefully, I'll uncover a few more pieces of the puzzle. I'm always looking for that next level of understanding, that elegant solution or unexpected constraint. It's a complex system, but the beauty is in how it's all defined. Time to see what's what. |
| 10/2 | 2026/09/20 21:06 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 270,
"LineCount": 80
}Results: {
"Contents": " 270:\t\thelp\n 271:\t\t Support for ethernet controller on STM32 SOCs.\n 272:\t\n 273:\t\t This selects STM32 SoC glue layer support for the stmmac\n 274:\t\t device driver. This driver is used on for the STM32 series\n 275:\t\t SOCs GMAC ethernet controller.\n 276:\t\n 277:\tconfig DWMAC_SUNXI\n 278:\t\ttristate \"Allwinner GMAC support\"\n 279:\t\tdefault ARCH_SUNXI\n 280:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI || COMPILE_TEST)\n 281:\t\thelp\n 282:\t\t Support for Allwinner A20/A31 GMAC ethernet controllers.\n 283:\t\n 284:\t\t This selects Allwinner SoC glue layer support for the\n 285:\t\t stmmac device driver. This driver is used for A20/A31\n 286:\t\t GMAC ethernet controller.\n 287:\t\n 288:\tconfig DWMAC_SUN8I\n 289:\t\ttristate \"Allwinner sun8i GMAC support\"\n 290:\t\tdefault ARCH_SUNXI\n 291:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI || COMPILE_TEST)\n 292:\t\tselect MDIO_BUS_MUX\n 293:\t\thelp\n 294:\t\t Support for Allwinner H3 A83T A64 EMAC ethernet controllers.\n 295:\t\n 296:\t\t This selects Allwinner SoC glue layer support for the\n 297:\t\t stmmac device driver. This driver is used for H3/A83T/A64\n 298:\t\t EMAC ethernet controller.\n 299:\t\n 300:\tconfig DWMAC_SUN55I\n 301:\t\ttristate \"Allwinner sun55i GMAC200 support\"\n 302:\t\tdefault ARCH_SUNXI\n 303:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI || COMPILE_TEST)\n 304:\t\tselect MDIO_BUS_MUX\n 305:\t\thelp\n 306:\t\t Support for Allwinner A523/T527 GMAC200 ethernet controllers.\n 307:\t\n 308:\t\t This selects Allwinner SoC glue layer support for the\n 309:\t\t stmmac device driver. This driver is used for A523/T527\n 310:\t\t GMAC200 ethernet controller.\n 311:\t\n 312:\tconfig DWMAC_THEAD\n 313:\t\ttristate \"T-HEAD dwmac support\"\n 314:\t\tdepends on OF \u0026\u0026 (ARCH_THEAD || COMPILE_TEST)\n 315:\t\thelp\n 316:\t\t Support for ethernet controllers on T-HEAD RISC-V SoCs\n 317:\t\n 318:\t\t This selects the T-HEAD platform specific glue layer support for\n 319:\t\t the stmmac device driver. This driver is used for T-HEAD TH1520\n 320:\t\t ethernet controller.\n 321:\t\n 322:\tconfig DWMAC_ULTRARISC\n 323:\t\ttristate \"UltraRISC DWMAC support\"\n 324:\t\tdefault ARCH_ULTRARISC\n 325:\t\tdepends on OF \u0026\u0026 (ARCH_ULTRARISC || COMPILE_TEST)\n 326:\t\thelp\n 327:\t\t Support for the Ethernet controller on the UltraRISC DP1000 SoC.\n 328:\t\n 329:\t\t This selects the UltraRISC platform specific glue layer support\n 330:\t\t for the stmmac device driver. This driver is used for the DP1000\n 331:\t\t GMAC Ethernet controller.\n 332:\t\n 333:\tconfig DWMAC_IMX8\n 334:\t\ttristate \"NXP IMX8 DWMAC support\"\n 335:\t\tdefault ARCH_MXC\n 336:\t\tdepends on OF \u0026\u0026 (ARCH_MXC || COMPILE_TEST)\n 337:\t\tselect MFD_SYSCON\n 338:\t\thelp\n 339:\t\t Support for ethernet controller on NXP i.MX8 SOCs.\n 340:\t\n 341:\t\t This selects NXP SoC glue layer support for the stmmac\n 342:\t\t device driver. This driver is used for i.MX8 series like\n 343:\t\t iMX8MP/iMX8DXL GMAC ethernet controller.\n 344:\t\n 345:\tconfig DWMAC_INTEL_PLAT\n 346:\t\ttristate \"Intel dwmac support\"\n 347:\t\tdepends on OF \u0026\u0026 COMMON_CLK\n 348:\t\thelp\n 349:\t\t Support for ethernet controllers on Intel SoCs\n"
} |
| 11/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 12690 output: 44 thoughts: 16 Thoughts: Here's my attempt at summarizing the thought process, tailored for an expert audience: **Diving into the Kconfig Depths** Okay, let's get down to brass tacks. I'm going to start by taking a look at Kconfig, focusing specifically on the lines from 350 onwards. I need to understand the current configuration context, the dependencies, and the logic being applied. Let's see what's being defined, what's being enabled or disabled, and how it all hangs together. I’m expecting a mix of basic definitions, conditionals, maybe some complex relationships between features. Time to get my hands dirty. |
| 12/2 | 2026/09/20 21:06 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 350,
"LineCount": 70
}Results: {
"Contents": " 350:\t\n 351:\t\t This selects the Intel platform specific glue layer support for\n 352:\t\t the stmmac device driver. This driver is used for the Intel Keem Bay\n 353:\t\t SoC.\n 354:\t\n 355:\tconfig DWMAC_LOONGSON1\n 356:\t\ttristate \"Loongson1 GMAC support\"\n 357:\t\tdefault MACH_LOONGSON32\n 358:\t\tdepends on OF \u0026\u0026 (MACH_LOONGSON32 || COMPILE_TEST)\n 359:\t\thelp\n 360:\t\t Support for ethernet controller on Loongson1 SoC.\n 361:\t\n 362:\t\t This selects Loongson1 SoC glue layer support for the stmmac\n 363:\t\t device driver. This driver is used for Loongson1-based boards\n 364:\t\t like Loongson LS1B/LS1C.\n 365:\t\n 366:\tconfig DWMAC_TEGRA\n 367:\t\ttristate \"NVIDIA Tegra MGBE support\"\n 368:\t\tdepends on ARCH_TEGRA || COMPILE_TEST\n 369:\t\thelp\n 370:\t\t This selects the Multi-GigaBit Ethernet (MGBE) Controller that is\n 371:\t\t found on the NVIDIA Tegra SoC devices. This driver provides the glue\n 372:\t\t layer on top of the stmmac driver required for these NVIDIA Tegra SoC\n 373:\t\t devices.\n 374:\t\n 375:\tconfig DWMAC_VISCONTI\n 376:\t\ttristate \"Toshiba Visconti DWMAC support\"\n 377:\t\tdefault ARCH_VISCONTI\n 378:\t\tdepends on OF \u0026\u0026 COMMON_CLK \u0026\u0026 (ARCH_VISCONTI || COMPILE_TEST)\n 379:\t\thelp\n 380:\t\t Support for ethernet controller on Visconti SoCs.\n 381:\t\n 382:\tendif # STMMAC_PLATFORM\n 383:\t\n 384:\tconfig STMMAC_LIBPCI\n 385:\t\ttristate\n 386:\t\thelp\n 387:\t\t This option enables the PCI bus helpers for the stmmac driver.\n 388:\t\n 389:\tconfig DWMAC_INTEL\n 390:\t\ttristate \"Intel GMAC support\"\n 391:\t\tdefault X86\n 392:\t\tdepends on X86 \u0026\u0026 PCI\n 393:\t\tdepends on COMMON_CLK\n 394:\t\tdepends on ACPI\n 395:\t\thelp\n 396:\t\t This selects the Intel platform specific bus support for the\n 397:\t\t stmmac driver. This driver is used for Intel Quark/EHL/TGL.\n 398:\t\n 399:\tconfig DWMAC_LOONGSON\n 400:\t\ttristate \"Loongson PCI DWMAC support\"\n 401:\t\tdefault MACH_LOONGSON64\n 402:\t\tdepends on (MACH_LOONGSON64 || COMPILE_TEST) \u0026\u0026 PCI\n 403:\t\tdepends on COMMON_CLK\n 404:\t\tselect STMMAC_LIBPCI\n 405:\t\thelp\n 406:\t\t This selects the LOONGSON PCI bus support for the stmmac driver,\n 407:\t\t Support for ethernet controller on Loongson-2K1000 SoC and LS7A1000 bridge.\n 408:\t\n 409:\tconfig DWMAC_MOTORCOMM\n 410:\t\ttristate \"Motorcomm PCI DWMAC support\"\n 411:\t\tdepends on PCI\n 412:\t\tselect MOTORCOMM_PHY\n 413:\t\tselect STMMAC_LIBPCI\n 414:\t\thelp\n 415:\t\t This enables glue driver for Motorcomm DWMAC-based PCI Ethernet\n 416:\t\t controllers. Currently only YT6801 is supported.\n 417:\t\n 418:\tconfig STMMAC_PCI\n 419:\t\ttristate \"STMMAC PCI bus support\"\n"
} |
| 13/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 13956 output: 44 thoughts: 16 Thoughts: Okay, here's my take on those thoughts, tailored for an expert audience: **Examining STMMAC_PCI in Kconfig** Alright, let's dive back into the Kconfig. I want to see how the `STMMAC_PCI` option is defined, how it's integrated, and what dependencies it has. Specifically, I'm interested in the configuration knobs and associated options to ensure optimal performance and configuration flexibility. I'm thinking about the hardware dependencies immediately – which PCI bus or device options are relevant. There will be interactions with the driver, the device tree, and potentially other networking subsystems, so let’s check the Kconfig configuration options and defaults. Understanding the broader context of the STMMAC family is important. I need to make sure I grasp the relationship between the `STMMAC_ETH` and `STMMAC_PCI` definitions, as well. |
| 14/2 | 2026/09/20 21:06 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/Kconfig",
"FirstLine": 418,
"LineCount": 40
}Results: {
"Contents": " 418:\tconfig STMMAC_PCI\n 419:\t\ttristate \"STMMAC PCI bus support\"\n 420:\t\tdepends on PCI\n 421:\t\tdepends on COMMON_CLK\n 422:\t\tselect STMMAC_LIBPCI\n 423:\t\thelp\n 424:\t\t This selects the platform specific bus support for the stmmac driver.\n 425:\t\t This driver was tested on XLINX XC2V3000 FF1152AMT0221\n 426:\t\t D1215994A VIRTEX FPGA board and SNPS QoS IPK Prototyping Kit.\n 427:\t\n 428:\t\t If you have a controller with this interface, say Y or M here.\n 429:\t\n 430:\t\t If unsure, say N.\n 431:\tendif # STMMAC_ETH\n"
} |
| 15/2 | 2026/09/20 21:06 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 14446 output: 26 thoughts: 483 Thoughts: **My Current Investigation into STMMAC Emulation** Okay, so I'm trying to figure out if I can effectively test and fuzz the STMMAC driver within a virtualized environment. Let's see... first, I need to know where STMMAC is *actually* implemented. Is it emulated in QEMU, or Google Compute Engine, or some other virtualization layer? My initial thought is it's tied to Synopsys DesignWare Ethernet MAC (DWMAC) and STMMAC. Alright, so the next logical step is to check if QEMU itself has an emulation for stmmac or dwmac, or something equivalent. But wait, QEMU has emulations for a variety of network interfaces. Which architecture am I targeting for this testing? Ah, AMD64. Does standard QEMU on x86_64, AMD64 specifically, support emulating or attaching an STMMAC device? I should really confirm what NICs are even supported or emulated in QEMU's x86_64 environment. Let's see... e1000, e1000e, igb, rtl8139, pcnet, virtio-net-pci, and so on... but is stmmac *specifically* in that list? Hmm, no obvious STMMAC emulation. Does QEMU even *have* a stmmac or dwmac PCI device? It looks like QEMU might have Allwinner a10 emac, or maybe something in ARM machines such as imx, but not anything explicitly dwmac/stmmac. Can x86_64 QEMU *even* run stmmac? Let me circle back... okay, I remember a section about structurally unreachable hardware in a previous analysis. It looks like things like vendor-specific PCIe switches, SmartNICs, or GPU drivers that require physical cards not emulated in standard QEMU are problematic. That would include things like mlxsw, pds_core, qed, and ionic. So, could STMMAC be tested or fuzzed in *any* sort of virtual environment within Linux? I should check if there are virtual STMMAC devices, or if netdevsim or something else can interact with STMMAC. I think my next step is a deep dive into the kernel source. A quick `grep` for "stmmac" through the kernel tree should reveal if anything is using it beyond direct physical hardware, SoCs, or specific PCI cards. |
| 16/2 | 2026/09/20 21:07 | tool | grepper |
0mArgs:{
"Expression": "stmmac_",
"PathPrefix": "drivers/"
}Results: {
"Output": "\nFull output is too long, showing 500 out of 10901 lines.\nUse more precise expression if possible.\n\ndrivers/net/ethernet/stmicro/stmmac/Makefile=2=obj-$(CONFIG_STMMAC_ETH) += stmmac.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:3:stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-4-\t chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-5-\t dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:6:\t mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-7-\t dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:8:\t stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:9:\t stmmac_xdp.o stmmac_est.o stmmac_fpe.o stmmac_vlan.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:10:\t stmmac_pcs.o $(stmmac-y)\ndrivers/net/ethernet/stmicro/stmmac/Makefile-11-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:12:stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-13-\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=46=obj-$(CONFIG_DWMAC_VISCONTI)\t+= dwmac-visconti.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:47:stmmac-platform-objs:= stmmac_platform.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-48-dwmac-altr-socfpga-objs := dwmac-socfpga.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-49-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:50:obj-$(CONFIG_STMMAC_LIBPCI)\t+= stmmac_libpci.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-51-obj-$(CONFIG_STMMAC_PCI)\t+= stmmac-pci.o\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=54=obj-$(CONFIG_DWMAC_MOTORCOMM)\t+= dwmac-motorcomm.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:55:stmmac-pci-objs:= stmmac_pci.o\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-16-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:17:static int jumbo_frm(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-18-\t\t int csum)\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-20-\tunsigned int nopaged_len = skb_headlen(skb);\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:21:\tstruct stmmac_priv *priv = tx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-22-\tunsigned int entry = tx_q-\u003ecur_tx;\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-45-\t/* do not close the descriptor and do not set own bit */\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:46:\tstmmac_prepare_tx_desc(priv, desc, 1, buf_len, csum, STMMAC_CHAIN_MODE,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-47-\t\t\t0, false, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-62-\t\t\ttx_q-\u003etx_skbuff_dma[entry].len = bmax;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:63:\t\t\tstmmac_prepare_tx_desc(priv, desc, 0, bmax, csum,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-64-\t\t\t\t\tSTMMAC_CHAIN_MODE, 1, false, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-76-\t\t\t/* last descriptor can be set now */\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:77:\t\t\tstmmac_prepare_tx_desc(priv, desc, 0, len, csum,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-78-\t\t\t\t\tSTMMAC_CHAIN_MODE, 1, true, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c=99=static void init_dma_chain(void *des, dma_addr_t phy_addr,\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-128-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:129:static void refill_desc3(struct stmmac_rx_queue *rx_q, struct dma_desc *p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-130-{\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:131:\tstruct stmmac_priv *priv = rx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-132-\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-143-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:144:static void clean_desc3(struct stmmac_tx_queue *tx_q, struct dma_desc *p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-145-{\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:146:\tstruct stmmac_priv *priv = tx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-147-\tunsigned int entry = tx_q-\u003edirty_tx;\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-160-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:161:const struct stmmac_mode_ops chain_mode_ops = {\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-162-\t.init = init_dma_chain,\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=49=static inline bool dwmac_is_xmac(enum dwmac_core_type core_type)\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-70-\ndrivers/net/ethernet/stmicro/stmmac/common.h:71:struct stmmac_q_tx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-72-\tu64_stats_t tx_bytes;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-77-\ndrivers/net/ethernet/stmicro/stmmac/common.h:78:struct stmmac_napi_tx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-79-\tu64_stats_t tx_packets;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-85-\ndrivers/net/ethernet/stmicro/stmmac/common.h:86:struct stmmac_txq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-87-\t/* Updates protected by tx queue lock. */\ndrivers/net/ethernet/stmicro/stmmac/common.h-88-\tstruct u64_stats_sync q_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:89:\tstruct stmmac_q_tx_stats q;\ndrivers/net/ethernet/stmicro/stmmac/common.h-90-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-92-\tstruct u64_stats_sync napi_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:93:\tstruct stmmac_napi_tx_stats napi;\ndrivers/net/ethernet/stmicro/stmmac/common.h-94-} ____cacheline_aligned_in_smp;\ndrivers/net/ethernet/stmicro/stmmac/common.h-95-\ndrivers/net/ethernet/stmicro/stmmac/common.h:96:struct stmmac_napi_rx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-97-\tu64_stats_t rx_bytes;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-102-\ndrivers/net/ethernet/stmicro/stmmac/common.h:103:struct stmmac_rxq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-104-\t/* Updates protected by NAPI poll logic. */\ndrivers/net/ethernet/stmicro/stmmac/common.h-105-\tstruct u64_stats_sync napi_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:106:\tstruct stmmac_napi_rx_stats napi;\ndrivers/net/ethernet/stmicro/stmmac/common.h-107-} ____cacheline_aligned_in_smp;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-109-/* Updates on each CPU protected by not allowing nested irqs. */\ndrivers/net/ethernet/stmicro/stmmac/common.h:110:struct stmmac_pcpu_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-111-\tstruct u64_stats_sync syncp;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-116-/* Extra statistic and debug information exposed by ethtool */\ndrivers/net/ethernet/stmicro/stmmac/common.h:117:struct stmmac_extra_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-118-\t/* Transmit errors */\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-237-\t/* per queue statistics */\ndrivers/net/ethernet/stmicro/stmmac/common.h:238:\tstruct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:239:\tstruct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:240:\tstruct stmmac_pcpu_stats __percpu *pcpu_stats;\ndrivers/net/ethernet/stmicro/stmmac/common.h-241-\tunsigned long rx_dropped;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-247-/* Safety Feature statistics exposed by ethtool */\ndrivers/net/ethernet/stmicro/stmmac/common.h:248:struct stmmac_safety_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-249-\tunsigned long mac_errors[32];\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-256-#define STMMAC_SAFETY_FEAT_SIZE\t\\\ndrivers/net/ethernet/stmicro/stmmac/common.h:257:\t(sizeof(struct stmmac_safety_stats) / sizeof(unsigned long))\ndrivers/net/ethernet/stmicro/stmmac/common.h-258-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=416=struct dma_features {\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-566-\ndrivers/net/ethernet/stmicro/stmmac/common.h:567:void stmmac_axi_blen_to_mask(u32 *regval, const u32 *blen, size_t len);\ndrivers/net/ethernet/stmicro/stmmac/common.h-568-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=615=struct mac_device_info {\ndrivers/net/ethernet/stmicro/stmmac/common.h:616:\tconst struct stmmac_ops *mac;\ndrivers/net/ethernet/stmicro/stmmac/common.h:617:\tconst struct stmmac_desc_ops *desc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:618:\tconst struct stmmac_dma_ops *dma;\ndrivers/net/ethernet/stmicro/stmmac/common.h:619:\tconst struct stmmac_mode_ops *mode;\ndrivers/net/ethernet/stmicro/stmmac/common.h:620:\tconst struct stmmac_hwtimestamp *ptp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:621:\tconst struct stmmac_tc_ops *tc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:622:\tconst struct stmmac_mmc_ops *mmc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:623:\tconst struct stmmac_est_ops *est;\ndrivers/net/ethernet/stmicro/stmmac/common.h:624:\tconst struct stmmac_vlan_ops *vlan;\ndrivers/net/ethernet/stmicro/stmmac/common.h-625-\tstruct dw_xpcs *xpcs;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-649-\ndrivers/net/ethernet/stmicro/stmmac/common.h:650:struct stmmac_rx_routing {\ndrivers/net/ethernet/stmicro/stmmac/common.h-651-\tu32 reg_mask;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-654-\ndrivers/net/ethernet/stmicro/stmmac/common.h:655:int dwmac100_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:656:int dwmac1000_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:657:int dwmac4_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:658:int dwxgmac2_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:659:int dwxlgmac2_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h-660-\ndrivers/net/ethernet/stmicro/stmmac/common.h:661:void stmmac_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],\ndrivers/net/ethernet/stmicro/stmmac/common.h-662-\t\t\t unsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:663:void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,\ndrivers/net/ethernet/stmicro/stmmac/common.h-664-\t\t\t unsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:665:void stmmac_set_mac(void __iomem *ioaddr, bool enable);\ndrivers/net/ethernet/stmicro/stmmac/common.h-666-\ndrivers/net/ethernet/stmicro/stmmac/common.h:667:void stmmac_dwmac4_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],\ndrivers/net/ethernet/stmicro/stmmac/common.h-668-\t\t\t\tunsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:669:void stmmac_dwmac4_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,\ndrivers/net/ethernet/stmicro/stmmac/common.h-670-\t\t\t\tunsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:671:void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool enable);\ndrivers/net/ethernet/stmicro/stmmac/common.h-672-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-14-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:15:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-16-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=93=static int anarion_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-97-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:98:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-99-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:100:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-101-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-103-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:104:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-105-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-115-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:116:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-117-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=125=static struct platform_driver anarion_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-128-\t\t.name = \"anarion-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:129:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-130-\t\t.of_match_table = anarion_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-23-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:24:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-25-#include \"dwmac4.h\"\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=36=static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-43-\t\tplat_dat-\u003eaxi = devm_kzalloc(\u0026pdev-\u003edev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:44:\t\t\t\t\t sizeof(struct stmmac_axi),\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-45-\t\t\t\t\t GFP_KERNEL);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=96=static int dwc_qos_probe(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-97-\t\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:98:\t\t\t struct stmmac_resources *stmmac_res)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-99-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:100:\tplat_dat-\u003epclk = stmmac_pltfr_find_clk(plat_dat, \"phy_ref_clk\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-101-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=115=static void tegra_eqos_fix_speed(void *bsp_priv, phy_interface_t interface,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-119-\tbool needs_calibration = false;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:120:\tstruct stmmac_priv *priv;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-121-\tu32 value;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-141-\t\t/* Calibration should be done with the MDIO bus idle */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:142:\t\tstmmac_mdio_lock(priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-143-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-177-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:178:\t\tstmmac_mdio_unlock(priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-179-\t} else {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=186=static int tegra_eqos_probe(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-187-\t\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:188:\t\t\t struct stmmac_resources *res)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-189-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-203-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:204:\tplat_dat-\u003eclk_tx_i = stmmac_pltfr_find_clk(plat_dat, \"tx\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-205-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-237-\tplat_dat-\u003efix_mac_speed = tegra_eqos_fix_speed;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:238:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-239-\tplat_dat-\u003ebsp_priv = eqos;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=252=static void tegra_eqos_remove(struct platform_device *pdev)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-253-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:254:\tstruct tegra_eqos *eqos = get_stmmac_bsp_priv(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-255-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=260=struct dwc_eth_dwmac_data {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-262-\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:263:\t\t struct stmmac_resources *res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-264-\tvoid (*remove)(struct platform_device *pdev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:265:\tconst char *stmmac_clk_name;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-266-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=268=static const struct dwc_eth_dwmac_data dwc_qos_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-269-\t.probe = dwc_qos_probe,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:270:\t.stmmac_clk_name = \"apb_pclk\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-271-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=273=static const struct dwc_eth_dwmac_data tegra_eqos_data = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-275-\t.remove = tegra_eqos_remove,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:276:\t.stmmac_clk_name = \"slave_bus\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-277-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=279=static const struct dwc_eth_dwmac_data fsd_eqos_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:280:\t.stmmac_clk_name = \"slave_bus\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-281-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=283=static int dwc_eth_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-286-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:287:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-288-\tint ret;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-291-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:292:\tmemset(\u0026stmmac_res, 0, sizeof(struct stmmac_resources));\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-293-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-294-\t/**\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:295:\t * Since stmmac_platform supports name IRQ only, basic platform\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-296-\t * resource initialization is done in the glue logic.\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-297-\t */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:298:\tstmmac_res.irq = platform_get_irq(pdev, 0);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:299:\tif (stmmac_res.irq \u003c 0)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:300:\t\treturn stmmac_res.irq;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:301:\tstmmac_res.wol_irq = stmmac_res.irq;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-302-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:303:\tstmmac_res.addr = devm_platform_ioremap_resource(pdev, 0);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:304:\tif (IS_ERR(stmmac_res.addr))\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:305:\t\treturn PTR_ERR(stmmac_res.addr);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-306-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:307:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-308-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-315-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:316:\tplat_dat-\u003estmmac_clk = stmmac_pltfr_find_clk(plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:317:\t\t\t\t\t\t data-\u003estmmac_clk_name);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-318-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-319-\tif (data-\u003eprobe)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:320:\t\tret = data-\u003eprobe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-321-\tif (ret \u003c 0) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-329-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:330:\tret = stmmac_dvr_probe(\u0026pdev-\u003edev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-331-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=343=static void dwc_eth_dwmac_remove(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-346-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:347:\tstmmac_dvr_remove(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-348-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=361=static struct platform_driver dwc_eth_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-365-\t\t.name = \"dwc-eth-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:366:\t\t.pm = \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-367-\t\t.of_match_table = dwc_eth_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-19-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:20:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-21-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c=167=static int eic7700_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-170-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:171:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-172-\tstruct eic7700_qos_priv *dwc_priv;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-175-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:176:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-177-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-180-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:181:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-182-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-314-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:315:\tplat_dat-\u003eclk_tx_i = stmmac_pltfr_find_clk(plat_dat, \"tx\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:316:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-317-\tplat_dat-\u003eclks_config = eic7700_clks_config;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-325-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:326:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-327-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c=353=static struct platform_driver eic7700_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-356-\t\t.name = \"eic7700-eth-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:357:\t\t.pm = \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c-358-\t\t.of_match_table = eic7700_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-16-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:17:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-18-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c=19=static int dwmac_generic_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-21-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:22:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-23-\tint ret;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-24-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:25:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-26-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-29-\tif (pdev-\u003edev.of_node) {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:30:\t\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-31-\t\tif (IS_ERR(plat_dat)) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-48-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:49:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-50-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c=69=static struct platform_driver dwmac_generic_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-72-\t\t.name = STMMAC_RESOURCE_NAME,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:73:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-74-\t\t.of_match_table = dwmac_generic_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-22-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:23:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-24-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=44=struct imx_dwmac_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-48-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:49:\tint (*fix_soc_reset)(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-50-\tint (*set_intf_mode)(struct imx_priv_data *dwmac, u8 phy_intf_sel);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=154=static int imx_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-160-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:161:\treturn stmmac_set_clk_tx_rate(bsp_priv, clk_tx_i, interface, speed);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-162-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=190=static void imx93_dwmac_fix_speed(void *priv, phy_interface_t interface,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-228-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:229:static int imx_dwmac_mx93_reset(struct stmmac_priv *priv)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-230-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=293=static int imx_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-295-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:296:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-297-\tstruct imx_priv_data *dwmac;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-300-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:301:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-302-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-308-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:309:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-310-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-338-\tdwmac-\u003eplat_dat = plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:339:\tdwmac-\u003ebase_addr = stmmac_res.addr;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-340-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-353-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:354:\tret = stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-355-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c=392=static struct platform_driver imx_dwmac_driver = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-393-\t.probe = imx_dwmac_probe,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:394:\t.remove = stmmac_pltfr_remove,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-395-\t.driver = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-396-\t\t.name = \"imx-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:397:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-imx.c-398-\t\t.of_match_table = imx_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-20-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:21:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-22-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c=154=static int ingenic_mac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-156-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:157:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-158-\tstruct ingenic_mac *mac;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-162-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:163:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-164-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-166-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:167:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-168-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-214-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:215:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-216-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c=272=static struct platform_driver ingenic_mac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-275-\t\t.name\t= \"ingenic-mac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c:276:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c-277-\t\t.of_match_table = ingenic_mac_of_matches,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-15-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:16:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-17-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c=42=static int intel_eth_plat_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-44-\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:45:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-46-\tstruct intel_dwmac *dwmac;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-49-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:50:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-51-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-53-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:54:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-55-\tif (IS_ERR(plat_dat)) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-114-\tplat_dat-\u003eclk_tx_i = dwmac-\u003etx_clk;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:115:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-116-\tplat_dat-\u003ebsp_priv = dwmac;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-117-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:118:\tret = stmmac_dvr_probe(\u0026pdev-\u003edev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-119-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c=130=static void intel_eth_plat_remove(struct platform_device *pdev)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-131-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:132:\tstruct intel_dwmac *dwmac = get_stmmac_bsp_priv(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-133-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:134:\tstmmac_pltfr_remove(pdev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-135-\tif (dwmac-\u003edata-\u003etx_clk_en)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c=139=static struct platform_driver intel_eth_plat_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-143-\t\t.name\t\t= \"intel-eth-plat\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c:144:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c-145-\t\t.of_match_table = intel_eth_plat_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-12-#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:13:#include \"stmmac_ptp.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-14-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=25=struct intel_priv_data {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-39- */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:40:struct stmmac_pci_func_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-41-\tunsigned int func;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-44-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:45:struct stmmac_pci_dmi_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:46:\tconst struct stmmac_pci_func_data *func;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-47-\tsize_t nfuncs;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-49-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:50:struct stmmac_pci_info {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-51-\tint (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=91=static const int adln_tsn_lane_regs[] = {6};\n\n"
} |
| 17/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 30872 output: 49 thoughts: 73 Thoughts: **Analyzing the Intel STMMAC Driver Files** Okay, so I'm looking at these STMMAC driver files, specifically `drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c`. Right, dwmac-intel suggests this is the driver tailored for the Intel SoC platforms. Specifically, Intel Quark/EHL/TGL... Elkhart Lake, Tiger Lake, and Quark X1000. That's good to know, that narrows down the scope considerably. Now, let's take a look at `stmmac_pci.c` to see if there's any PCI-related configuration or initialization I should be aware of. Context is everything when digging into these drivers, so understanding how they interact with the PCI bus if applicable is important. |
| 18/2 | 2026/09/20 21:07 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c",
"FirstLine": 1,
"LineCount": 100
}Results: {
"Contents": " 1:\t// SPDX-License-Identifier: GPL-2.0-only\n 2:\t/*******************************************************************************\n 3:\t This contains the functions to handle the pci driver.\n 4:\t\n 5:\t Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd\n 6:\t\n 7:\t\n 8:\t Author: Rayagond Kokatanur \u003crayagond@vayavyalabs.com\u003e\n 9:\t Author: Giuseppe Cavallaro \u003cpeppe.cavallaro@st.com\u003e\n 10:\t*******************************************************************************/\n 11:\t\n 12:\t#include \u003clinux/clk-provider.h\u003e\n 13:\t#include \u003clinux/pci.h\u003e\n 14:\t#include \u003clinux/dmi.h\u003e\n 15:\t\n 16:\t#include \"stmmac.h\"\n 17:\t#include \"stmmac_libpci.h\"\n 18:\t\n 19:\tstruct stmmac_pci_info {\n 20:\t\tint (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);\n 21:\t};\n 22:\t\n 23:\tstatic void common_default_data(struct plat_stmmacenet_data *plat)\n 24:\t{\n 25:\t\t/* clk_csr_i = 20-35MHz \u0026 MDC = clk_csr_i/16 */\n 26:\t\tplat-\u003eclk_csr = STMMAC_CSR_20_35M;\n 27:\t\tplat-\u003ecore_type = DWMAC_CORE_GMAC;\n 28:\t\tplat-\u003eforce_sf_dma_mode = true;\n 29:\t\n 30:\t\tplat-\u003emdio_bus_data-\u003eneeds_reset = true;\n 31:\t}\n 32:\t\n 33:\tstatic int stmmac_default_data(struct pci_dev *pdev,\n 34:\t\t\t\t struct plat_stmmacenet_data *plat)\n 35:\t{\n 36:\t\t/* Set common default data first */\n 37:\t\tcommon_default_data(plat);\n 38:\t\n 39:\t\tplat-\u003ebus_id = 1;\n 40:\t\tplat-\u003ephy_addr = 0;\n 41:\t\tplat-\u003ephy_interface = PHY_INTERFACE_MODE_GMII;\n 42:\t\n 43:\t\tplat-\u003edma_cfg-\u003epbl = 32;\n 44:\t\tplat-\u003edma_cfg-\u003epblx8 = true;\n 45:\t\t/* TODO: AXI */\n 46:\t\n 47:\t\treturn 0;\n 48:\t}\n 49:\t\n 50:\tstatic const struct stmmac_pci_info stmmac_pci_info = {\n 51:\t\t.setup = stmmac_default_data,\n 52:\t};\n 53:\t\n 54:\tstatic int snps_gmac5_default_data(struct pci_dev *pdev,\n 55:\t\t\t\t\t struct plat_stmmacenet_data *plat)\n 56:\t{\n 57:\t\tint i;\n 58:\t\n 59:\t\tplat-\u003eclk_csr = STMMAC_CSR_250_300M;\n 60:\t\tplat-\u003ecore_type = DWMAC_CORE_GMAC4;\n 61:\t\tplat-\u003eforce_sf_dma_mode = true;\n 62:\t\tplat-\u003eflags |= STMMAC_FLAG_TSO_EN;\n 63:\t\tplat-\u003epmt = true;\n 64:\t\n 65:\t\t/* Set default number of RX and TX queues to use */\n 66:\t\tplat-\u003etx_queues_to_use = 4;\n 67:\t\tplat-\u003erx_queues_to_use = 4;\n 68:\t\n 69:\t\tplat-\u003etx_sched_algorithm = MTL_TX_ALGORITHM_WRR;\n 70:\t\tfor (i = 0; i \u003c plat-\u003etx_queues_to_use; i++) {\n 71:\t\t\tplat-\u003etx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;\n 72:\t\t\tplat-\u003etx_queues_cfg[i].weight = 25;\n 73:\t\t\tif (i \u003e 0)\n 74:\t\t\t\tplat-\u003etx_queues_cfg[i].tbs_en = 1;\n 75:\t\t}\n 76:\t\n 77:\t\tplat-\u003erx_sched_algorithm = MTL_RX_ALGORITHM_SP;\n 78:\t\tfor (i = 0; i \u003c plat-\u003erx_queues_to_use; i++)\n 79:\t\t\tplat-\u003erx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;\n 80:\t\n 81:\t\tplat-\u003ebus_id = 1;\n 82:\t\tplat-\u003ephy_interface = PHY_INTERFACE_MODE_GMII;\n 83:\t\n 84:\t\tplat-\u003edma_cfg-\u003epbl = 32;\n 85:\t\tplat-\u003edma_cfg-\u003epblx8 = true;\n 86:\t\n 87:\t\t/* Axi Configuration */\n 88:\t\tplat-\u003eaxi = devm_kzalloc(\u0026pdev-\u003edev, sizeof(*plat-\u003eaxi), GFP_KERNEL);\n 89:\t\tif (!plat-\u003eaxi)\n 90:\t\t\treturn -ENOMEM;\n 91:\t\n 92:\t\tplat-\u003eaxi-\u003eaxi_wr_osr_lmt = 31;\n 93:\t\tplat-\u003eaxi-\u003eaxi_rd_osr_lmt = 31;\n 94:\t\n 95:\t\tplat-\u003eaxi-\u003eaxi_fb = false;\n 96:\t\tplat-\u003eaxi-\u003eaxi_blen_regval = DMA_AXI_BLEN4 | DMA_AXI_BLEN8 |\n 97:\t\t\t\t\t DMA_AXI_BLEN16 | DMA_AXI_BLEN32;\n 98:\t\n 99:\t\treturn 0;\n 100:\t}\n"
} |
| 19/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 32739 output: 50 thoughts: 17 Thoughts: Okay, here's my interpretation of "Let's see the rest of `stmmac_pci.c`", from an expert's perspective, rendered in the first person: **Diving Back into `stmmac_pci.c`** Alright, so we're circling back to the `stmmac_pci.c` file. Time to get back into the details of the PCI-specific implementation for this STMicroelectronics MAC driver. I'm keen to see what's next; likely, we'll encounter how it handles PCI device probe, initialization, and resource allocation. I anticipate we'll dissect how the driver maps the PCI configuration space to the registers needed for the STMMAC's operation. I wonder if there are any interesting nuances or optimizations employed in this specific PCI version of the driver, things that might differ from the platform-agnostic core or other platform-specific variants. Perhaps some custom interrupt handling or DMA setup specific to this PCI controller? Or maybe some power management features that are particular to this hardware. Whatever's in there, I'm ready to dig in and understand the intricacies that make this PCI interface work. |
| 20/2 | 2026/09/20 21:07 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c",
"FirstLine": 101,
"LineCount": 80
}Results: {
"Contents": " 101:\t\n 102:\tstatic const struct stmmac_pci_info snps_gmac5_pci_info = {\n 103:\t\t.setup = snps_gmac5_default_data,\n 104:\t};\n 105:\t\n 106:\t/**\n 107:\t * stmmac_pci_probe\n 108:\t *\n 109:\t * @pdev: pci device pointer\n 110:\t * @id: pointer to table of device id/id's.\n 111:\t *\n 112:\t * Description: This probing function gets called for all PCI devices which\n 113:\t * match the ID table and are not \"owned\" by other driver yet. This function\n 114:\t * gets passed a \"struct pci_dev *\" for each device whose entry in the ID table\n 115:\t * matches the device. The probe functions returns zero when the driver choose\n 116:\t * to take \"ownership\" of the device or an error code(-ve no) otherwise.\n 117:\t */\n 118:\tstatic int stmmac_pci_probe(struct pci_dev *pdev,\n 119:\t\t\t\t const struct pci_device_id *id)\n 120:\t{\n 121:\t\tstruct stmmac_pci_info *info = (struct stmmac_pci_info *)id-\u003edriver_data;\n 122:\t\tstruct plat_stmmacenet_data *plat;\n 123:\t\tstruct stmmac_resources res = {};\n 124:\t\tint ret;\n 125:\t\tint i;\n 126:\t\n 127:\t\tplat = stmmac_plat_dat_alloc(\u0026pdev-\u003edev);\n 128:\t\tif (!plat)\n 129:\t\t\treturn -ENOMEM;\n 130:\t\n 131:\t\tplat-\u003emdio_bus_data = devm_kzalloc(\u0026pdev-\u003edev,\n 132:\t\t\t\t\t\t sizeof(*plat-\u003emdio_bus_data),\n 133:\t\t\t\t\t\t GFP_KERNEL);\n 134:\t\tif (!plat-\u003emdio_bus_data)\n 135:\t\t\treturn -ENOMEM;\n 136:\t\n 137:\t\tplat-\u003esafety_feat_cfg = devm_kzalloc(\u0026pdev-\u003edev,\n 138:\t\t\t\t\t\t sizeof(*plat-\u003esafety_feat_cfg),\n 139:\t\t\t\t\t\t GFP_KERNEL);\n 140:\t\tif (!plat-\u003esafety_feat_cfg)\n 141:\t\t\treturn -ENOMEM;\n 142:\t\n 143:\t\t/* Enable pci device */\n 144:\t\tret = pcim_enable_device(pdev);\n 145:\t\tif (ret) {\n 146:\t\t\tdev_err(\u0026pdev-\u003edev, \"%s: ERROR: failed to enable device\\n\",\n 147:\t\t\t\t__func__);\n 148:\t\t\treturn ret;\n 149:\t\t}\n 150:\t\n 151:\t\t/* Get the base address of device */\n 152:\t\tfor (i = 0; i \u003c PCI_STD_NUM_BARS; i++) {\n 153:\t\t\tif (pci_resource_len(pdev, i) == 0)\n 154:\t\t\t\tcontinue;\n 155:\t\t\tres.addr = pcim_iomap_region(pdev, i, STMMAC_RESOURCE_NAME);\n 156:\t\t\tif (IS_ERR(res.addr))\n 157:\t\t\t\treturn PTR_ERR(res.addr);\n 158:\t\t\tbreak;\n 159:\t\t}\n 160:\t\n 161:\t\tpci_set_master(pdev);\n 162:\t\n 163:\t\tret = info-\u003esetup(pdev, plat);\n 164:\t\tif (ret)\n 165:\t\t\treturn ret;\n 166:\t\n 167:\t\tres.wol_irq = pdev-\u003eirq;\n 168:\t\tres.irq = pdev-\u003eirq;\n 169:\t\n 170:\t\tplat-\u003esafety_feat_cfg-\u003etsoee = 1;\n 171:\t\tplat-\u003esafety_feat_cfg-\u003emrxpee = 1;\n 172:\t\tplat-\u003esafety_feat_cfg-\u003emestee = 1;\n 173:\t\tplat-\u003esafety_feat_cfg-\u003emrxee = 1;\n 174:\t\tplat-\u003esafety_feat_cfg-\u003emtxee = 1;\n 175:\t\tplat-\u003esafety_feat_cfg-\u003eepsi = 1;\n 176:\t\tplat-\u003esafety_feat_cfg-\u003eedpp = 1;\n 177:\t\tplat-\u003esafety_feat_cfg-\u003eprtyen = 1;\n 178:\t\tplat-\u003esafety_feat_cfg-\u003etmouten = 1;\n 179:\t\n 180:\t\tplat-\u003esuspend = stmmac_pci_plat_suspend;\n"
} |
| 21/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 34355 output: 50 thoughts: 17 Thoughts: Okay, here's my interpretation of "Let's see the rest of `stmmac_pci.c`", from an expert's perspective, rendered in the first person: **Diving Back into `stmmac_pci.c`** Alright, so we're circling back to the `stmmac_pci.c` file. Time to get back into the details of the PCI-specific implementation for this STMicroelectronics MAC driver. I'm keen to see what's next; likely, we'll encounter how it handles PCI device probe, initialization, and resource allocation. I anticipate we'll dissect how the driver maps the PCI configuration space to the registers needed for the STMMAC's operation. I wonder if there are any interesting nuances or optimizations employed in this specific PCI version of the driver, things that might differ from the platform-agnostic core or other platform-specific variants. Perhaps some custom interrupt handling or DMA setup specific to this PCI controller? Or maybe some power management features that are particular to this hardware. Whatever's in there, I'm ready to dig in and understand the intricacies that make this PCI interface work. |
| 22/2 | 2026/09/20 21:07 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c",
"FirstLine": 181,
"LineCount": 50
}Results: {
"Contents": " 181:\t\tplat-\u003eresume = stmmac_pci_plat_resume;\n 182:\t\n 183:\t\treturn stmmac_dvr_probe(\u0026pdev-\u003edev, plat, \u0026res);\n 184:\t}\n 185:\t\n 186:\t/**\n 187:\t * stmmac_pci_remove\n 188:\t *\n 189:\t * @pdev: platform device pointer\n 190:\t * Description: this function calls the main to free the net resources.\n 191:\t */\n 192:\tstatic void stmmac_pci_remove(struct pci_dev *pdev)\n 193:\t{\n 194:\t\tstmmac_dvr_remove(\u0026pdev-\u003edev);\n 195:\t}\n 196:\t\n 197:\t/* synthetic ID, no official vendor */\n 198:\t#define PCI_VENDOR_ID_STMMAC\t\t0x0700\n 199:\t\n 200:\t#define PCI_DEVICE_ID_STMMAC_STMMAC\t\t0x1108\n 201:\t#define PCI_DEVICE_ID_SYNOPSYS_GMAC5_ID\t\t0x7102\n 202:\t\n 203:\tstatic const struct pci_device_id stmmac_id_table[] = {\n 204:\t\t{ PCI_DEVICE_DATA(STMMAC, STMMAC, \u0026stmmac_pci_info) },\n 205:\t\t{ PCI_DEVICE_DATA(STMICRO, MAC, \u0026stmmac_pci_info) },\n 206:\t\t{ PCI_DEVICE_DATA(SYNOPSYS, GMAC5_ID, \u0026snps_gmac5_pci_info) },\n 207:\t\t{}\n 208:\t};\n 209:\t\n 210:\tMODULE_DEVICE_TABLE(pci, stmmac_id_table);\n 211:\t\n 212:\tstatic struct pci_driver stmmac_pci_driver = {\n 213:\t\t.name = STMMAC_RESOURCE_NAME,\n 214:\t\t.id_table = stmmac_id_table,\n 215:\t\t.probe = stmmac_pci_probe,\n 216:\t\t.remove = stmmac_pci_remove,\n 217:\t\t.driver = {\n 218:\t\t\t.pm = \u0026stmmac_simple_pm_ops,\n 219:\t\t},\n 220:\t};\n 221:\t\n 222:\tmodule_pci_driver(stmmac_pci_driver);\n 223:\t\n 224:\tMODULE_DESCRIPTION(\"STMMAC 10/100/1000 Ethernet PCI driver\");\n 225:\tMODULE_AUTHOR(\"Rayagond Kokatanur \u003crayagond.kokatanur@vayavyalabs.com\u003e\");\n 226:\tMODULE_AUTHOR(\"Giuseppe Cavallaro \u003cpeppe.cavallaro@st.com\u003e\");\n 227:\tMODULE_LICENSE(\"GPL\");\n"
} |
| 23/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 35489 output: 43 thoughts: 124 Thoughts: **Examining the STMMAC Driver and Hardware IDs** Okay, let's take a look at this. Right, so I'm checking the `stmmac_id_table` table and immediately I see those vendor and device IDs. It's clear that it lists a few key entries: the Synopsys design with their GMAC5, and then of course the STMicroelectronics entries. It's pretty straightforward, really, it's the standard method for matching hardware to the driver, checking against known IDs. I guess the next logical step is to dive into `dwmac-intel.c`. I have to figure out how Intel interacts with those STMMAC cores. Are they using the same table structure? How do they handle the PCI device matching, or any device tree overrides? |
| 24/2 | 2026/09/20 21:07 | tool | grepper |
0mArgs:{
"Expression": "PCI_DEVICE",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c"
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=1362=static void intel_eth_pci_remove(struct pci_dev *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1373-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1374:#define PCI_DEVICE_ID_INTEL_QUARK\t\t0x0937\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1375:#define PCI_DEVICE_ID_INTEL_EHL_RGMII1G\t\t0x4b30\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1376:#define PCI_DEVICE_ID_INTEL_EHL_SGMII1G\t\t0x4b31\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1377:#define PCI_DEVICE_ID_INTEL_EHL_SGMII2G5\t0x4b32\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1378-/* Intel(R) Programmable Services Engine (Intel(R) PSE) consist of 2 MAC\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1380- */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1381:#define PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G\t0x4ba0\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1382:#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G\t0x4ba1\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1383:#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5\t0x4ba2\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1384:#define PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G\t0x4bb0\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1385:#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G\t0x4bb1\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1386:#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5\t0x4bb2\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1387:#define PCI_DEVICE_ID_INTEL_TGLH_SGMII1G_0\t0x43ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1388:#define PCI_DEVICE_ID_INTEL_TGLH_SGMII1G_1\t0x43a2\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1389:#define PCI_DEVICE_ID_INTEL_TGL_SGMII1G\t\t0xa0ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1390:#define PCI_DEVICE_ID_INTEL_ADLS_SGMII1G_0\t0x7aac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1391:#define PCI_DEVICE_ID_INTEL_ADLS_SGMII1G_1\t0x7aad\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1392:#define PCI_DEVICE_ID_INTEL_ADLN_SGMII1G\t0x54ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1393:#define PCI_DEVICE_ID_INTEL_RPLP_SGMII1G\t0x51ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1394-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=1395=static const struct pci_device_id intel_eth_pci_id_table[] = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1396:\t{ PCI_DEVICE_DATA(INTEL, QUARK, \u0026quark_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1397:\t{ PCI_DEVICE_DATA(INTEL, EHL_RGMII1G, \u0026ehl_rgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1398:\t{ PCI_DEVICE_DATA(INTEL, EHL_SGMII1G, \u0026ehl_sgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1399:\t{ PCI_DEVICE_DATA(INTEL, EHL_SGMII2G5, \u0026ehl_sgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1400:\t{ PCI_DEVICE_DATA(INTEL, EHL_PSE0_RGMII1G, \u0026ehl_pse0_rgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1401:\t{ PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII1G, \u0026ehl_pse0_sgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1402:\t{ PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII2G5, \u0026ehl_pse0_sgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1403:\t{ PCI_DEVICE_DATA(INTEL, EHL_PSE1_RGMII1G, \u0026ehl_pse1_rgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1404:\t{ PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII1G, \u0026ehl_pse1_sgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1405:\t{ PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII2G5, \u0026ehl_pse1_sgmii1g_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1406:\t{ PCI_DEVICE_DATA(INTEL, TGL_SGMII1G, \u0026tgl_sgmii1g_phy0_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1407:\t{ PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_0, \u0026tgl_sgmii1g_phy0_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1408:\t{ PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_1, \u0026tgl_sgmii1g_phy1_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1409:\t{ PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_0, \u0026adls_sgmii1g_phy0_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1410:\t{ PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_1, \u0026adls_sgmii1g_phy1_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1411:\t{ PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, \u0026adln_sgmii1g_phy0_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1412:\t{ PCI_DEVICE_DATA(INTEL, RPLP_SGMII1G, \u0026adln_sgmii1g_phy0_info) },\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1413-\t{}\n"
} |
| 25/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 38044 output: 36 thoughts: 305 Thoughts: **My QEMU Device Emulation Investigation** Okay, hold on a second. I need to figure out if any of these devices I'm working with are actually emulated by QEMU. Let's break this down. Can I even instantiate an stmmac or dwmac device within QEMU? Hmm, is there even any DWMAC emulation supported? Time to check. Alright, looking at the x86/PCI side of QEMU, the only emulated MACs seem to be: e1000, e1000e, igb, rtl8139, pcnet, ne2k_pci, vmxnet3, virtio-net-pci, rocker, sungem (SPARC/PCI), tulip (DEC 21140), and i8255x (eepro100). No sign of anything relevant there. Now, what about the ARM side of QEMU? Let's see... allwinner_emac (but not dwmac!), imx_fec, smc91c111, lan9118, cadence_gem, ftgmac100, mcf_fec, and bcm2835_emac. Still nothing. There's *absolutely* no dwmac or stmmac model in upstream QEMU! That's a huge issue, and I'd need to confirm this. I need to double-check the kernel and any relevant documentation to verify that there are no mentions of QEMU or virtual devices related to stmmac. |
| 26/2 | 2026/09/20 21:07 | tool | grepper |
0mError:no matches Args: {
"Expression": "qemu",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"error": "no matches"
} |
| 27/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 38744 output: 35 thoughts: 859 Thoughts: **Analyzing the Feasibility of Fuzzing `stmmac` with syzkaller** Okay, first things first, what's the deal with `syzkaller` and its ability to reach `stmmac`? I need to clarify if this is even a viable target for fuzzing. Time to meticulously review the negative criteria outlined in Section 2 of the instructions. Let's see... the key is to look for scenarios where `WorthFuzzing=false`. Ah, here it is: "Structurally unreachable hardware." That's the category to watch. Does `stmmac` fall under this? Specifically, are we talking about vendor-specific hardware requiring physical cards not emulated in standard QEMU? Alright, let's break this down. First, what does the patch modify? I'm seeing changes in `stmmac.h` and `stmmac_main.c`, focusing on functions like `stmmac_init_rx_buffers`, `stmmac_rx_refill`, `stmmac_rx`, etc. Okay, so we're definitely looking at core RX path stuff. Next, a quick Kconfig lookup. "STMicroelectronics Multi-Gigabit Ethernet driver." Right. This is the driver for the Ethernet IPs built around the Synopsys IP Core. `stmmac_rx()` is the NAPI poll/RX interrupt routine for the Synopsys DesignWare MAC! To get this code to execute, we need an instantiated STMMAC / DWMAC ethernet controller device, the interface brought up (`stmmac_open`), and some packets or RX DMA descriptors to be processed. Now, can `syzkaller` in QEMU or GCE instantiate such a device? This is the crux of the matter. Can we get an `stmmac` netdev up and running in a standard virtualized environment (like GCE or QEMU, specifically amd64)? Let's think. Can a platform device be instantiated from userspace? Not unless using configfs/device tree overlay/dummy platform device, but stmmac isn't that. Okay, what about PCI? Can a PCI device be instantiated without QEMU *actually* emulating it? Nope. And does QEMU, especially amd64 QEMU, emulate any of the relevant PCI IDs? Searching for `PCI_VENDOR_ID_STMMAC` (0x0700) and `PCI_DEVICE_ID_STMMAC_STMMAC` (0x1108), or other relevant IDs like those from STMicro, Synopsys, Intel Quark/EHL/TGL GMACs, Motorcomm, or Loongson. No luck. QEMU isn't emulating these! Hmm, maybe there's a USB angle? Does `stmmac` even have USB support? Time to search the kernel for `usb` under `stmmac`. |
| 28/2 | 2026/09/20 21:07 | tool | grepper |
0mError:no matches Args: {
"Expression": "usb",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"error": "no matches"
} |
| 29/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 40279 output: 27 thoughts: 35 Thoughts: **Investigating the Lack of USB Support** Okay, so there's absolutely no USB functionality, which is a significant problem. My first instinct is to dig into the `stmmac` driver. I need to determine if it has any kind of virtual device component, maybe a mock driver, or anything that could simulate hardware or provide a testing environment. It's crucial for understanding the underlying architecture. Let's see if there are any existing tests or virtual bus configurations that leverage `stmmac`. Perhaps that will shed some light on the design and whether USB interaction is even conceptually within its scope, even if currently unimplemented. Finding that will be my next focus. |
| 30/2 | 2026/09/20 21:07 | tool | grepper |
0mArgs:{
"Expression": "stmmac",
"PathPrefix": "drivers/net/"
}Results: {
"Output": "\nFull output is too long, showing 500 out of 11685 lines.\nUse more precise expression if possible.\n\ndrivers/net/ethernet/stmicro/Kconfig=19=if NET_VENDOR_STMICRO\ndrivers/net/ethernet/stmicro/Kconfig-20-\ndrivers/net/ethernet/stmicro/Kconfig:21:source \"drivers/net/ethernet/stmicro/stmmac/Kconfig\"\ndrivers/net/ethernet/stmicro/Kconfig-22-\n--\ndrivers/net/ethernet/stmicro/Makefile-5-\ndrivers/net/ethernet/stmicro/Makefile:6:obj-$(CONFIG_STMMAC_ETH) += stmmac/\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=29=config STMMAC_PLATFORM\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-33-\thelp\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:34:\t This selects the platform specific bus support for the stmmac driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-35-\t This is the driver used on several SoCs:\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=60=config DWMAC_ANARION\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-66-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:67:\t This selects the Anarion SoC glue layer support for the stmmac driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-68-\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=78=config DWMAC_INGENIC\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-85-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:86:\t This selects Ingenic SoCs glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-87-\t device driver. This driver is used on for the Ingenic SoCs\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=90=config DWMAC_IPQ806X\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-97-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:98:\t This selects the IPQ806x SoC glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-99-\t device driver. This driver does not use any of the hardware\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=114=config DWMAC_MEDIATEK\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-119-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:120:\t This selects the MT2712 SoC support for the stmmac driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-121-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=122=config DWMAC_MESON\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-129-\t This selects the Amlogic Meson SoC glue layer support for\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:130:\t the stmmac device driver. This driver is used for Meson6,\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-131-\t Meson8, Meson8b and GXBB SoCs.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=133=config DWMAC_NUVOTON\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-141-\t This selects the Nuvoton MA35 series SoC glue layer support\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:142:\t for the stmmac device driver. The nuvoton-dwmac driver is\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-143-\t used for MA35 series SoCs.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=145=config DWMAC_QCOM_ETHQOS\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-152-\t This selects the Qualcomm ETHQOS glue layer support for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:153:\t stmmac device driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-154-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=155=config DWMAC_RENESAS_GBETH\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-163-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:164:\t This selects Renesas SoC glue layer support for the stmmac device\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-165-\t driver. This driver is used for the RZ/V2H(P) family, RZ/T2H and\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=168=config DWMAC_ROCKCHIP\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-176-\t This selects the Rockchip RK3288 SoC glue layer support for\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:177:\t the stmmac device driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-178-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=179=config DWMAC_RZN1\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-187-\t This selects the Renesas RZ/N1 SoC glue layer support for\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:188:\t the stmmac device driver. This support can make use of a custom MII\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-189-\t converter PCS device.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=191=config DWMAC_S32\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-197-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:198:\t This selects NXP SoC glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-199-\t device driver. This driver is used for the S32CC series\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=203=config DWMAC_SOCFPGA\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-214-\t This selects the Altera SOCFPGA SoC glue layer support\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:215:\t for the stmmac device driver. This driver is used for\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-216-\t arria5 and cyclone5 FPGA SoCs.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=218=config DWMAC_SOPHGO\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-225-\t This selects the Sophgo SoC specific glue layer support\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:226:\t for the stmmac device driver. This driver is used for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-227-\t ethernet controllers on various Sophgo SoCs.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=229=config DWMAC_SPACEMIT\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-237-\t This selects the Spacemit platform specific glue layer support\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:238:\t for the stmmac device driver. This driver is used for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-239-\t Spacemit K3 ethernet controllers.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=241=config DWMAC_STARFIVE\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-249-\t This selects the StarFive platform specific glue layer support\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:250:\t for the stmmac device driver. This driver is used for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-251-\t StarFive JH7100 and JH7110 ethernet controllers.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=253=config DWMAC_STI\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-260-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:261:\t This selects STi SoC glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-262-\t device driver. This driver is used on for the STi series\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=265=config DWMAC_STM32\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-272-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:273:\t This selects STM32 SoC glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-274-\t device driver. This driver is used on for the STM32 series\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=277=config DWMAC_SUNXI\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-284-\t This selects Allwinner SoC glue layer support for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:285:\t stmmac device driver. This driver is used for A20/A31\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-286-\t GMAC ethernet controller.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=288=config DWMAC_SUN8I\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-296-\t This selects Allwinner SoC glue layer support for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:297:\t stmmac device driver. This driver is used for H3/A83T/A64\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-298-\t EMAC ethernet controller.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=300=config DWMAC_SUN55I\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-308-\t This selects Allwinner SoC glue layer support for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:309:\t stmmac device driver. This driver is used for A523/T527\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-310-\t GMAC200 ethernet controller.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=312=config DWMAC_THEAD\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-318-\t This selects the T-HEAD platform specific glue layer support for\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:319:\t the stmmac device driver. This driver is used for T-HEAD TH1520\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-320-\t ethernet controller.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=322=config DWMAC_ULTRARISC\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-329-\t This selects the UltraRISC platform specific glue layer support\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:330:\t for the stmmac device driver. This driver is used for the DP1000\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-331-\t GMAC Ethernet controller.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=333=config DWMAC_IMX8\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-340-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:341:\t This selects NXP SoC glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-342-\t device driver. This driver is used for i.MX8 series like\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=345=config DWMAC_INTEL_PLAT\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-351-\t This selects the Intel platform specific glue layer support for\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:352:\t the stmmac device driver. This driver is used for the Intel Keem Bay\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-353-\t SoC.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=355=config DWMAC_LOONGSON1\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-361-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:362:\t This selects Loongson1 SoC glue layer support for the stmmac\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-363-\t device driver. This driver is used for Loongson1-based boards\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=366=config DWMAC_TEGRA\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-371-\t found on the NVIDIA Tegra SoC devices. This driver provides the glue\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:372:\t layer on top of the stmmac driver required for these NVIDIA Tegra SoC\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-373-\t devices.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=384=config STMMAC_LIBPCI\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-386-\thelp\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:387:\t This option enables the PCI bus helpers for the stmmac driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-388-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=389=config DWMAC_INTEL\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-396-\t This selects the Intel platform specific bus support for the\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:397:\t stmmac driver. This driver is used for Intel Quark/EHL/TGL.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-398-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=399=config DWMAC_LOONGSON\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-405-\thelp\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:406:\t This selects the LOONGSON PCI bus support for the stmmac driver,\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-407-\t Support for ethernet controller on Loongson-2K1000 SoC and LS7A1000 bridge.\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=418=config STMMAC_PCI\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-423-\thelp\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:424:\t This selects the platform specific bus support for the stmmac driver.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-425-\t This driver was tested on XLINX XC2V3000 FF1152AMT0221\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile-1-# SPDX-License-Identifier: GPL-2.0\ndrivers/net/ethernet/stmicro/stmmac/Makefile:2:obj-$(CONFIG_STMMAC_ETH) += stmmac.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:3:stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-4-\t chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-5-\t dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:6:\t mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o\t\\\ndrivers/net/ethernet/stmicro/stmmac/Makefile-7-\t dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:8:\t stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:9:\t stmmac_xdp.o stmmac_est.o stmmac_fpe.o stmmac_vlan.o \\\ndrivers/net/ethernet/stmicro/stmmac/Makefile:10:\t stmmac_pcs.o $(stmmac-y)\ndrivers/net/ethernet/stmicro/stmmac/Makefile-11-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:12:stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-13-\ndrivers/net/ethernet/stmicro/stmmac/Makefile-14-# Ordering matters. Generic driver must be last.\ndrivers/net/ethernet/stmicro/stmmac/Makefile:15:obj-$(CONFIG_STMMAC_PLATFORM)\t+= stmmac-platform.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-16-obj-$(CONFIG_DWMAC_ANARION)\t+= dwmac-anarion.o\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=46=obj-$(CONFIG_DWMAC_VISCONTI)\t+= dwmac-visconti.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:47:stmmac-platform-objs:= stmmac_platform.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-48-dwmac-altr-socfpga-objs := dwmac-socfpga.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-49-\ndrivers/net/ethernet/stmicro/stmmac/Makefile:50:obj-$(CONFIG_STMMAC_LIBPCI)\t+= stmmac_libpci.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:51:obj-$(CONFIG_STMMAC_PCI)\t+= stmmac-pci.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile-52-obj-$(CONFIG_DWMAC_INTEL)\t+= dwmac-intel.o\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=54=obj-$(CONFIG_DWMAC_MOTORCOMM)\t+= dwmac-motorcomm.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:55:stmmac-pci-objs:= stmmac_pci.o\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-14-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:15:#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-16-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:17:static int jumbo_frm(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-18-\t\t int csum)\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-20-\tunsigned int nopaged_len = skb_headlen(skb);\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:21:\tstruct stmmac_priv *priv = tx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-22-\tunsigned int entry = tx_q-\u003ecur_tx;\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-45-\t/* do not close the descriptor and do not set own bit */\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:46:\tstmmac_prepare_tx_desc(priv, desc, 1, buf_len, csum, STMMAC_CHAIN_MODE,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-47-\t\t\t0, false, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-62-\t\t\ttx_q-\u003etx_skbuff_dma[entry].len = bmax;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:63:\t\t\tstmmac_prepare_tx_desc(priv, desc, 0, bmax, csum,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-64-\t\t\t\t\tSTMMAC_CHAIN_MODE, 1, false, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-76-\t\t\t/* last descriptor can be set now */\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:77:\t\t\tstmmac_prepare_tx_desc(priv, desc, 0, len, csum,\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-78-\t\t\t\t\tSTMMAC_CHAIN_MODE, 1, true, skb-\u003elen);\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c=99=static void init_dma_chain(void *des, dma_addr_t phy_addr,\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-128-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:129:static void refill_desc3(struct stmmac_rx_queue *rx_q, struct dma_desc *p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-130-{\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:131:\tstruct stmmac_priv *priv = rx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-132-\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-143-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:144:static void clean_desc3(struct stmmac_tx_queue *tx_q, struct dma_desc *p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-145-{\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:146:\tstruct stmmac_priv *priv = tx_q-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-147-\tunsigned int entry = tx_q-\u003edirty_tx;\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-160-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:161:const struct stmmac_mode_ops chain_mode_ops = {\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-162-\t.init = init_dma_chain,\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-15-#include \u003clinux/netdevice.h\u003e\ndrivers/net/ethernet/stmicro/stmmac/common.h:16:#include \u003clinux/stmmac.h\u003e\ndrivers/net/ethernet/stmicro/stmmac/common.h-17-#include \u003clinux/phy.h\u003e\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=49=static inline bool dwmac_is_xmac(enum dwmac_core_type core_type)\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-70-\ndrivers/net/ethernet/stmicro/stmmac/common.h:71:struct stmmac_q_tx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-72-\tu64_stats_t tx_bytes;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-77-\ndrivers/net/ethernet/stmicro/stmmac/common.h:78:struct stmmac_napi_tx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-79-\tu64_stats_t tx_packets;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-85-\ndrivers/net/ethernet/stmicro/stmmac/common.h:86:struct stmmac_txq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-87-\t/* Updates protected by tx queue lock. */\ndrivers/net/ethernet/stmicro/stmmac/common.h-88-\tstruct u64_stats_sync q_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:89:\tstruct stmmac_q_tx_stats q;\ndrivers/net/ethernet/stmicro/stmmac/common.h-90-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-92-\tstruct u64_stats_sync napi_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:93:\tstruct stmmac_napi_tx_stats napi;\ndrivers/net/ethernet/stmicro/stmmac/common.h-94-} ____cacheline_aligned_in_smp;\ndrivers/net/ethernet/stmicro/stmmac/common.h-95-\ndrivers/net/ethernet/stmicro/stmmac/common.h:96:struct stmmac_napi_rx_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-97-\tu64_stats_t rx_bytes;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-102-\ndrivers/net/ethernet/stmicro/stmmac/common.h:103:struct stmmac_rxq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-104-\t/* Updates protected by NAPI poll logic. */\ndrivers/net/ethernet/stmicro/stmmac/common.h-105-\tstruct u64_stats_sync napi_syncp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:106:\tstruct stmmac_napi_rx_stats napi;\ndrivers/net/ethernet/stmicro/stmmac/common.h-107-} ____cacheline_aligned_in_smp;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-109-/* Updates on each CPU protected by not allowing nested irqs. */\ndrivers/net/ethernet/stmicro/stmmac/common.h:110:struct stmmac_pcpu_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-111-\tstruct u64_stats_sync syncp;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-116-/* Extra statistic and debug information exposed by ethtool */\ndrivers/net/ethernet/stmicro/stmmac/common.h:117:struct stmmac_extra_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-118-\t/* Transmit errors */\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-237-\t/* per queue statistics */\ndrivers/net/ethernet/stmicro/stmmac/common.h:238:\tstruct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:239:\tstruct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:240:\tstruct stmmac_pcpu_stats __percpu *pcpu_stats;\ndrivers/net/ethernet/stmicro/stmmac/common.h-241-\tunsigned long rx_dropped;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-247-/* Safety Feature statistics exposed by ethtool */\ndrivers/net/ethernet/stmicro/stmmac/common.h:248:struct stmmac_safety_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-249-\tunsigned long mac_errors[32];\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-256-#define STMMAC_SAFETY_FEAT_SIZE\t\\\ndrivers/net/ethernet/stmicro/stmmac/common.h:257:\t(sizeof(struct stmmac_safety_stats) / sizeof(unsigned long))\ndrivers/net/ethernet/stmicro/stmmac/common.h-258-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=416=struct dma_features {\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-566-\ndrivers/net/ethernet/stmicro/stmmac/common.h:567:void stmmac_axi_blen_to_mask(u32 *regval, const u32 *blen, size_t len);\ndrivers/net/ethernet/stmicro/stmmac/common.h-568-\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=615=struct mac_device_info {\ndrivers/net/ethernet/stmicro/stmmac/common.h:616:\tconst struct stmmac_ops *mac;\ndrivers/net/ethernet/stmicro/stmmac/common.h:617:\tconst struct stmmac_desc_ops *desc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:618:\tconst struct stmmac_dma_ops *dma;\ndrivers/net/ethernet/stmicro/stmmac/common.h:619:\tconst struct stmmac_mode_ops *mode;\ndrivers/net/ethernet/stmicro/stmmac/common.h:620:\tconst struct stmmac_hwtimestamp *ptp;\ndrivers/net/ethernet/stmicro/stmmac/common.h:621:\tconst struct stmmac_tc_ops *tc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:622:\tconst struct stmmac_mmc_ops *mmc;\ndrivers/net/ethernet/stmicro/stmmac/common.h:623:\tconst struct stmmac_est_ops *est;\ndrivers/net/ethernet/stmicro/stmmac/common.h:624:\tconst struct stmmac_vlan_ops *vlan;\ndrivers/net/ethernet/stmicro/stmmac/common.h-625-\tstruct dw_xpcs *xpcs;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-649-\ndrivers/net/ethernet/stmicro/stmmac/common.h:650:struct stmmac_rx_routing {\ndrivers/net/ethernet/stmicro/stmmac/common.h-651-\tu32 reg_mask;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-654-\ndrivers/net/ethernet/stmicro/stmmac/common.h:655:int dwmac100_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:656:int dwmac1000_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:657:int dwmac4_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:658:int dwxgmac2_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h:659:int dwxlgmac2_setup(struct stmmac_priv *priv);\ndrivers/net/ethernet/stmicro/stmmac/common.h-660-\ndrivers/net/ethernet/stmicro/stmmac/common.h:661:void stmmac_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],\ndrivers/net/ethernet/stmicro/stmmac/common.h-662-\t\t\t unsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:663:void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,\ndrivers/net/ethernet/stmicro/stmmac/common.h-664-\t\t\t unsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:665:void stmmac_set_mac(void __iomem *ioaddr, bool enable);\ndrivers/net/ethernet/stmicro/stmmac/common.h-666-\ndrivers/net/ethernet/stmicro/stmmac/common.h:667:void stmmac_dwmac4_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],\ndrivers/net/ethernet/stmicro/stmmac/common.h-668-\t\t\t\tunsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:669:void stmmac_dwmac4_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,\ndrivers/net/ethernet/stmicro/stmmac/common.h-670-\t\t\t\tunsigned int high, unsigned int low);\ndrivers/net/ethernet/stmicro/stmmac/common.h:671:void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool enable);\ndrivers/net/ethernet/stmicro/stmmac/common.h-672-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-11-#include \u003clinux/of_net.h\u003e\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:12:#include \u003clinux/stmmac.h\u003e\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-13-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:14:#include \"stmmac.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:15:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-16-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=63=anarion_config_dt(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:64:\t\t struct plat_stmmacenet_data *plat_dat)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-65-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=93=static int anarion_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-96-\tstruct anarion_gmac *gmac;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:97:\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:98:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-99-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:100:\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-101-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-103-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:104:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-105-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-115-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:116:\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-117-}\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c=125=static struct platform_driver anarion_dwmac_driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-128-\t\t.name = \"anarion-dwmac\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c:129:\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c-130-\t\t.of_match_table = anarion_dwmac_match,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-21-#include \u003clinux/reset.h\u003e\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:22:#include \u003clinux/stmmac.h\u003e\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-23-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:24:#include \"stmmac_platform.h\"\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-25-#include \"dwmac4.h\"\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=36=static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:37:\t\t\t\t struct plat_stmmacenet_data *plat_dat)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-38-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-43-\t\tplat_dat-\u003eaxi = devm_kzalloc(\u0026pdev-\u003edev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:44:\t\t\t\t\t sizeof(struct stmmac_axi),\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-45-\t\t\t\t\t GFP_KERNEL);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=96=static int dwc_qos_probe(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:97:\t\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:98:\t\t\t struct stmmac_resources *stmmac_res)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-99-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:100:\tplat_dat-\u003epclk = stmmac_pltfr_find_clk(plat_dat, \"phy_ref_clk\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-101-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=115=static void tegra_eqos_fix_speed(void *bsp_priv, phy_interface_t interface,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-119-\tbool needs_calibration = false;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:120:\tstruct stmmac_priv *priv;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-121-\tu32 value;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-141-\t\t/* Calibration should be done with the MDIO bus idle */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:142:\t\tstmmac_mdio_lock(priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-143-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-177-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:178:\t\tstmmac_mdio_unlock(priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-179-\t} else {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=186=static int tegra_eqos_probe(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:187:\t\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:188:\t\t\t struct stmmac_resources *res)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-189-{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-203-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:204:\tplat_dat-\u003eclk_tx_i = stmmac_pltfr_find_clk(plat_dat, \"tx\");\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-205-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-237-\tplat_dat-\u003efix_mac_speed = tegra_eqos_fix_speed;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:238:\tplat_dat-\u003eset_clk_tx_rate = stmmac_set_clk_tx_rate;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-239-\tplat_dat-\u003ebsp_priv = eqos;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=252=static void tegra_eqos_remove(struct platform_device *pdev)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-253-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:254:\tstruct tegra_eqos *eqos = get_stmmac_bsp_priv(\u0026pdev-\u003edev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-255-\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=260=struct dwc_eth_dwmac_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-261-\tint (*probe)(struct platform_device *pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:262:\t\t struct plat_stmmacenet_data *plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:263:\t\t struct stmmac_resources *res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-264-\tvoid (*remove)(struct platform_device *pdev);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:265:\tconst char *stmmac_clk_name;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-266-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=268=static const struct dwc_eth_dwmac_data dwc_qos_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-269-\t.probe = dwc_qos_probe,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:270:\t.stmmac_clk_name = \"apb_pclk\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-271-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=273=static const struct dwc_eth_dwmac_data tegra_eqos_data = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-275-\t.remove = tegra_eqos_remove,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:276:\t.stmmac_clk_name = \"slave_bus\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-277-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=279=static const struct dwc_eth_dwmac_data fsd_eqos_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:280:\t.stmmac_clk_name = \"slave_bus\",\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-281-};\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c=283=static int dwc_eth_dwmac_probe(struct platform_device *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-285-\tconst struct dwc_eth_dwmac_data *data;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:286:\tstruct plat_stmmacenet_data *plat_dat;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:287:\tstruct stmmac_resources stmmac_res;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-288-\tint ret;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-291-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:292:\tmemset(\u0026stmmac_res, 0, sizeof(struct stmmac_resources));\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-293-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-294-\t/**\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:295:\t * Since stmmac_platform supports name IRQ only, basic platform\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-296-\t * resource initialization is done in the glue logic.\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-297-\t */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:298:\tstmmac_res.irq = platform_get_irq(pdev, 0);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:299:\tif (stmmac_res.irq \u003c 0)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:300:\t\treturn stmmac_res.irq;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:301:\tstmmac_res.wol_irq = stmmac_res.irq;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-302-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:303:\tstmmac_res.addr = devm_platform_ioremap_resource(pdev, 0);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:304:\tif (IS_ERR(stmmac_res.addr))\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:305:\t\treturn PTR_ERR(stmmac_res.addr);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-306-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:307:\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-308-\tif (IS_ERR(plat_dat))\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-315-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:316:\tplat_dat-\u003estmmac_clk = stmmac_pltfr_find_clk(plat_dat,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:317:\t\t\t\t\t\t data-\u003estmmac_clk_name);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-318-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-319-\tif (data-\u003eprobe)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c:320:\t\tret = data-\u003eprobe(pdev, plat_dat, \u0026stmmac_res);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c-321-\tif (ret \u003c 0) {\n--\n\n"
} |
| 31/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 54745 output: 43 thoughts: 210 Thoughts: **Analyzing the Viability of stmmac in a Virtualized Environment** Okay, so let's break this down. *stmmac*... right, that's exclusively for Synopsys DesignWare and STMicroelectronics Ethernet MACs, as well as those integrated into various SoCs. I'm thinking Allwinner, STi, Amlogic Meson, Altera SOCFPGA, Rockchip, Tegra, Intel Keem Bay, STM32, NXP i.MX8... the usual suspects. Plus, specific PCI add-in cards, Intel Quark, Elkhart Lake, Tiger Lake, Alder Lake integrated NICs, Loongson and Motorcomm YT6801. Now, the crucial point: none of these are typically emulated in a standard QEMU environment, especially on amd64. GCE is certainly out of the question as well. The question is, can we somehow *force* this to work? My next thought: Is there some kind of virtual bus or device available (like a USB gadget, netlink interface, virtio, something along those lines) that could potentially *use* or *bind* to *stmmac*? Can I somehow create an *stmmac* device *without* the underlying physical hardware or a hypervisor device backing it? I need to find a way to make this work virtually. Time to dive into `stmmac_main.c`. What core functions does it register? I need to understand the device's architecture and identify its dependencies. This is the starting point. Let's see what we can find. |
| 32/2 | 2026/09/20 21:07 | tool | grepper |
0mArgs:{
"Expression": "module_",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c"
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c=70=static int watchdog = TX_TIMEO;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:71:module_param(watchdog, int, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-72-MODULE_PARM_DESC(watchdog, \"Transmit timeout in milliseconds (default 5s)\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=74=static int debug = -1;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:75:module_param(debug, int, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-76-MODULE_PARM_DESC(debug, \"Message Level (-1: default, 0: no output, 16: all)\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=78=static int phyaddr = -1;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:79:module_param(phyaddr, int, 0444);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-80-MODULE_PARM_DESC(phyaddr, \"Physical device address\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=95=static int flow_ctrl = 0xdead;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:96:module_param(flow_ctrl, int, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-97-MODULE_PARM_DESC(flow_ctrl, \"Flow control ability [on/off] (obsolete)\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=99=static int pause = PAUSE_TIME;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:100:module_param(pause, int, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-101-MODULE_PARM_DESC(pause, \"Flow Control Pause Time (units of 512 bit times)\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=104=static int tc = TC_DEFAULT;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:105:module_param(tc, int, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-106-MODULE_PARM_DESC(tc, \"DMA threshold control value\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=110=static int buf_sz = DEFAULT_BUFSIZE;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:111:module_param(buf_sz, int, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-112-MODULE_PARM_DESC(buf_sz, \"DMA buffer size\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=119=static unsigned int eee_timer = STMMAC_DEFAULT_LPI_TIMER;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:120:module_param(eee_timer, uint, 0644);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-121-MODULE_PARM_DESC(eee_timer, \"LPI tx expiration time in msec\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=127=static unsigned int chain_mode;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:128:module_param(chain_mode, int, 0444);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-129-MODULE_PARM_DESC(chain_mode, \"To use chain instead of ring mode\");\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=8578=static void __exit stmmac_exit(void)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-8585-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:8586:module_init(stmmac_init)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:8587:module_exit(stmmac_exit)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-8588-\n"
} |
| 33/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 56666 output: 50 thoughts: 23 Thoughts: Here's a summary of my thought process, as requested: **Diving into `stmmac_init()`** Okay, let's dissect this. My focus is squarely on `stmmac_init()` within `stmmac_main.c`. I'm going to take a look at what this function actually *does*. I need to get a clear picture of how the driver is initialized, what hardware it sets up, and how it lays the groundwork for operation. Understanding the initialization sequence is fundamental to troubleshooting, debugging, and ultimately, gaining a comprehensive understanding of the driver's architecture. I expect to see register configurations, resource allocations, maybe some probe calls... the usual suspects when bringing up an Ethernet controller. I’m especially interested in any potential interactions with the platform’s device tree or any early hardware checks. I'm going to follow the logic and note any sections that are particularly noteworthy. My goal is a solid understanding of this critical starting point. |
| 34/2 | 2026/09/20 21:07 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c",
"FirstLine": 8570,
"LineCount": 25
}Results: {
"Contents": "8570:\t\tif (!stmmac_fs_dir)\n8571:\t\t\tstmmac_fs_dir = debugfs_create_dir(STMMAC_RESOURCE_NAME, NULL);\n8572:\t\tregister_netdevice_notifier(\u0026stmmac_notifier);\n8573:\t#endif\n8574:\t\n8575:\t\treturn 0;\n8576:\t}\n8577:\t\n8578:\tstatic void __exit stmmac_exit(void)\n8579:\t{\n8580:\t#ifdef CONFIG_DEBUG_FS\n8581:\t\tunregister_netdevice_notifier(\u0026stmmac_notifier);\n8582:\t\tdebugfs_remove_recursive(stmmac_fs_dir);\n8583:\t#endif\n8584:\t}\n8585:\t\n8586:\tmodule_init(stmmac_init)\n8587:\tmodule_exit(stmmac_exit)\n8588:\t\n8589:\tMODULE_DESCRIPTION(\"STMMAC 10/100/1000 Ethernet device driver\");\n8590:\tMODULE_AUTHOR(\"Giuseppe Cavallaro \u003cpeppe.cavallaro@st.com\u003e\");\n8591:\tMODULE_LICENSE(\"GPL\");\n"
} |
| 35/2 | 2026/09/20 21:07 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 57287 output: 40 thoughts: 580 Thoughts: **My Analysis of STMMAC Initialization and Emulation** Okay, let's break this down. From what I'm seeing, `stmmac_init()` is primarily a setup function, creating a debugfs directory if debugging is enabled and registering a netdevice notifier. The real action, the instantiation of `stmmac` instances, happens through `stmmac_dvr_probe()`. That's where the drivers for the actual hardware come into play. We've got a whole list of platform drivers, covering a wide range of SoCs and boards: everything from dwmac-anarion to dwmac-visconti, plus drivers for PCI devices like the standard `stmmac_pci.c`, various Intel GMAC PCI devices, and even a few others. However, and this is the crux of the issue, none of these platform or PCI devices seem to be directly emulated by standard QEMU, nor are they something you'd find in a typical GCE instance. QEMU, at least the standard version I'm familiar with, sticks to emulating more common NIC models. We're talking about e1000/e1000e/igb, rtl8139, virtio-net-pci, vmxnet3, and so on. It handles a good range, but it *doesn't* emulate Synopsys DWMAC or STMMAC, or those Intel Keem Bay/Quark/EHL GMAC devices. That's a critical point for my purposes. Hold on, I need to be absolutely sure. Let's make sure that there isn't some other hidden path where something like `stmmac_rx`, `stmmac_build_skb`, or `stmmac_build_xdp_frags` might be getting invoked. I'll need to check the callers of `stmmac_rx` to make sure nothing is missed. |
| 36/2 | 2026/09/20 21:08 | tool | grepper |
0mArgs:{
"Expression": "stmmac_rx\\(",
"PathPrefix": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5785=static void stmmac_build_xdp_frags(struct stmmac_priv *priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5823- */\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5824:static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5825-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6079=static int stmmac_napi_poll_rx(struct napi_struct *napi, int budget)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6092-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6093:\twork_done = stmmac_rx(priv, budget, chan);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6094-\tif (work_done \u003c budget \u0026\u0026 napi_complete_done(napi, work_done)) {\n"
} |
| 37/2 | 2026/09/20 21:08 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 58686 output: 143 thoughts: 883 Thoughts: **Analysis of STMMAC RX Path for Fuzzing Suitability** Okay, let's break this down. My analysis indicates that the code modified by this patch resides entirely within the RX path of the STMMAC (Synopsys DesignWare Ethernet MAC) driver, specifically in the `drivers/net/ethernet/stmicro/stmmac/` directory. I've pinpointed the relevant functions: `stmmac_init_rx_buffers`, `stmmac_rx_refill`, `stmmac_xdp_put_buff`, `stmmac_build_skb`, `stmmac_build_xdp_frags`, and `stmmac_rx`. These are all internal to the RX flow. The `stmmac.h` header is also affected, primarily by structural changes to the `rx_queue` struct. Now, considering the criteria for `WorthFuzzing`, specifically the negative criteria, this falls under "structurally unreachable hardware". The STMMAC driver is designed for specific hardware: Synopsys IP or STMicroelectronics ASICs/SoCs, or certain PCI cards, none of which are emulated in standard QEMU or GCE environments. The target architecture is amd64, and these virtualized environments do not present any STMMAC hardware. Therefore, the code paths modified, especially those in the RX flow, are effectively unreachable in a standard fuzzing setup. Let's confirm: the exact wording in the negative criteria list is very precise: "Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed, ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU." This is exactly what we have here. Therefore, the logical conclusion is to return `WorthFuzzing=false`. The `FocusSymbols` and `EnableConfigs` lists will be empty because no meaningful fuzzing can be done here. The reasoning is straightforward: the modified code is in the STMMAC RX path, which requires specific hardware not emulated in standard fuzzing environments. After carefully inspecting the diff, it confirms that all modifications are confined to the `stmmac` driver itself. Nothing else is touched. Everything checks out. I'm confident in calling `set-results` with the appropriate values. |
| 38/2 | 2026/09/20 21:08 | tool | set-results |
0mArgs:{
"EnableConfigs": [],
"FocusSymbols": [],
"Reasoning": "The changes modify the receive path and buffer management of the STMMAC (Synopsys DesignWare MAC / STMicroelectronics) Ethernet driver (stmmac_rx, stmmac_build_skb, stmmac_build_xdp_frags, stmmac_rx_refill, stmmac_init_rx_buffers). This driver controls physical SoC/PCI hardware and is not emulated in standard QEMU or GCE virtualized environments, making the modified code structurally unreachable for syzkaller fuzzing.",
"WorthFuzzing": false
}Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The changes modify the receive path and buffer management of the STMMAC (Synopsys DesignWare MAC / STMicroelectronics) Ethernet driver (stmmac_rx, stmmac_build_skb, stmmac_build_xdp_frags, stmmac_rx_refill, stmmac_init_rx_buffers). This driver controls physical SoC/PCI hardware and is not emulated in standard QEMU or GCE virtualized environments, making the modified code structurally unreachable for syzkaller fuzzing.",
"WorthFuzzing": false
} |
| 39/1 | 2026/09/20 21:08 | action | If |
0mArgs:{
"WorthFuzzing": false
}Results: null |
| Total Calls | Total Tokens | Avg Tokens | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|
| Total Calls | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|