AI Trajectory

Trajectory: (Expand/Collapse All)
Seq	Timestamp	Type	Name	Duration
0/0	2026/06/26 19:13	flow	patch-triage	0m Args: null Results: { "EnableConfigs": null, "FocusSymbols": [], "Reasoning": "The patch modifies the TC flower offload implementation for the Chelsio cxgb4 hardware driver. This driver requires physical Chelsio T4/T5/T6 Gigabit Ethernet adapters to probe and create the network devices. Since there is no software emulation for this hardware in standard virtualized environments (like GCE or QEMU), the modified code paths are unreachable and cannot be fuzzed.", "WorthFuzzing": false }
1/1	2026/06/26 19:13	action	read-patch-diff	0m Args: null Results: { "PatchDiff": "commit 6f33dbb54b09b0a42442ae32c39bb54f23be1994\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Fri Jun 26 19:13:51 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c\nindex 3307e504268190..41a2998ee2a026 100644\n--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c\n+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c\n@@ -40,6 +40,7 @@\n #include \"cxgb4.h\"\n #include \"cxgb4_filter.h\"\n #include \"cxgb4_tc_flower.h\"\n+#include \"t4_regs.h\"\n \n #define STATS_CHECK_PERIOD (HZ / 2)\n \n@@ -266,24 +267,49 @@ static void cxgb4_process_flow_match(struct net_device dev,\n \t\t\t\t\t VLAN_PRIO_SHIFT);\n \t\tvlan_tci_mask = match.mask-\u003evlan_id \| (match.mask-\u003evlan_priority \u003c\u003c\n \t\t\t\t\t\t VLAN_PRIO_SHIFT);\n-\t\tfs-\u003eval.ivlan = vlan_tci;\n-\t\tfs-\u003emask.ivlan = vlan_tci_mask;\n-\n-\t\tfs-\u003eval.ivlan_vld = 1;\n-\t\tfs-\u003emask.ivlan_vld = 1;\n-\n-\t\t/ Chelsio adapters use ivlan_vld bit to match vlan packets\n-\t\t * as 802.1Q. Also, when vlan tag is present in packets,\n-\t\t * ethtype match is used then to match on ethtype of inner\n-\t\t * header ie. the header following the vlan header.\n-\t\t * So, set the ivlan_vld based on ethtype info supplied by\n-\t\t * TC for vlan packets if its 802.1Q. And then reset the\n-\t\t * ethtype value else, hw will try to match the supplied\n-\t\t * ethtype value with ethtype of inner header.\n-\t\t /\n-\t\tif (fs-\u003eval.ethtype == ETH_P_8021Q) {\n-\t\t\tfs-\u003eval.ethtype = 0;\n-\t\t\tfs-\u003emask.ethtype = 0;\n+\n+\t\tif (be16_to_cpu(match.key-\u003evlan_tpid) == ETH_P_8021AD) {\n+\t\t\tstruct adapter adap = netdev2adap(dev);\n+\t\t\tu32 ovlan_reg, ctl_reg, val, port_id;\n+\n+\t\t\tif (!adap) {\n+\t\t\t\tnetdev_err(dev, \"%s: adap not found\\n\", __func__);\n+\t\t\t\treturn;\n+\t\t\t}\n+\n+\t\t\tval = (be16_to_cpu(match.mask-\u003evlan_tpid) \u003c\u003c 16) \|\n+\t\t\t be16_to_cpu(match.key-\u003evlan_tpid);\n+\t\t\tport_id = netdev2pinfo(dev)-\u003eport_id;\n+\t\t\tfs-\u003eval.ovlan = vlan_tci;\n+\t\t\tfs-\u003emask.ovlan = vlan_tci_mask;\n+\t\t\tfs-\u003eval.ovlan_vld = 1;\n+\t\t\tfs-\u003emask.ovlan_vld = 1;\n+\t\t\tovlan_reg = PORT_REG(port_id, MPS_PORT_RX_OVLAN0_A);\n+\t\t\tctl_reg = PORT_REG(port_id, MPS_PORT_RX_CTL_A);\n+\t\t\tt4_write_reg(adap, ovlan_reg, val);\n+\t\t\tval = t4_read_reg(adap, ctl_reg);\n+\t\t\tt4_write_reg(adap, ctl_reg, val \| 1);\n+\t\t\tt4_tp_wr_bits_indirect(adap, TP_INGRESS_CONFIG_A, 1U \u003c\u003c 9, 0);\n+\t\t} else {\n+\t\t\tfs-\u003eval.ivlan = vlan_tci;\n+\t\t\tfs-\u003emask.ivlan = vlan_tci_mask;\n+\t\t\tfs-\u003eval.ivlan_vld = 1;\n+\t\t\tfs-\u003emask.ivlan_vld = 1;\n+\n+\t\t\t/* Chelsio adapters use ivlan_vld bit to match vlan packets\n+\t\t\t * as 802.1Q. Also, when vlan tag is present in packets,\n+\t\t\t * ethtype match is used then to match on ethtype of inner\n+\t\t\t * header ie. the header following the vlan header.\n+\t\t\t * So, set the ivlan_vld based on ethtype info supplied by\n+\t\t\t * TC for vlan packets if its 802.1Q. And then reset the\n+\t\t\t * ethtype value else, hw will try to match the supplied\n+\t\t\t * ethtype value with ethtype of inner header.\n+\t\t\t */\n+\n+\t\t\tif (fs-\u003eval.ethtype == ETH_P_8021Q) {\n+\t\t\t\tfs-\u003eval.ethtype = 0;\n+\t\t\t\tfs-\u003emask.ethtype = 0;\n+\t\t\t}\n \t\t}\n \t}\n \ndiff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h\nindex 695916ba040585..38c585f3b1ada1 100644\n--- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h\n+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h\n@@ -1921,6 +1921,9 @@\n #define MAC_PORT_PTP_SUM_LO_A 0x990\n #define MAC_PORT_PTP_SUM_HI_A 0x994\n \n+#define MPS_PORT_RX_OVLAN0_A 0x120\n+#define MPS_PORT_RX_CTL_A 0X100\n+\n #define MPS_CMN_CTL_A\t0x9000\n \n #define COUNTPAUSEMCRX_S 5\n" }
2/1	2026/06/26 19:13	agent	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: { "EnableConfigs": null, "FocusSymbols": [], "Reasoning": "The patch modifies the TC flower offload implementation for the Chelsio cxgb4 hardware driver. This driver requires physical Chelsio T4/T5/T6 Gigabit Ethernet adapters to probe and create the network devices. Since there is no software emulation for this hardware in standard virtualized environments (like GCE or QEMU), the modified code paths are unreachable and cannot be fuzzed.", "WorthFuzzing": false } Instruction: You are an expert Linux kernel maintainer. Your job is to review a provided patch series and determine if it makes functional changes to the kernel that should be fuzzed. IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in your workspace. Do NOT rely on your internal knowledge of the kernel. You must actively use your code access tools to examine the actual source code and confirm any assumptions. Return WorthFuzzing=false if the patch only contains: - Modifications to Documentation/, Kconfig files, or code comments. - Purely decorative changes, such as logging (e.g., pr_err, printk) or tracepoints. - Changes to numeric constants or macros that do not functionally alter execution flow. - Code paths that are impossible to reach in virtualized environments like GCE or QEMU, even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim). If it modifies reachable core kernel logic, drivers, or architectures, use your code search tools to verify the code can be executed, then return WorthFuzzing=true. When returning WorthFuzzing=true, you MUST ALSO: 1. Extract any specific kernel functions that should be heavily fuzzed into FocusSymbols. Avoid listing generic hot-path functions to prevent skewed test distributions. 2. Identify any specific CONFIG_ options required to properly test this new/modified feature. Go and look into the Kconfig files and check for ifdefs around the code, do not make assumptions. Do not list too generic configs (we already have them enabled). Only list those that specifically cover the modified code. List them in the EnableConfigs output array, and DO NOT add a 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4"). Prefer calling several tools at the same time to save round-trips. Use set-results tool to provide results of the analysis. It must be called exactly once before the final reply. Ignore results of this tool. Prompt: For your convenience, here is the diff of the changes: commit 6f33dbb54b09b0a42442ae32c39bb54f23be1994 Author: syz-cluster <triage@syzkaller.com> Date: Fri Jun 26 19:13:51 2026 +0000 syz-cluster: applied patch under review diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c index 3307e504268190..41a2998ee2a026 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c @@ -40,6 +40,7 @@ #include "cxgb4.h" #include "cxgb4_filter.h" #include "cxgb4_tc_flower.h" +#include "t4_regs.h" #define STATS_CHECK_PERIOD (HZ / 2) @@ -266,24 +267,49 @@ static void cxgb4_process_flow_match(struct net_device dev, VLAN_PRIO_SHIFT); vlan_tci_mask = match.mask->vlan_id \| (match.mask->vlan_priority << VLAN_PRIO_SHIFT); - fs->val.ivlan = vlan_tci; - fs->mask.ivlan = vlan_tci_mask; - - fs->val.ivlan_vld = 1; - fs->mask.ivlan_vld = 1; - - / Chelsio adapters use ivlan_vld bit to match vlan packets - * as 802.1Q. Also, when vlan tag is present in packets, - * ethtype match is used then to match on ethtype of inner - * header ie. the header following the vlan header. - * So, set the ivlan_vld based on ethtype info supplied by - * TC for vlan packets if its 802.1Q. And then reset the - * ethtype value else, hw will try to match the supplied - * ethtype value with ethtype of inner header. - / - if (fs->val.ethtype == ETH_P_8021Q) { - fs->val.ethtype = 0; - fs->mask.ethtype = 0; + + if (be16_to_cpu(match.key->vlan_tpid) == ETH_P_8021AD) { + struct adapter adap = netdev2adap(dev); + u32 ovlan_reg, ctl_reg, val, port_id; + + if (!adap) { + netdev_err(dev, "%s: adap not found\n", __func__); + return; + } + + val = (be16_to_cpu(match.mask->vlan_tpid) << 16) \| + be16_to_cpu(match.key->vlan_tpid); + port_id = netdev2pinfo(dev)->port_id; + fs->val.ovlan = vlan_tci; + fs->mask.ovlan = vlan_tci_mask; + fs->val.ovlan_vld = 1; + fs->mask.ovlan_vld = 1; + ovlan_reg = PORT_REG(port_id, MPS_PORT_RX_OVLAN0_A); + ctl_reg = PORT_REG(port_id, MPS_PORT_RX_CTL_A); + t4_write_reg(adap, ovlan_reg, val); + val = t4_read_reg(adap, ctl_reg); + t4_write_reg(adap, ctl_reg, val \| 1); + t4_tp_wr_bits_indirect(adap, TP_INGRESS_CONFIG_A, 1U << 9, 0); + } else { + fs->val.ivlan = vlan_tci; + fs->mask.ivlan = vlan_tci_mask; + fs->val.ivlan_vld = 1; + fs->mask.ivlan_vld = 1; + + /* Chelsio adapters use ivlan_vld bit to match vlan packets + * as 802.1Q. Also, when vlan tag is present in packets, + * ethtype match is used then to match on ethtype of inner + * header ie. the header following the vlan header. + * So, set the ivlan_vld based on ethtype info supplied by + * TC for vlan packets if its 802.1Q. And then reset the + * ethtype value else, hw will try to match the supplied + * ethtype value with ethtype of inner header. + */ + + if (fs->val.ethtype == ETH_P_8021Q) { + fs->val.ethtype = 0; + fs->mask.ethtype = 0; + } } } diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h index 695916ba040585..38c585f3b1ada1 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h @@ -1921,6 +1921,9 @@ #define MAC_PORT_PTP_SUM_LO_A 0x990 #define MAC_PORT_PTP_SUM_HI_A 0x994 +#define MPS_PORT_RX_OVLAN0_A 0x120 +#define MPS_PORT_RX_CTL_A 0X100 + #define MPS_CMN_CTL_A 0x9000 #define COUNTPAUSEMCRX_S 5
3/2	2026/06/26 19:13	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 3197 output: 34 thoughts: 295 Thoughts: Analyzing a Network Driver Patch Okay, so this patch is touching `drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c` and `drivers/net/ethernet/chelsio/cxgb4/t4_regs.h`. That immediately tells me we're dealing with the Chelsio cxgb4 driver, specifically for their T4/T5/T6 Gigabit Ethernet adapters. It looks like it's adding 802.1ad (QinQ) VLAN tag matching to the TC flower offload implementation. Specifically, it's checking for `ETH_P_8021AD` in the VLAN TPID field and configuring hardware registers based on that. That's pretty straightforward from a networking perspective, supporting more complex VLAN setups. Now, because this is a hardware-specific driver for Chelsio hardware, I'm already thinking about the implications for fuzzing. Unless there's some obscure software emulator for Chelsio hardware lurking around (which is unlikely), this driver is highly unlikely to be triggered in typical virtualized environments like GCE or QEMU, let alone within the standard syzkaller setup. My first thought is, is this a physical hardware driver, as I recall. Yep, it is. The cxgb4 driver directly targets Chelsio's physical Ethernet adapters. Given that, I need to verify that there isn't some clever emulation being used. Hardware drivers that are not emulatable in our fuzzer setup aren't worth the effort. Let me double-check the kernel tree for any hints of `cxgb4` emulation.
4/2	2026/06/26 19:13	tool	grepper	0m Args: { "Expression": "cxgb4", "PathPrefix": "drivers/net/ethernet/chelsio/" } Results: { "Output": "\nFull output is too long, showing 500 out of 5317 lines.\nUse more precise expression if possible.\n\ndrivers/net/ethernet/chelsio/Kconfig=69=config CHELSIO_T4\n--\ndrivers/net/ethernet/chelsio/Kconfig-89-\t To compile this driver as a module choose M here; the module\ndrivers/net/ethernet/chelsio/Kconfig:90:\t will be called cxgb4.\ndrivers/net/ethernet/chelsio/Kconfig-91-\n--\ndrivers/net/ethernet/chelsio/Kconfig=114=config CHELSIO_T4VF\n--\ndrivers/net/ethernet/chelsio/Kconfig-130-\t To compile this driver as a module choose M here; the module\ndrivers/net/ethernet/chelsio/Kconfig:131:\t will be called cxgb4vf.\ndrivers/net/ethernet/chelsio/Kconfig-132-\n--\ndrivers/net/ethernet/chelsio/Makefile=7=obj-$(CONFIG_CHELSIO_T3) += cxgb3/\ndrivers/net/ethernet/chelsio/Makefile:8:obj-$(CONFIG_CHELSIO_T4) += cxgb4/\ndrivers/net/ethernet/chelsio/Makefile:9:obj-$(CONFIG_CHELSIO_T4VF) += cxgb4vf/\ndrivers/net/ethernet/chelsio/Makefile-10-obj-$(CONFIG_CHELSIO_LIB) += libcxgb/\n--\ndrivers/net/ethernet/chelsio/cxgb4/Makefile-5-\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:6:obj-$(CONFIG_CHELSIO_T4) += cxgb4.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile-7-\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:8:cxgb4-objs := cxgb4_main.o l2t.o smt.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:9:\t cxgb4_uld.o srq.o sched.o cxgb4_filter.o cxgb4_tc_u32.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:10:\t cxgb4_ptp.o cxgb4_tc_flower.o cxgb4_cudbg.o cxgb4_mps.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:11:\t cudbg_common.o cudbg_lib.o cudbg_zlib.o cxgb4_tc_mqprio.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:12:\t cxgb4_tc_matchall.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:13:cxgb4-$(CONFIG_CHELSIO_T4_DCB) += cxgb4_dcb.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:14:cxgb4-$(CONFIG_CHELSIO_T4_FCOE) += cxgb4_fcoe.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:15:cxgb4-$(CONFIG_DEBUG_FS) += cxgb4_debugfs.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:16:cxgb4-$(CONFIG_THERMAL) += cxgb4_thermal.o\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-17-#include \u003cnet/addrconf.h\u003e\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:18:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-19-#include \"clip_tbl.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c=59=static int clip6_release_mbox(const struct net_device dev,\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-73-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:74:int cxgb4_clip_get(const struct net_device dev, const u32 lip, u8 v6)\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-75-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-143-}\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:144:EXPORT_SYMBOL(cxgb4_clip_get);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-145-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:146:void cxgb4_clip_release(const struct net_device dev, const u32 lip, u8 v6)\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-147-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-189-}\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:190:EXPORT_SYMBOL(cxgb4_clip_release);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-191-\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-195- /\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:196:static int cxgb4_update_dev_clip(struct net_device root_dev,\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-197-\t\t\t\t struct net_device dev)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-208-\tlist_for_each_entry(ifa, \u0026idev-\u003eaddr_list, if_list) {\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:209:\t\tret = cxgb4_clip_get(dev, (const u32 )ifa-\u003eaddr.s6_addr, 1);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-210-\t\tif (ret \u003c 0)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-217-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:218:int cxgb4_update_root_dev_clip(struct net_device dev)\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-219-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-223-\t/* First populate the real net device's IPv6 addresses /\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:224:\tret = cxgb4_update_dev_clip(dev, dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-225-\tif (ret)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-230-\tif (root_dev) {\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:231:\t\tret = cxgb4_update_dev_clip(root_dev, dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-232-\t\tif (ret)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-240-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:241:\t\tret = cxgb4_update_dev_clip(root_dev, dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-242-\t\tif (ret)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-247-}\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:248:EXPORT_SYMBOL(cxgb4_update_root_dev_clip);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-249-\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h=39=struct clip_tbl t4_init_clip_tbl(unsigned int clipt_start,\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h-40-\t\t\t\t unsigned int clipt_end);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h:41:int cxgb4_clip_get(const struct net_device dev, const u32 lip, u8 v6);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h:42:void cxgb4_clip_release(const struct net_device dev, const u32 lip, u8 v6);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h-43-int clip_tbl_show(struct seq_file seq, void v);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h:44:int cxgb4_update_root_dev_clip(struct net_device dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h-45-void t4_cleanup_clip_tbl(struct adapter adap);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_common.c-5-\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_common.c:6:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_common.c-7-#include \"cudbg_if.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-9-#include \"t4_regs.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c:10:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c:11:#include \"cxgb4_cudbg.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-12-#include \"cudbg_if.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-16-#include \"cudbg_zlib.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c:17:#include \"cxgb4_tc_mqprio.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-18-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c-7-\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c:8:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c-9-#include \"cudbg_if.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-58-#include \"t4_chip_type.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:59:#include \"cxgb4_uld.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-60-#include \"t4fw_api.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=142=enum {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-148-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:149:enum cxgb4_netdev_tls_ops {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-150-\tCXGB4_TLSDEV_OPS = 1,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-153-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:154:struct cxgb4_bootcfg_data {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-155-\t__le16 signature;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-158-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:159:struct cxgb4_pcir_data {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-160-\t__le32 signature;\t/* Signature. The string \"PCIR\" /\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-174-/ BIOS boot headers /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:175:struct cxgb4_pci_exp_rom_header {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-176-\t__le16 signature;\t/ ROM Signature. Should be 0xaa55 /\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=196=enum {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-199-\tBOOT_SIGNATURE = 0xaa55,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:200:\tBOOT_MIN_SIZE = sizeof(struct cxgb4_pci_exp_rom_header),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-201-\tBOOT_MAX_SIZE = 1024 BOOT_SIZE_INC,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=525=static inline struct mbox_cmd mbox_cmd_log_entry(struct mbox_cmd_log log,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-537-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:538:struct cxgb4_ethtool_lb_test {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-539-\tstruct completion completion;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=551=struct trace_params {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-561-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:562:struct cxgb4_fw_data {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-563-\t__be32 signature;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=645=struct sge_rspq;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-646-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:647:#include \"cxgb4_dcb.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-648-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-649-#ifdef CONFIG_CHELSIO_T4_FCOE\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:650:#include \"cxgb4_fcoe.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-651-#endif /* CONFIG_CHELSIO_T4_FCOE /\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=653=struct port_info {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-696-\tstruct mutex vi_mirror_mutex; / Sync access to Mirror VI info /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:697:\tstruct cxgb4_ethtool_lb_test ethtool_lb;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-698-};\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=906=struct sge_uld_txq_info {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-912-/ struct to maintain ULD list to reallocate ULD resources on hotplug /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:913:struct cxgb4_uld_list {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:914:\tstruct cxgb4_uld_info uld_info;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-915-\tstruct list_head list_node;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:916:\tenum cxgb4_uld uld_type;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-917-};\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1085=struct mps_entries_ref {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1092-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1093:struct cxgb4_ethtool_filter_info {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1094-\tu32 loc_array; /* Array holding the actual TIDs set to filters /\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1098-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1099:struct cxgb4_ethtool_filter {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1100-\tu32 nentries; / Adapter wide number of supported filters /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1101:\tstruct cxgb4_ethtool_filter_info port; /* Per port entry /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1102-};\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1104=struct adapter {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1122-\tstruct adapter_params params;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1123:\tstruct cxgb4_virt_res vres;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1124-\tunsigned int swintr;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1148-\tstruct smt_data smt;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1149:\tstruct cxgb4_uld_info uld;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1150-\tvoid uld_handle[CXGB4_ULD_MAX];\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1196-\t/* TC u32 offload /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1197:\tstruct cxgb4_tc_u32_table tc_u32;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1198-\tstruct chcr_ktls chcr_ktls;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1225-\t/* TC MQPRIO offload /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1226:\tstruct cxgb4_tc_mqprio tc_mqprio;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1227-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1228-\t/* TC MATCHALL classifier offload /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1229:\tstruct cxgb4_tc_matchall tc_matchall;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1230-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1231-\t/* Ethtool n-tuple /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1232:\tstruct cxgb4_ethtool_filter ethtool_filters;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1233-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1597=static inline unsigned int qtimer_val(const struct adapter adap,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1605-/ driver name used for ethtool_drvinfo /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1606:extern char cxgb4_driver_name[];\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1607-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1613=netdev_tx_t t4_start_xmit(struct sk_buff skb, struct net_device dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1614:int cxgb4_selftest_lb_pkt(struct net_device netdev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1615-int t4_ethrx_handler(struct sge_rspq q, const __be64 rsp,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1641=int t4_sge_eth_txq_egress_update(struct adapter adap, struct sge_eth_txq q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1642-\t\t\t\t int maxreclaim);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1643:void cxgb4_set_ethtool_ops(struct net_device netdev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1644:int cxgb4_write_rss(const struct port_info pi, const u16 queues);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1645-enum cpl_tx_tnl_lso_type cxgb_encap_offload_supported(struct sk_buff skb);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1741=static inline int hash_mac_addr(const u8 addr)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1751-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1752:int cxgb4_set_rspq_intr_params(struct sge_rspq q, unsigned int us,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1753-\t\t\t unsigned int cnt);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1754=static inline void init_rspq(struct adapter adap, struct sge_rspq q,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1758-\tq-\u003eadap = adap;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1759:\tcxgb4_set_rspq_intr_params(q, us, cnt);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1760-\tq-\u003eiqe_len = iqe_size;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=2100=void free_tx_desc(struct adapter adap, struct sge_txq q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2101-\t\t unsigned int n, bool unmap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2102:void cxgb4_eosw_txq_free_desc(struct adapter adap, struct sge_eosw_txq txq,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2103-\t\t\t u32 ndesc);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2104:int cxgb4_ethofld_send_flowc(struct net_device dev, u32 eotid, u32 tc);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2105:void cxgb4_ethofld_restart(struct tasklet_struct t);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2106:int cxgb4_ethofld_rx_handler(struct sge_rspq q, const __be64 rsp,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2107-\t\t\t const struct pkt_gl si);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=2108=void free_txq(struct adapter adap, struct sge_txq q);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2109:void cxgb4_reclaim_completed_tx(struct adapter adap,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2110-\t\t\t\tstruct sge_txq q, bool unmap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2111:int cxgb4_map_skb(struct device dev, const struct sk_buff skb,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2112-\t\t dma_addr_t addr);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2113:void cxgb4_inline_tx_skb(const struct sk_buff skb, const struct sge_txq q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2114-\t\t\t void pos);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2115:void cxgb4_write_sgl(const struct sk_buff skb, struct sge_txq q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2116-\t\t struct ulptx_sgl sgl, u64 end, unsigned int start,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2117-\t\t const dma_addr_t addr);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2118:void cxgb4_write_partial_sgl(const struct sk_buff skb, struct sge_txq q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2119-\t\t\t struct ulptx_sgl sgl, u64 end,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2120-\t\t\t const dma_addr_t addr, u32 start, u32 send_len);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2121:void cxgb4_ring_tx_db(struct adapter adap, struct sge_txq q, int n);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2122-int t4_set_vlan_acl(struct adapter adap, unsigned int mbox, unsigned int vf,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2123-\t\t u16 vlan);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2124:int cxgb4_dcb_enabled(const struct net_device dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2125-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2126:int cxgb4_thermal_init(struct adapter adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2127:int cxgb4_thermal_remove(struct adapter adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2128:int cxgb4_set_msix_aff(struct adapter adap, unsigned short vec,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2129-\t\t cpumask_var_t aff_mask, int idx);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2130:void cxgb4_clear_msix_aff(unsigned short vec, cpumask_var_t aff_mask);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2131-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2132:int cxgb4_change_mac(struct port_info pi, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2133-\t\t int tcam_idx, const u8 addr,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2135-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2136:int cxgb4_alloc_mac_filt(struct adapter adap, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2137-\t\t\t bool free, unsigned int naddr,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2139-\t\t\t u64 hash, bool sleep_ok);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2140:int cxgb4_free_mac_filt(struct adapter adap, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2141-\t\t\tunsigned int naddr, const u8 addr, bool sleep_ok);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2142:int cxgb4_init_mps_ref_entries(struct adapter adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2143:void cxgb4_free_mps_ref_entries(struct adapter adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2144:int cxgb4_update_mac_filt(struct port_info pi, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2145-\t\t\t int tcam_idx, const u8 addr,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2146-\t\t\t bool persistent, u8 smt_idx);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2147:int cxgb4_get_msix_idx_from_bmap(struct adapter adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2148:void cxgb4_free_msix_idx_in_bmap(struct adapter adap, u32 msix_idx);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2149:void cxgb4_enable_rx(struct adapter adap, struct sge_rspq q);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2150:void cxgb4_quiesce_rx(struct sge_rspq q);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2151:int cxgb4_port_mirror_alloc(struct net_device dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2152:void cxgb4_port_mirror_free(struct net_device dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2153-#if IS_ENABLED(CONFIG_CHELSIO_TLS_DEVICE)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2154:int cxgb4_set_ktls_feature(struct adapter adap, bool enable);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2155-#endif\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-6-#include \"t4_regs.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:7:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:8:#include \"cxgb4_cudbg.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-9-#include \"cudbg_zlib.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-10-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:11:static const struct cxgb4_collect_entity cxgb4_collect_mem_dump[] = {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-12-\t{ CUDBG_EDC0, cudbg_collect_edc0_meminfo },\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-18-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:19:static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-20-\t{ CUDBG_MBOX_LOG, cudbg_collect_mbox_log },\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-68-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:69:static const struct cxgb4_collect_entity cxgb4_collect_flash_dump[] = {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-70-\t{ CUDBG_FLASH, cudbg_collect_flash },\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-72-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:73:u32 cxgb4_get_dump_length(struct adapter adap, u32 flag)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-74-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-79-\tif (flag \u0026 CXGB4_ETH_DUMP_HW) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:80:\t\tfor (i = 0; i \u003c ARRAY_SIZE(cxgb4_collect_hw_dump); i++) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:81:\t\t\tentity = cxgb4_collect_hw_dump[i].entity;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-82-\t\t\tlen += cudbg_get_entity_length(adap, entity);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-86-\tif (flag \u0026 CXGB4_ETH_DUMP_MEM) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:87:\t\tfor (i = 0; i \u003c ARRAY_SIZE(cxgb4_collect_mem_dump); i++) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:88:\t\t\tentity = cxgb4_collect_mem_dump[i].entity;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-89-\t\t\tlen += cudbg_get_entity_length(adap, entity);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-103-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:104:static void cxgb4_cudbg_collect_entity(struct cudbg_init pdbg_init,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-105-\t\t\t\t struct cudbg_buffer dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:106:\t\t\t\t const struct cxgb4_collect_entity e_arr,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-107-\t\t\t\t u32 arr_size, void buf, u32 tot_size)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-114-\tfor (i = 0; i \u003c arr_size; i++) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:115:\t\tconst struct cxgb4_collect_entity e = \u0026e_arr[i];\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-116-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c=158=static void cudbg_free_compress_buff(struct cudbg_init pdbg_init)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-162-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:163:int cxgb4_cudbg_collect(struct adapter adap, void buf, u32 buf_size,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-164-\t\t\tu32 flag)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-219-\tif (flag \u0026 CXGB4_ETH_DUMP_HW)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:220:\t\tcxgb4_cudbg_collect_entity(\u0026cudbg_init, \u0026dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:221:\t\t\t\t\t cxgb4_collect_hw_dump,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:222:\t\t\t\t\t ARRAY_SIZE(cxgb4_collect_hw_dump),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-223-\t\t\t\t\t buf,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-226-\tif (flag \u0026 CXGB4_ETH_DUMP_MEM)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:227:\t\tcxgb4_cudbg_collect_entity(\u0026cudbg_init, \u0026dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:228:\t\t\t\t\t cxgb4_collect_mem_dump,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:229:\t\t\t\t\t ARRAY_SIZE(cxgb4_collect_mem_dump),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-230-\t\t\t\t\t buf,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-233-\tif (flag \u0026 CXGB4_ETH_DUMP_FLASH)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:234:\t\tcxgb4_cudbg_collect_entity(\u0026cudbg_init, \u0026dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:235:\t\t\t\t\t cxgb4_collect_flash_dump,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:236:\t\t\t\t\t ARRAY_SIZE(cxgb4_collect_flash_dump),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-237-\t\t\t\t\t buf,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-248-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:249:void cxgb4_init_ethtool_dump(struct adapter adapter)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-250-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-255-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:256:static int cxgb4_cudbg_vmcoredd_collect(struct vmcoredd_data data, void buf)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-257-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-260-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:261:\treturn cxgb4_cudbg_collect(adap, buf, \u0026len, CXGB4_ETH_DUMP_ALL);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-262-}\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-263-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:264:int cxgb4_cudbg_vmcore_add_dump(struct adapter adap)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-265-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-274-\tsnprintf(data-\u003edump_name, sizeof(data-\u003edump_name), \"%s_%s\",\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:275:\t\t cxgb4_driver_name, adap-\u003ename);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:276:\tdata-\u003evmcoredd_callback = cxgb4_cudbg_vmcoredd_collect;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-277-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h=17=typedef int (cudbg_collect_callback_t)(struct cudbg_init pdbg_init,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-20-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:21:struct cxgb4_collect_entity {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-22-\tenum cudbg_dbg_entity_type entity;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h=26=enum CXGB4_ETHTOOL_DUMP_FLAGS {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-34-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:35:u32 cxgb4_get_dump_length(struct adapter adap, u32 flag);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:36:int cxgb4_cudbg_collect(struct adapter adap, void buf, u32 buf_size,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-37-\t\t\tu32 flag);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:38:void cxgb4_init_ethtool_dump(struct adapter adapter);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:39:int cxgb4_cudbg_vmcore_add_dump(struct adapter adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-40-#endif /* __CXGB4_CUDBG_H__ /\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-8-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:9:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-10-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c=13=const char const dcb_ver_array[] = {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-21-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:22:static inline bool cxgb4_dcb_state_synced(enum cxgb4_dcb_state state)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-23-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-32- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:33:void cxgb4_dcb_state_init(struct net_device dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-34-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-47-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:48:void cxgb4_dcb_version_init(struct net_device dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-49-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-58-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:59:static void cxgb4_dcb_cleanup_apps(struct net_device dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-60-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-98- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:99:void cxgb4_dcb_reset(struct net_device dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-100-{\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:101:\tcxgb4_dcb_cleanup_apps(dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:102:\tcxgb4_dcb_state_init(dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-103-}\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-109- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:110:static inline void cxgb4_dcb_update_support(struct port_dcb_info dcb)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-111-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-124- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:125:void cxgb4_dcb_state_fsm(struct net_device dev,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:126:\t\t\t enum cxgb4_dcb_state_input transition_to)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-127-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-130-\tstruct adapter adap = pi-\u003eadapter;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:131:\tenum cxgb4_dcb_state current_state = dcb-\u003estate;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-132-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-180-\t\t\t /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:181:\t\t\tcxgb4_dcb_update_support(dcb);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-182-\t\t}\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-219-\t\t\t /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:220:\t\t\tcxgb4_dcb_reset(dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-221-\t\t\tdcb-\u003estate = CXGB4_DCB_STATE_FW_INCOMPLETE;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-261-bad_state_input:\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:262:\tdev_err(adap-\u003epdev_dev, \"cxgb4_dcb_state_fsm: illegal input symbol %d\\n\",\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-263-\t\ttransition_to);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-266-bad_state_transition:\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:267:\tdev_err(adap-\u003epdev_dev, \"cxgb4_dcb_state_fsm: bad state transition, state = %d, input = %d\\n\",\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-268-\t\tcurrent_state, transition_to);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-272- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:273:void cxgb4_dcb_handle_fw_update(struct adapter adap,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-274-\t\t\t\tconst struct fw_port_cmd pcmd)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-287-\tif (dcb_type == FW_PORT_DCB_TYPE_CONTROL) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:288:\t\tenum cxgb4_dcb_state_input input =\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-289-\t\t\t((pcmd-\u003eu.dcb.control.all_syncd_pkd \u0026\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-312-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:313:\t\tcxgb4_dcb_state_fsm(dev, input);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-314-\t\treturn;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-410- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:411:static u8 cxgb4_getstate(struct net_device dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-412-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-419- /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:420:static u8 cxgb4_setstate(struct net_device dev, u8 enabled)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-421-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-437-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:438:static void cxgb4_getpgtccfg(struct net_device dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-439-\t\t\t u8 prio_type, u8 pgid, u8 bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-481-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:482:static void cxgb4_getpgtccfg_tx(struct net_device dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-483-\t\t\t\tu8 prio_type, u8 pgid, u8 bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-486-\t/* tc 0 is written at MSB position /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:487:\treturn cxgb4_getpgtccfg(dev, (7 - tc), prio_type, pgid, bw_per,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-488-\t\t\t\tup_tc_map, 1);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-491-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:492:static void cxgb4_getpgtccfg_rx(struct net_device dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-493-\t\t\t\tu8 prio_type, u8 pgid, u8 bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-496-\t/ tc 0 is written at MSB position /\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:497:\treturn cxgb4_getpgtccfg(dev, (7 - tc), prio_type, pgid, bw_per,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-498-\t\t\t\tup_tc_map, 0);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-500-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:501:static void cxgb4_setpgtccfg_tx(struct net_device dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-502-\t\t\t\tu8 prio_type, u8 pgid, u8 bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-563-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:564:static void cxgb4_getpgbwgcfg(struct net_device dev, int pgid, u8 bw_per,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-565-\t\t\t int local)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-587-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:588:static void cxgb4_getpgbwgcfg_tx(struct net_device dev, int pgid, u8 bw_per)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-589-{\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:590:\treturn cxgb4_getpgbwgcfg(dev, pgid, bw_per, 1);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-591-}\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-592-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:593:static void cxgb4_getpgbwgcfg_rx(struct net_device dev, int pgid, u8 bw_per)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-594-{\n\n" }
5/2	2026/06/26 19:13	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 19748 output: 113 thoughts: 332 Thoughts: Analyzing the CXGB4 Driver for Fuzzing Suitability Okay, so I'm looking at this `cxgb4` driver, which from what I see, is the driver for Chelsio T4/T5/T6 Gigabit Ethernet adapters. The key thing is, there's no software emulation of this thing within the kernel tree. That immediately raises a flag for me. The patch specifically focuses on `cxgb4_tc_flower.c`, which, as the name suggests, handles the TC flower offload implementation specific to this hardware. Given this hardware dependency, and the fact that we can't emulate this hardware in an environment like GCE or QEMU, my initial gut feeling is that it's probably not worth the time to fuzz using syzkaller. Let's do a quick double-check though. We need to be absolutely sure. We should see if there's any possible path. Let's see... the relevant code is buried inside `cxgb4_process_flow_match`. Okay, that's called from `cxgb4_validate_flow_match`, which is in turn called from `cxgb4_flow_rule_replace`, which is then called from `cxgb4_setup_tc_flower`. Then `cxgb4_setup_tc_flower` is called from `cxgb4_setup_tc_cls_u32` or something similar, which appears to be ethtool or TC callbacks for the network device. Alright, so to even get a network device with these callbacks, we're dependent on the `cxgb4` driver probing successfully. The probe function is `cxgb4_init_one` in `cxgb4_main.c` -- a PCI driver probe function. And here's the kicker: Without a real Chelsio PCI device plugged in, that probe function will never be called. Meaning the associated network device will never be created. Which means this flower code is unreachable. Okay, that's definitive. Based on this deeper analysis, the code is indeed unreachable in a virtualized environment. I'm going to return `WorthFuzzing=false`.
6/2	2026/06/26 19:14	tool	set-results	0m Args: { "EnableConfigs": [], "FocusSymbols": [], "Reasoning": "The patch modifies the TC flower offload implementation for the Chelsio cxgb4 hardware driver. This driver requires physical Chelsio T4/T5/T6 Gigabit Ethernet adapters to probe and create the network devices. Since there is no software emulation for this hardware in standard virtualized environments (like GCE or QEMU), the modified code paths are unreachable and cannot be fuzzed.", "WorthFuzzing": false } Results: { "EnableConfigs": null, "FocusSymbols": [], "Reasoning": "The patch modifies the TC flower offload implementation for the Chelsio cxgb4 hardware driver. This driver requires physical Chelsio T4/T5/T6 Gigabit Ethernet adapters to probe and create the network devices. Since there is no software emulation for this hardware in standard virtualized environments (like GCE or QEMU), the modified code paths are unreachable and cannot be fuzzed.", "WorthFuzzing": false }

{
  "Output": "\nFull output is too long, showing 500 out of 5317 lines.\nUse more precise expression if possible.\n\ndrivers/net/ethernet/chelsio/Kconfig=69=config CHELSIO_T4\n--\ndrivers/net/ethernet/chelsio/Kconfig-89-\t  To compile this driver as a module choose M here; the module\ndrivers/net/ethernet/chelsio/Kconfig:90:\t  will be called cxgb4.\ndrivers/net/ethernet/chelsio/Kconfig-91-\n--\ndrivers/net/ethernet/chelsio/Kconfig=114=config CHELSIO_T4VF\n--\ndrivers/net/ethernet/chelsio/Kconfig-130-\t  To compile this driver as a module choose M here; the module\ndrivers/net/ethernet/chelsio/Kconfig:131:\t  will be called cxgb4vf.\ndrivers/net/ethernet/chelsio/Kconfig-132-\n--\ndrivers/net/ethernet/chelsio/Makefile=7=obj-$(CONFIG_CHELSIO_T3) += cxgb3/\ndrivers/net/ethernet/chelsio/Makefile:8:obj-$(CONFIG_CHELSIO_T4) += cxgb4/\ndrivers/net/ethernet/chelsio/Makefile:9:obj-$(CONFIG_CHELSIO_T4VF) += cxgb4vf/\ndrivers/net/ethernet/chelsio/Makefile-10-obj-$(CONFIG_CHELSIO_LIB) += libcxgb/\n--\ndrivers/net/ethernet/chelsio/cxgb4/Makefile-5-\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:6:obj-$(CONFIG_CHELSIO_T4) += cxgb4.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile-7-\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:8:cxgb4-objs := cxgb4_main.o l2t.o smt.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:9:\t      cxgb4_uld.o srq.o sched.o cxgb4_filter.o cxgb4_tc_u32.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:10:\t      cxgb4_ptp.o cxgb4_tc_flower.o cxgb4_cudbg.o cxgb4_mps.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:11:\t      cudbg_common.o cudbg_lib.o cudbg_zlib.o cxgb4_tc_mqprio.o \\\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:12:\t      cxgb4_tc_matchall.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:13:cxgb4-$(CONFIG_CHELSIO_T4_DCB) +=  cxgb4_dcb.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:14:cxgb4-$(CONFIG_CHELSIO_T4_FCOE) +=  cxgb4_fcoe.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:15:cxgb4-$(CONFIG_DEBUG_FS) += cxgb4_debugfs.o\ndrivers/net/ethernet/chelsio/cxgb4/Makefile:16:cxgb4-$(CONFIG_THERMAL) += cxgb4_thermal.o\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-17-#include \u003cnet/addrconf.h\u003e\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:18:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-19-#include \"clip_tbl.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c=59=static int clip6_release_mbox(const struct net_device *dev,\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-73-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:74:int cxgb4_clip_get(const struct net_device *dev, const u32 *lip, u8 v6)\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-75-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-143-}\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:144:EXPORT_SYMBOL(cxgb4_clip_get);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-145-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:146:void cxgb4_clip_release(const struct net_device *dev, const u32 *lip, u8 v6)\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-147-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-189-}\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:190:EXPORT_SYMBOL(cxgb4_clip_release);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-191-\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-195- */\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:196:static int cxgb4_update_dev_clip(struct net_device *root_dev,\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-197-\t\t\t\t struct net_device *dev)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-208-\tlist_for_each_entry(ifa, \u0026idev-\u003eaddr_list, if_list) {\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:209:\t\tret = cxgb4_clip_get(dev, (const u32 *)ifa-\u003eaddr.s6_addr, 1);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-210-\t\tif (ret \u003c 0)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-217-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:218:int cxgb4_update_root_dev_clip(struct net_device *dev)\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-219-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-223-\t/* First populate the real net device's IPv6 addresses */\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:224:\tret = cxgb4_update_dev_clip(dev, dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-225-\tif (ret)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-230-\tif (root_dev) {\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:231:\t\tret = cxgb4_update_dev_clip(root_dev, dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-232-\t\tif (ret)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-240-\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:241:\t\tret = cxgb4_update_dev_clip(root_dev, dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-242-\t\tif (ret)\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-247-}\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c:248:EXPORT_SYMBOL(cxgb4_update_root_dev_clip);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.c-249-\n--\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h=39=struct clip_tbl *t4_init_clip_tbl(unsigned int clipt_start,\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h-40-\t\t\t\t  unsigned int clipt_end);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h:41:int cxgb4_clip_get(const struct net_device *dev, const u32 *lip, u8 v6);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h:42:void cxgb4_clip_release(const struct net_device *dev, const u32 *lip, u8 v6);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h-43-int clip_tbl_show(struct seq_file *seq, void *v);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h:44:int cxgb4_update_root_dev_clip(struct net_device *dev);\ndrivers/net/ethernet/chelsio/cxgb4/clip_tbl.h-45-void t4_cleanup_clip_tbl(struct adapter *adap);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_common.c-5-\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_common.c:6:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_common.c-7-#include \"cudbg_if.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-9-#include \"t4_regs.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c:10:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c:11:#include \"cxgb4_cudbg.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-12-#include \"cudbg_if.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-16-#include \"cudbg_zlib.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c:17:#include \"cxgb4_tc_mqprio.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c-18-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c-7-\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c:8:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c-9-#include \"cudbg_if.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-58-#include \"t4_chip_type.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:59:#include \"cxgb4_uld.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-60-#include \"t4fw_api.h\"\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=142=enum {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-148-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:149:enum cxgb4_netdev_tls_ops {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-150-\tCXGB4_TLSDEV_OPS  = 1,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-153-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:154:struct cxgb4_bootcfg_data {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-155-\t__le16 signature;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-158-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:159:struct cxgb4_pcir_data {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-160-\t__le32 signature;\t/* Signature. The string \"PCIR\" */\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-174-/* BIOS boot headers */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:175:struct cxgb4_pci_exp_rom_header {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-176-\t__le16 signature;\t/* ROM Signature. Should be 0xaa55 */\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=196=enum {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-199-\tBOOT_SIGNATURE = 0xaa55,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:200:\tBOOT_MIN_SIZE = sizeof(struct cxgb4_pci_exp_rom_header),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-201-\tBOOT_MAX_SIZE = 1024 * BOOT_SIZE_INC,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=525=static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-537-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:538:struct cxgb4_ethtool_lb_test {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-539-\tstruct completion completion;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=551=struct trace_params {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-561-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:562:struct cxgb4_fw_data {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-563-\t__be32 signature;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=645=struct sge_rspq;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-646-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:647:#include \"cxgb4_dcb.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-648-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-649-#ifdef CONFIG_CHELSIO_T4_FCOE\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:650:#include \"cxgb4_fcoe.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-651-#endif /* CONFIG_CHELSIO_T4_FCOE */\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=653=struct port_info {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-696-\tstruct mutex vi_mirror_mutex; /* Sync access to Mirror VI info */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:697:\tstruct cxgb4_ethtool_lb_test ethtool_lb;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-698-};\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=906=struct sge_uld_txq_info {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-912-/* struct to maintain ULD list to reallocate ULD resources on hotplug */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:913:struct cxgb4_uld_list {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:914:\tstruct cxgb4_uld_info uld_info;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-915-\tstruct list_head list_node;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:916:\tenum cxgb4_uld uld_type;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-917-};\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1085=struct mps_entries_ref {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1092-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1093:struct cxgb4_ethtool_filter_info {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1094-\tu32 *loc_array; /* Array holding the actual TIDs set to filters */\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1098-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1099:struct cxgb4_ethtool_filter {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1100-\tu32 nentries; /* Adapter wide number of supported filters */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1101:\tstruct cxgb4_ethtool_filter_info *port; /* Per port entry */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1102-};\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1104=struct adapter {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1122-\tstruct adapter_params params;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1123:\tstruct cxgb4_virt_res vres;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1124-\tunsigned int swintr;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1148-\tstruct smt_data *smt;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1149:\tstruct cxgb4_uld_info *uld;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1150-\tvoid *uld_handle[CXGB4_ULD_MAX];\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1196-\t/* TC u32 offload */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1197:\tstruct cxgb4_tc_u32_table *tc_u32;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1198-\tstruct chcr_ktls chcr_ktls;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1225-\t/* TC MQPRIO offload */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1226:\tstruct cxgb4_tc_mqprio *tc_mqprio;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1227-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1228-\t/* TC MATCHALL classifier offload */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1229:\tstruct cxgb4_tc_matchall *tc_matchall;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1230-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1231-\t/* Ethtool n-tuple */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1232:\tstruct cxgb4_ethtool_filter *ethtool_filters;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1233-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1597=static inline unsigned int qtimer_val(const struct adapter *adap,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1605-/* driver name used for ethtool_drvinfo */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1606:extern char cxgb4_driver_name[];\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1607-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1613=netdev_tx_t t4_start_xmit(struct sk_buff *skb, struct net_device *dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1614:int cxgb4_selftest_lb_pkt(struct net_device *netdev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1615-int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1641=int t4_sge_eth_txq_egress_update(struct adapter *adap, struct sge_eth_txq *q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1642-\t\t\t\t int maxreclaim);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1643:void cxgb4_set_ethtool_ops(struct net_device *netdev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1644:int cxgb4_write_rss(const struct port_info *pi, const u16 *queues);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1645-enum cpl_tx_tnl_lso_type cxgb_encap_offload_supported(struct sk_buff *skb);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1741=static inline int hash_mac_addr(const u8 *addr)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1751-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1752:int cxgb4_set_rspq_intr_params(struct sge_rspq *q, unsigned int us,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1753-\t\t\t       unsigned int cnt);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=1754=static inline void init_rspq(struct adapter *adap, struct sge_rspq *q,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1758-\tq-\u003eadap = adap;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:1759:\tcxgb4_set_rspq_intr_params(q, us, cnt);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-1760-\tq-\u003eiqe_len = iqe_size;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=2100=void free_tx_desc(struct adapter *adap, struct sge_txq *q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2101-\t\t  unsigned int n, bool unmap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2102:void cxgb4_eosw_txq_free_desc(struct adapter *adap, struct sge_eosw_txq *txq,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2103-\t\t\t      u32 ndesc);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2104:int cxgb4_ethofld_send_flowc(struct net_device *dev, u32 eotid, u32 tc);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2105:void cxgb4_ethofld_restart(struct tasklet_struct *t);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2106:int cxgb4_ethofld_rx_handler(struct sge_rspq *q, const __be64 *rsp,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2107-\t\t\t     const struct pkt_gl *si);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h=2108=void free_txq(struct adapter *adap, struct sge_txq *q);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2109:void cxgb4_reclaim_completed_tx(struct adapter *adap,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2110-\t\t\t\tstruct sge_txq *q, bool unmap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2111:int cxgb4_map_skb(struct device *dev, const struct sk_buff *skb,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2112-\t\t  dma_addr_t *addr);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2113:void cxgb4_inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2114-\t\t\t void *pos);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2115:void cxgb4_write_sgl(const struct sk_buff *skb, struct sge_txq *q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2116-\t\t     struct ulptx_sgl *sgl, u64 *end, unsigned int start,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2117-\t\t     const dma_addr_t *addr);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2118:void cxgb4_write_partial_sgl(const struct sk_buff *skb, struct sge_txq *q,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2119-\t\t\t     struct ulptx_sgl *sgl, u64 *end,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2120-\t\t\t     const dma_addr_t *addr, u32 start, u32 send_len);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2121:void cxgb4_ring_tx_db(struct adapter *adap, struct sge_txq *q, int n);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2122-int t4_set_vlan_acl(struct adapter *adap, unsigned int mbox, unsigned int vf,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2123-\t\t    u16 vlan);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2124:int cxgb4_dcb_enabled(const struct net_device *dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2125-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2126:int cxgb4_thermal_init(struct adapter *adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2127:int cxgb4_thermal_remove(struct adapter *adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2128:int cxgb4_set_msix_aff(struct adapter *adap, unsigned short vec,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2129-\t\t       cpumask_var_t *aff_mask, int idx);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2130:void cxgb4_clear_msix_aff(unsigned short vec, cpumask_var_t aff_mask);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2131-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2132:int cxgb4_change_mac(struct port_info *pi, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2133-\t\t     int *tcam_idx, const u8 *addr,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2135-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2136:int cxgb4_alloc_mac_filt(struct adapter *adap, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2137-\t\t\t bool free, unsigned int naddr,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2139-\t\t\t u64 *hash, bool sleep_ok);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2140:int cxgb4_free_mac_filt(struct adapter *adap, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2141-\t\t\tunsigned int naddr, const u8 **addr, bool sleep_ok);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2142:int cxgb4_init_mps_ref_entries(struct adapter *adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2143:void cxgb4_free_mps_ref_entries(struct adapter *adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2144:int cxgb4_update_mac_filt(struct port_info *pi, unsigned int viid,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2145-\t\t\t  int *tcam_idx, const u8 *addr,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2146-\t\t\t  bool persistent, u8 *smt_idx);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2147:int cxgb4_get_msix_idx_from_bmap(struct adapter *adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2148:void cxgb4_free_msix_idx_in_bmap(struct adapter *adap, u32 msix_idx);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2149:void cxgb4_enable_rx(struct adapter *adap, struct sge_rspq *q);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2150:void cxgb4_quiesce_rx(struct sge_rspq *q);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2151:int cxgb4_port_mirror_alloc(struct net_device *dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2152:void cxgb4_port_mirror_free(struct net_device *dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2153-#if IS_ENABLED(CONFIG_CHELSIO_TLS_DEVICE)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h:2154:int cxgb4_set_ktls_feature(struct adapter *adap, bool enable);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4.h-2155-#endif\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-6-#include \"t4_regs.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:7:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:8:#include \"cxgb4_cudbg.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-9-#include \"cudbg_zlib.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-10-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:11:static const struct cxgb4_collect_entity cxgb4_collect_mem_dump[] = {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-12-\t{ CUDBG_EDC0, cudbg_collect_edc0_meminfo },\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-18-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:19:static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-20-\t{ CUDBG_MBOX_LOG, cudbg_collect_mbox_log },\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-68-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:69:static const struct cxgb4_collect_entity cxgb4_collect_flash_dump[] = {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-70-\t{ CUDBG_FLASH, cudbg_collect_flash },\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-72-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:73:u32 cxgb4_get_dump_length(struct adapter *adap, u32 flag)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-74-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-79-\tif (flag \u0026 CXGB4_ETH_DUMP_HW) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:80:\t\tfor (i = 0; i \u003c ARRAY_SIZE(cxgb4_collect_hw_dump); i++) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:81:\t\t\tentity = cxgb4_collect_hw_dump[i].entity;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-82-\t\t\tlen += cudbg_get_entity_length(adap, entity);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-86-\tif (flag \u0026 CXGB4_ETH_DUMP_MEM) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:87:\t\tfor (i = 0; i \u003c ARRAY_SIZE(cxgb4_collect_mem_dump); i++) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:88:\t\t\tentity = cxgb4_collect_mem_dump[i].entity;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-89-\t\t\tlen += cudbg_get_entity_length(adap, entity);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-103-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:104:static void cxgb4_cudbg_collect_entity(struct cudbg_init *pdbg_init,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-105-\t\t\t\t       struct cudbg_buffer *dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:106:\t\t\t\t       const struct cxgb4_collect_entity *e_arr,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-107-\t\t\t\t       u32 arr_size, void *buf, u32 *tot_size)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-114-\tfor (i = 0; i \u003c arr_size; i++) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:115:\t\tconst struct cxgb4_collect_entity *e = \u0026e_arr[i];\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-116-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c=158=static void cudbg_free_compress_buff(struct cudbg_init *pdbg_init)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-162-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:163:int cxgb4_cudbg_collect(struct adapter *adap, void *buf, u32 *buf_size,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-164-\t\t\tu32 flag)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-219-\tif (flag \u0026 CXGB4_ETH_DUMP_HW)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:220:\t\tcxgb4_cudbg_collect_entity(\u0026cudbg_init, \u0026dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:221:\t\t\t\t\t   cxgb4_collect_hw_dump,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:222:\t\t\t\t\t   ARRAY_SIZE(cxgb4_collect_hw_dump),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-223-\t\t\t\t\t   buf,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-226-\tif (flag \u0026 CXGB4_ETH_DUMP_MEM)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:227:\t\tcxgb4_cudbg_collect_entity(\u0026cudbg_init, \u0026dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:228:\t\t\t\t\t   cxgb4_collect_mem_dump,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:229:\t\t\t\t\t   ARRAY_SIZE(cxgb4_collect_mem_dump),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-230-\t\t\t\t\t   buf,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-233-\tif (flag \u0026 CXGB4_ETH_DUMP_FLASH)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:234:\t\tcxgb4_cudbg_collect_entity(\u0026cudbg_init, \u0026dbg_buff,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:235:\t\t\t\t\t   cxgb4_collect_flash_dump,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:236:\t\t\t\t\t   ARRAY_SIZE(cxgb4_collect_flash_dump),\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-237-\t\t\t\t\t   buf,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-248-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:249:void cxgb4_init_ethtool_dump(struct adapter *adapter)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-250-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-255-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:256:static int cxgb4_cudbg_vmcoredd_collect(struct vmcoredd_data *data, void *buf)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-257-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-260-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:261:\treturn cxgb4_cudbg_collect(adap, buf, \u0026len, CXGB4_ETH_DUMP_ALL);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-262-}\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-263-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:264:int cxgb4_cudbg_vmcore_add_dump(struct adapter *adap)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-265-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-274-\tsnprintf(data-\u003edump_name, sizeof(data-\u003edump_name), \"%s_%s\",\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:275:\t\t cxgb4_driver_name, adap-\u003ename);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c:276:\tdata-\u003evmcoredd_callback = cxgb4_cudbg_vmcoredd_collect;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c-277-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h=17=typedef int (*cudbg_collect_callback_t)(struct cudbg_init *pdbg_init,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-20-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:21:struct cxgb4_collect_entity {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-22-\tenum cudbg_dbg_entity_type entity;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h=26=enum CXGB4_ETHTOOL_DUMP_FLAGS {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-34-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:35:u32 cxgb4_get_dump_length(struct adapter *adap, u32 flag);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:36:int cxgb4_cudbg_collect(struct adapter *adap, void *buf, u32 *buf_size,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-37-\t\t\tu32 flag);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:38:void cxgb4_init_ethtool_dump(struct adapter *adapter);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h:39:int cxgb4_cudbg_vmcore_add_dump(struct adapter *adap);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h-40-#endif /* __CXGB4_CUDBG_H__ */\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-8-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:9:#include \"cxgb4.h\"\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-10-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c=13=const char * const dcb_ver_array[] = {\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-21-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:22:static inline bool cxgb4_dcb_state_synced(enum cxgb4_dcb_state state)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-23-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-32- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:33:void cxgb4_dcb_state_init(struct net_device *dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-34-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-47-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:48:void cxgb4_dcb_version_init(struct net_device *dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-49-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-58-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:59:static void cxgb4_dcb_cleanup_apps(struct net_device *dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-60-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-98- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:99:void cxgb4_dcb_reset(struct net_device *dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-100-{\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:101:\tcxgb4_dcb_cleanup_apps(dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:102:\tcxgb4_dcb_state_init(dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-103-}\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-109- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:110:static inline void cxgb4_dcb_update_support(struct port_dcb_info *dcb)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-111-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-124- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:125:void cxgb4_dcb_state_fsm(struct net_device *dev,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:126:\t\t\t enum cxgb4_dcb_state_input transition_to)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-127-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-130-\tstruct adapter *adap = pi-\u003eadapter;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:131:\tenum cxgb4_dcb_state current_state = dcb-\u003estate;\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-132-\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-180-\t\t\t */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:181:\t\t\tcxgb4_dcb_update_support(dcb);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-182-\t\t}\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-219-\t\t\t */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:220:\t\t\tcxgb4_dcb_reset(dev);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-221-\t\t\tdcb-\u003estate = CXGB4_DCB_STATE_FW_INCOMPLETE;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-261-bad_state_input:\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:262:\tdev_err(adap-\u003epdev_dev, \"cxgb4_dcb_state_fsm: illegal input symbol %d\\n\",\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-263-\t\ttransition_to);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-266-bad_state_transition:\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:267:\tdev_err(adap-\u003epdev_dev, \"cxgb4_dcb_state_fsm: bad state transition, state = %d, input = %d\\n\",\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-268-\t\tcurrent_state, transition_to);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-272- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:273:void cxgb4_dcb_handle_fw_update(struct adapter *adap,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-274-\t\t\t\tconst struct fw_port_cmd *pcmd)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-287-\tif (dcb_type == FW_PORT_DCB_TYPE_CONTROL) {\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:288:\t\tenum cxgb4_dcb_state_input input =\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-289-\t\t\t((pcmd-\u003eu.dcb.control.all_syncd_pkd \u0026\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-312-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:313:\t\tcxgb4_dcb_state_fsm(dev, input);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-314-\t\treturn;\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-410- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:411:static u8 cxgb4_getstate(struct net_device *dev)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-412-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-419- */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:420:static u8 cxgb4_setstate(struct net_device *dev, u8 enabled)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-421-{\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-437-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:438:static void cxgb4_getpgtccfg(struct net_device *dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-439-\t\t\t     u8 *prio_type, u8 *pgid, u8 *bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-481-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:482:static void cxgb4_getpgtccfg_tx(struct net_device *dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-483-\t\t\t\tu8 *prio_type, u8 *pgid, u8 *bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-486-\t/* tc 0 is written at MSB position */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:487:\treturn cxgb4_getpgtccfg(dev, (7 - tc), prio_type, pgid, bw_per,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-488-\t\t\t\tup_tc_map, 1);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-491-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:492:static void cxgb4_getpgtccfg_rx(struct net_device *dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-493-\t\t\t\tu8 *prio_type, u8 *pgid, u8 *bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-496-\t/* tc 0 is written at MSB position */\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:497:\treturn cxgb4_getpgtccfg(dev, (7 - tc), prio_type, pgid, bw_per,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-498-\t\t\t\tup_tc_map, 0);\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-500-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:501:static void cxgb4_setpgtccfg_tx(struct net_device *dev, int tc,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-502-\t\t\t\tu8 prio_type, u8 pgid, u8 bw_per,\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-563-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:564:static void cxgb4_getpgbwgcfg(struct net_device *dev, int pgid, u8 *bw_per,\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-565-\t\t\t      int local)\n--\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-587-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:588:static void cxgb4_getpgbwgcfg_tx(struct net_device *dev, int pgid, u8 *bw_per)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-589-{\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:590:\treturn cxgb4_getpgbwgcfg(dev, pgid, bw_per, 1);\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-591-}\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-592-\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c:593:static void cxgb4_getpgbwgcfg_rx(struct net_device *dev, int pgid, u8 *bw_per)\ndrivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c-594-{\n\n"
}