AI Trajectory

null

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The patch only adds a dev_warn and a comment. It does not functionally alter the execution flow or modify any state.",
  "WorthFuzzing": false
}

null

{
  "PatchDiff": "commit 4de8788a413027a227a74246b0695a88458d9218\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate:   Mon Jul 13 19:32:41 2026 +0000\n\n    syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c\nindex 91b5947dae0600..b217c1c19810ab 100644\n--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c\n+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c\n@@ -730,6 +730,9 @@ static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)\n \t\t\t*features \u0026= ~BIT_ULL(NPC_OUTER_VID);\n \n \t/* Allow extracting SPI field from AH and ESP headers at same offset */\n+\tif (npc_check_overlap(rvu, blkaddr, NPC_IPSEC_SPI, 0, intf))\n+\t\tdev_warn(rvu-\u003edev, \"Overlap detected the field NPC_IPSEC_SPI\\n\");\n+\t/* Set SPI flag only if AH/ESP and IPSEC_SPI are in the key */\n \tif (npc_is_field_present(rvu, NPC_IPSEC_SPI, intf) \u0026\u0026\n \t    (*features \u0026 (BIT_ULL(NPC_IPPROTO_ESP) | BIT_ULL(NPC_IPPROTO_AH))))\n \t\t*features |= BIT_ULL(NPC_IPSEC_SPI);\n"
}

gemini-3.1-pro-preview

null

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The patch only adds a dev_warn and a comment. It does not functionally alter the execution flow or modify any state.",
  "WorthFuzzing": false
}

You are an expert Linux kernel maintainer.
Your job is to review a provided patch series and determine
if it makes functional changes to the kernel that should be fuzzed.

IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in
your workspace. Do NOT rely on your internal knowledge of the kernel. You must actively
use your code access tools to examine the actual source code and confirm any assumptions.

Return WorthFuzzing=false if the patch only contains:
- Modifications to Documentation/, Kconfig files, or code comments.
- Purely decorative changes, such as logging (e.g., pr_err, printk) or tracepoints.
- Changes to numeric constants or macros that do not functionally alter execution flow.
- Code paths that are impossible to reach in virtualized environments like GCE or QEMU,
even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim).

If it modifies reachable core kernel logic, drivers, or architectures, use your code search
tools to verify the code can be executed, then return WorthFuzzing=true.

When returning WorthFuzzing=true, you MUST ALSO:
1. Extract any specific kernel functions that should be heavily fuzzed into FocusSymbols.
   Avoid listing generic hot-path functions to prevent skewed test distributions.
2. Identify any specific CONFIG_ options required to properly test this new/modified feature.
   Go and look into the Kconfig files and check for ifdefs around the code, do not make assumptions.
   Do not list too generic configs (we already have them enabled). Only list those that
   specifically cover the modified code. List them in the EnableConfigs output array,
   and DO NOT add a 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4").
Prefer calling several tools at the same time to save round-trips.


Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.

For your convenience, here is the diff of the changes:
commit 4de8788a413027a227a74246b0695a88458d9218
Author: syz-cluster <triage@syzkaller.com>
Date:   Mon Jul 13 19:32:41 2026 +0000

    syz-cluster: applied patch under review

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
index 91b5947dae0600..b217c1c19810ab 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
@@ -730,6 +730,9 @@ static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)
 			*features &= ~BIT_ULL(NPC_OUTER_VID);
 
 	/* Allow extracting SPI field from AH and ESP headers at same offset */
+	if (npc_check_overlap(rvu, blkaddr, NPC_IPSEC_SPI, 0, intf))
+		dev_warn(rvu->dev, "Overlap detected the field NPC_IPSEC_SPI\n");
+	/* Set SPI flag only if AH/ESP and IPSEC_SPI are in the key */
 	if (npc_is_field_present(rvu, NPC_IPSEC_SPI, intf) &&
 	    (*features & (BIT_ULL(NPC_IPPROTO_ESP) | BIT_ULL(NPC_IPPROTO_AH))))
 		*features |= BIT_ULL(NPC_IPSEC_SPI);

gemini-3.1-pro-preview

null

null

							input: 2015
							output: 51
							thoughts: 419
						

**Analyzing a Patch to rvu_npc_fs.c**

Okay, so I'm looking at this patch for `drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c`. It seems straightforward enough. It introduces a `dev_warn` call within a conditional statement. Specifically, the code now checks for an overlap involving `NPC_IPSEC_SPI` using the `npc_check_overlap` function. If overlap is detected, it triggers a warning message: "Overlap detected the field NPC_IPSEC_SPI". The code also adds a comment explaining the purpose of setting the SPI flag.

Alright, let me just double-check that snippet again. Yep, I'm reading it correctly. We're just adding a warning if `npc_check_overlap` returns true, meaning it's detected an overlap between `NPC_IPSEC_SPI` and another field. And then, regardless, it sets the SPI flag if `NPC_IPSEC_SPI` is present AND AH/ESP are present as features.

My main concern here is always side effects, though. So, it's good practice to make sure the function `npc_check_overlap` is safe to call and doesn't do anything else that could be problematic. I'll need to review the implementation of `npc_check_overlap` just to be completely sure.

{
  "Expression": "npc_check_overlap",
  "PathPrefix": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c"
}

{
  "Output": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c=167=static void npc_set_layer_mdata(struct rvu *rvu,\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-185-\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:186:static bool npc_check_overlap_fields(struct npc_key_field *input1,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-187-\t\t\t\t     struct npc_key_field *input2,\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-211- */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:212:static bool npc_check_overlap(struct rvu *rvu, int blkaddr,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-213-\t\t\t      enum key_fields type, u8 start_lid, u8 intf)\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-258-\t\t\t\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:259:\t\t\t\tif (npc_check_overlap_fields(dummy, input, kws))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-260-\t\t\t\t\treturn true;\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-290-\t\t\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:291:\t\t\tif (npc_check_overlap_fields(dummy, input,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-292-\t\t\t\t\t\t     NPC_KWS_IN_KEY_SZ_8))\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c=300=static bool npc_check_field(struct rvu *rvu, int blkaddr, enum key_fields type,\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-303-\tif (!npc_is_field_present(rvu, type, intf) ||\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:304:\t    npc_check_overlap(rvu, blkaddr, type, 0, intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-305-\t\treturn false;\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c=441=static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf)\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-531-\tstart_lid = key_fields[NPC_ETYPE].layer_mdata.lid + 1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:532:\tif (npc_check_overlap(rvu, blkaddr, NPC_ETYPE, start_lid, intf)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-533-\t\tdev_err(rvu-\u003edev, \"mkex: Ethertype is overwritten by higher layers.\\n\");\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-561-\tstart_lid = key_fields[NPC_OUTER_VID].layer_mdata.lid + 1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:562:\tif (npc_check_overlap(rvu, blkaddr, NPC_OUTER_VID, start_lid, intf)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-563-\t\tdev_err(rvu-\u003edev, \"mkex: Outer vlan tci is overwritten by higher layers.\\n\");\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c=683=static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-732-\t/* Allow extracting SPI field from AH and ESP headers at same offset */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:733:\tif (npc_check_overlap(rvu, blkaddr, NPC_IPSEC_SPI, 0, intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-734-\t\tdev_warn(rvu-\u003edev, \"Overlap detected the field NPC_IPSEC_SPI\\n\");\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c=836=static int npc_scan_verify_kex(struct rvu *rvu, int blkaddr)\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-853-\t/* check that none of the fields overwrite channel */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:854:\tif (npc_check_overlap(rvu, blkaddr, NPC_CHAN, 0, NIX_INTF_RX)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-855-\t\tdev_err(rvu-\u003edev, \"Channel cannot be overwritten\\n\");\n"
}

gemini-3.1-pro-preview

null

null

							input: 4433
							output: 54
							thoughts: 13
						

Here's my attempt at summarizing the thought process, tailored for an expert audience:

**Diving into `npc_check_overlap`**

Okay, time to get my hands dirty. Let's start by digging into the implementation of `npc_check_overlap`. I need to refresh my memory on exactly how this routine handles collision detection for non-player characters. I'm especially interested in understanding the nuances of its bounding box handling and any optimization strategies employed. Thinking back, I seem to remember we had some issues with certain edge cases with very large or oddly-shaped NPCs, so I want to pay attention to that. I'll need to analyze the code logic carefully, looking for potential bottlenecks or areas where further refinement might yield performance gains. Specific questions I have are related to memory allocation within the function, use of spatial indexing (if any), and how it deals with dynamic objects versus static world geometry. I'll be looking for clever tricks, any use of SIMD instructions, and whether it's using a broad-phase/narrow-phase collision detection approach. Let's see if the code comments are helpful – good comments are worth their weight in gold!

{
  "File": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c",
  "FirstLine": 210,
  "LineCount": 50
}

{
  "Contents": " 210:\t * needs to be checked.\n 211:\t */\n 212:\tstatic bool npc_check_overlap(struct rvu *rvu, int blkaddr,\n 213:\t\t\t\t      enum key_fields type, u8 start_lid, u8 intf)\n 214:\t{\n 215:\t\tstruct npc_mcam *mcam = \u0026rvu-\u003ehw-\u003emcam;\n 216:\t\tstruct npc_key_field *dummy, *input;\n 217:\t\tint start_kwi, offset;\n 218:\t\tu8 nr_bits, lid, lt, ld;\n 219:\t\tint extr, kws;\n 220:\t\tu64 cfg;\n 221:\t\n 222:\t\tdummy = \u0026mcam-\u003erx_key_fields[NPC_UNKNOWN];\n 223:\t\tinput = \u0026mcam-\u003erx_key_fields[type];\n 224:\t\n 225:\t\tif (is_npc_intf_tx(intf)) {\n 226:\t\t\tdummy = \u0026mcam-\u003etx_key_fields[NPC_UNKNOWN];\n 227:\t\t\tinput = \u0026mcam-\u003etx_key_fields[type];\n 228:\t\t}\n 229:\t\n 230:\t\tkws = NPC_KWS_IN_KEY_SZ_7;\n 231:\t\n 232:\t\tif (is_cn20k(rvu-\u003epdev))\n 233:\t\t\tgoto skip_cn10k_config;\n 234:\t\n 235:\t\tfor (lid = start_lid; lid \u003c NPC_MAX_LID; lid++) {\n 236:\t\t\tfor (lt = 0; lt \u003c NPC_MAX_LT; lt++) {\n 237:\t\t\t\tfor (ld = 0; ld \u003c NPC_MAX_LD; ld++) {\n 238:\t\t\t\t\tcfg = rvu_read64(rvu, blkaddr,\n 239:\t\t\t\t\t\t\t NPC_AF_INTFX_LIDX_LTX_LDX_CFG\n 240:\t\t\t\t\t\t\t (intf, lid, lt, ld));\n 241:\t\t\t\t\tif (!FIELD_GET(NPC_LDATA_EN, cfg))\n 242:\t\t\t\t\t\tcontinue;\n 243:\t\t\t\t\tmemset(dummy, 0, sizeof(struct npc_key_field));\n 244:\t\t\t\t\tnpc_set_layer_mdata(rvu, mcam, NPC_UNKNOWN,\n 245:\t\t\t\t\t\t\t    cfg, lid, lt, intf);\n 246:\t\t\t\t\t/* exclude input */\n 247:\t\t\t\t\tif (npc_is_same(input, dummy))\n 248:\t\t\t\t\t\tcontinue;\n 249:\t\t\t\t\tstart_kwi = dummy-\u003elayer_mdata.key / 8;\n 250:\t\t\t\t\toffset = (dummy-\u003elayer_mdata.key * 8) % 64;\n 251:\t\t\t\t\tnr_bits = dummy-\u003elayer_mdata.len * 8;\n 252:\t\t\t\t\t/* form KW masks */\n 253:\t\t\t\t\tnpc_set_kw_masks(rvu, mcam, NPC_UNKNOWN,\n 254:\t\t\t\t\t\t\t nr_bits, start_kwi,\n 255:\t\t\t\t\t\t\t offset, intf);\n 256:\t\t\t\t\t/* check any input field bits falls in any\n 257:\t\t\t\t\t * other field bits.\n 258:\t\t\t\t\t */\n 259:\t\t\t\t\tif (npc_check_overlap_fields(dummy, input, kws))\n"
}

gemini-3.1-pro-preview

null

null

							input: 5632
							output: 54
							thoughts: 223
						

**Analyzing the Potential Impact of a Network Processor Check**

Okay, so I'm looking at this code and, initially, I see that `npc_check_overlap` appears to be a pure read operation. It looks at some registers, checks for an overlap, and spits back a boolean. The patch itself just *adds* a warning based on the return of this function: `dev_warn`. No changes to the program flow, no state modifications directly. Essentially, it's just an extra debugging tool, alerting us to a potential overlap in the configuration of the network processor.

However... I need to be *sure*. My experience tells me not to trust anything implicitly, especially when dealing with hardware-level interactions. I'm going to quickly glance at `npc_set_layer_mdata` and `npc_set_kw_masks`. They seem relevant given the context of setting up hardware configurations. It’s possible those functions, which *do* write, might call `npc_check_overlap` internally, creating a hidden side effect or dependence. I'm confident that the code *as presented* has no side effects, but I need to make sure this is true in the entire program.

{
  "File": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c",
  "FirstLine": 167,
  "LineCount": 40
}

{
  "Contents": " 167:\tstatic void npc_set_layer_mdata(struct rvu *rvu,\n 168:\t\t\t\t\tstruct npc_mcam *mcam, enum key_fields type,\n 169:\t\t\t\t\tu64 cfg, u8 lid, u8 lt, u8 intf)\n 170:\t{\n 171:\t\tstruct npc_key_field *input = \u0026mcam-\u003erx_key_fields[type];\n 172:\t\n 173:\t\tif (is_npc_intf_tx(intf))\n 174:\t\t\tinput = \u0026mcam-\u003etx_key_fields[type];\n 175:\t\n 176:\t\tinput-\u003elayer_mdata.hdr = FIELD_GET(NPC_HDR_OFFSET, cfg);\n 177:\t\tinput-\u003elayer_mdata.key = FIELD_GET(NPC_KEY_OFFSET, cfg);\n 178:\t\tif (is_cn20k(rvu-\u003epdev))\n 179:\t\t\tinput-\u003elayer_mdata.len = FIELD_GET(NPC_CN20K_BYTESM, cfg) + 1;\n 180:\t\telse\n 181:\t\t\tinput-\u003elayer_mdata.len = FIELD_GET(NPC_BYTESM, cfg) + 1;\n 182:\t\tinput-\u003elayer_mdata.ltype = lt;\n 183:\t\tinput-\u003elayer_mdata.lid = lid;\n 184:\t}\n 185:\t\n 186:\tstatic bool npc_check_overlap_fields(struct npc_key_field *input1,\n 187:\t\t\t\t\t     struct npc_key_field *input2,\n 188:\t\t\t\t\t     int max_kw)\n 189:\t{\n 190:\t\tint kwi;\n 191:\t\n 192:\t\t/* Fields with same layer id and different ltypes are mutually\n 193:\t\t * exclusive hence they can be overlapped\n 194:\t\t */\n 195:\t\tif (input1-\u003elayer_mdata.lid == input2-\u003elayer_mdata.lid \u0026\u0026\n 196:\t\t    input1-\u003elayer_mdata.ltype != input2-\u003elayer_mdata.ltype)\n 197:\t\t\treturn false;\n 198:\t\n 199:\t\tfor (kwi = 0; kwi \u003c max_kw; kwi++) {\n 200:\t\t\tif (input1-\u003ekw_mask[kwi] \u0026 input2-\u003ekw_mask[kwi])\n 201:\t\t\t\treturn true;\n 202:\t\t}\n 203:\t\n 204:\t\treturn false;\n 205:\t}\n 206:\t\n"
}

gemini-3.1-pro-preview

null

null

							input: 6850
							output: 72
							thoughts: 198
						

**Analyzing the Patch's Impact**

Okay, so looking at this code, `npc_set_layer_mdata` is modifying `input`, and that `input` is actually a pointer to `mcam->rx_key_fields[type]`. Then I see in `npc_check_overlap`, that `type` is set to `NPC_UNKNOWN` for the `dummy` variable. Ah, right, `NPC_UNKNOWN` is that temporary calculation field, it's just a scratchpad.

So, in effect, this means `npc_check_overlap` is modifying `mcam->rx_key_fields[NPC_UNKNOWN]`. It's not modifying any critical data structures or directly influencing the driver's execution path or the hardware state. This `dummy` field is just for temporary calculations during overlap checking, and the code only uses it internally.

Got it! The patch's impact is minimal, it's really just adding a `dev_warn`. Good, I'll confirm that this doesn't introduce any functional changes beyond that warning. No worries here, this looks fine.

{
  "Expression": "npc_check_overlap\\(rvu, blkaddr, NPC_IPSEC_SPI, 0, intf\\)",
  "PathPrefix": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c"
}

{
  "Output": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c=683=static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)\n--\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-732-\t/* Allow extracting SPI field from AH and ESP headers at same offset */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:733:\tif (npc_check_overlap(rvu, blkaddr, NPC_IPSEC_SPI, 0, intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c-734-\t\tdev_warn(rvu-\u003edev, \"Overlap detected the field NPC_IPSEC_SPI\\n\");\n"
}

gemini-3.1-pro-preview

null

null

							input: 7592
							output: 47
							thoughts: 43
						

Okay, here's my take on those thoughts, framed as my own:

**Patch Assessment and Fuzzing Decision**

Alright, so the patch in question *only* introduces a warning. It's essentially a heads-up, a potential heads-up at runtime. Crucially, it doesn't actually *change* how the code executes. No branch instructions, no data manipulation, nothing that fundamentally alters the program's behavior. Given that, the immediate assessment is WorthFuzzing = false. It's not worth the effort of attempting to fuzz, as a warning is unlikely to generate the type of state changes or exploitable conditions that fuzzing is designed to uncover.

However, let's just make sure there aren't any sneaky side effects or minor changes that are not immediately obvious. I'll need to go back over the patch with a fine-toothed comb to ensure that nothing else was altered or included by accident.

{
  "Expression": ".*",
  "PathPrefix": "drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c"
}

{
  "Output": "\nFull output is too long, showing 500 out of 2259 lines.\nUse more precise expression if possible.\n\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:1:// SPDX-License-Identifier: GPL-2.0\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:2:/* Marvell RVU Admin Function driver\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:3: *\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:4: * Copyright (C) 2020 Marvell.\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:5: */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:6:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:7:#include \u003clinux/bitfield.h\u003e\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:8:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:9:#include \"rvu_struct.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:10:#include \"rvu_reg.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:11:#include \"rvu.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:12:#include \"npc.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:13:#include \"rvu_npc_fs.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:14:#include \"rvu_npc_hash.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:15:#include \"cn20k/reg.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:16:#include \"cn20k/npc.h\"\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:17:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:18:static const char * const npc_flow_names[] = {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:19:\t[NPC_DMAC]\t= \"dmac\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:20:\t[NPC_SMAC]\t= \"smac\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:21:\t[NPC_ETYPE]\t= \"ether type\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:22:\t[NPC_VLAN_ETYPE_CTAG] = \"vlan ether type ctag\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:23:\t[NPC_VLAN_ETYPE_STAG] = \"vlan ether type stag\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:24:\t[NPC_OUTER_VID]\t= \"outer vlan id\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:25:\t[NPC_INNER_VID]\t= \"inner vlan id\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:26:\t[NPC_TOS]\t= \"tos\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:27:\t[NPC_IPFRAG_IPV4] = \"fragmented IPv4 header \",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:28:\t[NPC_SIP_IPV4]\t= \"ipv4 source ip\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:29:\t[NPC_DIP_IPV4]\t= \"ipv4 destination ip\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:30:\t[NPC_IPFRAG_IPV6] = \"fragmented IPv6 header \",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:31:\t[NPC_SIP_IPV6]\t= \"ipv6 source ip\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:32:\t[NPC_DIP_IPV6]\t= \"ipv6 destination ip\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:33:\t[NPC_IPPROTO_TCP] = \"ip proto tcp\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:34:\t[NPC_IPPROTO_UDP] = \"ip proto udp\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:35:\t[NPC_IPPROTO_SCTP] = \"ip proto sctp\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:36:\t[NPC_IPPROTO_ICMP] = \"ip proto icmp\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:37:\t[NPC_IPPROTO_ICMP6] = \"ip proto icmp6\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:38:\t[NPC_IPPROTO_AH] = \"ip proto AH\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:39:\t[NPC_IPPROTO_ESP] = \"ip proto ESP\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:40:\t[NPC_SPORT_TCP]\t= \"tcp source port\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:41:\t[NPC_DPORT_TCP]\t= \"tcp destination port\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:42:\t[NPC_SPORT_UDP]\t= \"udp source port\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:43:\t[NPC_DPORT_UDP]\t= \"udp destination port\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:44:\t[NPC_SPORT_SCTP] = \"sctp source port\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:45:\t[NPC_DPORT_SCTP] = \"sctp destination port\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:46:\t[NPC_LXMB]\t= \"Mcast/Bcast header \",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:47:\t[NPC_IPSEC_SPI] = \"SPI \",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:48:\t[NPC_MPLS1_LBTCBOS] = \"lse depth 1 label tc bos\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:49:\t[NPC_MPLS1_TTL]     = \"lse depth 1 ttl\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:50:\t[NPC_MPLS2_LBTCBOS] = \"lse depth 2 label tc bos\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:51:\t[NPC_MPLS2_TTL]     = \"lse depth 2 ttl\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:52:\t[NPC_MPLS3_LBTCBOS] = \"lse depth 3 label tc bos\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:53:\t[NPC_MPLS3_TTL]     = \"lse depth 3 ttl\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:54:\t[NPC_MPLS4_LBTCBOS] = \"lse depth 4 label tc bos\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:55:\t[NPC_MPLS4_TTL]     = \"lse depth 4\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:56:\t[NPC_TYPE_ICMP] = \"icmp type\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:57:\t[NPC_CODE_ICMP] = \"icmp code\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:58:\t[NPC_TCP_FLAGS] = \"tcp flags\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:59:\t[NPC_UNKNOWN]\t= \"unknown\",\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:60:};\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:61:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:62:bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:63:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:64:\tstruct npc_mcam *mcam = \u0026rvu-\u003ehw-\u003emcam;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:65:\tu64 mcam_features;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:66:\tu64 unsupported;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:67:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:68:\tmcam_features = is_npc_intf_tx(intf) ? mcam-\u003etx_features : mcam-\u003erx_features;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:69:\tunsupported = (mcam_features ^ features) \u0026 ~mcam_features;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:70:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:71:\t/* Return false if at least one of the input flows is not extracted */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:72:\treturn !unsupported;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:73:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:74:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:75:const char *npc_get_field_name(u8 hdr)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:76:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:77:\tif (hdr \u003e= ARRAY_SIZE(npc_flow_names))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:78:\t\treturn npc_flow_names[NPC_UNKNOWN];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:79:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:80:\treturn npc_flow_names[hdr];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:81:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:82:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:83:/* Compute keyword masks and figure out the number of keywords a field\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:84: * spans in the key.\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:85: */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:86:static void npc_set_kw_masks(struct rvu *rvu, struct npc_mcam *mcam, u8 type,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:87:\t\t\t     u8 nr_bits, int start_kwi, int offset, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:88:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:89:\tstruct npc_key_field *field = \u0026mcam-\u003erx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:90:\tu8 bits_in_kw;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:91:\tint max_kwi;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:92:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:93:\tif (is_cn20k(rvu-\u003epdev)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:94:\t\tif (mcam-\u003ebanks_per_entry == 1)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:95:\t\t\tmax_kwi = 3; /* NPC_MCAM_KEY_X2 */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:96:\t\telse\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:97:\t\t\tmax_kwi = 7; /* NPC_MCAM_KEY_X4 */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:98:\t} else {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:99:\t\tif (mcam-\u003ebanks_per_entry == 1)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:100:\t\t\tmax_kwi = 1; /* NPC_MCAM_KEY_X1 */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:101:\t\telse if (mcam-\u003ebanks_per_entry == 2)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:102:\t\t\tmax_kwi = 3; /* NPC_MCAM_KEY_X2 */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:103:\t\telse\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:104:\t\t\tmax_kwi = 6; /* NPC_MCAM_KEY_X4 */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:105:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:106:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:107:\tif (is_npc_intf_tx(intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:108:\t\tfield = \u0026mcam-\u003etx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:109:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:110:\tif (offset + nr_bits \u003c= 64) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:111:\t\t/* one KW only */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:112:\t\tif (start_kwi \u003e max_kwi)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:113:\t\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:114:\t\tfield-\u003ekw_mask[start_kwi] |= GENMASK_ULL(nr_bits - 1, 0)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:115:\t\t\t\t\t     \u003c\u003c offset;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:116:\t\tfield-\u003enr_kws = 1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:117:\t} else if (offset + nr_bits \u003e 64 \u0026\u0026\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:118:\t\t   offset + nr_bits \u003c= 128) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:119:\t\t/* two KWs */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:120:\t\tif (start_kwi + 1 \u003e max_kwi)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:121:\t\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:122:\t\t/* first KW mask */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:123:\t\tbits_in_kw = 64 - offset;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:124:\t\tfield-\u003ekw_mask[start_kwi] |= GENMASK_ULL(bits_in_kw - 1, 0)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:125:\t\t\t\t\t     \u003c\u003c offset;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:126:\t\t/* second KW mask i.e. mask for rest of bits */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:127:\t\tbits_in_kw = nr_bits + offset - 64;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:128:\t\tfield-\u003ekw_mask[start_kwi + 1] |= GENMASK_ULL(bits_in_kw - 1, 0);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:129:\t\tfield-\u003enr_kws = 2;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:130:\t} else {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:131:\t\t/* three KWs */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:132:\t\tif (start_kwi + 2 \u003e max_kwi)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:133:\t\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:134:\t\t/* first KW mask */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:135:\t\tbits_in_kw = 64 - offset;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:136:\t\tfield-\u003ekw_mask[start_kwi] |= GENMASK_ULL(bits_in_kw - 1, 0)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:137:\t\t\t\t\t     \u003c\u003c offset;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:138:\t\t/* second KW mask */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:139:\t\tfield-\u003ekw_mask[start_kwi + 1] = ~0ULL;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:140:\t\t/* third KW mask i.e. mask for rest of bits */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:141:\t\tbits_in_kw = nr_bits + offset - 128;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:142:\t\tfield-\u003ekw_mask[start_kwi + 2] |= GENMASK_ULL(bits_in_kw - 1, 0);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:143:\t\tfield-\u003enr_kws = 3;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:144:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:145:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:146:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:147:/* Helper function to figure out whether field exists in the key */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:148:static bool npc_is_field_present(struct rvu *rvu, enum key_fields type, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:149:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:150:\tstruct npc_mcam *mcam = \u0026rvu-\u003ehw-\u003emcam;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:151:\tstruct npc_key_field *input;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:152:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:153:\tinput  = \u0026mcam-\u003erx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:154:\tif (is_npc_intf_tx(intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:155:\t\tinput  = \u0026mcam-\u003etx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:156:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:157:\treturn input-\u003enr_kws \u003e 0;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:158:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:159:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:160:static bool npc_is_same(struct npc_key_field *input,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:161:\t\t\tstruct npc_key_field *field)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:162:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:163:\treturn memcmp(\u0026input-\u003elayer_mdata, \u0026field-\u003elayer_mdata,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:164:\t\t     sizeof(struct npc_layer_mdata)) == 0;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:165:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:166:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:167:static void npc_set_layer_mdata(struct rvu *rvu,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:168:\t\t\t\tstruct npc_mcam *mcam, enum key_fields type,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:169:\t\t\t\tu64 cfg, u8 lid, u8 lt, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:170:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:171:\tstruct npc_key_field *input = \u0026mcam-\u003erx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:172:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:173:\tif (is_npc_intf_tx(intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:174:\t\tinput = \u0026mcam-\u003etx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:175:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:176:\tinput-\u003elayer_mdata.hdr = FIELD_GET(NPC_HDR_OFFSET, cfg);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:177:\tinput-\u003elayer_mdata.key = FIELD_GET(NPC_KEY_OFFSET, cfg);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:178:\tif (is_cn20k(rvu-\u003epdev))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:179:\t\tinput-\u003elayer_mdata.len = FIELD_GET(NPC_CN20K_BYTESM, cfg) + 1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:180:\telse\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:181:\t\tinput-\u003elayer_mdata.len = FIELD_GET(NPC_BYTESM, cfg) + 1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:182:\tinput-\u003elayer_mdata.ltype = lt;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:183:\tinput-\u003elayer_mdata.lid = lid;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:184:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:185:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:186:static bool npc_check_overlap_fields(struct npc_key_field *input1,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:187:\t\t\t\t     struct npc_key_field *input2,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:188:\t\t\t\t     int max_kw)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:189:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:190:\tint kwi;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:191:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:192:\t/* Fields with same layer id and different ltypes are mutually\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:193:\t * exclusive hence they can be overlapped\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:194:\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:195:\tif (input1-\u003elayer_mdata.lid == input2-\u003elayer_mdata.lid \u0026\u0026\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:196:\t    input1-\u003elayer_mdata.ltype != input2-\u003elayer_mdata.ltype)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:197:\t\treturn false;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:198:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:199:\tfor (kwi = 0; kwi \u003c max_kw; kwi++) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:200:\t\tif (input1-\u003ekw_mask[kwi] \u0026 input2-\u003ekw_mask[kwi])\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:201:\t\t\treturn true;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:202:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:203:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:204:\treturn false;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:205:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:206:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:207:/* Helper function to check whether given field overlaps with any other fields\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:208: * in the key. Due to limitations on key size and the key extraction profile in\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:209: * use higher layers can overwrite lower layer's header fields. Hence overlap\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:210: * needs to be checked.\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:211: */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:212:static bool npc_check_overlap(struct rvu *rvu, int blkaddr,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:213:\t\t\t      enum key_fields type, u8 start_lid, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:214:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:215:\tstruct npc_mcam *mcam = \u0026rvu-\u003ehw-\u003emcam;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:216:\tstruct npc_key_field *dummy, *input;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:217:\tint start_kwi, offset;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:218:\tu8 nr_bits, lid, lt, ld;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:219:\tint extr, kws;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:220:\tu64 cfg;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:221:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:222:\tdummy = \u0026mcam-\u003erx_key_fields[NPC_UNKNOWN];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:223:\tinput = \u0026mcam-\u003erx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:224:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:225:\tif (is_npc_intf_tx(intf)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:226:\t\tdummy = \u0026mcam-\u003etx_key_fields[NPC_UNKNOWN];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:227:\t\tinput = \u0026mcam-\u003etx_key_fields[type];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:228:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:229:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:230:\tkws = NPC_KWS_IN_KEY_SZ_7;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:231:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:232:\tif (is_cn20k(rvu-\u003epdev))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:233:\t\tgoto skip_cn10k_config;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:234:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:235:\tfor (lid = start_lid; lid \u003c NPC_MAX_LID; lid++) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:236:\t\tfor (lt = 0; lt \u003c NPC_MAX_LT; lt++) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:237:\t\t\tfor (ld = 0; ld \u003c NPC_MAX_LD; ld++) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:238:\t\t\t\tcfg = rvu_read64(rvu, blkaddr,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:239:\t\t\t\t\t\t NPC_AF_INTFX_LIDX_LTX_LDX_CFG\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:240:\t\t\t\t\t\t (intf, lid, lt, ld));\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:241:\t\t\t\tif (!FIELD_GET(NPC_LDATA_EN, cfg))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:242:\t\t\t\t\tcontinue;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:243:\t\t\t\tmemset(dummy, 0, sizeof(struct npc_key_field));\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:244:\t\t\t\tnpc_set_layer_mdata(rvu, mcam, NPC_UNKNOWN,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:245:\t\t\t\t\t\t    cfg, lid, lt, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:246:\t\t\t\t/* exclude input */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:247:\t\t\t\tif (npc_is_same(input, dummy))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:248:\t\t\t\t\tcontinue;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:249:\t\t\t\tstart_kwi = dummy-\u003elayer_mdata.key / 8;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:250:\t\t\t\toffset = (dummy-\u003elayer_mdata.key * 8) % 64;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:251:\t\t\t\tnr_bits = dummy-\u003elayer_mdata.len * 8;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:252:\t\t\t\t/* form KW masks */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:253:\t\t\t\tnpc_set_kw_masks(rvu, mcam, NPC_UNKNOWN,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:254:\t\t\t\t\t\t nr_bits, start_kwi,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:255:\t\t\t\t\t\t offset, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:256:\t\t\t\t/* check any input field bits falls in any\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:257:\t\t\t\t * other field bits.\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:258:\t\t\t\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:259:\t\t\t\tif (npc_check_overlap_fields(dummy, input, kws))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:260:\t\t\t\t\treturn true;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:261:\t\t\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:262:\t\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:263:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:264:\treturn false;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:265:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:266:skip_cn10k_config:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:267:\tfor (extr = 0 ; extr \u003c rvu-\u003ehw-\u003enpc_kex_extr; extr++) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:268:\t\tlid = CN20K_GET_EXTR_LID(intf, extr);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:269:\t\tif (lid \u003c start_lid)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:270:\t\t\tcontinue;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:271:\t\tfor (lt = 0; lt \u003c NPC_MAX_LT; lt++) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:272:\t\t\tcfg = CN20K_GET_EXTR_LT(intf, extr, lt);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:273:\t\t\tif (!FIELD_GET(NPC_LDATA_EN, cfg))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:274:\t\t\t\tcontinue;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:275:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:276:\t\t\tmemset(dummy, 0, sizeof(struct npc_key_field));\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:277:\t\t\tnpc_set_layer_mdata(rvu, mcam, NPC_UNKNOWN, cfg,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:278:\t\t\t\t\t    lid, lt, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:279:\t\t\t/* exclude input */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:280:\t\t\tif (npc_is_same(input, dummy))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:281:\t\t\t\tcontinue;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:282:\t\t\tstart_kwi = dummy-\u003elayer_mdata.key / 8;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:283:\t\t\toffset = (dummy-\u003elayer_mdata.key * 8) % 64;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:284:\t\t\tnr_bits = dummy-\u003elayer_mdata.len * 8;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:285:\t\t\t/* form KW masks */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:286:\t\t\tnpc_set_kw_masks(rvu, mcam, NPC_UNKNOWN, nr_bits,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:287:\t\t\t\t\t start_kwi, offset, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:288:\t\t\t/* check any input field bits falls in any other\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:289:\t\t\t * field bits\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:290:\t\t\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:291:\t\t\tif (npc_check_overlap_fields(dummy, input,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:292:\t\t\t\t\t\t     NPC_KWS_IN_KEY_SZ_8))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:293:\t\t\t\treturn true;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:294:\t\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:295:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:296:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:297:\treturn false;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:298:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:299:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:300:static bool npc_check_field(struct rvu *rvu, int blkaddr, enum key_fields type,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:301:\t\t\t    u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:302:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:303:\tif (!npc_is_field_present(rvu, type, intf) ||\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:304:\t    npc_check_overlap(rvu, blkaddr, type, 0, intf))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:305:\t\treturn false;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:306:\treturn true;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:307:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:308:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:309:static void npc_scan_exact_result(struct rvu *rvu,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:310:\t\t\t\t  struct npc_mcam *mcam, u8 bit_number,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:311:\t\t\t\t  u8 key_nibble, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:312:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:313:\tu8 offset = (key_nibble * 4) % 64; /* offset within key word */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:314:\tu8 kwi = (key_nibble * 4) / 64; /* which word in key */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:315:\tu8 nr_bits = 4; /* bits in a nibble */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:316:\tu8 type;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:317:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:318:\tswitch (bit_number) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:319:\tcase 40 ... 43:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:320:\t\ttype = NPC_EXACT_RESULT;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:321:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:322:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:323:\tdefault:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:324:\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:325:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:326:\tnpc_set_kw_masks(rvu, mcam, type, nr_bits, kwi, offset, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:327:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:328:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:329:static void npc_cn20k_scan_parse_result(struct rvu *rvu, struct npc_mcam *mcam,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:330:\t\t\t\t\tu8 bit_number, u8 key_nibble, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:331:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:332:\tu8 offset = (key_nibble * 4) % 64; /* offset within key word */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:333:\tu8 kwi = (key_nibble * 4) / 64; /* which word in key */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:334:\tu8 nr_bits = 4; /* bits in a nibble */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:335:\tu8 type;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:336:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:337:\tswitch (bit_number) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:338:\tcase 0 ... 2:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:339:\t\ttype = NPC_CHAN;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:340:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:341:\tcase 3:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:342:\t\ttype = NPC_ERRLEV;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:343:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:344:\tcase 4 ... 5:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:345:\t\ttype = NPC_ERRCODE;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:346:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:347:\tcase 6:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:348:\t\ttype = NPC_LXMB;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:349:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:350:\tcase 8:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:351:\t\ttype = NPC_LA;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:352:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:353:\tcase 10:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:354:\t\ttype = NPC_LB;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:355:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:356:\tcase 12:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:357:\t\ttype = NPC_LC;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:358:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:359:\tcase 14:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:360:\t\ttype = NPC_LD;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:361:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:362:\tcase 16:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:363:\t\ttype = NPC_LE;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:364:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:365:\tcase 18:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:366:\t\ttype = NPC_LF;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:367:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:368:\tcase 20:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:369:\t\ttype = NPC_LG;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:370:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:371:\tcase 22:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:372:\t\ttype = NPC_LH;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:373:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:374:\tdefault:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:375:\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:376:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:377:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:378:\tnpc_set_kw_masks(rvu, mcam, type, nr_bits, kwi, offset, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:379:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:380:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:381:static void npc_scan_parse_result(struct rvu *rvu,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:382:\t\t\t\t  struct npc_mcam *mcam, u8 bit_number,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:383:\t\t\t\t  u8 key_nibble, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:384:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:385:\tu8 offset = (key_nibble * 4) % 64; /* offset within key word */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:386:\tu8 kwi = (key_nibble * 4) / 64; /* which word in key */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:387:\tu8 nr_bits = 4; /* bits in a nibble */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:388:\tu8 type;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:389:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:390:\tif (is_cn20k(rvu-\u003epdev)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:391:\t\tnpc_cn20k_scan_parse_result(rvu, mcam, bit_number,\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:392:\t\t\t\t\t    key_nibble, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:393:\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:394:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:395:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:396:\tswitch (bit_number) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:397:\tcase 0 ... 2:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:398:\t\ttype = NPC_CHAN;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:399:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:400:\tcase 3:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:401:\t\ttype = NPC_ERRLEV;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:402:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:403:\tcase 4 ... 5:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:404:\t\ttype = NPC_ERRCODE;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:405:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:406:\tcase 6:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:407:\t\ttype = NPC_LXMB;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:408:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:409:\t/* check for LTYPE only as of now */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:410:\tcase 9:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:411:\t\ttype = NPC_LA;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:412:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:413:\tcase 12:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:414:\t\ttype = NPC_LB;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:415:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:416:\tcase 15:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:417:\t\ttype = NPC_LC;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:418:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:419:\tcase 18:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:420:\t\ttype = NPC_LD;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:421:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:422:\tcase 21:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:423:\t\ttype = NPC_LE;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:424:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:425:\tcase 24:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:426:\t\ttype = NPC_LF;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:427:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:428:\tcase 27:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:429:\t\ttype = NPC_LG;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:430:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:431:\tcase 30:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:432:\t\ttype = NPC_LH;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:433:\t\tbreak;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:434:\tdefault:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:435:\t\treturn;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:436:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:437:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:438:\tnpc_set_kw_masks(rvu, mcam, type, nr_bits, kwi, offset, intf);\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:439:}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:440:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:441:static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:442:{\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:443:\tstruct npc_mcam *mcam = \u0026rvu-\u003ehw-\u003emcam;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:444:\tstruct npc_key_field *key_fields;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:445:\t/* Ether type can come from three layers\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:446:\t * (ethernet, single tagged, double tagged)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:447:\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:448:\tstruct npc_key_field *etype_ether;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:449:\tstruct npc_key_field *etype_tag1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:450:\tstruct npc_key_field *etype_tag2;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:451:\t/* Outer VLAN TCI can come from two layers\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:452:\t * (single tagged, double tagged)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:453:\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:454:\tstruct npc_key_field *vlan_tag1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:455:\tstruct npc_key_field *vlan_tag2;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:456:\t/* Inner VLAN TCI for double tagged frames */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:457:\tstruct npc_key_field *vlan_tag3;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:458:\tu64 *features;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:459:\tint i, max_kw;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:460:\tu8 start_lid;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:461:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:462:\tif (is_cn20k(rvu-\u003epdev))\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:463:\t\tmax_kw = NPC_KWS_IN_KEY_SZ_8;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:464:\telse\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:465:\t\tmax_kw = NPC_KWS_IN_KEY_SZ_7;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:466:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:467:\tkey_fields = mcam-\u003erx_key_fields;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:468:\tfeatures = \u0026mcam-\u003erx_features;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:469:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:470:\tif (is_npc_intf_tx(intf)) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:471:\t\tkey_fields = mcam-\u003etx_key_fields;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:472:\t\tfeatures = \u0026mcam-\u003etx_features;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:473:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:474:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:475:\t/* Handle header fields which can come from multiple layers like\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:476:\t * etype, outer vlan tci. These fields should have same position in\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:477:\t * the key otherwise to install a mcam rule more than one entry is\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:478:\t * needed which complicates mcam space management.\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:479:\t */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:480:\tetype_ether = \u0026key_fields[NPC_ETYPE_ETHER];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:481:\tetype_tag1 = \u0026key_fields[NPC_ETYPE_TAG1];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:482:\tetype_tag2 = \u0026key_fields[NPC_ETYPE_TAG2];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:483:\tvlan_tag1 = \u0026key_fields[NPC_VLAN_TAG1];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:484:\tvlan_tag2 = \u0026key_fields[NPC_VLAN_TAG2];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:485:\tvlan_tag3 = \u0026key_fields[NPC_VLAN_TAG3];\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:486:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:487:\t/* if key profile programmed does not extract Ethertype at all */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:488:\tif (!etype_ether-\u003enr_kws \u0026\u0026 !etype_tag1-\u003enr_kws \u0026\u0026 !etype_tag2-\u003enr_kws) {\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:489:\t\tdev_err(rvu-\u003edev, \"mkex: Ethertype is not extracted.\\n\");\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:490:\t\tgoto vlan_tci;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:491:\t}\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:492:\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:493:\t/* if key profile programmed extracts Ethertype from one layer */\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:494:\tif (etype_ether-\u003enr_kws \u0026\u0026 !etype_tag1-\u003enr_kws \u0026\u0026 !etype_tag2-\u003enr_kws)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:495:\t\tkey_fields[NPC_ETYPE] = *etype_ether;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:496:\tif (!etype_ether-\u003enr_kws \u0026\u0026 etype_tag1-\u003enr_kws \u0026\u0026 !etype_tag2-\u003enr_kws)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:497:\t\tkey_fields[NPC_ETYPE] = *etype_tag1;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:498:\tif (!etype_ether-\u003enr_kws \u0026\u0026 !etype_tag1-\u003enr_kws \u0026\u0026 etype_tag2-\u003enr_kws)\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:499:\t\tkey_fields[NPC_ETYPE] = *etype_tag2;\ndrivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c:500:\n\n"
}

gemini-3.1-pro-preview

null

null

							input: 29015
							output: 56
							thoughts: 154
						

**My Assessment of the Patch's Impact**

Okay, so I've taken a look at this patch. It's a simple addition, really. The code now includes a `dev_warn()` call within an `if` statement. Specifically, it's checking for an overlap related to the `NPC_IPSEC_SPI` field. The `npc_check_overlap()` function is invoked, and if it detects an overlap, a warning is logged. Crucially, the code *doesn't* alter the program's flow based on this overlap detection. It just flags a potential issue. From my perspective, this patch doesn't introduce any changes that would fundamentally alter the way the function operates. Because of this lack of functional changes, I'll return `WorthFuzzing=false`. It's a useful addition for debugging or early detection of configuration issues but doesn't warrant fuzzing attention at this time.

{
  "EnableConfigs": [],
  "FocusSymbols": [],
  "Reasoning": "The patch only adds a dev_warn and a comment. It does not functionally alter the execution flow or modify any state.",
  "WorthFuzzing": false
}

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The patch only adds a dev_warn and a comment. It does not functionally alter the execution flow or modify any state.",
  "WorthFuzzing": false
}