| Seq | Timestamp | Type | Name | Duration |
|---|---|---|---|---|
| 0/0 | 2026/08/02 15:48 | flow | patch-triage |
0mArgs:null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch only modifies YAML files in Documentation/devicetree/bindings/ to fix spacing and formatting in examples. It does not contain any functional changes to the kernel code.",
"WorthFuzzing": false
} |
| 1/1 | 2026/08/02 15:48 | action | read-patch-diff |
0mArgs:null Results: {
"PatchDiff": "commit 196903066a2cc15d033e1256e3289ec81118d235\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Sun Aug 2 15:48:15 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml\nindex 5d033570b57bc..26ebcf4565f3d 100644\n--- a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml\n+++ b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml\n@@ -50,8 +50,8 @@ additionalProperties: false\n examples:\n - |\n #include \u003cdt-bindings/interrupt-controller/arm-gic.h\u003e\n- firmware {\n- optee {\n+ firmware {\n+ optee {\n compatible = \"linaro,optee-tz\";\n method = \"smc\";\n interrupts = \u003cGIC_SPI 187 IRQ_TYPE_EDGE_RISING\u003e;\n@@ -59,8 +59,8 @@ examples:\n };\n \n - |\n- firmware {\n- optee {\n+ firmware {\n+ optee {\n compatible = \"linaro,optee-tz\";\n method = \"hvc\";\n };\ndiff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml\nindex 6e2e0c5518411..0d04389c81faa 100644\n--- a/Documentation/devicetree/bindings/arm/psci.yaml\n+++ b/Documentation/devicetree/bindings/arm/psci.yaml\n@@ -146,12 +146,12 @@ examples:\n // Case 1: PSCI v0.1 only.\n \n psci {\n- compatible = \"arm,psci\";\n- method = \"smc\";\n- cpu_suspend = \u003c0x95c10000\u003e;\n- cpu_off = \u003c0x95c10001\u003e;\n- cpu_on = \u003c0x95c10002\u003e;\n- migrate = \u003c0x95c10003\u003e;\n+ compatible = \"arm,psci\";\n+ method = \"smc\";\n+ cpu_suspend = \u003c0x95c10000\u003e;\n+ cpu_off = \u003c0x95c10001\u003e;\n+ cpu_on = \u003c0x95c10002\u003e;\n+ migrate = \u003c0x95c10003\u003e;\n };\n \n - |+\n@@ -159,8 +159,8 @@ examples:\n // Case 2: PSCI v0.2 only\n \n psci {\n- compatible = \"arm,psci-0.2\";\n- method = \"smc\";\n+ compatible = \"arm,psci-0.2\";\n+ method = \"smc\";\n };\n \n - |+\n@@ -251,7 +251,7 @@ examples:\n \n cpu_pd1: power-domain-cpu1 {\n #power-domain-cells = \u003c0\u003e;\n- domain-idle-states = \u003c\u0026cpu_pwrdn\u003e;\n+ domain-idle-states = \u003c\u0026cpu_pwrdn\u003e;\n power-domains = \u003c\u0026cluster_pd\u003e;\n };\n \ndiff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml\nindex ef648a15b8065..37147124449e5 100644\n--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml\n+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml\n@@ -82,7 +82,7 @@ additionalProperties: false\n \n examples:\n - |\n- tn@109ab000 {\n+ tn@109ab000 {\n compatible = \"qcom,coresight-tnoc\", \"arm,primecell\";\n reg = \u003c0x109ab000 0x4200\u003e;\n \ndiff --git a/Documentation/devicetree/bindings/ata/st,ahci.yaml b/Documentation/devicetree/bindings/ata/st,ahci.yaml\nindex 6e8e4b4f3d6cf..d82c5a65b60ca 100644\n--- a/Documentation/devicetree/bindings/ata/st,ahci.yaml\n+++ b/Documentation/devicetree/bindings/ata/st,ahci.yaml\n@@ -57,16 +57,16 @@ examples:\n #include \u003cdt-bindings/clock/stih407-clks.h\u003e\n \n sata@9b20000 {\n- compatible = \"st,ahci\";\n- reg = \u003c0x9b20000 0x1000\u003e;\n- interrupts = \u003cGIC_SPI 159 IRQ_TYPE_NONE\u003e;\n+ compatible = \"st,ahci\";\n+ reg = \u003c0x9b20000 0x1000\u003e;\n+ interrupts = \u003cGIC_SPI 159 IRQ_TYPE_NONE\u003e;\n interrupt-names = \"hostc\";\n- phys = \u003c\u0026phy_port0 PHY_TYPE_SATA\u003e;\n- phy-names = \"sata-phy\";\n- resets = \u003c\u0026powerdown STIH407_SATA0_POWERDOWN\u003e,\n- \u003c\u0026softreset STIH407_SATA0_SOFTRESET\u003e,\n- \u003c\u0026softreset STIH407_SATA0_PWR_SOFTRESET\u003e;\n- reset-names = \"pwr-dwn\", \"sw-rst\", \"pwr-rst\";\n- clocks = \u003c\u0026clk_s_c0_flexgen CLK_ICN_REG\u003e;\n- clock-names = \"ahci_clk\";\n+ phys = \u003c\u0026phy_port0 PHY_TYPE_SATA\u003e;\n+ phy-names = \"sata-phy\";\n+ resets = \u003c\u0026powerdown STIH407_SATA0_POWERDOWN\u003e,\n+ \u003c\u0026softreset STIH407_SATA0_SOFTRESET\u003e,\n+ \u003c\u0026softreset STIH407_SATA0_PWR_SOFTRESET\u003e;\n+ reset-names = \"pwr-dwn\", \"sw-rst\", \"pwr-rst\";\n+ clocks = \u003c\u0026clk_s_c0_flexgen CLK_ICN_REG\u003e;\n+ clock-names = \"ahci_clk\";\n };\ndiff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml\nindex 49a007cbcd3aa..d1e530e12604a 100644\n--- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml\n+++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml\n@@ -261,9 +261,9 @@ examples:\n \"ovr1\", \"ovr2\", \"vp1\", \"vp2\", \"common1\";\n ti,am65x-oldi-io-ctrl = \u003c\u0026dss_oldi_io_ctrl\u003e;\n power-domains = \u003c\u0026k3_pds 67 TI_SCI_PD_EXCLUSIVE\u003e;\n- clocks = \u003c\u0026k3_clks 67 1\u003e,\n- \u003c\u0026k3_clks 216 1\u003e,\n- \u003c\u0026k3_clks 67 2\u003e;\n+ clocks = \u003c\u0026k3_clks 67 1\u003e,\n+ \u003c\u0026k3_clks 216 1\u003e,\n+ \u003c\u0026k3_clks 67 2\u003e;\n clock-names = \"fck\", \"vp1\", \"vp2\";\n interrupts = \u003cGIC_SPI 166 IRQ_TYPE_EDGE_RISING\u003e;\n ports {\n@@ -299,9 +299,9 @@ examples:\n reg-names = \"common\", \"vidl1\", \"vid\",\n \"ovr1\", \"ovr2\", \"vp1\", \"vp2\", \"common1\";\n power-domains = \u003c\u0026k3_pds 186 TI_SCI_PD_EXCLUSIVE\u003e;\n- clocks = \u003c\u0026k3_clks 186 6\u003e,\n- \u003c\u0026vp1_clock\u003e,\n- \u003c\u0026k3_clks 186 2\u003e;\n+ clocks = \u003c\u0026k3_clks 186 6\u003e,\n+ \u003c\u0026vp1_clock\u003e,\n+ \u003c\u0026k3_clks 186 2\u003e;\n clock-names = \"fck\", \"vp1\", \"vp2\";\n interrupts = \u003cGIC_SPI 84 IRQ_TYPE_LEVEL_HIGH\u003e;\n oldi-transmitters {\ndiff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml\nindex 65ae8a1c39986..cac5ef1743d3b 100644\n--- a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml\n+++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml\n@@ -154,54 +154,54 @@ examples:\n #include \u003cdt-bindings/soc/ti,sci_pm_domain.h\u003e\n \n dss: dss@4a00000 {\n- compatible = \"ti,j721e-dss\";\n- reg = \u003c0x04a00000 0x10000\u003e, /* common_m */\n- \u003c0x04a10000 0x10000\u003e, /* common_s0*/\n- \u003c0x04b00000 0x10000\u003e, /* common_s1*/\n- \u003c0x04b10000 0x10000\u003e, /* common_s2*/\n- \u003c0x04a20000 0x10000\u003e, /* vidl1 */\n- \u003c0x04a30000 0x10000\u003e, /* vidl2 */\n- \u003c0x04a50000 0x10000\u003e, /* vid1 */\n- \u003c0x04a60000 0x10000\u003e, /* vid2 */\n- \u003c0x04a70000 0x10000\u003e, /* ovr1 */\n- \u003c0x04a90000 0x10000\u003e, /* ovr2 */\n- \u003c0x04ab0000 0x10000\u003e, /* ovr3 */\n- \u003c0x04ad0000 0x10000\u003e, /* ovr4 */\n- \u003c0x04a80000 0x10000\u003e, /* vp1 */\n- \u003c0x04aa0000 0x10000\u003e, /* vp2 */\n- \u003c0x04ac0000 0x10000\u003e, /* vp3 */\n- \u003c0x04ae0000 0x10000\u003e, /* vp4 */\n- \u003c0x04af0000 0x10000\u003e; /* wb */\n- reg-names = \"common_m\", \"common_s0\",\n- \"common_s1\", \"common_s2\",\n- \"vidl1\", \"vidl2\",\"vid1\",\"vid2\",\n- \"ovr1\", \"ovr2\", \"ovr3\", \"ovr4\",\n- \"vp1\", \"vp2\", \"vp3\", \"vp4\",\n- \"wb\";\n- clocks = \u003c\u0026k3_clks 152 0\u003e,\n- \u003c\u0026k3_clks 152 1\u003e,\n- \u003c\u0026k3_clks 152 4\u003e,\n- \u003c\u0026k3_clks 152 9\u003e,\n- \u003c\u0026k3_clks 152 13\u003e;\n- clock-names = \"fck\", \"vp1\", \"vp2\", \"vp3\", \"vp4\";\n- power-domains = \u003c\u0026k3_pds 152 TI_SCI_PD_EXCLUSIVE\u003e;\n- interrupts = \u003cGIC_SPI 602 IRQ_TYPE_LEVEL_HIGH\u003e,\n- \u003cGIC_SPI 603 IRQ_TYPE_LEVEL_HIGH\u003e,\n- \u003cGIC_SPI 604 IRQ_TYPE_LEVEL_HIGH\u003e,\n- \u003cGIC_SPI 605 IRQ_TYPE_LEVEL_HIGH\u003e;\n- interrupt-names = \"common_m\",\n- \"common_s0\",\n- \"common_s1\",\n- \"common_s2\";\n- ports {\n- #address-cells = \u003c1\u003e;\n- #size-cells = \u003c0\u003e;\n- port@0 {\n- reg = \u003c0\u003e;\n-\n- dpi_out_0: endpoint {\n- remote-endpoint = \u003c\u0026dp_bridge_input\u003e;\n- };\n- };\n+ compatible = \"ti,j721e-dss\";\n+ reg = \u003c0x04a00000 0x10000\u003e, /* common_m */\n+ \u003c0x04a10000 0x10000\u003e, /* common_s0*/\n+ \u003c0x04b00000 0x10000\u003e, /* common_s1*/\n+ \u003c0x04b10000 0x10000\u003e, /* common_s2*/\n+ \u003c0x04a20000 0x10000\u003e, /* vidl1 */\n+ \u003c0x04a30000 0x10000\u003e, /* vidl2 */\n+ \u003c0x04a50000 0x10000\u003e, /* vid1 */\n+ \u003c0x04a60000 0x10000\u003e, /* vid2 */\n+ \u003c0x04a70000 0x10000\u003e, /* ovr1 */\n+ \u003c0x04a90000 0x10000\u003e, /* ovr2 */\n+ \u003c0x04ab0000 0x10000\u003e, /* ovr3 */\n+ \u003c0x04ad0000 0x10000\u003e, /* ovr4 */\n+ \u003c0x04a80000 0x10000\u003e, /* vp1 */\n+ \u003c0x04aa0000 0x10000\u003e, /* vp2 */\n+ \u003c0x04ac0000 0x10000\u003e, /* vp3 */\n+ \u003c0x04ae0000 0x10000\u003e, /* vp4 */\n+ \u003c0x04af0000 0x10000\u003e; /* wb */\n+ reg-names = \"common_m\", \"common_s0\",\n+ \"common_s1\", \"common_s2\",\n+ \"vidl1\", \"vidl2\",\"vid1\",\"vid2\",\n+ \"ovr1\", \"ovr2\", \"ovr3\", \"ovr4\",\n+ \"vp1\", \"vp2\", \"vp3\", \"vp4\",\n+ \"wb\";\n+ clocks = \u003c\u0026k3_clks 152 0\u003e,\n+ \u003c\u0026k3_clks 152 1\u003e,\n+ \u003c\u0026k3_clks 152 4\u003e,\n+ \u003c\u0026k3_clks 152 9\u003e,\n+ \u003c\u0026k3_clks 152 13\u003e;\n+ clock-names = \"fck\", \"vp1\", \"vp2\", \"vp3\", \"vp4\";\n+ power-domains = \u003c\u0026k3_pds 152 TI_SCI_PD_EXCLUSIVE\u003e;\n+ interrupts = \u003cGIC_SPI 602 IRQ_TYPE_LEVEL_HIGH\u003e,\n+ \u003cGIC_SPI 603 IRQ_TYPE_LEVEL_HIGH\u003e,\n+ \u003cGIC_SPI 604 IRQ_TYPE_LEVEL_HIGH\u003e,\n+ \u003cGIC_SPI 605 IRQ_TYPE_LEVEL_HIGH\u003e;\n+ interrupt-names = \"common_m\",\n+ \"common_s0\",\n+ \"common_s1\",\n+ \"common_s2\";\n+ ports {\n+ #address-cells = \u003c1\u003e;\n+ #size-cells = \u003c0\u003e;\n+ port@0 {\n+ reg = \u003c0\u003e;\n+\n+ dpi_out_0: endpoint {\n+ remote-endpoint = \u003c\u0026dp_bridge_input\u003e;\n+ };\n };\n+ };\n };\ndiff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml\nindex 96b1439f88e37..87721da0a8afb 100644\n--- a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml\n+++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml\n@@ -80,26 +80,26 @@ examples:\n #include \u003cdt-bindings/interrupt-controller/arm-gic.h\u003e\n #include \u003cdt-bindings/interrupt-controller/irq.h\u003e\n \n- dss: dss@2540000 {\n- compatible = \"ti,k2g-dss\";\n- reg = \u003c0x02540000 0x400\u003e,\n- \u003c0x02550000 0x1000\u003e,\n- \u003c0x02557000 0x1000\u003e,\n- \u003c0x0255a800 0x100\u003e,\n- \u003c0x0255ac00 0x100\u003e;\n- reg-names = \"cfg\", \"common\", \"vid1\", \"ovr1\", \"vp1\";\n- clocks = \u003c\u0026k2g_clks 0x2 0\u003e,\n- \u003c\u0026k2g_clks 0x2 1\u003e;\n- clock-names = \"fck\", \"vp1\";\n- interrupts = \u003cGIC_SPI 247 IRQ_TYPE_EDGE_RISING\u003e;\n-\n- power-domains = \u003c\u0026k2g_pds 0x2\u003e;\n-\n- max-memory-bandwidth = \u003c230000000\u003e;\n-\n- port {\n- dpi_out: endpoint {\n- remote-endpoint = \u003c\u0026sii9022_in\u003e;\n- };\n+ dss@2540000 {\n+ compatible = \"ti,k2g-dss\";\n+ reg = \u003c0x02540000 0x400\u003e,\n+ \u003c0x02550000 0x1000\u003e,\n+ \u003c0x02557000 0x1000\u003e,\n+ \u003c0x0255a800 0x100\u003e,\n+ \u003c0x0255ac00 0x100\u003e;\n+ reg-names = \"cfg\", \"common\", \"vid1\", \"ovr1\", \"vp1\";\n+ clocks = \u003c\u0026k2g_clks 0x2 0\u003e,\n+ \u003c\u0026k2g_clks 0x2 1\u003e;\n+ clock-names = \"fck\", \"vp1\";\n+ interrupts = \u003cGIC_SPI 247 IRQ_TYPE_EDGE_RISING\u003e;\n+\n+ power-domains = \u003c\u0026k2g_pds 0x2\u003e;\n+\n+ max-memory-bandwidth = \u003c230000000\u003e;\n+\n+ port {\n+ dpi_out: endpoint {\n+ remote-endpoint = \u003c\u0026sii9022_in\u003e;\n };\n+ };\n };\ndiff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml\nindex abc52978be7a9..994afb1c31ff3 100644\n--- a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml\n+++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml\n@@ -81,7 +81,7 @@ examples:\n #include \u003cdt-bindings/interrupt-controller/arm-gic.h\u003e\n #include \u003cdt-bindings/interrupt-controller/irq.h\u003e\n dsp@10803000 {\n- compatible = \"mediatek,mt8195-dsp\";\n+ compatible = \"mediatek,mt8195-dsp\";\n reg = \u003c0x10803000 0x1000\u003e,\n \u003c0x10840000 0x40000\u003e;\n reg-names = \"cfg\", \"sram\";\ndiff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml\nindex 40b4a75514496..e871149c520fb 100644\n--- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml\n+++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml\n@@ -85,7 +85,7 @@ examples:\n - |\n gpio@8012e080 {\n compatible = \"st,nomadik-gpio\";\n- reg = \u003c0x8012e080 0x80\u003e;\n+ reg = \u003c0x8012e080 0x80\u003e;\n interrupts = \u003c0 120 0x4\u003e;\n #gpio-cells = \u003c2\u003e;\n gpio-controller;\ndiff --git a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml\nindex 08f9c1e446fd5..4efbe82b6d689 100644\n--- a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml\n+++ b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml\n@@ -60,7 +60,7 @@ examples:\n i2c@fed40000 {\n compatible = \"st,comms-ssc4-i2c\";\n reg = \u003c0xfed40000 0x110\u003e;\n- interrupts = \u003cGIC_SPI 187 IRQ_TYPE_LEVEL_HIGH\u003e;\n+ interrupts = \u003cGIC_SPI 187 IRQ_TYPE_LEVEL_HIGH\u003e;\n clocks = \u003c\u0026clk_s_a0_ls CLK_ICN_REG\u003e;\n clock-names = \"ssc\";\n clock-frequency = \u003c400000\u003e;\ndiff --git a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml\nindex a023c28dff49d..662ab7f617acf 100644\n--- a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml\n+++ b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml\n@@ -42,7 +42,7 @@ additionalProperties: false\n examples:\n - |\n #include \u003cdt-bindings/interrupt-controller/arm-gic.h\u003e\n- mailbox0: mailbox@8f00000 {\n+ mailbox@8f00000 {\n compatible = \"st,stih407-mailbox\";\n reg = \u003c0x8f00000 0x1000\u003e;\n interrupts = \u003cGIC_SPI 1 IRQ_TYPE_LEVEL_HIGH\u003e;\ndiff --git a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml\nindex 6027118652746..ac063c2bab73d 100644\n--- a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml\n+++ b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml\n@@ -311,7 +311,7 @@ examples:\n in-sd3-supply = \u003c\u0026vdd_5v0_vbus\u003e;\n \n in-ldo0-1-supply = \u003c\u0026vdd_1v8_vio\u003e;\n- in-ldo2-supply = \u003c\u0026vdd_3v3_vbat\u003e;\n+ in-ldo2-supply = \u003c\u0026vdd_3v3_vbat\u003e;\n in-ldo3-5-supply = \u003c\u0026vdd_3v3_vbat\u003e;\n in-ldo4-6-supply = \u003c\u0026vdd_3v3_vbat\u003e;\n in-ldo7-8-supply = \u003c\u0026vdd_1v8_vio\u003e;\ndiff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml\nindex d4f4d72ee0d38..e667d78b3ab3f 100644\n--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml\n+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml\n@@ -390,22 +390,22 @@ examples:\n \u003cGIC_SPI 46 IRQ_TYPE_EDGE_RISING\u003e,\n \u003cGIC_SPI 47 IRQ_TYPE_EDGE_RISING\u003e,\n \u003cGIC_SPI 168 IRQ_TYPE_LEVEL_HIGH\u003e;\n- interrupt-names = \"msi0\",\n- \"msi1\",\n- \"msi2\",\n- \"msi3\",\n- \"msi4\",\n- \"msi5\",\n- \"msi6\",\n- \"msi7\",\n- \"msi8\",\n- \"msi9\",\n- \"msi10\",\n- \"msi11\",\n- \"msi12\",\n- \"msi13\",\n- \"msi14\",\n- \"msi15\",\n- \"legacy\";\n+ interrupt-names = \"msi0\",\n+ \"msi1\",\n+ \"msi2\",\n+ \"msi3\",\n+ \"msi4\",\n+ \"msi5\",\n+ \"msi6\",\n+ \"msi7\",\n+ \"msi8\",\n+ \"msi9\",\n+ \"msi10\",\n+ \"msi11\",\n+ \"msi12\",\n+ \"msi13\",\n+ \"msi14\",\n+ \"msi15\",\n+ \"legacy\";\n ieee80211-freq-limit = \u003c5470000 5875000\u003e;\n };\ndiff --git a/Documentation/devicetree/bindings/opp/opp-v2.yaml b/Documentation/devicetree/bindings/opp/opp-v2.yaml\nindex 10000a758572d..ce0fa82bce98e 100644\n--- a/Documentation/devicetree/bindings/opp/opp-v2.yaml\n+++ b/Documentation/devicetree/bindings/opp/opp-v2.yaml\n@@ -293,9 +293,9 @@ examples:\n opp-microvolt = \u003c970000\u003e, /* Supply 0 */\n \u003c960000\u003e, /* Supply 1 */\n \u003c960000\u003e; /* Supply 2 */\n- opp-microamp = \u003c70000\u003e, /* Supply 0 */\n- \u003c70000\u003e, /* Supply 1 */\n- \u003c70000\u003e; /* Supply 2 */\n+ opp-microamp = \u003c70000\u003e, /* Supply 0 */\n+ \u003c70000\u003e, /* Supply 1 */\n+ \u003c70000\u003e; /* Supply 2 */\n clock-latency-ns = \u003c300000\u003e;\n };\n \n@@ -306,9 +306,9 @@ examples:\n opp-microvolt = \u003c975000 970000 985000\u003e, /* Supply 0 */\n \u003c965000 960000 975000\u003e, /* Supply 1 */\n \u003c965000 960000 975000\u003e; /* Supply 2 */\n- opp-microamp = \u003c70000\u003e, /* Supply 0 */\n- \u003c70000\u003e, /* Supply 1 */\n- \u003c70000\u003e; /* Supply 2 */\n+ opp-microamp = \u003c70000\u003e, /* Supply 0 */\n+ \u003c70000\u003e, /* Supply 1 */\n+ \u003c70000\u003e; /* Supply 2 */\n clock-latency-ns = \u003c300000\u003e;\n };\n \n@@ -317,11 +317,11 @@ examples:\n opp-1000000002 {\n opp-hz = /bits/ 64 \u003c1000000002\u003e;\n opp-microvolt = \u003c975000 970000 985000\u003e, /* Supply 0 */\n- \u003c965000 960000 975000\u003e, /* Supply 1 */\n- \u003c965000 960000 975000\u003e; /* Supply 2 */\n- opp-microamp = \u003c70000\u003e, /* Supply 0 */\n- \u003c0\u003e, /* Supply 1 doesn't need this */\n- \u003c70000\u003e; /* Supply 2 */\n+ \u003c965000 960000 975000\u003e, /* Supply 1 */\n+ \u003c965000 960000 975000\u003e; /* Supply 2 */\n+ opp-microamp = \u003c70000\u003e, /* Supply 0 */\n+ \u003c0\u003e, /* Supply 1 doesn't need this */\n+ \u003c70000\u003e; /* Supply 2 */\n clock-latency-ns = \u003c300000\u003e;\n };\n };\n@@ -405,8 +405,8 @@ examples:\n opp-hz = /bits/ 64 \u003c1000000000\u003e;\n opp-microvolt-slow = \u003c915000 900000 925000\u003e;\n opp-microvolt-fast = \u003c975000 970000 985000\u003e;\n- opp-microamp-slow = \u003c70000\u003e;\n- opp-microamp-fast = \u003c71000\u003e;\n+ opp-microamp-slow = \u003c70000\u003e;\n+ opp-microamp-fast = \u003c71000\u003e;\n };\n \n opp-1200000000 {\n@@ -415,7 +415,7 @@ examples:\n \u003c925000 910000 935000\u003e; /* Supply vcc1 */\n opp-microvolt-fast = \u003c975000 970000 985000\u003e, /* Supply vcc0 */\n \u003c965000 960000 975000\u003e; /* Supply vcc1 */\n- opp-microamp = \u003c70000\u003e; /* Will be used for both slow/fast */\n+ opp-microamp = \u003c70000\u003e; /* Will be used for both slow/fast */\n };\n };\n \ndiff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml\nindex 1f31b520cb439..a33f1fd277c99 100644\n--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml\n+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml\n@@ -573,7 +573,7 @@ examples:\n uart0_pins: uart0-pins {\n mux {\n function = \"uart\";\n- groups = \"uart0\";\n+ groups = \"uart0\";\n };\n };\n };\ndiff --git a/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml b/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml\nindex 42ca895f3c4eb..998f2ce8665ff 100644\n--- a/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml\n+++ b/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml\n@@ -146,11 +146,11 @@ examples:\n reg = \u003c0x24e00 0xb0\u003e;\n interrupts = \u003c12 IRQ_TYPE_LEVEL_LOW\u003e;\n interrupt-parent = \u003c\u0026ipic\u003e;\n- fsl,cksel = \u003c1\u003e;\n+ fsl,cksel = \u003c1\u003e;\n fsl,tclk-period = \u003c10\u003e;\n- fsl,tmr-prsc = \u003c100\u003e;\n- fsl,tmr-add = \u003c0x999999a4\u003e;\n- fsl,tmr-fiper1 = \u003c0x3b9ac9f6\u003e;\n- fsl,tmr-fiper2 = \u003c0x00018696\u003e;\n- fsl,max-adj = \u003c659999998\u003e;\n+ fsl,tmr-prsc = \u003c100\u003e;\n+ fsl,tmr-add = \u003c0x999999a4\u003e;\n+ fsl,tmr-fiper1 = \u003c0x3b9ac9f6\u003e;\n+ fsl,tmr-fiper2 = \u003c0x00018696\u003e;\n+ fsl,max-adj = \u003c659999998\u003e;\n };\ndiff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml\nindex bae9931289812..40397bdf2d69b 100644\n--- a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml\n+++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml\n@@ -62,7 +62,7 @@ additionalProperties: false\n \n examples:\n - |\n- pwm: pwm@10020000 {\n+ pwm@10020000 {\n compatible = \"sifive,fu540-c000-pwm\", \"sifive,pwm0\";\n reg = \u003c0x10020000 0x1000\u003e;\n clocks = \u003c\u0026tlclk\u003e;\ndiff --git a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml\nindex 6ef3375074259..c338ad0368de7 100644\n--- a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml\n+++ b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml\n@@ -67,7 +67,7 @@ examples:\n \n usb1v5-supply = \u003c\u0026reg_vusb1v5\u003e;\n usb1v8-supply = \u003c\u0026reg_vusb1v8\u003e;\n- usb3v1-supply = \u003c\u0026reg_vusb3v1\u003e;\n+ usb3v1-supply = \u003c\u0026reg_vusb3v1\u003e;\n usb_mode = \u003c1\u003e;\n \n #phy-cells = \u003c0\u003e;\n"
} |
| 2/1 | 2026/08/02 15:48 | agent | patch-evaluator |
0mModel:best-expensive Args: null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch only modifies YAML files in Documentation/devicetree/bindings/ to fix spacing and formatting in examples. It does not contain any functional changes to the kernel code.",
"WorthFuzzing": false
}Instruction: You are an expert Linux kernel maintainer. Your job is to review a provided patch series and determine if it makes functional changes to the kernel that should be fuzzed. IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in your workspace. Do NOT rely on your internal knowledge of the kernel. You must actively use your code access tools to examine the actual source code and confirm any assumptions. Return WorthFuzzing=false if the patch only contains: - Modifications to Documentation/, Kconfig files, or code comments. - Purely decorative changes, such as logging (e.g., pr_err, printk) or tracepoints. - Changes to numeric constants or macros that do not functionally alter execution flow. - Code paths that are impossible to reach in virtualized environments like GCE or QEMU, even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim). - Code in vendor-specific PCIe switch, SmartNIC, or GPU drivers (e.g., mlxsw, pds_core, qed, ionic, amdgpu) that require physical PCIe hardware cards not emulated in standard QEMU. - Driver .remove, .shutdown, or pci_unregister_driver teardown callbacks (e.g., igb_remove) that are executed only during PCI hot-unplug or sysfs driver unbind operations. If it modifies reachable core kernel logic, drivers, or architectures, use your code search tools to verify the code can be executed, then return WorthFuzzing=true. When returning WorthFuzzing=true, you MUST ALSO: 1. Extract any specific kernel functions that should be heavily fuzzed into FocusSymbols. Avoid listing generic hot-path functions to prevent skewed test distributions. Prefer non-static, non-inlined API entrypoint functions over internal static helper functions (which are inlined by the compiler and do not have distinct symbol addresses). 2. Identify any specific CONFIG_ options required to properly test this new/modified feature. Go and look into the Kconfig files and check for ifdefs around the code, do not make assumptions. Also check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed for Kbuild to compile the code statically into vmlinux. List them in the EnableConfigs output array, and DO NOT add a 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4"). Prefer calling several tools at the same time to save round-trips. Use set-results tool to provide results of the analysis. It must be called exactly once before the final reply. Ignore results of this tool. Prompt: For your convenience, here is the diff of the changes:
commit 196903066a2cc15d033e1256e3289ec81118d235
Author: syz-cluster <triage@syzkaller.com>
Date: Sun Aug 2 15:48:15 2026 +0000
syz-cluster: applied patch under review
diff --git a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml
index 5d033570b57bc..26ebcf4565f3d 100644
--- a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml
+++ b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml
@@ -50,8 +50,8 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
- firmware {
- optee {
+ firmware {
+ optee {
compatible = "linaro,optee-tz";
method = "smc";
interrupts = <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>;
@@ -59,8 +59,8 @@ examples:
};
- |
- firmware {
- optee {
+ firmware {
+ optee {
compatible = "linaro,optee-tz";
method = "hvc";
};
diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml
index 6e2e0c5518411..0d04389c81faa 100644
--- a/Documentation/devicetree/bindings/arm/psci.yaml
+++ b/Documentation/devicetree/bindings/arm/psci.yaml
@@ -146,12 +146,12 @@ examples:
// Case 1: PSCI v0.1 only.
psci {
- compatible = "arm,psci";
- method = "smc";
- cpu_suspend = <0x95c10000>;
- cpu_off = <0x95c10001>;
- cpu_on = <0x95c10002>;
- migrate = <0x95c10003>;
+ compatible = "arm,psci";
+ method = "smc";
+ cpu_suspend = <0x95c10000>;
+ cpu_off = <0x95c10001>;
+ cpu_on = <0x95c10002>;
+ migrate = <0x95c10003>;
};
- |+
@@ -159,8 +159,8 @@ examples:
// Case 2: PSCI v0.2 only
psci {
- compatible = "arm,psci-0.2";
- method = "smc";
+ compatible = "arm,psci-0.2";
+ method = "smc";
};
- |+
@@ -251,7 +251,7 @@ examples:
cpu_pd1: power-domain-cpu1 {
#power-domain-cells = <0>;
- domain-idle-states = <&cpu_pwrdn>;
+ domain-idle-states = <&cpu_pwrdn>;
power-domains = <&cluster_pd>;
};
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
index ef648a15b8065..37147124449e5 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
@@ -82,7 +82,7 @@ additionalProperties: false
examples:
- |
- tn@109ab000 {
+ tn@109ab000 {
compatible = "qcom,coresight-tnoc", "arm,primecell";
reg = <0x109ab000 0x4200>;
diff --git a/Documentation/devicetree/bindings/ata/st,ahci.yaml b/Documentation/devicetree/bindings/ata/st,ahci.yaml
index 6e8e4b4f3d6cf..d82c5a65b60ca 100644
--- a/Documentation/devicetree/bindings/ata/st,ahci.yaml
+++ b/Documentation/devicetree/bindings/ata/st,ahci.yaml
@@ -57,16 +57,16 @@ examples:
#include <dt-bindings/clock/stih407-clks.h>
sata@9b20000 {
- compatible = "st,ahci";
- reg = <0x9b20000 0x1000>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
+ compatible = "st,ahci";
+ reg = <0x9b20000 0x1000>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
interrupt-names = "hostc";
- phys = <&phy_port0 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- resets = <&powerdown STIH407_SATA0_POWERDOWN>,
- <&softreset STIH407_SATA0_SOFTRESET>,
- <&softreset STIH407_SATA0_PWR_SOFTRESET>;
- reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
- clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
- clock-names = "ahci_clk";
+ phys = <&phy_port0 PHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ resets = <&powerdown STIH407_SATA0_POWERDOWN>,
+ <&softreset STIH407_SATA0_SOFTRESET>,
+ <&softreset STIH407_SATA0_PWR_SOFTRESET>;
+ reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
+ clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
+ clock-names = "ahci_clk";
};
diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
index 49a007cbcd3aa..d1e530e12604a 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
+++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
@@ -261,9 +261,9 @@ examples:
"ovr1", "ovr2", "vp1", "vp2", "common1";
ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 67 1>,
- <&k3_clks 216 1>,
- <&k3_clks 67 2>;
+ clocks = <&k3_clks 67 1>,
+ <&k3_clks 216 1>,
+ <&k3_clks 67 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
ports {
@@ -299,9 +299,9 @@ examples:
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2", "common1";
power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 186 6>,
- <&vp1_clock>,
- <&k3_clks 186 2>;
+ clocks = <&k3_clks 186 6>,
+ <&vp1_clock>,
+ <&k3_clks 186 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
oldi-transmitters {
diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
index 65ae8a1c39986..cac5ef1743d3b 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
+++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
@@ -154,54 +154,54 @@ examples:
#include <dt-bindings/soc/ti,sci_pm_domain.h>
dss: dss@4a00000 {
- compatible = "ti,j721e-dss";
- reg = <0x04a00000 0x10000>, /* common_m */
- <0x04a10000 0x10000>, /* common_s0*/
- <0x04b00000 0x10000>, /* common_s1*/
- <0x04b10000 0x10000>, /* common_s2*/
- <0x04a20000 0x10000>, /* vidl1 */
- <0x04a30000 0x10000>, /* vidl2 */
- <0x04a50000 0x10000>, /* vid1 */
- <0x04a60000 0x10000>, /* vid2 */
- <0x04a70000 0x10000>, /* ovr1 */
- <0x04a90000 0x10000>, /* ovr2 */
- <0x04ab0000 0x10000>, /* ovr3 */
- <0x04ad0000 0x10000>, /* ovr4 */
- <0x04a80000 0x10000>, /* vp1 */
- <0x04aa0000 0x10000>, /* vp2 */
- <0x04ac0000 0x10000>, /* vp3 */
- <0x04ae0000 0x10000>, /* vp4 */
- <0x04af0000 0x10000>; /* wb */
- reg-names = "common_m", "common_s0",
- "common_s1", "common_s2",
- "vidl1", "vidl2","vid1","vid2",
- "ovr1", "ovr2", "ovr3", "ovr4",
- "vp1", "vp2", "vp3", "vp4",
- "wb";
- clocks = <&k3_clks 152 0>,
- <&k3_clks 152 1>,
- <&k3_clks 152 4>,
- <&k3_clks 152 9>,
- <&k3_clks 152 13>;
- clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
- power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "common_m",
- "common_s0",
- "common_s1",
- "common_s2";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
-
- dpi_out_0: endpoint {
- remote-endpoint = <&dp_bridge_input>;
- };
- };
+ compatible = "ti,j721e-dss";
+ reg = <0x04a00000 0x10000>, /* common_m */
+ <0x04a10000 0x10000>, /* common_s0*/
+ <0x04b00000 0x10000>, /* common_s1*/
+ <0x04b10000 0x10000>, /* common_s2*/
+ <0x04a20000 0x10000>, /* vidl1 */
+ <0x04a30000 0x10000>, /* vidl2 */
+ <0x04a50000 0x10000>, /* vid1 */
+ <0x04a60000 0x10000>, /* vid2 */
+ <0x04a70000 0x10000>, /* ovr1 */
+ <0x04a90000 0x10000>, /* ovr2 */
+ <0x04ab0000 0x10000>, /* ovr3 */
+ <0x04ad0000 0x10000>, /* ovr4 */
+ <0x04a80000 0x10000>, /* vp1 */
+ <0x04aa0000 0x10000>, /* vp2 */
+ <0x04ac0000 0x10000>, /* vp3 */
+ <0x04ae0000 0x10000>, /* vp4 */
+ <0x04af0000 0x10000>; /* wb */
+ reg-names = "common_m", "common_s0",
+ "common_s1", "common_s2",
+ "vidl1", "vidl2","vid1","vid2",
+ "ovr1", "ovr2", "ovr3", "ovr4",
+ "vp1", "vp2", "vp3", "vp4",
+ "wb";
+ clocks = <&k3_clks 152 0>,
+ <&k3_clks 152 1>,
+ <&k3_clks 152 4>,
+ <&k3_clks 152 9>,
+ <&k3_clks 152 13>;
+ clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
+ power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
+ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common_m",
+ "common_s0",
+ "common_s1",
+ "common_s2";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+
+ dpi_out_0: endpoint {
+ remote-endpoint = <&dp_bridge_input>;
+ };
};
+ };
};
diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
index 96b1439f88e37..87721da0a8afb 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
+++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
@@ -80,26 +80,26 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
- dss: dss@2540000 {
- compatible = "ti,k2g-dss";
- reg = <0x02540000 0x400>,
- <0x02550000 0x1000>,
- <0x02557000 0x1000>,
- <0x0255a800 0x100>,
- <0x0255ac00 0x100>;
- reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
- clocks = <&k2g_clks 0x2 0>,
- <&k2g_clks 0x2 1>;
- clock-names = "fck", "vp1";
- interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
-
- power-domains = <&k2g_pds 0x2>;
-
- max-memory-bandwidth = <230000000>;
-
- port {
- dpi_out: endpoint {
- remote-endpoint = <&sii9022_in>;
- };
+ dss@2540000 {
+ compatible = "ti,k2g-dss";
+ reg = <0x02540000 0x400>,
+ <0x02550000 0x1000>,
+ <0x02557000 0x1000>,
+ <0x0255a800 0x100>,
+ <0x0255ac00 0x100>;
+ reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
+ clocks = <&k2g_clks 0x2 0>,
+ <&k2g_clks 0x2 1>;
+ clock-names = "fck", "vp1";
+ interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&k2g_pds 0x2>;
+
+ max-memory-bandwidth = <230000000>;
+
+ port {
+ dpi_out: endpoint {
+ remote-endpoint = <&sii9022_in>;
};
+ };
};
diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml
index abc52978be7a9..994afb1c31ff3 100644
--- a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml
+++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml
@@ -81,7 +81,7 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
dsp@10803000 {
- compatible = "mediatek,mt8195-dsp";
+ compatible = "mediatek,mt8195-dsp";
reg = <0x10803000 0x1000>,
<0x10840000 0x40000>;
reg-names = "cfg", "sram";
diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml
index 40b4a75514496..e871149c520fb 100644
--- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml
@@ -85,7 +85,7 @@ examples:
- |
gpio@8012e080 {
compatible = "st,nomadik-gpio";
- reg = <0x8012e080 0x80>;
+ reg = <0x8012e080 0x80>;
interrupts = <0 120 0x4>;
#gpio-cells = <2>;
gpio-controller;
diff --git a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml
index 08f9c1e446fd5..4efbe82b6d689 100644
--- a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml
@@ -60,7 +60,7 @@ examples:
i2c@fed40000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed40000 0x110>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
diff --git a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml
index a023c28dff49d..662ab7f617acf 100644
--- a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml
@@ -42,7 +42,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
- mailbox0: mailbox@8f00000 {
+ mailbox@8f00000 {
compatible = "st,stih407-mailbox";
reg = <0x8f00000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
index 6027118652746..ac063c2bab73d 100644
--- a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
+++ b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
@@ -311,7 +311,7 @@ examples:
in-sd3-supply = <&vdd_5v0_vbus>;
in-ldo0-1-supply = <&vdd_1v8_vio>;
- in-ldo2-supply = <&vdd_3v3_vbat>;
+ in-ldo2-supply = <&vdd_3v3_vbat>;
in-ldo3-5-supply = <&vdd_3v3_vbat>;
in-ldo4-6-supply = <&vdd_3v3_vbat>;
in-ldo7-8-supply = <&vdd_1v8_vio>;
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml
index d4f4d72ee0d38..e667d78b3ab3f 100644
--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml
@@ -390,22 +390,22 @@ examples:
<GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi0",
- "msi1",
- "msi2",
- "msi3",
- "msi4",
- "msi5",
- "msi6",
- "msi7",
- "msi8",
- "msi9",
- "msi10",
- "msi11",
- "msi12",
- "msi13",
- "msi14",
- "msi15",
- "legacy";
+ interrupt-names = "msi0",
+ "msi1",
+ "msi2",
+ "msi3",
+ "msi4",
+ "msi5",
+ "msi6",
+ "msi7",
+ "msi8",
+ "msi9",
+ "msi10",
+ "msi11",
+ "msi12",
+ "msi13",
+ "msi14",
+ "msi15",
+ "legacy";
ieee80211-freq-limit = <5470000 5875000>;
};
diff --git a/Documentation/devicetree/bindings/opp/opp-v2.yaml b/Documentation/devicetree/bindings/opp/opp-v2.yaml
index 10000a758572d..ce0fa82bce98e 100644
--- a/Documentation/devicetree/bindings/opp/opp-v2.yaml
+++ b/Documentation/devicetree/bindings/opp/opp-v2.yaml
@@ -293,9 +293,9 @@ examples:
opp-microvolt = <970000>, /* Supply 0 */
<960000>, /* Supply 1 */
<960000>; /* Supply 2 */
- opp-microamp = <70000>, /* Supply 0 */
- <70000>, /* Supply 1 */
- <70000>; /* Supply 2 */
+ opp-microamp = <70000>, /* Supply 0 */
+ <70000>, /* Supply 1 */
+ <70000>; /* Supply 2 */
clock-latency-ns = <300000>;
};
@@ -306,9 +306,9 @@ examples:
opp-microvolt = <975000 970000 985000>, /* Supply 0 */
<965000 960000 975000>, /* Supply 1 */
<965000 960000 975000>; /* Supply 2 */
- opp-microamp = <70000>, /* Supply 0 */
- <70000>, /* Supply 1 */
- <70000>; /* Supply 2 */
+ opp-microamp = <70000>, /* Supply 0 */
+ <70000>, /* Supply 1 */
+ <70000>; /* Supply 2 */
clock-latency-ns = <300000>;
};
@@ -317,11 +317,11 @@ examples:
opp-1000000002 {
opp-hz = /bits/ 64 <1000000002>;
opp-microvolt = <975000 970000 985000>, /* Supply 0 */
- <965000 960000 975000>, /* Supply 1 */
- <965000 960000 975000>; /* Supply 2 */
- opp-microamp = <70000>, /* Supply 0 */
- <0>, /* Supply 1 doesn't need this */
- <70000>; /* Supply 2 */
+ <965000 960000 975000>, /* Supply 1 */
+ <965000 960000 975000>; /* Supply 2 */
+ opp-microamp = <70000>, /* Supply 0 */
+ <0>, /* Supply 1 doesn't need this */
+ <70000>; /* Supply 2 */
clock-latency-ns = <300000>;
};
};
@@ -405,8 +405,8 @@ examples:
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt-slow = <915000 900000 925000>;
opp-microvolt-fast = <975000 970000 985000>;
- opp-microamp-slow = <70000>;
- opp-microamp-fast = <71000>;
+ opp-microamp-slow = <70000>;
+ opp-microamp-fast = <71000>;
};
opp-1200000000 {
@@ -415,7 +415,7 @@ examples:
<925000 910000 935000>; /* Supply vcc1 */
opp-microvolt-fast = <975000 970000 985000>, /* Supply vcc0 */
<965000 960000 975000>; /* Supply vcc1 */
- opp-microamp = <70000>; /* Will be used for both slow/fast */
+ opp-microamp = <70000>; /* Will be used for both slow/fast */
};
};
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml
index 1f31b520cb439..a33f1fd277c99 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml
@@ -573,7 +573,7 @@ examples:
uart0_pins: uart0-pins {
mux {
function = "uart";
- groups = "uart0";
+ groups = "uart0";
};
};
};
diff --git a/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml b/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml
index 42ca895f3c4eb..998f2ce8665ff 100644
--- a/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml
+++ b/Documentation/devicetree/bindings/ptp/fsl,ptp.yaml
@@ -146,11 +146,11 @@ examples:
reg = <0x24e00 0xb0>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&ipic>;
- fsl,cksel = <1>;
+ fsl,cksel = <1>;
fsl,tclk-period = <10>;
- fsl,tmr-prsc = <100>;
- fsl,tmr-add = <0x999999a4>;
- fsl,tmr-fiper1 = <0x3b9ac9f6>;
- fsl,tmr-fiper2 = <0x00018696>;
- fsl,max-adj = <659999998>;
+ fsl,tmr-prsc = <100>;
+ fsl,tmr-add = <0x999999a4>;
+ fsl,tmr-fiper1 = <0x3b9ac9f6>;
+ fsl,tmr-fiper2 = <0x00018696>;
+ fsl,max-adj = <659999998>;
};
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
index bae9931289812..40397bdf2d69b 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
@@ -62,7 +62,7 @@ additionalProperties: false
examples:
- |
- pwm: pwm@10020000 {
+ pwm@10020000 {
compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
reg = <0x10020000 0x1000>;
clocks = <&tlclk>;
diff --git a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml
index 6ef3375074259..c338ad0368de7 100644
--- a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml
+++ b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml
@@ -67,7 +67,7 @@ examples:
usb1v5-supply = <®_vusb1v5>;
usb1v8-supply = <®_vusb1v8>;
- usb3v1-supply = <®_vusb3v1>;
+ usb3v1-supply = <®_vusb3v1>;
usb_mode = <1>;
#phy-cells = <0>;
|
| 3/2 | 2026/08/02 15:48 | llm | patch-evaluator |
0mModel:gemini-3.1-pro-preview Args: null Results: null Tokens: input: 11503 output: 67 thoughts: 544 Thoughts: **Patch Analysis: Documentation/devicetree/bindings/ Modifications** Okay, so this patch is touching a whole slew of YAML files within the `Documentation/devicetree/bindings/` directory. My initial hunch is that this is likely a style and formatting cleanup, and the "WorthFuzzing" flag should be set to false. Let me just confirm that. It looks like we've got changes across a wide range of bindings: linaro, PSCI, Qualcomm coresight, ST AHCI, TI display drivers (across several platforms!), MediaTek DSP and pinctrl, ST GPIO and I2C, mailbox, Maxim MFD, Qualcomm wireless, OPP, PTP, SiFive PWM, and TI USB. That's a good sampling! Alright, quickly reviewing the file list confirms my initial thought: all the affected files are within the `Documentation/devicetree/bindings/` directory. There isn't any modification of kernel code (*.c, *.h, or other code files*). This aligns perfectly with the description, and this implies it's exclusively about formatting or potentially improving the clarity and structure of the devicetree bindings documentation. Given the scope and the nature of these changes, the `WorthFuzzing` flag is definitely false. No functional kernel code has been altered, so no fuzzing is needed. The patch is simply improving the documentation's readability. |
| 4/2 | 2026/08/02 15:48 | tool | set-results |
0mArgs:{
"EnableConfigs": [],
"FocusSymbols": [],
"Reasoning": "The patch only modifies YAML files in Documentation/devicetree/bindings/ to fix spacing and formatting in examples. It does not contain any functional changes to the kernel code.",
"WorthFuzzing": false
}Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch only modifies YAML files in Documentation/devicetree/bindings/ to fix spacing and formatting in examples. It does not contain any functional changes to the kernel code.",
"WorthFuzzing": false
} |
| Total Calls | Total Tokens | Avg Tokens | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|
| Total Calls | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|