AI Trajectory

Trajectory: (Expand/Collapse All)
Seq	Timestamp	Type	Name	Duration
0/0	2026/07/30 15:43	flow	patch-triage	2m Args: null Results: { "EnableConfigs": [ "STMMAC_ETH", "STMMAC_PCI", "DWMAC_INTEL" ], "FocusSymbols": [ "stmmac_vlan_rx_add_vid", "stmmac_vlan_rx_kill_vid", "stmmac_rx", "stmmac_rx_zc", "stmmac_napi_poll_rx", "stmmac_napi_poll_rxtx" ], "Reasoning": "The patch modifies core VLAN handling and descriptor parsing logic in the stmmac Ethernet driver. This driver is reachable via PCI (e.g. Intel DWMAC) and platform devices, and the modified functions are part of the active RX and netdev configuration paths.", "WorthFuzzing": true }
1/1	2026/07/30 15:43	action	read-patch-diff	0m Args: null Results: { "PatchDiff": "commit b6dc64320d5148b753ed52a04ed6fc85ab5ac719\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Thu Jul 30 15:43:45 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c\nindex 6719ac6e395bc..4fbd2442d9180 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c\n@@ -61,6 +61,20 @@ static void dwxgmac2_set_rx_owner(struct dma_desc p, int disable_rx_ic)\n \tp-\u003edes3 \|= cpu_to_le32(flags);\n }\n \n+static u16 dwxgmac2_wrback_get_rx_vlan_type(struct dma_desc p)\n+{\n+\tu32 et_lt = FIELD_GET(XGMAC_RDES3_ET_LT, le32_to_cpu(p-\u003edes3));\n+\n+\tswitch (et_lt) {\n+\tcase XGMAC_ET_LT_VLAN_STAG:\n+\tcase XGMAC_ET_LT_DVLAN_STAG_STAG:\n+\tcase XGMAC_ET_LT_DVLAN_STAG_CTAG:\n+\t\treturn ETH_P_8021AD;\n+\tdefault:\n+\t\treturn ETH_P_8021Q;\n+\t}\n+}\n+\n static u16 dwxgmac2_wrback_get_rx_vlan_tci(struct dma_desc p)\n {\n \treturn le32_to_cpu(p-\u003edes0) \u0026 XGMAC_RDES0_VLAN_TAG_MASK;\n@@ -350,6 +364,7 @@ const struct stmmac_desc_ops dwxgmac210_desc_ops = {\n \t.rx_status = dwxgmac2_get_rx_status,\n \t.set_tx_owner = dwxgmac2_set_tx_owner,\n \t.set_rx_owner = dwxgmac2_set_rx_owner,\n+\t.get_rx_vlan_type = dwxgmac2_wrback_get_rx_vlan_type,\n \t.get_rx_vlan_tci = dwxgmac2_wrback_get_rx_vlan_tci,\n \t.get_rx_vlan_valid = dwxgmac2_wrback_get_rx_vlan_valid,\n \t.get_rx_frame_len = dwxgmac2_get_rx_frame_len,\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h\nindex 04dafec021b4f..eb6aacc0dfbc3 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h\n+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h\n@@ -56,6 +56,8 @@ struct stmmac_desc_ops {\n \t/ Clear interrupt on tx frame completion. When this bit is\n \t * set an interrupt happens as soon as the frame is transmitted /\n \tvoid (set_tx_ic)(struct dma_desc p);\n+\t/ Get the VLAN tag type of the descriptor /\n+\tu16 (get_rx_vlan_type)(struct dma_desc p);\n \t/ Get the tag of the descriptor /\n \tu16 (get_rx_vlan_tci)(struct dma_desc p);\n \t/ Get the valid status of descriptor /\n@@ -632,8 +634,8 @@ struct stmmac_est_ops {\n \n struct stmmac_vlan_ops {\n \t/ VLAN /\n-\tvoid (update_vlan_hash)(struct mac_device_info hw, u32 hash,\n-\t\t\t\t u16 perfect_match, bool is_double);\n+\tvoid (update_vlan_hash)(struct mac_device_info hw, u32 hash);\n+\tvoid (update_dvlan_state)(struct mac_device_info hw, bool enable);\n \tvoid (enable_vlan)(struct mac_device_info hw, u32 type);\n \tvoid (rx_hw_vlan)(struct mac_device_info hw, struct dma_desc rx_desc,\n \t\t\t struct sk_buff skb);\n@@ -650,6 +652,8 @@ struct stmmac_vlan_ops {\n \n #define stmmac_update_vlan_hash(__priv, __args...) \\\n \tstmmac_do_void_callback(__priv, vlan, update_vlan_hash, __args)\n+#define stmmac_update_dvlan_state(__priv, __args...) \\\n+\tstmmac_do_void_callback(__priv, vlan, update_dvlan_state, __args)\n #define stmmac_enable_vlan(__priv, __args...) \\\n \tstmmac_do_void_callback(__priv, vlan, enable_vlan, __args)\n #define stmmac_rx_hw_vlan(__priv, __args...) \\\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\nindex 0de4bc9499138..ee75cbf6e9354 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n@@ -6791,29 +6791,21 @@ static u32 stmmac_vid_crc32_le(__le16 vid_le)\n static int stmmac_vlan_update(struct stmmac_priv priv, bool is_double)\n {\n \tu32 crc, hash = 0;\n-\tu16 pmatch = 0;\n-\tint count = 0;\n \tu16 vid = 0;\n \n \tfor_each_set_bit(vid, priv-\u003eactive_vlans, VLAN_N_VID) {\n \t\t__le16 vid_le = cpu_to_le16(vid);\n \t\tcrc = bitrev32(~stmmac_vid_crc32_le(vid_le)) \u003e\u003e 28;\n \t\thash \|= (1 \u003c\u003c crc);\n-\t\tcount++;\n-\t}\n-\n-\tif (!priv-\u003edma_cap.vlhash) {\n-\t\tif (count \u003e 2) /* VID = 0 always passes filter /\n-\t\t\treturn -EOPNOTSUPP;\n-\n-\t\tpmatch = vid;\n-\t\thash = 0;\n \t}\n \n \tif (!netif_running(priv-\u003edev))\n \t\treturn 0;\n \n-\treturn stmmac_update_vlan_hash(priv, priv-\u003ehw, hash, pmatch, is_double);\n+\tif (priv-\u003edma_cap.dvlan)\n+\t\tstmmac_update_dvlan_state(priv, priv-\u003ehw, is_double);\n+\n+\treturn stmmac_update_vlan_hash(priv, priv-\u003ehw, hash);\n }\n \n / FIXME: This may need RXC to be running, but it may be called with BH\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c\nindex e24efe3bfedbe..4bb639c717f8c 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c\n@@ -161,8 +161,20 @@ static void vlan_restore_hw_rx_fltr(struct net_device dev,\n \t\tvlan_write_filter(dev, hw, i, hw-\u003evlan_filter[i]);\n }\n \n-static void vlan_update_hash(struct mac_device_info hw, u32 hash,\n-\t\t\t u16 perfect_match, bool is_double)\n+static void vlan_update_dvlan_state(struct mac_device_info hw, bool enable)\n+{\n+\tvoid __iomem ioaddr = hw-\u003epcsr;\n+\tu32 value;\n+\n+\tvalue = readl(ioaddr + VLAN_TAG);\n+\tif (enable)\n+\t\tvalue \|= VLAN_EDVLP \| VLAN_ESVL \| VLAN_DOVLTC;\n+\telse\n+\t\tvalue \u0026= ~(VLAN_EDVLP \| VLAN_ESVL \| VLAN_DOVLTC);\n+\twritel(value, ioaddr + VLAN_TAG);\n+}\n+\n+static void vlan_update_hash(struct mac_device_info hw, u32 hash)\n {\n \tvoid __iomem ioaddr = hw-\u003epcsr;\n \tu32 value;\n@@ -173,35 +185,9 @@ static void vlan_update_hash(struct mac_device_info hw, u32 hash,\n \n \tif (hash) {\n \t\tvalue \|= VLAN_VTHM \| VLAN_ETV;\n-\t\tif (is_double) {\n-\t\t\tvalue \|= VLAN_EDVLP;\n-\t\t\tvalue \|= VLAN_ESVL;\n-\t\t\tvalue \|= VLAN_DOVLTC;\n-\t\t} else {\n-\t\t\tvalue \u0026= ~VLAN_EDVLP;\n-\t\t\tvalue \u0026= ~VLAN_ESVL;\n-\t\t\tvalue \u0026= ~VLAN_DOVLTC;\n-\t\t}\n-\n \t\twritel(value, ioaddr + VLAN_TAG);\n-\t} else if (perfect_match) {\n-\t\tu32 value = VLAN_ETV;\n-\n-\t\tif (is_double) {\n-\t\t\tvalue \|= VLAN_EDVLP;\n-\t\t\tvalue \|= VLAN_ESVL;\n-\t\t\tvalue \|= VLAN_DOVLTC;\n-\t\t} else {\n-\t\t\tvalue \u0026= ~VLAN_EDVLP;\n-\t\t\tvalue \u0026= ~VLAN_ESVL;\n-\t\t\tvalue \u0026= ~VLAN_DOVLTC;\n-\t\t}\n-\n-\t\twritel(value \| perfect_match, ioaddr + VLAN_TAG);\n \t} else {\n \t\tvalue \u0026= ~(VLAN_VTHM \| VLAN_ETV);\n-\t\tvalue \u0026= ~(VLAN_EDVLP \| VLAN_ESVL);\n-\t\tvalue \u0026= ~VLAN_DOVLTC;\n \t\tvalue \u0026= ~VLAN_VID;\n \n \t\twritel(value, ioaddr + VLAN_TAG);\n@@ -226,8 +212,12 @@ static void vlan_rx_hw(struct mac_device_info hw,\n {\n \tif (hw-\u003edesc-\u003eget_rx_vlan_valid(rx_desc)) {\n \t\tu16 vid = hw-\u003edesc-\u003eget_rx_vlan_tci(rx_desc);\n+\t\tu16 type = ETH_P_8021Q;\n \n-\t\t__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);\n+\t\tif (hw-\u003edesc-\u003eget_rx_vlan_type)\n+\t\t\ttype = hw-\u003edesc-\u003eget_rx_vlan_type(rx_desc);\n+\n+\t\t__vlan_hwaccel_put_tag(skb, htons(type), vid);\n \t}\n }\n \n@@ -250,8 +240,7 @@ static void vlan_set_hw_mode(struct mac_device_info hw)\n \twritel(value, ioaddr + VLAN_TAG);\n }\n \n-static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash,\n-\t\t\t\t u16 perfect_match, bool is_double)\n+static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash)\n {\n \tvoid __iomem ioaddr = hw-\u003epcsr;\n \n@@ -267,41 +256,9 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash,\n \t\tvalue = readl(ioaddr + VLAN_TAG);\n \n \t\tvalue \|= VLAN_VTHM \| VLAN_ETV;\n-\t\tif (is_double) {\n-\t\t\tvalue \|= VLAN_EDVLP;\n-\t\t\tvalue \|= VLAN_ESVL;\n-\t\t\tvalue \|= VLAN_DOVLTC;\n-\t\t} else {\n-\t\t\tvalue \u0026= ~VLAN_EDVLP;\n-\t\t\tvalue \u0026= ~VLAN_ESVL;\n-\t\t\tvalue \u0026= ~VLAN_DOVLTC;\n-\t\t}\n \n \t\tvalue \u0026= ~VLAN_VID;\n \t\twritel(value, ioaddr + VLAN_TAG);\n-\t} else if (perfect_match) {\n-\t\tu32 value = readl(ioaddr + XGMAC_PACKET_FILTER);\n-\n-\t\tvalue \|= XGMAC_FILTER_VTFE;\n-\n-\t\twritel(value, ioaddr + XGMAC_PACKET_FILTER);\n-\n-\t\tvalue = readl(ioaddr + VLAN_TAG);\n-\n-\t\tvalue \u0026= ~VLAN_VTHM;\n-\t\tvalue \|= VLAN_ETV;\n-\t\tif (is_double) {\n-\t\t\tvalue \|= VLAN_EDVLP;\n-\t\t\tvalue \|= VLAN_ESVL;\n-\t\t\tvalue \|= VLAN_DOVLTC;\n-\t\t} else {\n-\t\t\tvalue \u0026= ~VLAN_EDVLP;\n-\t\t\tvalue \u0026= ~VLAN_ESVL;\n-\t\t\tvalue \u0026= ~VLAN_DOVLTC;\n-\t\t}\n-\n-\t\tvalue \u0026= ~VLAN_VID;\n-\t\twritel(value \| perfect_match, ioaddr + VLAN_TAG);\n \t} else {\n \t\tu32 value = readl(ioaddr + XGMAC_PACKET_FILTER);\n \n@@ -312,8 +269,6 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash,\n \t\tvalue = readl(ioaddr + VLAN_TAG);\n \n \t\tvalue \u0026= ~(VLAN_VTHM \| VLAN_ETV);\n-\t\tvalue \u0026= ~(VLAN_EDVLP \| VLAN_ESVL);\n-\t\tvalue \u0026= ~VLAN_DOVLTC;\n \t\tvalue \u0026= ~VLAN_VID;\n \n \t\twritel(value, ioaddr + VLAN_TAG);\n@@ -332,11 +287,13 @@ const struct stmmac_vlan_ops dwmac_vlan_ops = {\n \n const struct stmmac_vlan_ops dwxlgmac2_vlan_ops = {\n \t.update_vlan_hash = dwxgmac2_update_vlan_hash,\n+\t.update_dvlan_state = vlan_update_dvlan_state,\n \t.enable_vlan = vlan_enable,\n };\n \n const struct stmmac_vlan_ops dwxgmac210_vlan_ops = {\n \t.update_vlan_hash = dwxgmac2_update_vlan_hash,\n+\t.update_dvlan_state = vlan_update_dvlan_state,\n \t.enable_vlan = vlan_enable,\n \t.add_hw_vlan_rx_fltr = vlan_add_hw_rx_fltr,\n \t.del_hw_vlan_rx_fltr = vlan_del_hw_rx_fltr,\n" }
2/1	2026/07/30 15:43	agent	patch-evaluator	2m Model: best-expensive Args: null Results: { "EnableConfigs": [ "STMMAC_ETH", "STMMAC_PCI", "DWMAC_INTEL" ], "FocusSymbols": [ "stmmac_vlan_rx_add_vid", "stmmac_vlan_rx_kill_vid", "stmmac_rx", "stmmac_rx_zc", "stmmac_napi_poll_rx", "stmmac_napi_poll_rxtx" ], "Reasoning": "The patch modifies core VLAN handling and descriptor parsing logic in the stmmac Ethernet driver. This driver is reachable via PCI (e.g. Intel DWMAC) and platform devices, and the modified functions are part of the active RX and netdev configuration paths.", "WorthFuzzing": true } Instruction: You are an expert Linux kernel maintainer. Your job is to review a provided patch series and determine if it makes functional changes to the kernel that should be fuzzed. IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in your workspace. Do NOT rely on your internal knowledge of the kernel. You must actively use your code access tools to examine the actual source code and confirm any assumptions. Return WorthFuzzing=false if the patch only contains: - Modifications to Documentation/, Kconfig files, or code comments. - Purely decorative changes, such as logging (e.g., pr_err, printk) or tracepoints. - Changes to numeric constants or macros that do not functionally alter execution flow. - Code paths that are impossible to reach in virtualized environments like GCE or QEMU, even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim). - Code in vendor-specific PCIe switch, SmartNIC, or GPU drivers (e.g., mlxsw, pds_core, qed, ionic, amdgpu) that require physical PCIe hardware cards not emulated in standard QEMU. - Driver .remove, .shutdown, or pci_unregister_driver teardown callbacks (e.g., igb_remove) that are executed only during PCI hot-unplug or sysfs driver unbind operations. If it modifies reachable core kernel logic, drivers, or architectures, use your code search tools to verify the code can be executed, then return WorthFuzzing=true. When returning WorthFuzzing=true, you MUST ALSO: 1. Extract any specific kernel functions that should be heavily fuzzed into FocusSymbols. Avoid listing generic hot-path functions to prevent skewed test distributions. Prefer non-static, non-inlined API entrypoint functions over internal static helper functions (which are inlined by the compiler and do not have distinct symbol addresses). 2. Identify any specific CONFIG_ options required to properly test this new/modified feature. Go and look into the Kconfig files and check for ifdefs around the code, do not make assumptions. Also check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed for Kbuild to compile the code statically into vmlinux. List them in the EnableConfigs output array, and DO NOT add a 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4"). Prefer calling several tools at the same time to save round-trips. Use set-results tool to provide results of the analysis. It must be called exactly once before the final reply. Ignore results of this tool. Prompt: For your convenience, here is the diff of the changes: commit b6dc64320d5148b753ed52a04ed6fc85ab5ac719 Author: syz-cluster <triage@syzkaller.com> Date: Thu Jul 30 15:43:45 2026 +0000 syz-cluster: applied patch under review diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c index 6719ac6e395bc..4fbd2442d9180 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c @@ -61,6 +61,20 @@ static void dwxgmac2_set_rx_owner(struct dma_desc p, int disable_rx_ic) p->des3 \|= cpu_to_le32(flags); } +static u16 dwxgmac2_wrback_get_rx_vlan_type(struct dma_desc p) +{ + u32 et_lt = FIELD_GET(XGMAC_RDES3_ET_LT, le32_to_cpu(p->des3)); + + switch (et_lt) { + case XGMAC_ET_LT_VLAN_STAG: + case XGMAC_ET_LT_DVLAN_STAG_STAG: + case XGMAC_ET_LT_DVLAN_STAG_CTAG: + return ETH_P_8021AD; + default: + return ETH_P_8021Q; + } +} + static u16 dwxgmac2_wrback_get_rx_vlan_tci(struct dma_desc p) { return le32_to_cpu(p->des0) & XGMAC_RDES0_VLAN_TAG_MASK; @@ -350,6 +364,7 @@ const struct stmmac_desc_ops dwxgmac210_desc_ops = { .rx_status = dwxgmac2_get_rx_status, .set_tx_owner = dwxgmac2_set_tx_owner, .set_rx_owner = dwxgmac2_set_rx_owner, + .get_rx_vlan_type = dwxgmac2_wrback_get_rx_vlan_type, .get_rx_vlan_tci = dwxgmac2_wrback_get_rx_vlan_tci, .get_rx_vlan_valid = dwxgmac2_wrback_get_rx_vlan_valid, .get_rx_frame_len = dwxgmac2_get_rx_frame_len, diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 04dafec021b4f..eb6aacc0dfbc3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -56,6 +56,8 @@ struct stmmac_desc_ops { / Clear interrupt on tx frame completion. When this bit is * set an interrupt happens as soon as the frame is transmitted / void (set_tx_ic)(struct dma_desc p); + / Get the VLAN tag type of the descriptor / + u16 (get_rx_vlan_type)(struct dma_desc p); / Get the tag of the descriptor / u16 (get_rx_vlan_tci)(struct dma_desc p); / Get the valid status of descriptor / @@ -632,8 +634,8 @@ struct stmmac_est_ops { struct stmmac_vlan_ops { / VLAN / - void (update_vlan_hash)(struct mac_device_info hw, u32 hash, - u16 perfect_match, bool is_double); + void (update_vlan_hash)(struct mac_device_info hw, u32 hash); + void (update_dvlan_state)(struct mac_device_info hw, bool enable); void (enable_vlan)(struct mac_device_info hw, u32 type); void (rx_hw_vlan)(struct mac_device_info hw, struct dma_desc rx_desc, struct sk_buff skb); @@ -650,6 +652,8 @@ struct stmmac_vlan_ops { #define stmmac_update_vlan_hash(__priv, __args...) \ stmmac_do_void_callback(__priv, vlan, update_vlan_hash, __args) +#define stmmac_update_dvlan_state(__priv, __args...) \ + stmmac_do_void_callback(__priv, vlan, update_dvlan_state, __args) #define stmmac_enable_vlan(__priv, __args...) \ stmmac_do_void_callback(__priv, vlan, enable_vlan, __args) #define stmmac_rx_hw_vlan(__priv, __args...) \ diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 0de4bc9499138..ee75cbf6e9354 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -6791,29 +6791,21 @@ static u32 stmmac_vid_crc32_le(__le16 vid_le) static int stmmac_vlan_update(struct stmmac_priv priv, bool is_double) { u32 crc, hash = 0; - u16 pmatch = 0; - int count = 0; u16 vid = 0; for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) { __le16 vid_le = cpu_to_le16(vid); crc = bitrev32(~stmmac_vid_crc32_le(vid_le)) >> 28; hash \|= (1 << crc); - count++; - } - - if (!priv->dma_cap.vlhash) { - if (count > 2) /* VID = 0 always passes filter / - return -EOPNOTSUPP; - - pmatch = vid; - hash = 0; } if (!netif_running(priv->dev)) return 0; - return stmmac_update_vlan_hash(priv, priv->hw, hash, pmatch, is_double); + if (priv->dma_cap.dvlan) + stmmac_update_dvlan_state(priv, priv->hw, is_double); + + return stmmac_update_vlan_hash(priv, priv->hw, hash); } / FIXME: This may need RXC to be running, but it may be called with BH diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c index e24efe3bfedbe..4bb639c717f8c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c @@ -161,8 +161,20 @@ static void vlan_restore_hw_rx_fltr(struct net_device dev, vlan_write_filter(dev, hw, i, hw->vlan_filter[i]); } -static void vlan_update_hash(struct mac_device_info hw, u32 hash, - u16 perfect_match, bool is_double) +static void vlan_update_dvlan_state(struct mac_device_info hw, bool enable) +{ + void __iomem ioaddr = hw->pcsr; + u32 value; + + value = readl(ioaddr + VLAN_TAG); + if (enable) + value \|= VLAN_EDVLP \| VLAN_ESVL \| VLAN_DOVLTC; + else + value &= ~(VLAN_EDVLP \| VLAN_ESVL \| VLAN_DOVLTC); + writel(value, ioaddr + VLAN_TAG); +} + +static void vlan_update_hash(struct mac_device_info hw, u32 hash) { void __iomem ioaddr = hw->pcsr; u32 value; @@ -173,35 +185,9 @@ static void vlan_update_hash(struct mac_device_info hw, u32 hash, if (hash) { value \|= VLAN_VTHM \| VLAN_ETV; - if (is_double) { - value \|= VLAN_EDVLP; - value \|= VLAN_ESVL; - value \|= VLAN_DOVLTC; - } else { - value &= ~VLAN_EDVLP; - value &= ~VLAN_ESVL; - value &= ~VLAN_DOVLTC; - } - writel(value, ioaddr + VLAN_TAG); - } else if (perfect_match) { - u32 value = VLAN_ETV; - - if (is_double) { - value \|= VLAN_EDVLP; - value \|= VLAN_ESVL; - value \|= VLAN_DOVLTC; - } else { - value &= ~VLAN_EDVLP; - value &= ~VLAN_ESVL; - value &= ~VLAN_DOVLTC; - } - - writel(value \| perfect_match, ioaddr + VLAN_TAG); } else { value &= ~(VLAN_VTHM \| VLAN_ETV); - value &= ~(VLAN_EDVLP \| VLAN_ESVL); - value &= ~VLAN_DOVLTC; value &= ~VLAN_VID; writel(value, ioaddr + VLAN_TAG); @@ -226,8 +212,12 @@ static void vlan_rx_hw(struct mac_device_info hw, { if (hw->desc->get_rx_vlan_valid(rx_desc)) { u16 vid = hw->desc->get_rx_vlan_tci(rx_desc); + u16 type = ETH_P_8021Q; - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); + if (hw->desc->get_rx_vlan_type) + type = hw->desc->get_rx_vlan_type(rx_desc); + + __vlan_hwaccel_put_tag(skb, htons(type), vid); } } @@ -250,8 +240,7 @@ static void vlan_set_hw_mode(struct mac_device_info hw) writel(value, ioaddr + VLAN_TAG); } -static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash, - u16 perfect_match, bool is_double) +static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash) { void __iomem ioaddr = hw->pcsr; @@ -267,41 +256,9 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash, value = readl(ioaddr + VLAN_TAG); value \|= VLAN_VTHM \| VLAN_ETV; - if (is_double) { - value \|= VLAN_EDVLP; - value \|= VLAN_ESVL; - value \|= VLAN_DOVLTC; - } else { - value &= ~VLAN_EDVLP; - value &= ~VLAN_ESVL; - value &= ~VLAN_DOVLTC; - } value &= ~VLAN_VID; writel(value, ioaddr + VLAN_TAG); - } else if (perfect_match) { - u32 value = readl(ioaddr + XGMAC_PACKET_FILTER); - - value \|= XGMAC_FILTER_VTFE; - - writel(value, ioaddr + XGMAC_PACKET_FILTER); - - value = readl(ioaddr + VLAN_TAG); - - value &= ~VLAN_VTHM; - value \|= VLAN_ETV; - if (is_double) { - value \|= VLAN_EDVLP; - value \|= VLAN_ESVL; - value \|= VLAN_DOVLTC; - } else { - value &= ~VLAN_EDVLP; - value &= ~VLAN_ESVL; - value &= ~VLAN_DOVLTC; - } - - value &= ~VLAN_VID; - writel(value \| perfect_match, ioaddr + VLAN_TAG); } else { u32 value = readl(ioaddr + XGMAC_PACKET_FILTER); @@ -312,8 +269,6 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info hw, u32 hash, value = readl(ioaddr + VLAN_TAG); value &= ~(VLAN_VTHM \| VLAN_ETV); - value &= ~(VLAN_EDVLP \| VLAN_ESVL); - value &= ~VLAN_DOVLTC; value &= ~VLAN_VID; writel(value, ioaddr + VLAN_TAG); @@ -332,11 +287,13 @@ const struct stmmac_vlan_ops dwmac_vlan_ops = { const struct stmmac_vlan_ops dwxlgmac2_vlan_ops = { .update_vlan_hash = dwxgmac2_update_vlan_hash, + .update_dvlan_state = vlan_update_dvlan_state, .enable_vlan = vlan_enable, }; const struct stmmac_vlan_ops dwxgmac210_vlan_ops = { .update_vlan_hash = dwxgmac2_update_vlan_hash, + .update_dvlan_state = vlan_update_dvlan_state, .enable_vlan = vlan_enable, .add_hw_vlan_rx_fltr = vlan_add_hw_rx_fltr, .del_hw_vlan_rx_fltr = vlan_del_hw_rx_fltr,
3/2	2026/07/30 15:43	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 5785 output: 20 thoughts: 342 Thoughts: Investigating the Reach of the `stmmac` Driver in Virtualized Environments Okay, so we've got this patch for the `stmmac` driver, specifically for double VLAN support and VLAN hash updates. It's also adding a new descriptor operation to identify the VLAN tag type. My initial thought is to figure out how broadly this impacts systems, especially in virtualized environments. I need to understand the reach of the driver. The `stmmac` driver, for those who need a refresher, handles STMicroelectronics' Ethernet MACs. It’s the 10/100/1000/EQOS Ethernet MAC driver, in fact. Now, are there any virtualized hardware setups that actually use this driver? My first thought is QEMU, since it's the go-to for many. The question is, does QEMU natively emulate `stmmac` as a PCI device? It doesn't seem like it, at least not directly. But, could it be used indirectly by emulating an ARM or MIPS board that uses `stmmac` under the hood? I'm starting to think about this in the context of the supported hardware in QEMU. Thinking about what QEMU does support, I know it has emulated Ethernet MACs for Allwinner, i.MX, Cadence, Nuvoton, and FTDI chips. But, does it explicitly emulate `stmmac`? I'll need to confirm that. Okay, let's take a more direct approach. I need to confirm whether `stmmac` is a PCI device or a platform device. I'll search the kernel to be sure. Alright, I can see a PCI driver for `stmmac`, `stmmac_pci.c`. This means it can be used with PCI, so I'll check that file to confirm that it's a PCI device.
4/2	2026/07/30 15:43	tool	grepper	0m Args: { "Expression": "stmmac_pci" } Results: { "Output": "Documentation/networking/device_drivers/ethernet/stmicro/stmmac.rst=107=syntax (e.g. for PCI module)::\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-108-\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst:109: modprobe stmmac_pci [\u003coption\u003e=\u003cVAL1\u003e,\u003cVAL2\u003e,...]\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-110-\n--\ndrivers/net/ethernet/stmicro/stmmac/Makefile=53=obj-$(CONFIG_DWMAC_MOTORCOMM)\t+= dwmac-motorcomm.o\ndrivers/net/ethernet/stmicro/stmmac/Makefile:54:stmmac-pci-objs:= stmmac_pci.o\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=25=struct intel_priv_data {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-39- /\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:40:struct stmmac_pci_func_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-41-\tunsigned int func;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-44-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:45:struct stmmac_pci_dmi_data {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:46:\tconst struct stmmac_pci_func_data func;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-47-\tsize_t nfuncs;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-49-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:50:struct stmmac_pci_info {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-51-\tint (setup)(struct pci_dev pdev, struct plat_stmmacenet_data plat);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=91=static const int adln_tsn_lane_regs[] = {6};\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-92-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:93:static int stmmac_pci_find_phy_addr(struct pci_dev pdev,\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-94-\t\t\t\t const struct dmi_system_id dmi_list)\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-95-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:96:\tconst struct stmmac_pci_func_data func_data;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:97:\tconst struct stmmac_pci_dmi_data dmi_data;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-98-\tconst struct dmi_system_id dmi_id;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=786=static int ehl_sgmii_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-805-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:806:static struct stmmac_pci_info ehl_sgmii1g_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-807-\t.setup = ehl_sgmii_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=810=static int ehl_rgmii_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-820-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:821:static struct stmmac_pci_info ehl_rgmii1g_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-822-\t.setup = ehl_rgmii_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=841=static int ehl_pse0_rgmii1g_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-847-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:848:static struct stmmac_pci_info ehl_pse0_rgmii1g_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-849-\t.setup = ehl_pse0_rgmii1g_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=852=static int ehl_pse0_sgmii1g_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-869-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:870:static struct stmmac_pci_info ehl_pse0_sgmii1g_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-871-\t.setup = ehl_pse0_sgmii1g_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=890=static int ehl_pse1_rgmii1g_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-896-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:897:static struct stmmac_pci_info ehl_pse1_rgmii1g_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-898-\t.setup = ehl_pse1_rgmii1g_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=901=static int ehl_pse1_sgmii1g_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-918-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:919:static struct stmmac_pci_info ehl_pse1_sgmii1g_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-920-\t.setup = ehl_pse1_sgmii1g_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=944=static int tgl_sgmii_phy0_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-952-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:953:static struct stmmac_pci_info tgl_sgmii1g_phy0_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-954-\t.setup = tgl_sgmii_phy0_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=957=static int tgl_sgmii_phy1_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-965-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:966:static struct stmmac_pci_info tgl_sgmii1g_phy1_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-967-\t.setup = tgl_sgmii_phy1_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=970=static int adls_sgmii_phy0_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-979-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:980:static struct stmmac_pci_info adls_sgmii1g_phy0_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-981-\t.setup = adls_sgmii_phy0_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=984=static int adls_sgmii_phy1_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-993-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:994:static struct stmmac_pci_info adls_sgmii1g_phy1_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-995-\t.setup = adls_sgmii_phy1_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=1023=static int adln_sgmii_phy0_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1041-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1042:static struct stmmac_pci_info adln_sgmii1g_phy0_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1043-\t.setup = adln_sgmii_phy0_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1045-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1046:static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1047-\t{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1052-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1053:static const struct stmmac_pci_dmi_data galileo_stmmac_dmi_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1054-\t.func = galileo_stmmac_func_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1057-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1058:static const struct stmmac_pci_func_data iot2040_stmmac_func_data[] = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1059-\t{\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1068-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1069:static const struct stmmac_pci_dmi_data iot2040_stmmac_dmi_data = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1070-\t.func = iot2040_stmmac_func_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=1109=static int quark_default_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1119-\t /\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1120:\tret = stmmac_pci_find_phy_addr(pdev, quark_pci_dmi);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1121-\tif (ret \u003c 0) {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1144-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1145:static const struct stmmac_pci_info quark_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1146-\t.setup = quark_default_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=1263=static int intel_eth_pci_probe(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1265-{\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1266:\tstruct stmmac_pci_info info = (struct stmmac_pci_info )id-\u003edriver_data;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1267-\tstruct intel_priv_data intel_priv;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c=76=struct loongson_data {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-81-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:82:struct stmmac_pci_info {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-83-\tint (setup)(struct pci_dev pdev, struct plat_stmmacenet_data plat);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c=132=static int loongson_gmac_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-141-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:142:static struct stmmac_pci_info loongson_gmac_pci_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-143-\t.setup = loongson_gmac_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c=165=static int loongson_gnet_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-176-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:177:static struct stmmac_pci_info loongson_gnet_pci_info = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-178-\t.setup = loongson_gnet_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c=498=static int loongson_dwmac_probe(struct pci_dev pdev, const struct pci_device_id id)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-501-\tstruct stmmac_resources res = {};\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:502:\tstruct stmmac_pci_info info;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-503-\tstruct loongson_data ld;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-537-\tplat-\u003efix_soc_reset = loongson_dwmac_fix_reset;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:538:\tplat-\u003esuspend = stmmac_pci_plat_suspend;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:539:\tplat-\u003eresume = stmmac_pci_plat_resume;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-540-\tld-\u003edev = \u0026pdev-\u003edev;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-542-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c:543:\tinfo = (struct stmmac_pci_info )id-\u003edriver_data;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c-544-\tret = info-\u003esetup(pdev, plat);\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c=188=static int motorcomm_resume(struct device dev, void bsp_priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c-192-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c:193:\tret = stmmac_pci_plat_resume(dev, bsp_priv);\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c-194-\tif (ret)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c=208=motorcomm_default_plat_data(struct pci_dev pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c-248-\tplat-\u003ecore_type\t\t= DWMAC_CORE_GMAC4;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c:249:\tplat-\u003esuspend\t\t= stmmac_pci_plat_suspend;\ndrivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c-250-\tplat-\u003eresume\t\t= motorcomm_resume;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-11-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c:12:int stmmac_pci_plat_suspend(struct device dev, void bsp_priv)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-13-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-25-}\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c:26:EXPORT_SYMBOL_GPL(stmmac_pci_plat_suspend);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-27-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c:28:int stmmac_pci_plat_resume(struct device dev, void bsp_priv)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-29-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-43-}\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c:44:EXPORT_SYMBOL_GPL(stmmac_pci_plat_resume);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c-45-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h-8-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h:9:int stmmac_pci_plat_suspend(struct device dev, void bsp_priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h:10:int stmmac_pci_plat_resume(struct device dev, void bsp_priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h-11-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-18-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:19:struct stmmac_pci_info {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-20-\tint (setup)(struct pci_dev pdev, struct plat_stmmacenet_data plat);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c=33=static int stmmac_default_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-49-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:50:static const struct stmmac_pci_info stmmac_pci_info = {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-51-\t.setup = stmmac_default_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c=54=static int snps_gmac5_default_data(struct pci_dev pdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-101-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:102:static const struct stmmac_pci_info snps_gmac5_pci_info = {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-103-\t.setup = snps_gmac5_default_data,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-106-/\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:107: stmmac_pci_probe\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-108- \n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-117- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:118:static int stmmac_pci_probe(struct pci_dev pdev,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-119-\t\t\t const struct pci_device_id id)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-120-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:121:\tstruct stmmac_pci_info info = (struct stmmac_pci_info )id-\u003edriver_data;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-122-\tstruct plat_stmmacenet_data plat;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-179-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:180:\tplat-\u003esuspend = stmmac_pci_plat_suspend;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:181:\tplat-\u003eresume = stmmac_pci_plat_resume;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-182-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-186-/\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:187: stmmac_pci_remove\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-188- \n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-191- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:192:static void stmmac_pci_remove(struct pci_dev *pdev)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-193-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c=203=static const struct pci_device_id stmmac_id_table[] = {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:204:\t{ PCI_DEVICE_DATA(STMMAC, STMMAC, \u0026stmmac_pci_info) },\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:205:\t{ PCI_DEVICE_DATA(STMICRO, MAC, \u0026stmmac_pci_info) },\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-206-\t{ PCI_DEVICE_DATA(SYNOPSYS, GMAC5_ID, \u0026snps_gmac5_pci_info) },\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c=210=MODULE_DEVICE_TABLE(pci, stmmac_id_table);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-211-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:212:static struct pci_driver stmmac_pci_driver = {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-213-\t.name = STMMAC_RESOURCE_NAME,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-214-\t.id_table = stmmac_id_table,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:215:\t.probe = stmmac_pci_probe,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:216:\t.remove = stmmac_pci_remove,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-217-\t.driver = {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-221-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:222:module_pci_driver(stmmac_pci_driver);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_pci.c-223-\n" }
5/2	2026/07/30 15:43	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 13919 output: 19 thoughts: 1126 Thoughts: Assessing the Fuzzability of the `stmmac` Driver Okay, so I'm looking at `stmmac`, a PCI driver with `stmmac_pci_driver` and its connections to Intel and Loongson devices. The question is: is it fuzzable? Initially, it seems promising; it's a network driver and Syzkaller handles PCI device fuzzing, or virtual network interfaces, right? But, wait. It's a PCI device. Syzkaller can fuzz PCI devices either through PCI emulation or network interfaces, if accessible via netlink/ioctl. And, QEMU doesn't natively emulate the STMMAC PCI, which is what's important here. Though Syzkaller can inject PCI devices? No, Syzkaller doesn't dynamically emulate PCI, it uses QEMU's PCI. Syzkaller has utilities like `syz_pci_device_add`? No, more like `syz_usb_connect` and `syz_80211_inject_frame`. But Syzkaller can still reach network interfaces. However, if the hardware isn't present, the driver won't probe, which is the crux. Hold on, isn't `stmmac` also a platform driver? Yes, it's used in ARM SoCs – Rockchip, Allwinner, etc. – some of which QEMU emulates. But Syzkaller mostly targets x86_64, and occasionally ARM64. The prompt mentions unreachable code in virtualized environments, like in GCE or QEMU, even with software-emulated hardware. It calls out vendor-specific PCIe switch drivers, SmartNICs, or GPUs (e.g., mlxsw, qed, amdgpu), which require physical PCIe cards. Is `stmmac` one of them? `stmmac` is a standard Ethernet MAC driver, used by `dwmac-intel.c`, which is a PCI driver (Intel Elkhart Lake, etc.). But QEMU doesn't emulate Intel Elkhart Lake Ethernet. But, `stmmac` is also a platform driver. Can QEMU emulate a platform device that uses `stmmac`? Let's check QEMU's emulation. QEMU has `sun8i-emac`, `fec`, `macb`, `npcm7xx_emc`, `ftgmac100`, and `stellaris_enet`, but none are `stmmac`. So, the question is: does QEMU emulate `stmmac` directly? Let me check the QEMU source to make sure or just use my knowledge of how Syzkaller approaches this. Wait, this patch was authored by `syz-cluster`. That suggests syzkaller found a bug here or it's a patch being tested. Ah, "syz-cluster: applied patch under review" – it's a patch being tested! If Syzkaller can reach it, it means it's reachable. Though maybe Syzkaller can't reach it, which is the point here; I need to assess fuzzability. If it's not reachable in QEMU, I should return `WorthFuzzing=false`. I need to confirm if `stmmac` is dependent on hardware, or if software emulation can get it probed. Is there a virtual or mock driver for stmmac? No. Ah! `stmmac` is used by `dwmac-intel.c`, which is a PCI device. While Syzkaller's `syz_pci_device_add` might not exist as a pseudo syscall, it does have PCI fuzzing using `vfio` or `pci` subsystem fuzzing. I need to make sure I check the pseudo-syscalls to ensure that I am not forgetting anything.
6/2	2026/07/30 15:44	tool	grepper	0m Error: no matches Args: { "Expression": "syz_pci" } Results: { "error": "no matches" }
7/2	2026/07/30 15:44	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 15935 output: 21 thoughts: 145 Thoughts: Navigating the Syzkaller Search Limitations Okay, so I need to figure out how to approach this. First thought was to use `read-file` or `codesearch-dir-index` to look for syzkaller pseudo-syscalls. But hold on, the prompt specifically warns against that. It's a key restriction: no searching `sys/` or expressions with "syz_" because they aren't actually in the Linux kernel and therefore won't be in my search results. That's good, I was on the right track, but I need to switch gears. Alright, so I was thinking about QEMU and the mention of `hw/net/dwmac.c`. I need to figure out if there's any `dwmac` presence in QEMU. Now, I can't directly search the QEMU source files, which presents a challenge. However, I can* check the Linux kernel source for `stmmac` platform devices. This is a good workaround; I can use that to help me in my investigation.
8/2	2026/07/30 15:44	tool	grepper	0m Args: { "Expression": "\"snps,dwmac\"" } Results: { "Output": "Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml=158=examples:\n--\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml-167- compatible = \"altr,socfpga-stmmac\", \"snps,dwmac-3.70a\",\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml:168: \"snps,dwmac\";\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml-169- altr,sysmgr-syscon = \u003c\u0026sysmgr 0x60 0\u003e;\n--\nDocumentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml=172=examples:\n--\nDocumentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml-174- ethmac: ethernet@c9410000 {\nDocumentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml:175: compatible = \"amlogic,meson-gxbb-dwmac\", \"snps,dwmac\";\nDocumentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml-176- reg = \u003c0xc9410000 0x10000\u003e, \u003c0xc8834540 0x8\u003e;\n--\nDocumentation/devicetree/bindings/net/anarion-gmac.txt=6=Required properties:\nDocumentation/devicetree/bindings/net/anarion-gmac.txt:7: - compatible: Should be \"adaptrum,anarion-gmac\", \"snps,dwmac\"\nDocumentation/devicetree/bindings/net/anarion-gmac.txt-8- - phy-mode: Should be \"rgmii\". Other modes are not currently supported.\n--\nDocumentation/devicetree/bindings/net/anarion-gmac.txt=11=Examples:\n--\nDocumentation/devicetree/bindings/net/anarion-gmac.txt-13-\tgmac1: ethernet@f2014000 {\nDocumentation/devicetree/bindings/net/anarion-gmac.txt:14:\t\tcompatible = \"adaptrum,anarion-gmac\", \"snps,dwmac\";\nDocumentation/devicetree/bindings/net/anarion-gmac.txt-15-\t\treg = \u003c0xf2014000 0x4000\u003e, \u003c0xf2018100 8\u003e;\n--\nDocumentation/devicetree/bindings/net/ipq806x-dwmac.txt=6=Required properties:\nDocumentation/devicetree/bindings/net/ipq806x-dwmac.txt-7-\nDocumentation/devicetree/bindings/net/ipq806x-dwmac.txt:8:- compatible: should be \"qcom,ipq806x-gmac\" along with \"snps,dwmac\"\nDocumentation/devicetree/bindings/net/ipq806x-dwmac.txt-9-\t and any applicable more detailed version number\n--\nDocumentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml=67=examples:\n--\nDocumentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml-71- ethernet@40010000 {\nDocumentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml:72: compatible = \"nxp,lpc1850-dwmac\", \"snps,dwmac-3.611\", \"snps,dwmac\";\nDocumentation/devicetree/bindings/net/nxp,lpc1850-dwmac.yaml-73- reg = \u003c0x40010000 0x2000\u003e;\n--\nDocumentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml=52=examples:\n--\nDocumentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml-57- ethernet@44000000 {\nDocumentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml:58: compatible = \"renesas,r9a06g032-gmac\", \"renesas,rzn1-gmac\", \"snps,dwmac\";\nDocumentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml-59- reg = \u003c0x44000000 0x2000\u003e;\n--\nDocumentation/devicetree/bindings/net/sti-dwmac.txt=34=ethernet0: dwmac@9630000 {\nDocumentation/devicetree/bindings/net/sti-dwmac.txt-35-\tdevice_type = \"network\";\nDocumentation/devicetree/bindings/net/sti-dwmac.txt:36:\tcompatible = \"st,stih407-dwmac\", \"snps,dwmac\", \"snps,dwmac-3.710\";\nDocumentation/devicetree/bindings/net/sti-dwmac.txt-37-\treg = \u003c0x9630000 0x8000\u003e;\n--\narch/arc/boot/dts/abilis_tb10x.dtsi=96=\t\tethernet@fe100000 {\narch/arc/boot/dts/abilis_tb10x.dtsi:97:\t\t\tcompatible = \"snps,dwmac-3.70a\",\"snps,dwmac\";\narch/arc/boot/dts/abilis_tb10x.dtsi-98-\t\t\treg = \u003c0xfe100000 0x1058\u003e;\n--\narch/arc/boot/dts/axs10x_mb.dtsi=73=\t\tgmac: ethernet@18000 {\narch/arc/boot/dts/axs10x_mb.dtsi-74-\t\t\t#interrupt-cells = \u003c1\u003e;\narch/arc/boot/dts/axs10x_mb.dtsi:75:\t\t\tcompatible = \"snps,dwmac\";\narch/arc/boot/dts/axs10x_mb.dtsi-76-\t\t\treg = \u003c 0x18000 0x2000 \u003e;\n--\narch/arc/boot/dts/hsdk.dts=207=\t\tgmac: ethernet@8000 {\narch/arc/boot/dts/hsdk.dts:208:\t\t\tcompatible = \"snps,dwmac\";\narch/arc/boot/dts/hsdk.dts-209-\t\t\treg = \u003c0x8000 0x2000\u003e;\n--\narch/arc/boot/dts/vdk_axs10x_mb.dtsi=36=\t\tethernet@18000 {\narch/arc/boot/dts/vdk_axs10x_mb.dtsi-37-\t\t\t#interrupt-cells = \u003c1\u003e;\narch/arc/boot/dts/vdk_axs10x_mb.dtsi:38:\t\t\tcompatible = \"snps,dwmac\";\narch/arc/boot/dts/vdk_axs10x_mb.dtsi-39-\t\t\treg = \u003c 0x18000 0x2000 \u003e;\n--\narch/arm/boot/dts/amlogic/meson.dtsi=274=\t\tethmac: ethernet@c9410000 {\narch/arm/boot/dts/amlogic/meson.dtsi:275:\t\t\tcompatible = \"amlogic,meson6-dwmac\", \"snps,dwmac\";\narch/arm/boot/dts/amlogic/meson.dtsi-276-\t\t\treg = \u003c0xc9410000 0x10000\n--\narch/arm/boot/dts/amlogic/meson8b.dtsi=564=\u0026ethmac {\narch/arm/boot/dts/amlogic/meson8b.dtsi:565:\tcompatible = \"amlogic,meson8b-dwmac\", \"snps,dwmac-3.70a\", \"snps,dwmac\";\narch/arm/boot/dts/amlogic/meson8b.dtsi-566-\n--\narch/arm/boot/dts/amlogic/meson8m2.dtsi=27=\u0026ethmac {\narch/arm/boot/dts/amlogic/meson8m2.dtsi:28:\tcompatible = \"amlogic,meson8m2-dwmac\", \"snps,dwmac\";\narch/arm/boot/dts/amlogic/meson8m2.dtsi-29-\treg = \u003c0xc9410000 0x10000\n--\narch/arm/boot/dts/axis/artpec6.dtsi=287=\t\tethernet: ethernet@f8010000 {\n--\narch/arm/boot/dts/axis/artpec6.dtsi-290-\t\t\t\t\u003c\u0026clkctrl ARTPEC6_CLK_PTP_REF\u003e;\narch/arm/boot/dts/axis/artpec6.dtsi:291:\t\t\tcompatible = \"snps,dwmac-4.10a\", \"snps,dwmac\";\narch/arm/boot/dts/axis/artpec6.dtsi-292-\t\t\tinterrupts = \u003cGIC_SPI 98 IRQ_TYPE_LEVEL_HIGH\u003e,\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi=568=\t\tgmac0: ethernet@ff700000 {\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi:569:\t\t\tcompatible = \"altr,socfpga-stmmac\", \"snps,dwmac-3.70a\", \"snps,dwmac\";\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-570-\t\t\taltr,sysmgr-syscon = \u003c\u0026sysmgr 0x60 0\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi=587=\t\tgmac1: ethernet@ff702000 {\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi:588:\t\t\tcompatible = \"altr,socfpga-stmmac\", \"snps,dwmac-3.70a\", \"snps,dwmac\";\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-589-\t\t\taltr,sysmgr-syscon = \u003c\u0026sysmgr 0x60 2\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=427=\t\tgmac0: ethernet@ff800000 {\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:428:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.72a\", \"snps,dwmac\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-429-\t\t\taltr,sysmgr-syscon = \u003c\u0026sysmgr 0x44 0\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=447=\t\tgmac1: ethernet@ff802000 {\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:448:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.72a\", \"snps,dwmac\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-449-\t\t\taltr,sysmgr-syscon = \u003c\u0026sysmgr 0x48 8\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=467=\t\tgmac2: ethernet@ff804000 {\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:468:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.72a\", \"snps,dwmac\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-469-\t\t\taltr,sysmgr-syscon = \u003c\u0026sysmgr 0x4C 16\u003e;\n--\narch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi=137=\t\tgmac0: ethernet@f0802000 {\narch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi-138-\t\t\tdevice_type = \"network\";\narch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi:139:\t\t\tcompatible = \"snps,dwmac\";\narch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi-140-\t\t\treg = \u003c0xf0802000 0x2000\u003e;\n--\narch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi=47=\t\tgmac1: ethernet@f0804000 {\narch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi-48-\t\t\tdevice_type = \"network\";\narch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi:49:\t\t\tcompatible = \"snps,dwmac\";\narch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi-50-\t\t\treg = \u003c0xf0804000 0x2000\u003e;\n--\narch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi=184=\t\tmac: ethernet@40010000 {\narch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi:185:\t\t\tcompatible = \"nxp,lpc1850-dwmac\", \"snps,dwmac-3.611\", \"snps,dwmac\";\narch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi-186-\t\t\treg = \u003c0x40010000 0x2000\u003e;\n--\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi=1291=\t\tgmac0: ethernet@37000000 {\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1292-\t\t\tdevice_type = \"network\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi:1293:\t\t\tcompatible = \"qcom,ipq806x-gmac\", \"snps,dwmac\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1294-\t\t\treg = \u003c0x37000000 0x200000\u003e;\n--\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi=1315=\t\tgmac1: ethernet@37200000 {\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1316-\t\t\tdevice_type = \"network\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi:1317:\t\t\tcompatible = \"qcom,ipq806x-gmac\", \"snps,dwmac\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1318-\t\t\treg = \u003c0x37200000 0x200000\u003e;\n--\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi=1339=\t\tgmac2: ethernet@37400000 {\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1340-\t\t\tdevice_type = \"network\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi:1341:\t\t\tcompatible = \"qcom,ipq806x-gmac\", \"snps,dwmac\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1342-\t\t\treg = \u003c0x37400000 0x200000\u003e;\n--\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi=1363=\t\tgmac3: ethernet@37600000 {\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1364-\t\t\tdevice_type = \"network\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi:1365:\t\t\tcompatible = \"qcom,ipq806x-gmac\", \"snps,dwmac\";\narch/arm/boot/dts/qcom/qcom-ipq8064.dtsi-1366-\t\t\treg = \u003c0x37600000 0x200000\u003e;\n--\narch/arm/boot/dts/renesas/r9a06g032.dtsi=422=\t\tgmac1: ethernet@44000000 {\narch/arm/boot/dts/renesas/r9a06g032.dtsi:423:\t\t\tcompatible = \"renesas,r9a06g032-gmac\", \"renesas,rzn1-gmac\", \"snps,dwmac\";\narch/arm/boot/dts/renesas/r9a06g032.dtsi-424-\t\t\treg = \u003c0x44000000 0x2000\u003e;\n--\narch/arm/boot/dts/renesas/r9a06g032.dtsi=440=\t\tgmac2: ethernet@44002000 {\narch/arm/boot/dts/renesas/r9a06g032.dtsi:441:\t\t\tcompatible = \"renesas,r9a06g032-gmac\", \"renesas,rzn1-gmac\", \"snps,dwmac\";\narch/arm/boot/dts/renesas/r9a06g032.dtsi-442-\t\t\treg = \u003c0x44002000 0x2000\u003e;\n--\narch/arm/boot/dts/st/stih407-family.dtsi=788=\t\tethernet0: dwmac@9630000 {\n--\narch/arm/boot/dts/st/stih407-family.dtsi-790-\t\t\tstatus = \"disabled\";\narch/arm/boot/dts/st/stih407-family.dtsi:791:\t\t\tcompatible = \"st,stih407-dwmac\", \"snps,dwmac\", \"snps,dwmac-3.710\";\narch/arm/boot/dts/st/stih407-family.dtsi-792-\t\t\treg = \u003c0x9630000 0x8000\u003e, \u003c0x80 0x4\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=174=\t\tgmac0: ethernet@ff800000 {\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:175:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.74a\", \"snps,dwmac\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-176-\t\t\treg = \u003c0xff800000 0x2000\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=192=\t\tgmac1: ethernet@ff802000 {\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:193:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.74a\", \"snps,dwmac\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-194-\t\t\treg = \u003c0xff802000 0x2000\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=210=\t\tgmac2: ethernet@ff804000 {\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:211:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.74a\", \"snps,dwmac\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-212-\t\t\treg = \u003c0xff804000 0x2000\u003e;\n--\narch/arm64/boot/dts/amlogic/amlogic-c3.dtsi=1018=\t\tethmac: ethernet@fdc00000 {\n--\narch/arm64/boot/dts/amlogic/amlogic-c3.dtsi-1020-\t\t\t\t \"snps,dwmac-3.70a\",\narch/arm64/boot/dts/amlogic/amlogic-c3.dtsi:1021:\t\t\t\t \"snps,dwmac\";\narch/arm64/boot/dts/amlogic/amlogic-c3.dtsi-1022-\t\t\treg = \u003c0x0 0xfdc00000 0x0 0x10000\u003e,\n--\narch/arm64/boot/dts/amlogic/meson-axg.dtsi=304=\t\tethmac: ethernet@ff3f0000 {\n--\narch/arm64/boot/dts/amlogic/meson-axg.dtsi-306-\t\t\t\t \"snps,dwmac-3.70a\",\narch/arm64/boot/dts/amlogic/meson-axg.dtsi:307:\t\t\t\t \"snps,dwmac\";\narch/arm64/boot/dts/amlogic/meson-axg.dtsi-308-\t\t\treg = \u003c0x0 0xff3f0000 0x0 0x10000\u003e,\n--\narch/arm64/boot/dts/amlogic/meson-g12-common.dtsi=169=\t\tethmac: ethernet@ff3f0000 {\n--\narch/arm64/boot/dts/amlogic/meson-g12-common.dtsi-171-\t\t\t\t \"snps,dwmac-3.70a\",\narch/arm64/boot/dts/amlogic/meson-g12-common.dtsi:172:\t\t\t\t \"snps,dwmac\";\narch/arm64/boot/dts/amlogic/meson-g12-common.dtsi-173-\t\t\treg = \u003c0x0 0xff3f0000 0x0 0x10000\u003e,\n--\narch/arm64/boot/dts/amlogic/meson-gx.dtsi=610=\t\tethmac: ethernet@c9410000 {\n--\narch/arm64/boot/dts/amlogic/meson-gx.dtsi-612-\t\t\t\t \"snps,dwmac-3.70a\",\narch/arm64/boot/dts/amlogic/meson-gx.dtsi:613:\t\t\t\t \"snps,dwmac\";\narch/arm64/boot/dts/amlogic/meson-gx.dtsi-614-\t\t\treg = \u003c0x0 0xc9410000 0x0 0x10000\u003e,\n--\narch/arm64/boot/dts/amlogic/meson-s4.dtsi=827=\t\tethmac: ethernet@fdc00000 {\n--\narch/arm64/boot/dts/amlogic/meson-s4.dtsi-829-\t\t\t\t \"snps,dwmac-3.70a\",\narch/arm64/boot/dts/amlogic/meson-s4.dtsi:830:\t\t\t\t \"snps,dwmac\";\narch/arm64/boot/dts/amlogic/meson-s4.dtsi-831-\t\t\treg = \u003c0x0 0xfdc00000 0x0 0x10000\u003e,\n--\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi=173=\t\tgmac0: ethernet@ff800000 {\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi:174:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.74a\", \"snps,dwmac\";\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi-175-\t\t\treg = \u003c0xff800000 0x2000\u003e;\n--\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi=191=\t\tgmac1: ethernet@ff802000 {\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi:192:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.74a\", \"snps,dwmac\";\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi-193-\t\t\treg = \u003c0xff802000 0x2000\u003e;\n--\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi=209=\t\tgmac2: ethernet@ff804000 {\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi:210:\t\t\tcompatible = \"altr,socfpga-stmmac-a10-s10\", \"snps,dwmac-3.74a\", \"snps,dwmac\";\narch/arm64/boot/dts/intel/socfpga_agilex.dtsi-211-\t\t\treg = \u003c0xff804000 0x2000\u003e;\n--\narch/mips/boot/dts/img/pistachio.dtsi=779=\tenet: ethernet@18140000 {\narch/mips/boot/dts/img/pistachio.dtsi:780:\t\tcompatible = \"snps,dwmac\";\narch/mips/boot/dts/img/pistachio.dtsi-781-\t\treg = \u003c0x18140000 0x2000\u003e;\n--\narch/mips/boot/dts/ingenic/x1000.dtsi=377=\tmac: ethernet@134b0000 {\narch/mips/boot/dts/ingenic/x1000.dtsi:378:\t\tcompatible = \"ingenic,x1000-mac\", \"snps,dwmac\";\narch/mips/boot/dts/ingenic/x1000.dtsi-379-\t\treg = \u003c0x134b0000 0x2000\u003e;\n--\narch/mips/boot/dts/ingenic/x1830.dtsi=387=\tmac: ethernet@134b0000 {\narch/mips/boot/dts/ingenic/x1830.dtsi:388:\t\tcompatible = \"ingenic,x1830-mac\", \"snps,dwmac\";\narch/mips/boot/dts/ingenic/x1830.dtsi-389-\t\treg = \u003c0x134b0000 0x2000\u003e;\n--\narch/riscv/boot/dts/starfive/jh7100.dtsi=211=\t\tgmac: ethernet@10020000 {\narch/riscv/boot/dts/starfive/jh7100.dtsi:212:\t\t\tcompatible = \"starfive,jh7100-dwmac\", \"snps,dwmac\";\narch/riscv/boot/dts/starfive/jh7100.dtsi-213-\t\t\treg = \u003c0x0 0x10020000 0x0 0x10000\u003e;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c=52=static const struct of_device_id dwmac_generic_match[] = {\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-61-\t{ .compatible = \"snps,dwmac-4.10a\"},\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c:62:\t{ .compatible = \"snps,dwmac\"},\ndrivers/net/ethernet/stmicro/stmmac/dwmac-generic.c-63-\t{ .compatible = \"snps,dwxgmac-2.10\"},\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_platform.c=416=stmmac_probe_config_dt(struct platform_device pdev, u8 mac)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_platform.c-503-\t\tof_device_is_compatible(np, \"snps,dwmac-3.72a\") \|\|\ndrivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:504:\t\tof_device_is_compatible(np, \"snps,dwmac\")) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_platform.c-505-\t\t/* Note that the max-frame-size parameter as defined in the\n" }
9/2	2026/07/30 15:44	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 24290 output: 16 thoughts: 523 Thoughts: Investigating QEMU Support for STMMAC Alright, so `stmmac` is a pretty ubiquitous Ethernet driver, particularly on ARM, MIPS, and RISC-V boards. My initial thought is to figure out if QEMU offers any emulation support for it. Let's see... can QEMU emulate any of those architectures that commonly use `stmmac`? I started with a potential lead: `amlogic,meson-gxbb-dwmac`. QEMU has some meson support, like the Raspberry Pi emulation (`hw/arm/raspi.c`). But, on second thought, that's Amlogic, not directly related. I know QEMU supports boards like the Cubieboard (`hw/arm/cubieboard.c`) based on Allwinner chips, and the generic virt platform (`hw/arm/virt.c`), but I don't see anything obvious. Wait, there's `hw/arm/npcm7xx.c` which uses `npcm7xx_emc.c`, but it doesn't mention `stmmac` directly. Okay, let's switch gears and focus on the networking side of things. Does QEMU have a `dwmac.c`? No. Scanning through the network device files, I see a long list: `allwinner-sun8i-emac`, `cadence_gem`, `dp8393x`, `e1000`, `eepro100`, `fsl_etsec`, `ftgmac100`, `imx_fec`, `lan9118`, `mcf_fec`, `mipsnet`, `ne2000`, `opencores_eth`, `pcnet`, `rocker/`, `rtl8139`, `smc91c111`, `spapr_llan`, `stellaris_enet`, `sungem`, `sunhme`, `tulip`, `virtio-net`, `vmxnet3`, and `xgmac`. That's a lot, but wait... `xgmac`! Is there any connection between `xgmac` and `stmmac`? It's time to dig into the `stmmac` source code and see if there's any reference to `xgmac`. That seems like the most logical next step.
10/2	2026/07/30 15:44	tool	grepper	0m Args: { "Expression": "xgmac" } Results: { "Output": "\nFull output is too long, showing 500 out of 3355 lines.\nUse more precise expression if possible.\n\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml=31=properties:\n--\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml-47- - const: altr,socfpga-stmmac-agilex5\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml:48: - const: snps,dwxgmac-2.10\nDocumentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml-49-\n--\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-3----\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml:4:$id: http://devicetree.org/schemas/net/calxeda-xgmac.yaml#\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-5-$schema: http://devicetree.org/meta-schemas/core.yaml#\n--\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml=19=properties:\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-20- compatible:\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml:21: const: calxeda,hb-xgmac\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-22-\n--\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-27- description: \|\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml:28: Can point to at most 3 xgmac interrupts. The 1st one is the main\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-29- interrupt, the 2nd one is used for power management. The optional\n--\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml=43=examples:\n--\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-45- ethernet@fff50000 {\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml:46: compatible = \"calxeda,hb-xgmac\";\nDocumentation/devicetree/bindings/net/calxeda-xgmac.yaml-47- reg = \u003c0xfff50000 0x1000\u003e;\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml=18=select:\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-36- - snps,dwmac-5.30a\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:37: - snps,dwxgmac\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:38: - snps,dwxgmac-2.10\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-39-\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml=46=properties:\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-113- - snps,dwmac-5.40a\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:114: - snps,dwxgmac\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:115: - snps,dwxgmac-2.10\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-116- - sophgo,sg2042-dwmac\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml=611=allOf:\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-643- - snps,dwmac-5.40a\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:644: - snps,dwxgmac\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:645: - snps,dwxgmac-2.10\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-646- - st,spear600-gmac\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml=654=examples:\n--\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-656- gmac0: ethernet@e0800000 {\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml:657: compatible = \"snps,dwxgmac-2.10\", \"snps,dwxgmac\";\nDocumentation/devicetree/bindings/net/snps,dwmac.yaml-658- reg = \u003c0xe0800000 0x8000\u003e;\n--\nDocumentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst=26=directly by the dpaa2-eth driver or by phylink.\n--\nDocumentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst-32- +--------------------------------------+\nDocumentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst:33: +------------+ +---------+ \| xgmac_mdio \|\nDocumentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst-34- \| net_device \| \| phylink \|--\| +-----+ +-----+ +-----+ +-----+ \|\n--\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst=448=is used to configure the AMBA bridge to generate more efficient STBus traffic::\n--\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-495-\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst:496: int has_xgmac;\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-497-\n--\narch/arm/boot/dts/calxeda/ecx-common.dtsi=203=\t\tethernet@fff50000 {\narch/arm/boot/dts/calxeda/ecx-common.dtsi:204:\t\t\tcompatible = \"calxeda,hb-xgmac\";\narch/arm/boot/dts/calxeda/ecx-common.dtsi-205-\t\t\treg = \u003c0xfff50000 0x1000\u003e;\n--\narch/arm/boot/dts/calxeda/ecx-common.dtsi=210=\t\tethernet@fff51000 {\narch/arm/boot/dts/calxeda/ecx-common.dtsi:211:\t\t\tcompatible = \"calxeda,hb-xgmac\";\narch/arm/boot/dts/calxeda/ecx-common.dtsi-212-\t\t\treg = \u003c0xfff51000 0x1000\u003e;\n--\narch/arm/mach-highbank/highbank.c=67=static int highbank_platform_notifier(struct notifier_block nb,\n--\narch/arm/mach-highbank/highbank.c-83-\t\treg = 0x20;\narch/arm/mach-highbank/highbank.c:84:\telse if (of_device_is_compatible(dev-\u003eof_node, \"calxeda,hb-xgmac\")) {\narch/arm/mach-highbank/highbank.c-85-\t\tres = platform_get_resource(to_platform_device(dev),\n--\narch/arm64/boot/dts/amd/amd-seattle-clks.dtsi=29=\tdmaclk_500mhz: pcieclk_500mhz: clock-500000000 {\n--\narch/arm64/boot/dts/amd/amd-seattle-clks.dtsi-35-\narch/arm64/boot/dts/amd/amd-seattle-clks.dtsi:36:\txgmacclk0_dma_250mhz: xgmacclk0_ptp_250mhz: xgmacclk1_dma_250mhz: xgmacclk1_ptp_250mhz:\narch/arm64/boot/dts/amd/amd-seattle-clks.dtsi-37-\tmiscclk_250mhz: clock-250000000 {\n--\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-7-\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:8:\txgmac0: ethernet@e0700000 {\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-9-\t\tcompatible = \"amd,xgbe-seattle-v1a\";\n--\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-26-\t\tmac-address = [ 02 A1 A2 A3 A4 A5 ];\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:27:\t\tclocks = \u003c\u0026xgmacclk0_dma_250mhz\u003e, \u003c\u0026xgmacclk0_ptp_250mhz\u003e;\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-28-\t\tclock-names = \"dma_clk\", \"ptp_clk\";\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-29-\t\tphy-mode = \"xgmii\";\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:30:\t\tiommus = \u003c\u0026xgmac0_smmu 0x00 0x17\u003e; / 0-7, 16-23 /\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-31-\t\tdma-coherent;\n--\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-33-\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:34:\txgmac1: ethernet@e0900000 {\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-35-\t\tcompatible = \"amd,xgbe-seattle-v1a\";\n--\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-52-\t\tmac-address = [ 02 B1 B2 B3 B4 B5 ];\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:53:\t\tclocks = \u003c\u0026xgmacclk1_dma_250mhz\u003e, \u003c\u0026xgmacclk1_ptp_250mhz\u003e;\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-54-\t\tclock-names = \"dma_clk\", \"ptp_clk\";\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-55-\t\tphy-mode = \"xgmii\";\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:56:\t\tiommus = \u003c\u0026xgmac1_smmu 0x00 0x17\u003e; / 0-7, 16-23 /\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-57-\t\tdma-coherent;\n--\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-59-\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:60:\txgmac0_smmu: iommu@e0600000 {\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-61-\t\t compatible = \"arm,mmu-401\";\n--\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-72-\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi:73:\t xgmac1_smmu: iommu@e0800000 {\narch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi-74-\t\t compatible = \"arm,mmu-401\";\n--\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi=556=\t\tgmac0: ethernet@10810000 {\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi-557-\t\t\tcompatible = \"altr,socfpga-stmmac-agilex5\",\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi:558:\t\t\t\t \"snps,dwxgmac-2.10\";\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi-559-\t\t\treg = \u003c0x10810000 0x3500\u003e;\n--\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi=669=\t\tgmac1: ethernet@10820000 {\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi-670-\t\t\tcompatible = \"altr,socfpga-stmmac-agilex5\",\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi:671:\t\t\t\t \"snps,dwxgmac-2.10\";\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi-672-\t\t\treg = \u003c0x10820000 0x3500\u003e;\n--\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi=782=\t\tgmac2: ethernet@10830000 {\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi-783-\t\t\tcompatible = \"altr,socfpga-stmmac-agilex5\",\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi:784:\t\t\t\t \"snps,dwxgmac-2.10\";\narch/arm64/boot/dts/intel/socfpga_agilex5.dtsi-785-\t\t\treg = \u003c0x10830000 0x3500\u003e;\n--\ndrivers/clk/qcom/nsscc-ipq5424.c=481=static struct clk_regmap_div nss_cc_port3_tx_div_clk_src = {\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-495-\ndrivers/clk/qcom/nsscc-ipq5424.c:496:static struct clk_regmap_div nss_cc_xgmac0_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq5424.c-497-\t.reg = 0x3f4,\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-500-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq5424.c:501:\t\t.name = \"nss_cc_xgmac0_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq5424.c-502-\t\t.parent_hws = (const struct clk_hw[]){\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-510-\ndrivers/clk/qcom/nsscc-ipq5424.c:511:static struct clk_regmap_div nss_cc_xgmac1_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq5424.c-512-\t.reg = 0x3f8,\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-515-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq5424.c:516:\t\t.name = \"nss_cc_xgmac1_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq5424.c-517-\t\t.parent_hws = (const struct clk_hw[]){\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-525-\ndrivers/clk/qcom/nsscc-ipq5424.c:526:static struct clk_regmap_div nss_cc_xgmac2_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq5424.c-527-\t.reg = 0x3fc,\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-530-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq5424.c:531:\t\t.name = \"nss_cc_xgmac2_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq5424.c-532-\t\t.parent_hws = (const struct clk_hw[]){\n--\ndrivers/clk/qcom/nsscc-ipq5424.c=1094=static struct clk_branch nss_cc_uniphy_port3_tx_clk = {\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1111-\ndrivers/clk/qcom/nsscc-ipq5424.c:1112:static struct clk_branch nss_cc_xgmac0_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq5424.c-1113-\t.halt_reg = 0x448,\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1118-\t\t.hw.init = \u0026(const struct clk_init_data){\ndrivers/clk/qcom/nsscc-ipq5424.c:1119:\t\t\t.name = \"nss_cc_xgmac0_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq5424.c-1120-\t\t\t.parent_hws = (const struct clk_hw[]){\ndrivers/clk/qcom/nsscc-ipq5424.c:1121:\t\t\t\t\u0026nss_cc_xgmac0_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq5424.c-1122-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1129-\ndrivers/clk/qcom/nsscc-ipq5424.c:1130:static struct clk_branch nss_cc_xgmac1_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq5424.c-1131-\t.halt_reg = 0x44c,\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1136-\t\t.hw.init = \u0026(const struct clk_init_data){\ndrivers/clk/qcom/nsscc-ipq5424.c:1137:\t\t\t.name = \"nss_cc_xgmac1_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq5424.c-1138-\t\t\t.parent_hws = (const struct clk_hw[]){\ndrivers/clk/qcom/nsscc-ipq5424.c:1139:\t\t\t\t\u0026nss_cc_xgmac1_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq5424.c-1140-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1147-\ndrivers/clk/qcom/nsscc-ipq5424.c:1148:static struct clk_branch nss_cc_xgmac2_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq5424.c-1149-\t.halt_reg = 0x450,\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1154-\t\t.hw.init = \u0026(const struct clk_init_data){\ndrivers/clk/qcom/nsscc-ipq5424.c:1155:\t\t\t.name = \"nss_cc_xgmac2_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq5424.c-1156-\t\t\t.parent_hws = (const struct clk_hw[]){\ndrivers/clk/qcom/nsscc-ipq5424.c:1157:\t\t\t\t\u0026nss_cc_xgmac2_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq5424.c-1158-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq5424.c=1166=static struct clk_regmap nss_cc_ipq5424_clocks[] = {\n--\ndrivers/clk/qcom/nsscc-ipq5424.c-1214-\t[NSS_CC_UNIPHY_PORT3_TX_CLK] = \u0026nss_cc_uniphy_port3_tx_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c:1215:\t[NSS_CC_XGMAC0_PTP_REF_CLK] = \u0026nss_cc_xgmac0_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c:1216:\t[NSS_CC_XGMAC0_PTP_REF_DIV_CLK_SRC] = \u0026nss_cc_xgmac0_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c:1217:\t[NSS_CC_XGMAC1_PTP_REF_CLK] = \u0026nss_cc_xgmac1_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c:1218:\t[NSS_CC_XGMAC1_PTP_REF_DIV_CLK_SRC] = \u0026nss_cc_xgmac1_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c:1219:\t[NSS_CC_XGMAC2_PTP_REF_CLK] = \u0026nss_cc_xgmac2_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c:1220:\t[NSS_CC_XGMAC2_PTP_REF_DIV_CLK_SRC] = \u0026nss_cc_xgmac2_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq5424.c-1221-};\n--\ndrivers/clk/qcom/nsscc-ipq9574.c=980=static struct clk_regmap_div nss_cc_ubi3_div_clk_src = {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-994-\ndrivers/clk/qcom/nsscc-ipq9574.c:995:static struct clk_regmap_div nss_cc_xgmac0_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq9574.c-996-\t.reg = 0x28214,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-999-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:1000:\t\t.name = \"nss_cc_xgmac0_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq9574.c-1001-\t\t.parent_data = \u0026(const struct clk_parent_data) {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1009-\ndrivers/clk/qcom/nsscc-ipq9574.c:1010:static struct clk_regmap_div nss_cc_xgmac1_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq9574.c-1011-\t.reg = 0x28218,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1014-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:1015:\t\t.name = \"nss_cc_xgmac1_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq9574.c-1016-\t\t.parent_data = \u0026(const struct clk_parent_data) {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1024-\ndrivers/clk/qcom/nsscc-ipq9574.c:1025:static struct clk_regmap_div nss_cc_xgmac2_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq9574.c-1026-\t.reg = 0x2821c,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1029-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:1030:\t\t.name = \"nss_cc_xgmac2_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq9574.c-1031-\t\t.parent_data = \u0026(const struct clk_parent_data) {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1039-\ndrivers/clk/qcom/nsscc-ipq9574.c:1040:static struct clk_regmap_div nss_cc_xgmac3_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq9574.c-1041-\t.reg = 0x28220,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1044-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:1045:\t\t.name = \"nss_cc_xgmac3_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq9574.c-1046-\t\t.parent_data = \u0026(const struct clk_parent_data) {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1054-\ndrivers/clk/qcom/nsscc-ipq9574.c:1055:static struct clk_regmap_div nss_cc_xgmac4_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq9574.c-1056-\t.reg = 0x28224,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1059-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:1060:\t\t.name = \"nss_cc_xgmac4_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq9574.c-1061-\t\t.parent_data = \u0026(const struct clk_parent_data) {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1069-\ndrivers/clk/qcom/nsscc-ipq9574.c:1070:static struct clk_regmap_div nss_cc_xgmac5_ptp_ref_div_clk_src = {\ndrivers/clk/qcom/nsscc-ipq9574.c-1071-\t.reg = 0x28228,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-1074-\t.clkr.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:1075:\t\t.name = \"nss_cc_xgmac5_ptp_ref_div_clk_src\",\ndrivers/clk/qcom/nsscc-ipq9574.c-1076-\t\t.parent_data = \u0026(const struct clk_parent_data) {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c=2614=static struct clk_branch nss_cc_uniphy_port6_tx_clk = {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2631-\ndrivers/clk/qcom/nsscc-ipq9574.c:2632:static struct clk_branch nss_cc_xgmac0_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq9574.c-2633-\t.halt_reg = 0x28264,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2638-\t\t.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2639:\t\t\t.name = \"nss_cc_xgmac0_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq9574.c-2640-\t\t\t.parent_data = \u0026(const struct clk_parent_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2641:\t\t\t\t.hw = \u0026nss_cc_xgmac0_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq9574.c-2642-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2649-\ndrivers/clk/qcom/nsscc-ipq9574.c:2650:static struct clk_branch nss_cc_xgmac1_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq9574.c-2651-\t.halt_reg = 0x28268,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2656-\t\t.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2657:\t\t\t.name = \"nss_cc_xgmac1_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq9574.c-2658-\t\t\t.parent_data = \u0026(const struct clk_parent_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2659:\t\t\t\t.hw = \u0026nss_cc_xgmac1_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq9574.c-2660-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2667-\ndrivers/clk/qcom/nsscc-ipq9574.c:2668:static struct clk_branch nss_cc_xgmac2_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq9574.c-2669-\t.halt_reg = 0x2826c,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2674-\t\t.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2675:\t\t\t.name = \"nss_cc_xgmac2_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq9574.c-2676-\t\t\t.parent_data = \u0026(const struct clk_parent_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2677:\t\t\t\t.hw = \u0026nss_cc_xgmac2_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq9574.c-2678-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2685-\ndrivers/clk/qcom/nsscc-ipq9574.c:2686:static struct clk_branch nss_cc_xgmac3_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq9574.c-2687-\t.halt_reg = 0x28270,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2692-\t\t.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2693:\t\t\t.name = \"nss_cc_xgmac3_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq9574.c-2694-\t\t\t.parent_data = \u0026(const struct clk_parent_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2695:\t\t\t\t.hw = \u0026nss_cc_xgmac3_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq9574.c-2696-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2703-\ndrivers/clk/qcom/nsscc-ipq9574.c:2704:static struct clk_branch nss_cc_xgmac4_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq9574.c-2705-\t.halt_reg = 0x28274,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2710-\t\t.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2711:\t\t\t.name = \"nss_cc_xgmac4_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq9574.c-2712-\t\t\t.parent_data = \u0026(const struct clk_parent_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2713:\t\t\t\t.hw = \u0026nss_cc_xgmac4_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq9574.c-2714-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2721-\ndrivers/clk/qcom/nsscc-ipq9574.c:2722:static struct clk_branch nss_cc_xgmac5_ptp_ref_clk = {\ndrivers/clk/qcom/nsscc-ipq9574.c-2723-\t.halt_reg = 0x28278,\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2728-\t\t.hw.init = \u0026(const struct clk_init_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2729:\t\t\t.name = \"nss_cc_xgmac5_ptp_ref_clk\",\ndrivers/clk/qcom/nsscc-ipq9574.c-2730-\t\t\t.parent_data = \u0026(const struct clk_parent_data) {\ndrivers/clk/qcom/nsscc-ipq9574.c:2731:\t\t\t\t.hw = \u0026nss_cc_xgmac5_ptp_ref_div_clk_src.clkr.hw,\ndrivers/clk/qcom/nsscc-ipq9574.c-2732-\t\t\t},\n--\ndrivers/clk/qcom/nsscc-ipq9574.c=2740=static struct clk_regmap nss_cc_ipq9574_clocks[] = {\n--\ndrivers/clk/qcom/nsscc-ipq9574.c-2872-\t[NSS_CC_UNIPHY_PORT6_TX_CLK] = \u0026nss_cc_uniphy_port6_tx_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c:2873:\t[NSS_CC_XGMAC0_PTP_REF_CLK] = \u0026nss_cc_xgmac0_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2874-\t[NSS_CC_XGMAC0_PTP_REF_DIV_CLK_SRC] =\ndrivers/clk/qcom/nsscc-ipq9574.c:2875:\t\t\u0026nss_cc_xgmac0_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c:2876:\t[NSS_CC_XGMAC1_PTP_REF_CLK] = \u0026nss_cc_xgmac1_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2877-\t[NSS_CC_XGMAC1_PTP_REF_DIV_CLK_SRC] =\ndrivers/clk/qcom/nsscc-ipq9574.c:2878:\t\t\u0026nss_cc_xgmac1_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c:2879:\t[NSS_CC_XGMAC2_PTP_REF_CLK] = \u0026nss_cc_xgmac2_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2880-\t[NSS_CC_XGMAC2_PTP_REF_DIV_CLK_SRC] =\ndrivers/clk/qcom/nsscc-ipq9574.c:2881:\t\t\u0026nss_cc_xgmac2_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c:2882:\t[NSS_CC_XGMAC3_PTP_REF_CLK] = \u0026nss_cc_xgmac3_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2883-\t[NSS_CC_XGMAC3_PTP_REF_DIV_CLK_SRC] =\ndrivers/clk/qcom/nsscc-ipq9574.c:2884:\t\t\u0026nss_cc_xgmac3_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c:2885:\t[NSS_CC_XGMAC4_PTP_REF_CLK] = \u0026nss_cc_xgmac4_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2886-\t[NSS_CC_XGMAC4_PTP_REF_DIV_CLK_SRC] =\ndrivers/clk/qcom/nsscc-ipq9574.c:2887:\t\t\u0026nss_cc_xgmac4_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c:2888:\t[NSS_CC_XGMAC5_PTP_REF_CLK] = \u0026nss_cc_xgmac5_ptp_ref_clk.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2889-\t[NSS_CC_XGMAC5_PTP_REF_DIV_CLK_SRC] =\ndrivers/clk/qcom/nsscc-ipq9574.c:2890:\t\t\u0026nss_cc_xgmac5_ptp_ref_div_clk_src.clkr,\ndrivers/clk/qcom/nsscc-ipq9574.c-2891-\t[UBI32_PLL] = \u0026ubi32_pll.clkr,\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h=1404=do {\t\t\t\t\t\t\t\t\t\\\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1445-#define XGMAC_IOREAD(_pdata, _reg)\t\t\t\t\t\\\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h:1446:\tioread32((_pdata)-\u003exgmac_regs + _reg)\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1447-\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1453-#define XGMAC_IOWRITE(_pdata, _reg, _val)\t\t\t\t\\\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h:1454:\tiowrite32((_val), (_pdata)-\u003exgmac_regs + _reg)\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1455-\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h=1457=do {\t\t\t\t\t\t\t\t\t\\\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1469-#define XGMAC_MTL_IOREAD(_pdata, _n, _reg)\t\t\t\t\\\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h:1470:\tioread32((_pdata)-\u003exgmac_regs +\t\t\t\t\t\\\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1471-\t\t MTL_Q_BASE + ((_n) MTL_Q_INC) + _reg)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1478-#define XGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val)\t\t\t\\\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h:1479:\tiowrite32((_val), (_pdata)-\u003exgmac_regs +\t\t\t\\\ndrivers/net/ethernet/amd/xgbe/xgbe-common.h-1480-\t\t MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c=39=static ssize_t xgbe_common_write(const char __user buffer, size_t count,\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-64-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:65:static ssize_t xgmac_reg_addr_read(struct file filp, char __user buffer,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-66-\t\t\t\t size_t count, loff_t ppos)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-69-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:70:\treturn xgbe_common_read(buffer, count, ppos, pdata-\u003edebugfs_xgmac_reg);\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-71-}\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-72-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:73:static ssize_t xgmac_reg_addr_write(struct file filp,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-74-\t\t\t\t const char __user buffer,\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-79-\treturn xgbe_common_write(buffer, count, ppos,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:80:\t\t\t\t \u0026pdata-\u003edebugfs_xgmac_reg);\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-81-}\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-82-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:83:static ssize_t xgmac_reg_value_read(struct file filp, char __user buffer,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-84-\t\t\t\t size_t count, loff_t ppos)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-88-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:89:\tvalue = XGMAC_IOREAD(pdata, pdata-\u003edebugfs_xgmac_reg);\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-90-\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-93-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:94:static ssize_t xgmac_reg_value_write(struct file filp,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-95-\t\t\t\t const char __user buffer,\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-105-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:106:\tXGMAC_IOWRITE(pdata, pdata-\u003edebugfs_xgmac_reg, value);\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-107-\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-110-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:111:static const struct file_operations xgmac_reg_addr_fops = {\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-112-\t.owner = THIS_MODULE,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-113-\t.open = simple_open,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:114:\t.read = xgmac_reg_addr_read,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:115:\t.write = xgmac_reg_addr_write,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-116-};\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-117-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:118:static const struct file_operations xgmac_reg_value_fops = {\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-119-\t.owner = THIS_MODULE,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-120-\t.open = simple_open,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:121:\t.read = xgmac_reg_value_read,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:122:\t.write = xgmac_reg_value_write,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-123-};\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c=330=void xgbe_debugfs_init(struct xgbe_prv_data pdata)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-334-\t/* Set defaults /\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:335:\tpdata-\u003edebugfs_xgmac_reg = 0;\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-336-\tpdata-\u003edebugfs_xpcs_mmd = 1;\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-344-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:345:\tdebugfs_create_file(\"xgmac_register\", 0600, pdata-\u003exgbe_debugfs, pdata,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:346:\t\t\t \u0026xgmac_reg_addr_fops);\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-347-\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:348:\tdebugfs_create_file(\"xgmac_register_value\", 0600, pdata-\u003exgbe_debugfs,\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c:349:\t\t\t pdata, \u0026xgmac_reg_value_fops);\ndrivers/net/ethernet/amd/xgbe/xgbe-debugfs.c-350-\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-drv.c=81=static int xgbe_alloc_channels(struct xgbe_prv_data pdata)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-drv.c-104-\t\tchannel-\u003equeue_index = i;\ndrivers/net/ethernet/amd/xgbe/xgbe-drv.c:105:\t\tchannel-\u003edma_regs = pdata-\u003exgmac_regs + DMA_CH_BASE +\ndrivers/net/ethernet/amd/xgbe/xgbe-drv.c-106-\t\t\t\t (DMA_CH_INC * i);\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-main.c=152=int xgbe_config_netdev(struct xgbe_prv_data pdata)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-main.c-158-\tnetdev-\u003eirq = pdata-\u003edev_irq;\ndrivers/net/ethernet/amd/xgbe/xgbe-main.c:159:\tnetdev-\u003ebase_addr = (unsigned long)pdata-\u003exgmac_regs;\ndrivers/net/ethernet/amd/xgbe/xgbe-main.c-160-\teth_hw_addr_set(netdev, pdata-\u003emac_addr);\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c=100=static int xgbe_pci_probe(struct pci_dev pdev, const struct pci_device_id id)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c-143-\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c:144:\tpdata-\u003exgmac_regs = iomap_table[XGBE_XGMAC_BAR];\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c:145:\tif (!pdata-\u003exgmac_regs) {\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c:146:\t\tdev_err(dev, \"xgmac ioremap failed\\n\");\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c-147-\t\tret = -ENOMEM;\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c-149-\t}\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c:150:\tpdata-\u003exprop_regs = pdata-\u003exgmac_regs + XGBE_MAC_PROP_OFFSET;\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c:151:\tpdata-\u003exi2c_regs = pdata-\u003exgmac_regs + XGBE_I2C_CTRL_OFFSET;\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c-152-\tif (netif_msg_probe(pdata)) {\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c:153:\t\tdev_dbg(dev, \"xgmac_regs = %p\\n\", pdata-\u003exgmac_regs);\ndrivers/net/ethernet/amd/xgbe/xgbe-pci.c-154-\t\tdev_dbg(dev, \"xprop_regs = %p\\n\", pdata-\u003exprop_regs);\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c=150=static int xgbe_platform_probe(struct platform_device pdev)\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c-205-\t/* Obtain the mmio areas for the device /\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c:206:\tpdata-\u003exgmac_regs = devm_platform_ioremap_resource(pdev, 0);\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c:207:\tif (IS_ERR(pdata-\u003exgmac_regs)) {\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c:208:\t\tdev_err(dev, \"xgmac ioremap failed\\n\");\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c:209:\t\tret = PTR_ERR(pdata-\u003exgmac_regs);\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c-210-\t\tgoto err_io;\n--\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c-212-\tif (netif_msg_probe(pdata))\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c:213:\t\tdev_dbg(dev, \"xgmac_regs = %p\\n\", pdata-\u003exgmac_regs);\ndrivers/net/ethernet/amd/xgbe/xgbe-platform.c-214-\n--\ndrivers/net/ethernet/amd/xgbe/xgbe.h=993=struct xgbe_prv_data {\n--\ndrivers/net/ethernet/amd/xgbe/xgbe.h-1009-\t/ XGMAC/XPCS related mmio registers /\ndrivers/net/ethernet/amd/xgbe/xgbe.h:1010:\tvoid __iomem xgmac_regs;\t/* XGMAC CSRs /\ndrivers/net/ethernet/amd/xgbe/xgbe.h-1011-\tvoid __iomem xpcs_regs;\t/* XPCS MMD registers /\n--\ndrivers/net/ethernet/amd/xgbe/xgbe.h-1249-\ndrivers/net/ethernet/amd/xgbe/xgbe.h:1250:\tunsigned int debugfs_xgmac_reg;\ndrivers/net/ethernet/amd/xgbe/xgbe.h-1251-\n--\ndrivers/net/ethernet/apm/xgene/Makefile-5-\ndrivers/net/ethernet/apm/xgene/Makefile:6:xgene-enet-objs := xgene_enet_hw.o xgene_enet_sgmac.o xgene_enet_xgmac.o \\\ndrivers/net/ethernet/apm/xgene/Makefile-7-\t\t xgene_enet_main.o xgene_enet_ring2.o xgene_enet_ethtool.o \\\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c-13-#include \"xgene_enet_sgmac.h\"\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c:14:#include \"xgene_enet_xgmac.h\"\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c-15-\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c=1886=static void xgene_enet_setup_ops(struct xgene_enet_pdata pdata)\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c-1908-\tdefault:\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c:1909:\t\tpdata-\u003emac_ops = \u0026xgene_xgmac_ops;\ndrivers/net/ethernet/apm/xgene/xgene_enet_main.c-1910-\t\tpdata-\u003eport_ops = \u0026xgene_xgport_ops;\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c-11-#include \"xgene_enet_sgmac.h\"\ndrivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c:12:#include \"xgene_enet_xgmac.h\"\ndrivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c-13-\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c-18-#include \"xgene_enet_hw.h\"\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c:19:#include \"xgene_enet_xgmac.h\"\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c-20-\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c=157=static int xgene_enet_ecc_init(struct xgene_enet_pdata pdata)\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c-176-\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c:177:static void xgene_xgmac_get_drop_cnt(struct xgene_enet_pdata pdata,\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c-178-\t\t\t\t u32 rx, u32 tx)\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c=189=static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata pdata)\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c-196-\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c:197:static void xgene_xgmac_reset(struct xgene_enet_pdata pdata)\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c-198-{\n--\ndrivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c=203=static void xgene_pcs_reset(struct xgene_enet_pdata *pdata)\n--\n\n" }
11/2	2026/07/30 15:44	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 41488 output: 16 thoughts: 1233 Thoughts: Reaching the `stmmac` Bug via QEMU and Syzkaller Okay, so this patch affects `stmmac`, specifically dealing with VLAN updates within the `dwxgmac2_descs.c` file and several other related files like `hwif.h`, `stmmac_main.c`, and `stmmac_vlan.c`. The core functions being modified appear to be the ones handling VLAN type retrieval, descriptor operations, and VLAN hash updates. My immediate concern, as always, is whether this is actually reachable in a controlled testing environment, particularly QEMU. Initially, I looked at what QEMU emulates related to network devices. I noticed `hw/net/xgmac.c`, which emulates a `calxeda,hb-xgmac`, but this isn't relevant because it's driven by a separate Calxeda driver. I then started looking at what `QEMU` does emulate, which included `sun8i-emac` and several other MAC implementations, but nothing seemed to be directly tied to `stmmac`. I was also trying to check if the QEMU emulates `snps,dwmac` or not. Then I remembered PCI! I recalled that `stmmac` has a PCI driver, `stmmac_pci.c`, which registers for specific PCI device IDs. My mind was racing, wondering if syzkaller could inject PCI devices, but then I remembered syzkaller doesn't have a generic `syz_pci_device_add` call. Usually, it's about fuzzing existing PCI configuration space, or using things like `vhci` for USB or `mac80211_hwsim` for Wi-Fi. But, wait! The author of the patch is `syz-cluster`. This means syzkaller found this issue! That changes everything. It's either a bug report or a patch being tested by syzkaller. If syzkaller found the bug, it must be reachable. So how is `stmmac` reachable within syzkaller's testing framework? I initially thought about `veth`, or platform device injection, but neither are applicable. And then it hit me. QEMU does have a `hw/net/designware.c`! I immediately looked to see if 'designware' was related to `stmmac`. Bingo! "DesignWare MAC" is Synopsys DesignWare MAC, which is `dwmac`! And I'm pretty sure that `dwmac` is the same as `stmmac`!
12/2	2026/07/30 15:44	tool	grepper	0m Args: { "Expression": "designware" } Results: { "Output": "\nFull output is too long, showing 500 out of 1306 lines.\nUse more precise expression if possible.\n\nDocumentation/arch/arc/arc.rst=10=ARC processors and relevant open source projects.\n--\nDocumentation/arch/arc/arc.rst-23-- `Official Synopsys ARC Processors website\nDocumentation/arch/arc/arc.rst:24: \u003chttps://www.synopsys.com/designware-ip/processor-solutions.html\u003e`_ -\nDocumentation/arch/arc/arc.rst-25- location, with access to some IP documentation (`Programmer's Reference\n--\nDocumentation/devicetree/bindings/dma/k3dma.txt=32=For example, i2c0 read channel request line is 18, while write channel use 19\n--\nDocumentation/devicetree/bindings/dma/k3dma.txt-34-\t\ti2c0: i2c@fcb08000 {\nDocumentation/devicetree/bindings/dma/k3dma.txt:35:\t\t\tcompatible = \"snps,designware-i2c\";\nDocumentation/devicetree/bindings/dma/k3dma.txt-36-\t\t\tdmas =\t\u003c\u0026dma0 18 /* read channel /\n--\nDocumentation/devicetree/bindings/dma/k3dma.txt-41-\t\ti2c1: i2c@fcb09000 {\nDocumentation/devicetree/bindings/dma/k3dma.txt:42:\t\t\tcompatible = \"snps,designware-i2c\";\nDocumentation/devicetree/bindings/dma/k3dma.txt-43-\t\t\tdmas =\t\u003c\u0026dma0 20 / read channel /\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-3----\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:4:$id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-5-$schema: http://devicetree.org/meta-schemas/core.yaml#\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml=25=properties:\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-28- - description: Generic Synopsys DesignWare I2C controller\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:29: const: snps,designware-i2c\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-30- - description: Renesas RZ/N1D I2C controller\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-33- - const: renesas,rzn1-i2c # RZ/N1\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:34: - const: snps,designware-i2c\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-35- - description: Mobileye EyeQ DesignWare I2C controller\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-39- - const: mobileye,eyeq6lplus-i2c\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:40: - const: snps,designware-i2c\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-41- - items:\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-46- - thead,th1520-i2c\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:47: - const: snps,designware-i2c\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-48-\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml=131=examples:\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-133- i2c@f0000 {\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:134: compatible = \"snps,designware-i2c\";\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-135- reg = \u003c0xf0000 0x1000\u003e;\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-140- i2c@1120000 {\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:141: compatible = \"snps,designware-i2c\";\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-142- reg = \u003c0x1120000 0x1000\u003e;\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-152- i2c@2000 {\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:153: compatible = \"snps,designware-i2c\";\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-154- reg = \u003c0x2000 0x100\u003e;\n--\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-167- i2c@100400 {\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml:168: compatible = \"mscc,ocelot-i2c\", \"snps,designware-i2c\";\nDocumentation/devicetree/bindings/i2c/snps,designware-i2c.yaml-169- reg = \u003c0x100400 0x100\u003e, \u003c0x198 0x8\u003e;\n--\nDocumentation/devicetree/bindings/mmc/bluefield-dw-mshc.txt=4=Read synopsys-dw-mshc.txt for more details\nDocumentation/devicetree/bindings/mmc/bluefield-dw-mshc.txt-5-\nDocumentation/devicetree/bindings/mmc/bluefield-dw-mshc.txt:6:The Synopsys designware mobile storage host controller is used to interface\nDocumentation/devicetree/bindings/mmc/bluefield-dw-mshc.txt-7-a SoC with storage medium such as eMMC or SD/MMC cards. This file documents\n--\nDocumentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml=12=description:\nDocumentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml:13: The Synopsys designware mobile storage host controller is used to interface\nDocumentation/devicetree/bindings/mmc/hisilicon,hi3660-dw-mshc.yaml-14- a SoC with storage medium such as eMMC or SD/MMC cards. This file documents\n--\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml=5=$schema: http://devicetree.org/meta-schemas/core.yaml#\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml-6-\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml:7:title: Rockchip designware mobile storage host controller\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml-8-\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml=9=description:\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml:10: Rockchip uses the Synopsys designware mobile storage host controller\nDocumentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml-11- to interface a SoC with storage medium such as eMMC or SD/MMC cards.\n--\nDocumentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml=9=description:\nDocumentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml:10: StarFive uses the Synopsys designware mobile storage host controller\nDocumentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml-11- to interface a SoC with storage medium such as eMMC or SD/MMC cards.\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-3----\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml:4:$id: http://devicetree.org/schemas/sound/snps,designware-i2s.yaml#\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-5-$schema: http://devicetree.org/meta-schemas/core.yaml#\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml=12=properties:\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-16- - const: canaan,k210-i2s\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml:17: - const: snps,designware-i2s\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-18- - enum:\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml:19: - snps,designware-i2s\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-20- - starfive,jh7110-i2stx0\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml=89=allOf:\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-107- contains:\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml:108: const: snps,designware-i2s\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-109- then:\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml=187=examples:\n--\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-189- soc_i2s: i2s@7ff90000 {\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml:190: compatible = \"snps,designware-i2s\";\nDocumentation/devicetree/bindings/sound/snps,designware-i2s.yaml-191- reg = \u003c0x7ff90000 0x1000\u003e;\n--\nDocumentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml=37=properties:\n--\nDocumentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml-134- rxd input signal occurs. The \"rx_sample_delay\" is an optional feature\nDocumentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml:135: of the designware controller, and the upper limit is also subject to\nDocumentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml-136- controller configuration.\n--\nMAINTAINERS=20788=F:\tDocumentation/devicetree/bindings/pci/snps,dw-pcie.yaml\nMAINTAINERS:20789:F:\tdrivers/pci/controller/dwc/designware\nMAINTAINERS-20790-F:\tinclude/linux/pcie-dwc.h\n--\nMAINTAINERS=26272=S:\tSupported\nMAINTAINERS:26273:F:\tdrivers/i2c/busses/i2c-designware-\nMAINTAINERS-26274-\n--\nMAINTAINERS=26279=S:\tMaintained\nMAINTAINERS:26280:F:\tdrivers/i2c/busses/i2c-designware-amdisp.c\nMAINTAINERS-26281-F:\tinclude/linux/soc/amd/isp4_misc.h\n--\narch/arc/boot/dts/abilis_tb10x.dtsi=123=\t\ti2c0: i2c@ff120000 {\n--\narch/arc/boot/dts/abilis_tb10x.dtsi-125-\t\t\t#size-cells = \u003c0\u003e;\narch/arc/boot/dts/abilis_tb10x.dtsi:126:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/abilis_tb10x.dtsi-127-\t\t\treg = \u003c0xff120000 0x1000\u003e;\n--\narch/arc/boot/dts/abilis_tb10x.dtsi=132=\t\ti2c1: i2c@ff121000 {\n--\narch/arc/boot/dts/abilis_tb10x.dtsi-134-\t\t\t#size-cells = \u003c0\u003e;\narch/arc/boot/dts/abilis_tb10x.dtsi:135:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/abilis_tb10x.dtsi-136-\t\t\treg = \u003c0xff121000 0x1000\u003e;\n--\narch/arc/boot/dts/abilis_tb10x.dtsi=141=\t\ti2c2: i2c@ff122000 {\n--\narch/arc/boot/dts/abilis_tb10x.dtsi-143-\t\t\t#size-cells = \u003c0\u003e;\narch/arc/boot/dts/abilis_tb10x.dtsi:144:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/abilis_tb10x.dtsi-145-\t\t\treg = \u003c0xff122000 0x1000\u003e;\n--\narch/arc/boot/dts/abilis_tb10x.dtsi=150=\t\ti2c3: i2c@ff123000 {\n--\narch/arc/boot/dts/abilis_tb10x.dtsi-152-\t\t\t#size-cells = \u003c0\u003e;\narch/arc/boot/dts/abilis_tb10x.dtsi:153:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/abilis_tb10x.dtsi-154-\t\t\treg = \u003c0xff123000 0x1000\u003e;\n--\narch/arc/boot/dts/abilis_tb10x.dtsi=159=\t\ti2c4: i2c@ff124000 {\n--\narch/arc/boot/dts/abilis_tb10x.dtsi-161-\t\t\t#size-cells = \u003c0\u003e;\narch/arc/boot/dts/abilis_tb10x.dtsi:162:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/abilis_tb10x.dtsi-163-\t\t\treg = \u003c0xff124000 0x1000\u003e;\n--\narch/arc/boot/dts/axs10x_mb.dtsi=162=\t\ti2c@1d000 {\narch/arc/boot/dts/axs10x_mb.dtsi:163:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/axs10x_mb.dtsi-164-\t\t\treg = \u003c0x1d000 0x100\u003e;\n--\narch/arc/boot/dts/axs10x_mb.dtsi=170=\t\ti2s: i2s@1e000 {\narch/arc/boot/dts/axs10x_mb.dtsi:171:\t\t\tcompatible = \"snps,designware-i2s\";\narch/arc/boot/dts/axs10x_mb.dtsi-172-\t\t\treg = \u003c0x1e000 0x100\u003e;\n--\narch/arc/boot/dts/axs10x_mb.dtsi=179=\t\ti2c@1f000 {\narch/arc/boot/dts/axs10x_mb.dtsi:180:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arc/boot/dts/axs10x_mb.dtsi-181-\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi=669=\t\ti2c0: i2c@ffc04000 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-671-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi:672:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-673-\t\t\treg = \u003c0xffc04000 0x1000\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi=680=\t\ti2c1: i2c@ffc05000 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-682-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi:683:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-684-\t\t\treg = \u003c0xffc05000 0x1000\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi=691=\t\ti2c2: i2c@ffc06000 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-693-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi:694:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-695-\t\t\treg = \u003c0xffc06000 0x1000\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi=702=\t\ti2c3: i2c@ffc07000 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-704-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi:705:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga.dtsi-706-\t\t\treg = \u003c0xffc07000 0x1000\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=556=\t\ti2c0: i2c@ffc02200 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-558-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:559:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-560-\t\t\treg = \u003c0xffc02200 0x100\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=567=\t\ti2c1: i2c@ffc02300 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-569-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:570:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-571-\t\t\treg = \u003c0xffc02300 0x100\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=578=\t\ti2c2: i2c@ffc02400 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-580-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:581:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-582-\t\t\treg = \u003c0xffc02400 0x100\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=589=\t\ti2c3: i2c@ffc02500 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-591-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:592:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-593-\t\t\treg = \u003c0xffc02500 0x100\u003e;\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi=600=\t\ti2c4: i2c@ffc02600 {\n--\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-602-\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi:603:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi-604-\t\t\treg = \u003c0xffc02600 0x100\u003e;\n--\narch/arm/boot/dts/nspire/nspire-cx.dts=151=\t\t\ti2c@90050000 {\narch/arm/boot/dts/nspire/nspire-cx.dts:152:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/nspire/nspire-cx.dts-153-\t\t\t\treg = \u003c0x90050000 0x1000\u003e;\n--\narch/arm/boot/dts/renesas/r9a06g032.dtsi=318=\t\ti2c1: i2c@40063000 {\narch/arm/boot/dts/renesas/r9a06g032.dtsi:319:\t\t\tcompatible = \"renesas,r9a06g032-i2c\", \"renesas,rzn1-i2c\", \"snps,designware-i2c\";\narch/arm/boot/dts/renesas/r9a06g032.dtsi-320-\t\t\treg = \u003c0x40063000 0x100\u003e;\n--\narch/arm/boot/dts/renesas/r9a06g032.dtsi=329=\t\ti2c2: i2c@40064000 {\narch/arm/boot/dts/renesas/r9a06g032.dtsi:330:\t\t\tcompatible = \"renesas,r9a06g032-i2c\", \"renesas,rzn1-i2c\", \"snps,designware-i2c\";\narch/arm/boot/dts/renesas/r9a06g032.dtsi-331-\t\t\treg = \u003c0x40064000 0x100\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=174=\t\t\ti2c1: i2c@5cd00000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-176-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:177:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-178-\t\t\t\treg = \u003c0x5cd00000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=183=\t\t\ti2c2: i2c@5ce00000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-185-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:186:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-187-\t\t\t\treg = \u003c0x5ce00000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=192=\t\t\ti2c3: i2c@5cf00000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-194-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:195:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-196-\t\t\t\treg = \u003c0x5cf00000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=201=\t\t\ti2c4: i2c@5d000000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-203-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:204:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-205-\t\t\t\treg = \u003c0x5d000000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=210=\t\t\ti2c5: i2c@5d100000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-212-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:213:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-214-\t\t\t\treg = \u003c0x5d100000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=219=\t\t\ti2c6: i2c@5d200000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-221-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:222:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-223-\t\t\t\treg = \u003c0x5d200000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1310.dtsi=228=\t\t\ti2c7: i2c@5d300000 {\n--\narch/arm/boot/dts/st/spear1310.dtsi-230-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1310.dtsi:231:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1310.dtsi-232-\t\t\t\treg = \u003c0x5d300000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear1340.dtsi=62=\t\ti2s-play@b2400000 {\narch/arm/boot/dts/st/spear1340.dtsi:63:\t\t\tcompatible = \"snps,designware-i2s\";\narch/arm/boot/dts/st/spear1340.dtsi-64-\t\t\treg = \u003c0xb2400000 0x10000\u003e;\n--\narch/arm/boot/dts/st/spear1340.dtsi=73=\t\ti2s-rec@b2000000 {\narch/arm/boot/dts/st/spear1340.dtsi:74:\t\t\tcompatible = \"snps,designware-i2s\";\narch/arm/boot/dts/st/spear1340.dtsi-75-\t\t\treg = \u003c0xb2000000 0x10000\u003e;\n--\narch/arm/boot/dts/st/spear1340.dtsi=122=\t\t\ti2c1: i2c@b4000000 {\n--\narch/arm/boot/dts/st/spear1340.dtsi-124-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear1340.dtsi:125:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear1340.dtsi-126-\t\t\t\treg = \u003c0xb4000000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear13xx.dtsi=253=\t\t\ti2c0: i2c@e0280000 {\n--\narch/arm/boot/dts/st/spear13xx.dtsi-255-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear13xx.dtsi:256:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear13xx.dtsi-257-\t\t\t\treg = \u003c0xe0280000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear13xx.dtsi=262=\t\t\ti2s@e0180000 {\narch/arm/boot/dts/st/spear13xx.dtsi:263:\t\t\t\tcompatible = \"st,designware-i2s\";\narch/arm/boot/dts/st/spear13xx.dtsi-264-\t\t\t\treg = \u003c0xe0180000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear13xx.dtsi=271=\t\t\ti2s@e0200000 {\narch/arm/boot/dts/st/spear13xx.dtsi:272:\t\t\t\tcompatible = \"st,designware-i2s\";\narch/arm/boot/dts/st/spear13xx.dtsi-273-\t\t\t\treg = \u003c0xe0200000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear320.dtsi=94=\t\t\ti2c1: i2c@a7000000 {\n--\narch/arm/boot/dts/st/spear320.dtsi-96-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear320.dtsi:97:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear320.dtsi-98-\t\t\t\treg = \u003c0xa7000000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear3xx.dtsi=114=\t\t\ti2c0: i2c@d0180000 {\n--\narch/arm/boot/dts/st/spear3xx.dtsi-116-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear3xx.dtsi:117:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear3xx.dtsi-118-\t\t\t\treg = \u003c0xd0180000 0x1000\u003e;\n--\narch/arm/boot/dts/st/spear600.dtsi=178=\t\t\ti2c: i2c@d0200000 {\n--\narch/arm/boot/dts/st/spear600.dtsi-180-\t\t\t\t#size-cells = \u003c0\u003e;\narch/arm/boot/dts/st/spear600.dtsi:181:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/st/spear600.dtsi-182-\t\t\t\treg = \u003c0xd0200000 0x1000\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2cd.dtsi=246=\t\t\ti2c0: i2c@1400 {\narch/arm/boot/dts/synaptics/berlin2cd.dtsi:247:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2cd.dtsi-248-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2cd.dtsi=256=\t\t\ti2c1: i2c@1800 {\narch/arm/boot/dts/synaptics/berlin2cd.dtsi:257:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2cd.dtsi-258-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2cd.dtsi=491=\t\t\ti2c2: i2c@7000 {\narch/arm/boot/dts/synaptics/berlin2cd.dtsi:492:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2cd.dtsi-493-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2cd.dtsi=501=\t\t\ti2c3: i2c@8000 {\narch/arm/boot/dts/synaptics/berlin2cd.dtsi:502:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2cd.dtsi-503-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2q.dtsi=317=\t\t\ti2c0: i2c@1400 {\narch/arm/boot/dts/synaptics/berlin2q.dtsi:318:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2q.dtsi-319-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2q.dtsi=329=\t\t\ti2c1: i2c@1800 {\narch/arm/boot/dts/synaptics/berlin2q.dtsi:330:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2q.dtsi-331-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2q.dtsi=560=\t\t\ti2c2: i2c@7000 {\narch/arm/boot/dts/synaptics/berlin2q.dtsi:561:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2q.dtsi-562-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm/boot/dts/synaptics/berlin2q.dtsi=572=\t\t\ti2c3: i2c@8000 {\narch/arm/boot/dts/synaptics/berlin2q.dtsi:573:\t\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm/boot/dts/synaptics/berlin2q.dtsi-574-\t\t\t\t#address-cells = \u003c1\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=268=\t\ti2c0: i2c@ffc02800 {\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-270-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:271:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-272-\t\t\treg = \u003c0xffc02800 0x100\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=279=\t\ti2c1: i2c@ffc02900 {\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-281-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:282:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-283-\t\t\treg = \u003c0xffc02900 0x100\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=290=\t\ti2c2: i2c@ffc02a00 {\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-292-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:293:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-294-\t\t\treg = \u003c0xffc02a00 0x100\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=301=\t\ti2c3: i2c@ffc02b00 {\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-303-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:304:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-305-\t\t\treg = \u003c0xffc02b00 0x100\u003e;\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi=312=\t\ti2c4: i2c@ffc02c00 {\n--\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-314-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi:315:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/altera/socfpga_stratix10.dtsi-316-\t\t\treg = \u003c0xffc02c00 0x100\u003e;\n--\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi=96=\t\ti2c0: i2c@e1000000 {\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi-97-\t\t\tstatus = \"disabled\";\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi:98:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi-99-\t\t\treg = \u003c0 0xe1000000 0 0x1000\u003e;\n--\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi=104=\t\ti2c1: i2c@e0050000 {\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi-105-\t\t\tstatus = \"disabled\";\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi:106:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/amd/amd-seattle-soc.dtsi-107-\t\t\treg = \u003c0 0xe0050000 0 0x1000\u003e;\n--\narch/arm64/boot/dts/amd/elba.dtsi=62=\t\ti2c0: i2c@400 {\narch/arm64/boot/dts/amd/elba.dtsi:63:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/amd/elba.dtsi-64-\t\t\treg = \u003c0x0 0x400 0x0 0x100\u003e;\n--\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi=797=\t\ti2c1: i2c@10511000 {\n--\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi-799-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi:800:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi-801-\t\t\treg = \u003c0x0 0x10511000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi=806=\t\ti2c4: i2c@10640000 {\n--\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi-808-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi:809:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/apm/apm-shadowcat.dtsi-810-\t\t\treg = \u003c0x0 0x10640000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/apm/apm-storm.dtsi=844=\t\ti2c0: i2c@10512000 {\n--\narch/arm64/boot/dts/apm/apm-storm.dtsi-847-\t\t\t#size-cells = \u003c0\u003e;\narch/arm64/boot/dts/apm/apm-storm.dtsi:848:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/apm/apm-storm.dtsi-849-\t\t\treg = \u003c0x0 0x10512000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/arm/juno-base.dtsi=905=\ti2c@7ffa0000 {\narch/arm64/boot/dts/arm/juno-base.dtsi:906:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/arm/juno-base.dtsi-907-\t\treg = \u003c0x0 0x7ffa0000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi=155=\t\ti2c0: i2c@4f0000 {\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi:156:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi-157-\t\t\treg = \u003c0x4f0000 0x1000\u003e;\n--\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi=166=\t\ti2c1: i2c@500000 {\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi:167:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi-168-\t\t\treg = \u003c0x500000 0x1000\u003e;\n--\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi=177=\t\ti2c2: i2c@510000 {\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi:178:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi-179-\t\t\treg = \u003c0x510000 0x1000\u003e;\n--\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi=188=\t\ti2c3: i2c@520000 {\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi:189:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi-190-\t\t\treg = \u003c0x520000 0x1000\u003e;\n--\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi=199=\t\ti2c4: i2c@530000 {\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi:200:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi-201-\t\t\treg = \u003c0x530000 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=29=\trp1_i2c0: i2c@40070000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:30:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-31-\t\treg = \u003c0x0 0x40070000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=40=\trp1_i2c1: i2c@40074000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:41:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-42-\t\treg = \u003c0x0 0x40074000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=51=\trp1_i2c2: i2c@40078000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:52:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-53-\t\treg = \u003c0x0 0x40078000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=62=\trp1_i2c3: i2c@4007c000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:63:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-64-\t\treg = \u003c0x0 0x4007c000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=73=\trp1_i2c4: i2c@40080000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:74:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-75-\t\treg = \u003c0x0 0x40080000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=84=\trp1_i2c5: i2c@40084000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:85:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-86-\t\treg = \u003c0x0 0x40084000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/broadcom/rp1-common.dtsi=95=\trp1_i2c6: i2c@40088000 {\narch/arm64/boot/dts/broadcom/rp1-common.dtsi:96:\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/broadcom/rp1-common.dtsi-97-\t\treg = \u003c0x0 0x40088000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3660.dtsi=413=\t\ti2c0: i2c@ffd71000 {\narch/arm64/boot/dts/hisilicon/hi3660.dtsi:414:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3660.dtsi-415-\t\t\treg = \u003c0x0 0xffd71000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3660.dtsi=427=\t\ti2c1: i2c@ffd72000 {\narch/arm64/boot/dts/hisilicon/hi3660.dtsi:428:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3660.dtsi-429-\t\t\treg = \u003c0x0 0xffd72000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3660.dtsi=441=\t\ti2c3: i2c@fdf0c000 {\narch/arm64/boot/dts/hisilicon/hi3660.dtsi:442:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3660.dtsi-443-\t\t\treg = \u003c0x0 0xfdf0c000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3660.dtsi=455=\t\ti2c7: i2c@fdf0b000 {\narch/arm64/boot/dts/hisilicon/hi3660.dtsi:456:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3660.dtsi-457-\t\t\treg = \u003c0x0 0xfdf0b000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3670.dtsi=719=\t\ti2c0: i2c@ffd71000 {\narch/arm64/boot/dts/hisilicon/hi3670.dtsi:720:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3670.dtsi-721-\t\t\treg = \u003c0x0 0xffd71000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3670.dtsi=733=\t\ti2c1: i2c@ffd72000 {\narch/arm64/boot/dts/hisilicon/hi3670.dtsi:734:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3670.dtsi-735-\t\t\treg = \u003c0x0 0xffd72000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3670.dtsi=747=\t\ti2c2: i2c@ffd73000 {\narch/arm64/boot/dts/hisilicon/hi3670.dtsi:748:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3670.dtsi-749-\t\t\treg = \u003c0x0 0xffd73000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3670.dtsi=761=\t\ti2c3: i2c@fdf0c000 {\narch/arm64/boot/dts/hisilicon/hi3670.dtsi:762:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3670.dtsi-763-\t\t\treg = \u003c0x0 0xfdf0c000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi3670.dtsi=775=\t\ti2c4: i2c@fdf0d000 {\narch/arm64/boot/dts/hisilicon/hi3670.dtsi:776:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi3670.dtsi-777-\t\t\treg = \u003c0x0 0xfdf0d000 0x0 0x1000\u003e;\n--\narch/arm64/boot/dts/hisilicon/hi6220.dtsi=739=\t\ti2c0: i2c@f7100000 {\narch/arm64/boot/dts/hisilicon/hi6220.dtsi:740:\t\t\tcompatible = \"snps,designware-i2c\";\narch/arm64/boot/dts/hisilicon/hi6220.dtsi-741-\t\t\treg = \u003c0x0 0xf7100000 0x0 0x1000\u003e;\n\n" }
13/2	2026/07/30 15:44	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 58845 output: 22 thoughts: 932 Thoughts: Reaching `stmmac` in Syzkaller: A Reachability Analysis Okay, so I'm looking at this patch and trying to figure out if it's worth fuzzing. The key seems to be `stmmac`, specifically its VLAN handling. First things first: `snps,designware-i2c` is I2C, not relevant here. `snps,dwmac` is DesignWare MAC, but that's a distraction. The important part is that QEMU has `hw/net/designware.c` which emulates this, but `stmmac` might also be reachable through PCI in QEMU. I need to confirm if syzkaller is reaching `stmmac`. The fact that `stmmac_pci.c` exists and is a PCI driver suggests that if syzkaller is fuzzing it, it might be using the PCI fuzzer, or QEMU has a board configured to do so. Syzkaller has USB, PCI, and vhci fuzzers. Since `stmmac` is a standard Ethernet driver, and this patch touches core logic like VLAN handling and descriptors, it should be reachable if the device is probed. I'm thinking about the syzkaller setup. It's fuzzing on `x86_64` using `qemu-system-x86_64`. Does this QEMU instance include a PCI device that binds to `stmmac_pci`? I initially was looking for a `syz_pci_device_add` syscall, but that's not how it works! Syzkaller uses `syz_kvm_setup_cpu` or other methods to interact with PCI devices; it doesn't create new devices directly, as these are pseudo-syscalls not present in the kernel. A-ha! The prompt reminded me that "syz_" is syzkaller-specific. Syzkaller probably uses `vfio` or simply manipulates existing PCI configuration space. But, regardless, `stmmac` is a very common driver, used in numerous SoCs. The fact that syzkaller found a bug (or is testing a fix for one) means it is reachable. The author is `syz-cluster`, and the commit message states, "syz-cluster: applied patch under review." This confirms the reachability and that the fix is being tested by syzkaller. Therefore, `WorthFuzzing=true`. Now, I need to identify the focus symbols. The patch modifies `dwxgmac2_wrback_get_rx_vlan_type`, `stmmac_vlan_update`, `vlan_update_dvlan_state`, `vlan_update_hash`, `vlan_rx_hw`, and `dwxgmac2_update_vlan_hash`. Remembering the prompt's preference for non-static, non-inlined API entrypoints, I'll need to locate the relevant entry points that call these modified functions. I'll need to check `stmmac_main.c` and `stmmac_vlan.c` for those entry points.
14/2	2026/07/30 15:45	tool	grepper	0m Args: { "Expression": "stmmac_vlan_update" } Results: { "Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6767=static u32 stmmac_vid_crc32_le(__le16 vid_le)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6790-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6791:static int stmmac_vlan_update(struct stmmac_priv priv, bool is_double)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6792-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6814=static int stmmac_vlan_rx_add_vid(struct net_device ndev, __be16 proto, u16 vid)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6829-\tnum_double_vlans = priv-\u003enum_double_vlans + is_double;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6830:\tret = stmmac_vlan_update(priv, num_double_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6831-\tif (ret) {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6839-\t\t\tclear_bit(vid, priv-\u003eactive_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6840:\t\t\tstmmac_vlan_update(priv, priv-\u003enum_double_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6841-\t\t\tgoto err_pm_put;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6856=static int stmmac_vlan_rx_kill_vid(struct net_device ndev, __be16 proto, u16 vid)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6871-\tnum_double_vlans = priv-\u003enum_double_vlans - is_double;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6872:\tret = stmmac_vlan_update(priv, num_double_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6873-\tif (ret) {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6881-\t\t\tset_bit(vid, priv-\u003eactive_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6882:\t\t\tstmmac_vlan_update(priv, priv-\u003enum_double_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6883-\t\t\tgoto del_vlan_error;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6895=static void stmmac_vlan_restore(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6902-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6903:\tstmmac_vlan_update(priv, priv-\u003enum_double_vlans);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6904-}\n" }
15/2	2026/07/30 15:45	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 61471 output: 26 thoughts: 69 Thoughts: Analyzing `stmmac_vlan_update` Entry Points Okay, so I'm looking at the `stmmac_vlan_update` function and, as I understand it, my primary concern is with the dynamic entry points. The code specifies that `stmmac_vlan_rx_add_vid`, `stmmac_vlan_rx_kill_vid`, and `stmmac_vlan_restore` are the non-static access points. My next step then, naturally, is to determine if these specific entry points are static or non-static, so I can start to develop a better understanding of how the module functions, and ensure it meets expected standards.
16/2	2026/07/30 15:45	tool	grepper	0m Args: { "Expression": "stmmac_vlan_rx_add_vid" } Results: { "Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6791=static int stmmac_vlan_update(struct stmmac_priv priv, bool is_double)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6813- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6814:static int stmmac_vlan_rx_add_vid(struct net_device *ndev, __be16 proto, u16 vid)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6815-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=7278=static const struct net_device_ops stmmac_netdev_ops = {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7292-\t.ndo_set_mac_address = stmmac_set_mac_address,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:7293:\t.ndo_vlan_rx_add_vid = stmmac_vlan_rx_add_vid,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7294-\t.ndo_vlan_rx_kill_vid = stmmac_vlan_rx_kill_vid,\n" }
17/2	2026/07/30 15:45	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 62107 output: 20 thoughts: 164 Thoughts: Analyzing the Netdev API Entry Points Okay, so I'm looking at these functions, and they're defined statically, but assigned to `stmmac_netdev_ops`, which is the `net_device_ops` struct. That means they are the API entry points for the network device. The hint specifically says to prefer non-static, non-inlined API entrypoint functions over internal static helper functions. I need to be sure. If `stmmac_vlan_rx_add_vid` is static, my initial thought is that it might be inlined. But wait, no, it's assigned to a function pointer within `stmmac_netdev_ops`. Since its address is taken, inlining is impossible. So that's not a concern. My focus, though, needs to be ensuring that the API calls are as performant as possible. The core question now is, is there a non-static alternative function I can use? I should check `stmmac_vlan.c` and search for any calls related to `vlan_rx_hw`. Let's see if there's a non-static version I can use.
18/2	2026/07/30 15:45	tool	grepper	0m Args: { "Expression": "vlan_rx_hw" } Results: { "Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c=197=static void vlan_enable(struct mac_device_info hw, u32 type)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-209-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c:210:static void vlan_rx_hw(struct mac_device_info hw,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-211-\t\t struct dma_desc rx_desc, struct sk_buff skb)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c=278=const struct stmmac_vlan_ops dwmac_vlan_ops = {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-283-\t.restore_hw_vlan_rx_fltr = vlan_restore_hw_rx_fltr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c:284:\t.rx_hw_vlan = vlan_rx_hw,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-285-\t.set_hw_vlan_mode = vlan_set_hw_mode,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c=294=const struct stmmac_vlan_ops dwxgmac210_vlan_ops = {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-300-\t.restore_hw_vlan_rx_fltr = vlan_restore_hw_rx_fltr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c:301:\t.rx_hw_vlan = vlan_rx_hw,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-302-\t.set_hw_vlan_mode = vlan_set_hw_mode,\n" }
19/2	2026/07/30 15:45	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 63130 output: 20 thoughts: 43 Thoughts: Okay, here's my interpretation of that thought process, from an expert's perspective: Investigating VLAN Hardware Receive Handling in STMMAC Right, so I'm digging into the STMMAC driver, specifically the VLAN handling. My initial observation is that the function `vlan_rx_hw` is being assigned to the variable `rx_hw_vlan` within the `stmmac_vlan_ops` structure. That's pretty standard practice, likely setting up the hardware VLAN receive filtering mechanism. My main question then becomes where is `rx_hw_vlan` actually used? I need to understand the control flow. Is it invoked directly within the receive path? Is it called via a generic netdev interface? Or does it potentially influence the processing in some other way that I can investigate to gain a better understanding of how the VLAN tags are processed in hardware? Finding those call sites for `rx_hw_vlan` is going to be key to seeing how the hardware VLAN filtering is integrated in this STMMAC implementation.
20/2	2026/07/30 15:45	tool	grepper	0m Args: { "Expression": "rx_hw_vlan" } Results: { "Output": "drivers/net/ethernet/stmicro/stmmac/hwif.h=635=struct stmmac_vlan_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-639-\tvoid (enable_vlan)(struct mac_device_info hw, u32 type);\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:640:\tvoid (rx_hw_vlan)(struct mac_device_info hw, struct dma_desc rx_desc,\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-641-\t\t\t struct sk_buff skb);\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-658-\tstmmac_do_void_callback(__priv, vlan, enable_vlan, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:659:#define stmmac_rx_hw_vlan(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:660:\tstmmac_do_void_callback(__priv, vlan, rx_hw_vlan, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-661-#define stmmac_set_hw_vlan_mode(__priv, __args...) \\\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5370=static void stmmac_dispatch_skb_zc(struct stmmac_priv priv, u32 queue,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5390-\t\t/ MAC level stripping. /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5391:\t\tstmmac_rx_hw_vlan(priv, priv-\u003ehw, p, skb);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5392-\telse\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5662=static int stmmac_rx(struct stmmac_priv priv, int limit, u32 queue)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5884-\t\t\t/* MAC level stripping. */\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5885:\t\t\tstmmac_rx_hw_vlan(priv, priv-\u003ehw, p, skb);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5886-\t\telse\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c=278=const struct stmmac_vlan_ops dwmac_vlan_ops = {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-283-\t.restore_hw_vlan_rx_fltr = vlan_restore_hw_rx_fltr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c:284:\t.rx_hw_vlan = vlan_rx_hw,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-285-\t.set_hw_vlan_mode = vlan_set_hw_mode,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c=294=const struct stmmac_vlan_ops dwxgmac210_vlan_ops = {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-300-\t.restore_hw_vlan_rx_fltr = vlan_restore_hw_rx_fltr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c:301:\t.rx_hw_vlan = vlan_rx_hw,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c-302-\t.set_hw_vlan_mode = vlan_set_hw_mode,\n" }
21/2	2026/07/30 15:45	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 64532 output: 19 thoughts: 66 Thoughts: Okay, let's break this down. RX Path Entry Point Analysis Alright, so I'm focusing on the receive path in the stmmac driver. My initial concern is identifying the core entry points for incoming packets. I see that `stmmac_rx` and `stmmac_dispatch_skb_zc` are the primary candidates. The first thing I want to ascertain is whether these functions are statically defined within the driver. Let me quickly verify that. Okay, good, they are both static, which is what I would expect for internal functions. Hold on though, something's pinging in my memory. I need to make sure I understand the full call path, the connection of `stmmac_rx`. Oh, yeah, right. I remember, `stmmac_rx` is called from `stmmac_poll`. Makes sense, considering that polling is a common method for handling network interrupts in a driver, especially a platform-specific driver. This is helpful to solidify the understanding of the execution flow.
22/2	2026/07/30 15:45	tool	grepper	0m Error: no matches Args: { "Expression": "stmmac_poll" } Results: { "error": "no matches" }
23/2	2026/07/30 15:45	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 64850 output: 19 thoughts: 36 Thoughts: Here's my thought process, as if I were considering this code: Diving into the STMMAC RX Path Okay, so we're talking about `stmmac_napi_poll_rx`. That sounds like we're deep in the Network Adapter Poll Interface (NAPI) receive path. My gut reaction is to immediately look at `stmmac_rx` to see how it fits into the broader picture. Let's head over to `stmmac_main.c` and hunt down `stmmac_rx`. I need to understand the relationship between the NAPI poll function and the core receive processing within the STMMAC driver. I want to know exactly how it grabs the received packets and what the sequence of processing is. I'm looking for the "main" receive handler. What's the link between the NAPI poll and the driver's RX logic? I need to build a clear mental model of the data flow. Let's see if this `stmmac_rx` function is the key.
24/2	2026/07/30 15:45	tool	grepper	0m Args: { "Expression": "stmmac_rx" } Results: { "Output": "\nFull output is too long, showing 500 out of 591 lines.\nUse more precise expression if possible.\n\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst=387=JUMBO frames::\n--\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-430-\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst:431: struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-432- struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES];\n--\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst=601=For the RX Queues configuration, we have:\n--\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-604-\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst:605: struct stmmac_rxq_cfg {\nDocumentation/networking/device_drivers/ethernet/stmicro/stmmac.rst-606-\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c=98=static void init_dma_chain(void des, dma_addr_t phy_addr,\n--\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-127-\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c:128:static void refill_desc3(struct stmmac_rx_queue rx_q, struct dma_desc p)\ndrivers/net/ethernet/stmicro/stmmac/chain_mode.c-129-{\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=96=struct stmmac_napi_rx_stats {\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-102-\ndrivers/net/ethernet/stmicro/stmmac/common.h:103:struct stmmac_rxq_stats {\ndrivers/net/ethernet/stmicro/stmmac/common.h-104-\t/ Updates protected by NAPI poll logic. /\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=117=struct stmmac_extra_stats {\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-238-\tstruct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h:239:\tstruct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/common.h-240-\tstruct stmmac_pcpu_stats __percpu pcpu_stats;\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h=613=struct mac_device_info {\n--\ndrivers/net/ethernet/stmicro/stmmac/common.h-644-\ndrivers/net/ethernet/stmicro/stmmac/common.h:645:struct stmmac_rx_routing {\ndrivers/net/ethernet/stmicro/stmmac/common.h-646-\tu32 reg_mask;\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac4_core.c=160=static void dwmac4_rx_queue_routing(struct mac_device_info hw,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac4_core.c-165-\ndrivers/net/ethernet/stmicro/stmmac/dwmac4_core.c:166:\tstatic const struct stmmac_rx_routing route_possibilities[] = {\ndrivers/net/ethernet/stmicro/stmmac/dwmac4_core.c-167-\t\t{ GMAC_RXQCTRL_AVCPQ_MASK, GMAC_RXQCTRL_AVCPQ_SHIFT },\n--\ndrivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c=155=static void dwxgmac2_rx_queue_routing(struct mac_device_info hw,\n--\ndrivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c-160-\ndrivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c:161:\tstatic const struct stmmac_rx_routing dwxgmac2_route_possibilities[] = {\ndrivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c-162-\t\t{ XGMAC_AVCPQ, XGMAC_AVCPQ_SHIFT },\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h=39=struct stmmac_desc_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-129-\tstmmac_do_callback(__priv, desc, get_rx_frame_len, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:130:#define stmmac_rx_status(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-131-\tstmmac_do_callback(__priv, desc, rx_status, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:132:#define stmmac_rx_extended_status(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-133-\tstmmac_do_void_callback(__priv, desc, rx_extended_status, __args)\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h=169=struct stmmac_dma_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-277-\tstmmac_do_callback(__priv, dma, get_hw_feature, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:278:#define stmmac_rx_watchdog(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-279-\tstmmac_do_void_callback(__priv, dma, rx_watchdog, __priv, __args)\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h=313=struct stmmac_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-427-\tstmmac_do_void_callback(__priv, mac, set_mac, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:428:#define stmmac_rx_ipc(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-429-\tstmmac_do_callback(__priv, mac, rx_ipc, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:430:#define stmmac_rx_queue_enable(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-431-\tstmmac_do_void_callback(__priv, mac, rx_queue_enable, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:432:#define stmmac_rx_queue_prio(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-433-\tstmmac_do_void_callback(__priv, mac, rx_queue_prio, __args)\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-435-\tstmmac_do_void_callback(__priv, mac, tx_queue_prio, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:436:#define stmmac_rx_queue_routing(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-437-\tstmmac_do_void_callback(__priv, mac, rx_queue_routing, __args)\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-479-\tstmmac_do_callback(__priv, mac, safety_feat_dump, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:480:#define stmmac_rxp_config(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-481-\tstmmac_do_callback(__priv, mac, rxp_config, __args)\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h=535=struct stmmac_tx_queue;\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:536:struct stmmac_rx_queue;\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-537-\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h=539=struct stmmac_mode_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-546-\tvoid (init_desc3)(struct dma_desc p);\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:547:\tvoid (refill_desc3)(struct stmmac_rx_queue rx_q, struct dma_desc p);\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-548-\tvoid (clean_desc3)(struct stmmac_tx_queue tx_q, struct dma_desc p);\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h=635=struct stmmac_vlan_ops {\n--\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-658-\tstmmac_do_void_callback(__priv, vlan, enable_vlan, __args)\ndrivers/net/ethernet/stmicro/stmmac/hwif.h:659:#define stmmac_rx_hw_vlan(__priv, __args...) \\\ndrivers/net/ethernet/stmicro/stmmac/hwif.h-660-\tstmmac_do_void_callback(__priv, vlan, rx_hw_vlan, __args)\n--\ndrivers/net/ethernet/stmicro/stmmac/ring_mode.c=94=static bool is_jumbo_frm(unsigned int len, bool enh_desc)\n--\ndrivers/net/ethernet/stmicro/stmmac/ring_mode.c-98-\ndrivers/net/ethernet/stmicro/stmmac/ring_mode.c:99:static void refill_desc3(struct stmmac_rx_queue rx_q, struct dma_desc p)\ndrivers/net/ethernet/stmicro/stmmac/ring_mode.c-100-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h=63=struct stmmac_tx_queue {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-84-\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h:85:struct stmmac_rx_buffer {\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-86-\tunion {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h=113=struct stmmac_xsk_tx_complete {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-117-\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h:118:struct stmmac_rx_queue {\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-119-\tu32 rx_count_frames;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-123-\tstruct page_pool page_pool;\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h:124:\tstruct stmmac_rx_buffer buf_pool;\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-125-\tstruct stmmac_priv priv_data;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h=218=struct stmmac_dma_conf {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-221-\t/ RX Queue /\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h:222:\tstruct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];\ndrivers/net/ethernet/stmicro/stmmac/stmmac.h-223-\tunsigned int dma_rx_size;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c=481=static void stmmac_get_per_qstats(struct stmmac_priv priv, u64 data)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-501-\tfor (q = 0; q \u003c rx_cnt; q++) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c:502:\t\tstruct stmmac_rxq_stats rxq_stats = \u0026priv-\u003exstats.rxq_stats[q];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-503-\t\tu64 pkt_n;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c=515=static void stmmac_get_ethtool_stats(struct net_device dev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-568-\tfor (i = 0; i \u003c rx_queues_count; i++) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c:569:\t\tstruct stmmac_rxq_stats rxq_stats = \u0026priv-\u003exstats.rxq_stats[i];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-570-\t\tstruct stmmac_napi_rx_stats snapshot;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c=830=static int __stmmac_set_coalesce(struct net_device dev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-860-\t\t\t\tpriv-\u003erx_riwt[i] = rx_riwt;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c:861:\t\t\t\tstmmac_rx_watchdog(priv, priv-\u003eioaddr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-862-\t\t\t\t\t\t rx_riwt, i);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-867-\t\t\tpriv-\u003erx_riwt[queue] = rx_riwt;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c:868:\t\t\tstmmac_rx_watchdog(priv, priv-\u003eioaddr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c-869-\t\t\t\t\t rx_riwt, queue);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=292=static void stmmac_disable_all_queues(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-294-\tu8 rx_queues_cnt = priv-\u003eplat-\u003erx_queues_to_use;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:295:\tstruct stmmac_rx_queue rx_q;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-296-\tu8 queue;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=409=static struct dma_desc stmmac_get_rx_desc(struct stmmac_priv priv,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:410:\t\t\t\t\t struct stmmac_rx_queue rx_q,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-411-\t\t\t\t\t unsigned int index)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=419=static void stmmac_set_queue_rx_tail_ptr(struct stmmac_priv priv,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:420:\t\t\t\t\t struct stmmac_rx_queue rx_q,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-421-\t\t\t\t\t unsigned int chan, unsigned int index)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=432=static void stmmac_set_queue_rx_buf_size(struct stmmac_priv priv,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:433:\t\t\t\t\t struct stmmac_rx_queue rx_q,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-434-\t\t\t\t\t unsigned int chan)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-446-/*\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:447: stmmac_rx_dirty - Get RX queue dirty\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-448- * @priv: driver private structure\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-450- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:451:static inline u32 stmmac_rx_dirty(struct stmmac_priv priv, u32 queue)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-452-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:453:\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-454-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1471=static void stmmac_display_rx_rings(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1480-\tfor (queue = 0; queue \u003c rx_cnt; queue++) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1481:\t\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1482-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1516=static void stmmac_display_rings(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1525-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1526:static unsigned int stmmac_rx_offset(struct stmmac_priv priv)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1527-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1560=static void stmmac_clear_rx_descriptors(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1563-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1564:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1565-\tstruct dma_desc desc;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1638=static int stmmac_init_rx_buffers(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1642-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1643:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1644:\tstruct stmmac_rx_buffer buf = \u0026rx_q-\u003ebuf_pool[i];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1645-\tgfp_t gfp = (GFP_ATOMIC \| __GFP_NOWARN);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1653-\t\t\treturn -ENOMEM;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1654:\t\tbuf-\u003epage_offset = stmmac_rx_offset(priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1655-\t}\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1684=static void stmmac_free_rx_buffer(struct stmmac_priv priv,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1685:\t\t\t\t struct stmmac_rx_queue rx_q,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1686-\t\t\t\t int i)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1687-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1688:\tstruct stmmac_rx_buffer buf = \u0026rx_q-\u003ebuf_pool[i];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1689-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1752=static void dma_free_rx_skbufs(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1755-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1756:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1757-\tint i;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1763=static int stmmac_alloc_rx_buffers(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1766-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1767:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1768-\tint i;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1793=static void dma_free_rx_xskbufs(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1796-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1797:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1798-\tint i;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1800-\tfor (i = 0; i \u003c dma_conf-\u003edma_rx_size; i++) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1801:\t\tstruct stmmac_rx_buffer buf = \u0026rx_q-\u003ebuf_pool[i];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1802-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1811=static int stmmac_alloc_rx_buffers_zc(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1814-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1815:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1816-\tint i;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1824-\tfor (i = 0; i \u003c dma_conf-\u003edma_rx_size; i++) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1825:\t\tstruct stmmac_rx_buffer buf;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1826-\t\tdma_addr_t dma_addr;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1863=static int __init_dma_rx_desc_rings(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1866-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1867:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1868-\tvoid des;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=1923=static int init_dma_rx_desc_rings(struct net_device dev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1945-\twhile (queue \u003e= 0) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:1946:\t\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-1947-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=2126=static void __free_dma_rx_desc_resources(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2129-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2130:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2131-\tsize_t size;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=2226=static int __alloc_dma_rx_desc_resources(struct stmmac_priv priv,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2229-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2230:\tstruct stmmac_rx_queue rx_q = \u0026dma_conf-\u003erx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2231-\tstruct stmmac_channel ch = \u0026priv-\u003echannel[queue];\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2239-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2240:\tdma_buf_sz_pad = stmmac_rx_offset(priv) + dma_conf-\u003edma_buf_sz +\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2241-\t\t\t SKB_DATA_ALIGN(sizeof(struct skb_shared_info));\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2253-\tpp_params.dma_dir = xdp_prog ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2254:\tpp_params.offset = stmmac_rx_offset(priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2255-\tpp_params.max_len = dma_conf-\u003edma_buf_sz;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2258-\t\tpp_params.offset = 0;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2259:\t\tpp_params.max_len += stmmac_rx_offset(priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2260-\t}\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=2435=static void stmmac_mac_enable_rx_queues(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2442-\t\tmode = priv-\u003eplat-\u003erx_queues_cfg[queue].mode_to_use;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2443:\t\tstmmac_rx_queue_enable(priv, priv-\u003ehw, mode, queue);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2444-\t}\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=2564=static void stmmac_dma_operation_mode(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2606-\tfor (chan = 0; chan \u003c rx_channels_count; chan++) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2607:\t\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[chan];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-2608-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3066=static int stmmac_napi_check(struct stmmac_priv priv, u32 chan, u32 dir)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3069-\t\t\t\t\t\t \u0026priv-\u003exstats, chan, dir);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3070:\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[chan];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3071-\tstruct stmmac_tx_queue tx_q = \u0026priv-\u003edma_conf.tx_queue[chan];\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3257=static int stmmac_init_dma_engine(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3261-\tu8 dma_csr_ch = max(rx_channels_count, tx_channels_count);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3262:\tstruct stmmac_rx_queue rx_q;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3263-\tstruct stmmac_tx_queue tx_q;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3434=static void stmmac_configure_cbs(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3455-/*\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3456: stmmac_rx_queue_dma_chan_map - Map RX queue to RX dma channel\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3457- * @priv: driver private structure\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3459- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3460:static void stmmac_rx_queue_dma_chan_map(struct stmmac_priv priv)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3461-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3477=static void stmmac_mac_config_rx_queues_prio(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3487-\t\tprio = priv-\u003eplat-\u003erx_queues_cfg[queue].prio;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3488:\t\tstmmac_rx_queue_prio(priv, priv-\u003ehw, prio, queue);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3489-\t}\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3517=static void stmmac_mac_config_rx_queues_routing(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3528-\t\tpacket = priv-\u003eplat-\u003erx_queues_cfg[queue].pkt_route;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3529:\t\tstmmac_rx_queue_routing(priv, priv-\u003ehw, packet, queue);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3530-\t}\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3554=static void stmmac_mtl_configuration(struct stmmac_priv priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3576-\t/ Map RX MTL to DMA channels /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3577:\tstmmac_rx_queue_dma_chan_map(priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3578-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=3633=static int stmmac_hw_setup(struct net_device dev)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3675-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3676:\tret = stmmac_rx_ipc(priv, priv-\u003ehw);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3677-\tif (!ret) {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3697-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3698:\t\t\tstmmac_rx_watchdog(priv, priv-\u003eioaddr,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-3699-\t\t\t\t\t priv-\u003erx_riwt[queue], queue);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=4966=static netdev_features_t stmmac_features_check(struct sk_buff skb,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5005-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5006:static void stmmac_rx_vlan(struct net_device dev, struct sk_buff skb)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5007-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5024-/\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5025: stmmac_rx_refill - refill used skb preallocated buffers\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5026- * @priv: driver private structure\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5030- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5031:static inline void stmmac_rx_refill(struct stmmac_priv priv, u32 queue)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5032-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5033:\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5034:\tint dirty = stmmac_rx_dirty(priv, queue);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5035-\tunsigned int entry = rx_q-\u003edirty_rx;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5041-\twhile (dirty-- \u003e 0) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5042:\t\tstruct stmmac_rx_buffer buf = \u0026rx_q-\u003ebuf_pool[entry];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5043-\t\tstruct dma_desc p;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5091-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5092:static unsigned int stmmac_rx_buf1_len(struct stmmac_priv priv,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5093-\t\t\t\t struct dma_desc p,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5119-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5120:static unsigned int stmmac_rx_buf2_len(struct stmmac_priv priv,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5121-\t\t\t\t struct dma_desc p,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5370=static void stmmac_dispatch_skb_zc(struct stmmac_priv priv, u32 queue,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5373-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5374:\tstruct stmmac_rxq_stats rxq_stats = \u0026priv-\u003exstats.rxq_stats[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5375-\tstruct stmmac_channel ch = \u0026priv-\u003echannel[queue];\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5390-\t\t/* MAC level stripping. /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5391:\t\tstmmac_rx_hw_vlan(priv, priv-\u003ehw, p, skb);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5392-\telse\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5393-\t\t/ Driver level stripping. /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5394:\t\tstmmac_rx_vlan(priv-\u003edev, skb);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5395-\tskb-\u003eprotocol = eth_type_trans(skb, priv-\u003edev);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5413-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5414:static bool stmmac_rx_refill_zc(struct stmmac_priv priv, u32 queue, u32 budget)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5415-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5416:\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5417-\tunsigned int entry = rx_q-\u003edirty_rx;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5420-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5421:\tbudget = min(budget, stmmac_rx_dirty(priv, queue));\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5422-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5423-\twhile (budget-- \u003e 0 \u0026\u0026 entry != rx_q-\u003ecur_rx) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5424:\t\tstruct stmmac_rx_buffer buf = \u0026rx_q-\u003ebuf_pool[entry];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5425-\t\tdma_addr_t dma_addr;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5467=static struct stmmac_xdp_buff xsk_buff_to_stmmac_ctx(struct xdp_buff xdp)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5476-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5477:static int stmmac_rx_zc(struct stmmac_priv priv, int limit, u32 queue)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5478-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5479:\tstruct stmmac_rxq_stats rxq_stats = \u0026priv-\u003exstats.rxq_stats[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5480:\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5481-\tunsigned int count = 0, error = 0, len = 0;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5482:\tint dirty = stmmac_rx_dirty(priv, queue);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5483-\tunsigned int next_entry = rx_q-\u003ecur_rx;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5500-\twhile (count \u003c limit) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5501:\t\tstruct stmmac_rx_buffer buf;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5502-\t\tstruct stmmac_xdp_buff ctx;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5526-\t\t\tfailure = failure \|\|\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5527:\t\t\t\t !stmmac_rx_refill_zc(priv, queue, dirty);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5528-\t\t\tdirty = 0;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5533-\t\t/ read the status of the incoming frame /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5534:\t\tstatus = stmmac_rx_status(priv, \u0026priv-\u003exstats, p);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5535-\t\t/ check if managed by the DMA otherwise go ahead /\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5555-\t\tif (priv-\u003eextend_desc)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5556:\t\t\tstmmac_rx_extended_status(priv, \u0026priv-\u003exstats,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5557-\t\t\t\t\t\t rx_q-\u003edma_erx + entry);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5588-\t\t/ XDP ZC Frame only support primary buffers for now /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5589:\t\tbuf1_len = stmmac_rx_buf1_len(priv, p, status, len);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5590-\t\tlen += buf1_len;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5642-\tif (xsk_uses_need_wakeup(rx_q-\u003exsk_pool)) {\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5643:\t\tif (failure \|\| stmmac_rx_dirty(priv, queue) \u003e 0)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5644-\t\t\txsk_set_rx_need_wakeup(rx_q-\u003exsk_pool);\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5654-/\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5655: stmmac_rx - manage the receive process\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5656- * @priv: driver private structure\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5661- /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5662:static int stmmac_rx(struct stmmac_priv priv, int limit, u32 queue)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5663-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5664-\tu32 rx_errors = 0, rx_dropped = 0, rx_bytes = 0, rx_packets = 0;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5665:\tstruct stmmac_rxq_stats rxq_stats = \u0026priv-\u003exstats.rxq_stats[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5666:\tstruct stmmac_rx_queue rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5667-\tstruct stmmac_channel ch = \u0026priv-\u003echannel[queue];\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5692-\t\tenum pkt_hash_types hash_type;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5693:\t\tstruct stmmac_rx_buffer buf;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5694-\t\tstruct dma_desc np, p;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5720-\t\t/* read the status of the incoming frame /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5721:\t\tstatus = stmmac_rx_status(priv, \u0026priv-\u003exstats, p);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5722-\t\t/ check if managed by the DMA otherwise go ahead /\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5737-\t\tif (priv-\u003eextend_desc)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5738:\t\t\tstmmac_rx_extended_status(priv, \u0026priv-\u003exstats, rx_q-\u003edma_erx + entry);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5739-\t\tif (unlikely(status == discard_frame)) {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5757-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5758:\t\tbuf1_len = stmmac_rx_buf1_len(priv, p, status, len);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5759-\t\tlen += buf1_len;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5760:\t\tbuf2_len = stmmac_rx_buf2_len(priv, p, status, len);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5761-\t\tlen += buf2_len;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5884-\t\t\t/ MAC level stripping. /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5885:\t\t\tstmmac_rx_hw_vlan(priv, priv-\u003ehw, p, skb);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5886-\t\telse\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5887-\t\t\t/ Driver level stripping. /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5888:\t\t\tstmmac_rx_vlan(priv-\u003edev, skb);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5889-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5918-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5919:\tstmmac_rx_refill(priv, queue);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5920-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5933=static int stmmac_napi_poll_rx(struct napi_struct napi, int budget)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5937-\tstruct stmmac_priv priv = ch-\u003epriv_data;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5938:\tstruct stmmac_rxq_stats rxq_stats;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5939-\tu32 chan = ch-\u003eindex;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5946-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5947:\twork_done = stmmac_rx(priv, budget, chan);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5948-\tif (work_done \u003c budget \u0026\u0026 napi_complete_done(napi, work_done)) {\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=5992=static int stmmac_napi_poll_rxtx(struct napi_struct napi, int budget)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-5998-\tint rx_done, tx_done, rxtx_done;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:5999:\tstruct stmmac_rxq_stats rxq_stats;\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6000-\tstruct stmmac_txq_stats txq_stats;\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6015-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6016:\trx_done = stmmac_rx_zc(priv, budget, chan);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6017-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6168=static int stmmac_set_features(struct net_device netdev,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6180-\t /\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6181:\tstmmac_rx_ipc(priv, priv-\u003ehw);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6182-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6335=static irqreturn_t stmmac_msi_intr_rx(int irq, void data)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6336-{\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6337:\tstruct stmmac_rx_queue rx_q = (struct stmmac_rx_queue )data;\n\n" }
25/2	2026/07/30 15:45	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 80369 output: 20 thoughts: 735 Thoughts: Analyzing STMMAC VLAN Handling for API Exposure Alright, let's break this down. My goal is to identify and document the relevant API entry points in this STMMAC driver for VLAN handling, keeping in mind the preference for non-static, non-inlined functions as the primary focus. I see that `stmmac_rx` is being called from both `stmmac_napi_poll_rx` and `stmmac_napi_poll_rxtx`, with `stmmac_napi_poll_rx` specifically being the NAPI poll function. I also see `stmmac_vlan_rx_add_vid` is the `ndo_vlan_rx_add_vid` function. Initially, I identified `stmmac_vlan_rx_add_vid`, `stmmac_vlan_rx_kill_vid`, `stmmac_rx`, and `stmmac_rx_zc` as the key symbols to track. However, a quick scan reveals that both `stmmac_rx` and `stmmac_rx_zc` are, in fact, static functions. The preference here is for non-static functions, and so I was about to dismiss these internal static helper functions. But wait, `stmmac_napi_poll_rx` is also static! Ah, right, I need to remember the context. Even though these functions are declared as static, they are assigned to function pointers within the `net_device_ops` structure or the NAPI poll structure. Since they're assigned to function pointers, they are not inlined and have distinct symbol addresses, making them legitimate API entrypoints for our purposes. So, they are fine to use, since they are being called through function pointers. Let's make sure I'm not missing any other non-static functions. `stmmac_vlan_update` is static. Now, I see the patch also touches `dwxgmac2_wrback_get_rx_vlan_type` which is assigned to `get_rx_vlan_type` in `dwxgmac210_desc_ops`. It also modifies `stmmac_vlan_update` which is called by `stmmac_vlan_rx_add_vid`, `stmmac_vlan_rx_kill_vid`, and `stmmac_vlan_restore`. Further, it modifies `vlan_update_dvlan_state` which is assigned to `update_dvlan_state` in `dwxlgmac2_vlan_ops` and `dwxgmac210_vlan_ops`. Also `vlan_update_hash` which is assigned to `update_vlan_hash` in `dwmac_vlan_ops`, `vlan_rx_hw` which is assigned to `rx_hw_vlan` in `dwmac_vlan_ops` and `dwxgmac210_vlan_ops`, and `dwxgmac2_update_vlan_hash` which is assigned to `update_vlan_hash` in `dwxlgmac2_vlan_ops` and `dwxgmac210_vlan_ops`. So these are all related. Therefore, the updated set of API entry points that are relevant to this discussion are: * `stmmac_vlan_rx_add_vid` * `stmmac_vlan_rx_kill_vid` * `stmmac_rx` * `stmmac_rx_zc` * `stmmac_napi_poll_rx` * `stmmac_napi_poll_rxtx` Now, before I can conclude, I need to see if any specific CONFIG options are relevant to this driver. Let's check the `Kconfig` file under `drivers/net/ethernet/stmicro/stmmac/Kconfig`.
26/2	2026/07/30 15:45	tool	grepper	0m Args: { "Expression": "config STMMAC_ETH" } Results: { "Output": "drivers/net/ethernet/stmicro/stmmac/Kconfig-1-# SPDX-License-Identifier: GPL-2.0-only\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:2:config STMMAC_ETH\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-3-\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n" }
27/2	2026/07/30 15:46	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 82104 output: 42 thoughts: 14 Thoughts: Here's my take on the dependencies, as if I were thinking it: Digging into STMMAC_ETH Dependencies Alright, time to dive into this `STMMAC_ETH` module. First, I need to understand its dependencies. It's crucial for me to have a solid grasp on what it relies on and how those relationships are structured. I'm going to quickly check which kernel modules, drivers, libraries, or even specific hardware features this thing is tied to. This will guide my understanding. Is it a self contained module or is it dependent on some of the subsystems I have been working with?
28/2	2026/07/30 15:46	tool	read-file	0m Args: { "File": "drivers/net/ethernet/stmicro/stmmac/Kconfig", "FirstLine": 1, "LineCount": 50 } Results: { "Contents": " 1:\t# SPDX-License-Identifier: GPL-2.0-only\n 2:\tconfig STMMAC_ETH\n 3:\t\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n 4:\t\tdepends on HAS_IOMEM \u0026\u0026 HAS_DMA\n 5:\t\tdepends on PTP_1588_CLOCK_OPTIONAL\n 6:\t\tdepends on ETHTOOL_NETLINK\n 7:\t\tselect MII\n 8:\t\tselect PCS_XPCS\n 9:\t\tselect PAGE_POOL\n 10:\t\tselect PHYLINK\n 11:\t\tselect CRC32\n 12:\t\tselect RESET_CONTROLLER\n 13:\t\tselect NET_DEVLINK\n 14:\t\thelp\n 15:\t\t This is the driver for the Ethernet IPs built around a\n 16:\t\t Synopsys IP Core.\n 17:\t\n 18:\tif STMMAC_ETH\n 19:\t\n 20:\tconfig STMMAC_SELFTESTS\n 21:\t\tbool \"Support for STMMAC Selftests\"\n 22:\t\tdepends on INET\n 23:\t\tdefault n\n 24:\t\thelp\n 25:\t\t This adds support for STMMAC Selftests using ethtool. Enable this\n 26:\t\t feature if you are facing problems with your HW and submit the test\n 27:\t\t results to the netdev Mailing List.\n 28:\t\n 29:\tconfig STMMAC_PLATFORM\n 30:\t\ttristate \"STMMAC Platform bus support\"\n 31:\t\tselect MFD_SYSCON\n 32:\t\tdefault y\n 33:\t\thelp\n 34:\t\t This selects the platform specific bus support for the stmmac driver.\n 35:\t\t This is the driver used on several SoCs:\n 36:\t\t STi, Allwinner, Amlogic Meson, Altera SOCFPGA.\n 37:\t\n 38:\t\t If you have a controller with this interface, say Y or M here.\n 39:\t\n 40:\t\t If unsure, say N.\n 41:\t\n 42:\tif STMMAC_PLATFORM\n 43:\t\n 44:\tconfig DWMAC_DWC_QOS_ETH\n 45:\t\ttristate \"Support for snps,dwc-qos-ethernet.txt DT binding.\"\n 46:\t\tselect CRC32\n 47:\t\tselect MII\n 48:\t\tdepends on OF \u0026\u0026 HAS_DMA\n 49:\t\thelp\n 50:\t\t Support for chips using the snps,dwc-qos-ethernet.txt DT binding.\n" }
29/2	2026/07/30 15:46	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 82960 output: 45 thoughts: 33 Thoughts: Okay, here's my summarized thought process, presented as if I'm the one thinking it: Digging into the Ethernet Driver Alright, let's see... STMMAC_ETH... that's the main driver, isn't it? The one at the heart of the matter. So, the question now is, what about PCI configuration? Is there a separate section for that? Need to delve deeper into the Kconfig file to confirm. I should scroll down and scan for anything related to PCI configuration. Gotta be sure to examine the entire structure.
30/2	2026/07/30 15:46	tool	read-file	0m Args: { "File": "drivers/net/ethernet/stmicro/stmmac/Kconfig", "FirstLine": 250, "LineCount": 100 } Results: { "Contents": " 250:\t\t for the stmmac device driver. This driver is used for the\n 251:\t\t StarFive JH7100 and JH7110 ethernet controllers.\n 252:\t\n 253:\tconfig DWMAC_STI\n 254:\t\ttristate \"STi GMAC support\"\n 255:\t\tdefault ARCH_STI\n 256:\t\tdepends on OF \u0026\u0026 (ARCH_STI \|\| COMPILE_TEST)\n 257:\t\tselect MFD_SYSCON\n 258:\t\thelp\n 259:\t\t Support for ethernet controller on STi SOCs.\n 260:\t\n 261:\t\t This selects STi SoC glue layer support for the stmmac\n 262:\t\t device driver. This driver is used on for the STi series\n 263:\t\t SOCs GMAC ethernet controller.\n 264:\t\n 265:\tconfig DWMAC_STM32\n 266:\t\ttristate \"STM32 DWMAC support\"\n 267:\t\tdefault ARCH_STM32\n 268:\t\tdepends on OF \u0026\u0026 HAS_IOMEM \u0026\u0026 (ARCH_STM32 \|\| COMPILE_TEST)\n 269:\t\tselect MFD_SYSCON\n 270:\t\thelp\n 271:\t\t Support for ethernet controller on STM32 SOCs.\n 272:\t\n 273:\t\t This selects STM32 SoC glue layer support for the stmmac\n 274:\t\t device driver. This driver is used on for the STM32 series\n 275:\t\t SOCs GMAC ethernet controller.\n 276:\t\n 277:\tconfig DWMAC_SUNXI\n 278:\t\ttristate \"Allwinner GMAC support\"\n 279:\t\tdefault ARCH_SUNXI\n 280:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI \|\| COMPILE_TEST)\n 281:\t\thelp\n 282:\t\t Support for Allwinner A20/A31 GMAC ethernet controllers.\n 283:\t\n 284:\t\t This selects Allwinner SoC glue layer support for the\n 285:\t\t stmmac device driver. This driver is used for A20/A31\n 286:\t\t GMAC ethernet controller.\n 287:\t\n 288:\tconfig DWMAC_SUN8I\n 289:\t\ttristate \"Allwinner sun8i GMAC support\"\n 290:\t\tdefault ARCH_SUNXI\n 291:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI \|\| COMPILE_TEST)\n 292:\t\tselect MDIO_BUS_MUX\n 293:\t\thelp\n 294:\t\t Support for Allwinner H3 A83T A64 EMAC ethernet controllers.\n 295:\t\n 296:\t\t This selects Allwinner SoC glue layer support for the\n 297:\t\t stmmac device driver. This driver is used for H3/A83T/A64\n 298:\t\t EMAC ethernet controller.\n 299:\t\n 300:\tconfig DWMAC_SUN55I\n 301:\t\ttristate \"Allwinner sun55i GMAC200 support\"\n 302:\t\tdefault ARCH_SUNXI\n 303:\t\tdepends on OF \u0026\u0026 (ARCH_SUNXI \|\| COMPILE_TEST)\n 304:\t\tselect MDIO_BUS_MUX\n 305:\t\thelp\n 306:\t\t Support for Allwinner A523/T527 GMAC200 ethernet controllers.\n 307:\t\n 308:\t\t This selects Allwinner SoC glue layer support for the\n 309:\t\t stmmac device driver. This driver is used for A523/T527\n 310:\t\t GMAC200 ethernet controller.\n 311:\t\n 312:\tconfig DWMAC_THEAD\n 313:\t\ttristate \"T-HEAD dwmac support\"\n 314:\t\tdepends on OF \u0026\u0026 (ARCH_THEAD \|\| COMPILE_TEST)\n 315:\t\thelp\n 316:\t\t Support for ethernet controllers on T-HEAD RISC-V SoCs\n 317:\t\n 318:\t\t This selects the T-HEAD platform specific glue layer support for\n 319:\t\t the stmmac device driver. This driver is used for T-HEAD TH1520\n 320:\t\t ethernet controller.\n 321:\t\n 322:\tconfig DWMAC_IMX8\n 323:\t\ttristate \"NXP IMX8 DWMAC support\"\n 324:\t\tdefault ARCH_MXC\n 325:\t\tdepends on OF \u0026\u0026 (ARCH_MXC \|\| COMPILE_TEST)\n 326:\t\tselect MFD_SYSCON\n 327:\t\thelp\n 328:\t\t Support for ethernet controller on NXP i.MX8 SOCs.\n 329:\t\n 330:\t\t This selects NXP SoC glue layer support for the stmmac\n 331:\t\t device driver. This driver is used for i.MX8 series like\n 332:\t\t iMX8MP/iMX8DXL GMAC ethernet controller.\n 333:\t\n 334:\tconfig DWMAC_INTEL_PLAT\n 335:\t\ttristate \"Intel dwmac support\"\n 336:\t\tdepends on OF \u0026\u0026 COMMON_CLK\n 337:\t\thelp\n 338:\t\t Support for ethernet controllers on Intel SoCs\n 339:\t\n 340:\t\t This selects the Intel platform specific glue layer support for\n 341:\t\t the stmmac device driver. This driver is used for the Intel Keem Bay\n 342:\t\t SoC.\n 343:\t\n 344:\tconfig DWMAC_LOONGSON1\n 345:\t\ttristate \"Loongson1 GMAC support\"\n 346:\t\tdefault MACH_LOONGSON32\n 347:\t\tdepends on OF \u0026\u0026 (MACH_LOONGSON32 \|\| COMPILE_TEST)\n 348:\t\thelp\n 349:\t\t Support for ethernet controller on Loongson1 SoC.\n" }
31/2	2026/07/30 15:46	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 84739 output: 45 thoughts: 10 Thoughts: Okay, here's the summary, expressed in the first person, assuming the user is an expert. Initial Assessment: File Inspection Alright, before diving in, the first thing I need to do is get a feel for the landscape. Let's start with a quick scan of the end of the file. That's typically where you find the terminating characters, perhaps some final configuration settings, or at least a good indicator of the file's structure. Getting that endpoint reference will give me a point from which to extrapolate the overall structure. No need to start at the beginning; I can get a rough sense of the content by targeting that logical end. From there I can determine a more detailed plan, based on what the end shows me.
32/2	2026/07/30 15:46	tool	read-file	0m Args: { "File": "drivers/net/ethernet/stmicro/stmmac/Kconfig", "FirstLine": 350, "LineCount": 100 } Results: { "Contents": " 350:\t\n 351:\t\t This selects Loongson1 SoC glue layer support for the stmmac\n 352:\t\t device driver. This driver is used for Loongson1-based boards\n 353:\t\t like Loongson LS1B/LS1C.\n 354:\t\n 355:\tconfig DWMAC_TEGRA\n 356:\t\ttristate \"NVIDIA Tegra MGBE support\"\n 357:\t\tdepends on ARCH_TEGRA \|\| COMPILE_TEST\n 358:\t\thelp\n 359:\t\t This selects the Multi-GigaBit Ethernet (MGBE) Controller that is\n 360:\t\t found on the NVIDIA Tegra SoC devices. This driver provides the glue\n 361:\t\t layer on top of the stmmac driver required for these NVIDIA Tegra SoC\n 362:\t\t devices.\n 363:\t\n 364:\tconfig DWMAC_VISCONTI\n 365:\t\ttristate \"Toshiba Visconti DWMAC support\"\n 366:\t\tdefault ARCH_VISCONTI\n 367:\t\tdepends on OF \u0026\u0026 COMMON_CLK \u0026\u0026 (ARCH_VISCONTI \|\| COMPILE_TEST)\n 368:\t\thelp\n 369:\t\t Support for ethernet controller on Visconti SoCs.\n 370:\t\n 371:\tendif # STMMAC_PLATFORM\n 372:\t\n 373:\tconfig STMMAC_LIBPCI\n 374:\t\ttristate\n 375:\t\thelp\n 376:\t\t This option enables the PCI bus helpers for the stmmac driver.\n 377:\t\n 378:\tconfig DWMAC_INTEL\n 379:\t\ttristate \"Intel GMAC support\"\n 380:\t\tdefault X86\n 381:\t\tdepends on X86 \u0026\u0026 PCI\n 382:\t\tdepends on COMMON_CLK\n 383:\t\tdepends on ACPI\n 384:\t\thelp\n 385:\t\t This selects the Intel platform specific bus support for the\n 386:\t\t stmmac driver. This driver is used for Intel Quark/EHL/TGL.\n 387:\t\n 388:\tconfig DWMAC_LOONGSON\n 389:\t\ttristate \"Loongson PCI DWMAC support\"\n 390:\t\tdefault MACH_LOONGSON64\n 391:\t\tdepends on (MACH_LOONGSON64 \|\| COMPILE_TEST) \u0026\u0026 PCI\n 392:\t\tdepends on COMMON_CLK\n 393:\t\tselect STMMAC_LIBPCI\n 394:\t\thelp\n 395:\t\t This selects the LOONGSON PCI bus support for the stmmac driver,\n 396:\t\t Support for ethernet controller on Loongson-2K1000 SoC and LS7A1000 bridge.\n 397:\t\n 398:\tconfig DWMAC_MOTORCOMM\n 399:\t\ttristate \"Motorcomm PCI DWMAC support\"\n 400:\t\tdepends on PCI\n 401:\t\tselect MOTORCOMM_PHY\n 402:\t\tselect STMMAC_LIBPCI\n 403:\t\thelp\n 404:\t\t This enables glue driver for Motorcomm DWMAC-based PCI Ethernet\n 405:\t\t controllers. Currently only YT6801 is supported.\n 406:\t\n 407:\tconfig STMMAC_PCI\n 408:\t\ttristate \"STMMAC PCI bus support\"\n 409:\t\tdepends on PCI\n 410:\t\tdepends on COMMON_CLK\n 411:\t\tselect STMMAC_LIBPCI\n 412:\t\thelp\n 413:\t\t This selects the platform specific bus support for the stmmac driver.\n 414:\t\t This driver was tested on XLINX XC2V3000 FF1152AMT0221\n 415:\t\t D1215994A VIRTEX FPGA board and SNPS QoS IPK Prototyping Kit.\n 416:\t\n 417:\t\t If you have a controller with this interface, say Y or M here.\n 418:\t\n 419:\t\t If unsure, say N.\n 420:\tendif # STMMAC_ETH\n" }
33/2	2026/07/30 15:46	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 86046 output: 184 thoughts: 375 Thoughts: My Analysis of STMMAC Driver Configuration for Fuzzing Okay, let's see. My primary goal here is to determine the most effective configuration for fuzzing the `stmmac` Ethernet driver, especially given the patch's focus on VLAN handling and descriptor parsing. Based on the target architecture (x86_64, which heavily implies Intel's DWMAC), I need to choose configurations likely to be probed by syzkaller. I've got a list of potential configs: `STMMAC_ETH`, `STMMAC_PCI`, `DWMAC_INTEL`, `DWMAC_MOTORCOMM`, and `STMMAC_PLATFORM`. I'm pretty sure syzkaller's x86_64 focus makes `DWMAC_INTEL` very likely to be active. I'll include `STMMAC_ETH`, `STMMAC_PCI`, and `DWMAC_INTEL` to start. Wait, `STMMAC_ETH` seems to be the core config, let's make sure it's valid first. Good, `STMMAC_ETH` depends on standard features like `HAS_IOMEM && HAS_DMA`, `PTP_1588_CLOCK_OPTIONAL`, and `ETHTOOL_NETLINK`. That's expected, so we're good there. So, here's my considered return, a well balanced configuration to focus on this patch: * EnableConfigs: `["STMMAC_ETH", "STMMAC_PCI", "DWMAC_INTEL"]` * FocusSymbols: `["stmmac_vlan_rx_add_vid", "stmmac_vlan_rx_kill_vid", "stmmac_rx", "stmmac_rx_zc", "stmmac_napi_poll_rx", "stmmac_napi_poll_rxtx"]` - These are the key functions targeted by the patch within the RX and netdev paths. * WorthFuzzing: `true` - Absolutely, the changes are in core Ethernet driver functionality. * Reasoning: "The patch modifies core VLAN handling and descriptor parsing logic in the stmmac Ethernet driver. This driver is reachable via PCI (e.g. Intel DWMAC) and platform devices, and the modified functions are part of the active RX and netdev configuration paths." This summarizes my rationale. We're directly targeting the areas of interest, maximizing the chances of uncovering potential vulnerabilities.
34/2	2026/07/30 15:46	tool	set-results	0m Args: { "EnableConfigs": [ "STMMAC_ETH", "STMMAC_PCI", "DWMAC_INTEL" ], "FocusSymbols": [ "stmmac_vlan_rx_add_vid", "stmmac_vlan_rx_kill_vid", "stmmac_rx", "stmmac_rx_zc", "stmmac_napi_poll_rx", "stmmac_napi_poll_rxtx" ], "Reasoning": "The patch modifies core VLAN handling and descriptor parsing logic in the stmmac Ethernet driver. This driver is reachable via PCI (e.g. Intel DWMAC) and platform devices, and the modified functions are part of the active RX and netdev configuration paths.", "WorthFuzzing": true } Results: { "EnableConfigs": [ "STMMAC_ETH", "STMMAC_PCI", "DWMAC_INTEL" ], "FocusSymbols": [ "stmmac_vlan_rx_add_vid", "stmmac_vlan_rx_kill_vid", "stmmac_rx", "stmmac_rx_zc", "stmmac_napi_poll_rx", "stmmac_napi_poll_rxtx" ], "Reasoning": "The patch modifies core VLAN handling and descriptor parsing logic in the stmmac Ethernet driver. This driver is reachable via PCI (e.g. Intel DWMAC) and platform devices, and the modified functions are part of the active RX and netdev configuration paths.", "WorthFuzzing": true }

LLM Calls Summary:
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Tool Calls Summary:
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