| Seq | Timestamp | Type | Name | Duration |
|---|---|---|---|---|
| 0/0 | 2026/10/12 18:45 | flow | patch-triage |
1mArgs:null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"KMSANReasoning": "",
"NeedsKMSAN": false,
"Reasoning": "The patch modifies the STMicroelectronics Multi-Gigabit Ethernet (stmmac) driver, adding multi-buffer (frags) support to its XDP receive path. STMMAC/DWMAC ethernet controllers require specific physical SoC or PCIe hardware that is not emulated in standard virtualized environments (QEMU or GCE on amd64). As such, the modified code is structurally unreachable during standard fuzzing.",
"WorthFuzzing": false
} |
| 1/1 | 2026/10/12 18:45 | action | read-patch-diff |
0mArgs:null Results: {
"PatchDiff": "commit 17c400256719698b78bd93b75c6bbad252bb51c9\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Mon Oct 12 18:45:56 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h\nindex 9278378407e83..63020e8edd8a7 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h\n@@ -132,7 +132,8 @@ struct stmmac_rx_queue {\n \tdma_addr_t dma_rx_phy;\n \tunsigned int state_saved;\n \tstruct {\n-\t\tstruct sk_buff *skb;\n+\t\tstruct xdp_buff xdp;\n+\t\tunsigned int frames;\n \t\tunsigned int len;\n \t\tunsigned int error;\n \t} state;\ndiff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\nindex b8b4de4c5b1a7..fd04368543c23 100644\n--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c\n@@ -158,6 +158,9 @@ static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue);\n static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode,\n \t\t\t\t\t u32 rxmode, u32 chan);\n static void stmmac_vlan_restore(struct stmmac_priv *priv);\n+static void stmmac_xdp_put_buff(struct stmmac_rx_queue *rx_q,\n+\t\t\t\tstruct xdp_buff *xdp, int sync_len,\n+\t\t\t\tbool allow_direct);\n \n #ifdef CONFIG_DEBUG_FS\n static const struct net_device_ops stmmac_netdev_ops;\n@@ -2180,6 +2183,11 @@ static void __free_dma_rx_desc_resources(struct stmmac_priv *priv,\n \telse\n \t\tdma_free_rx_skbufs(priv, dma_conf, queue);\n \n+\tif (rx_q-\u003estate.frames \u0026\u0026 !rx_q-\u003exsk_pool) {\n+\t\tstmmac_xdp_put_buff(rx_q, \u0026rx_q-\u003estate.xdp, -1, false);\n+\t\trx_q-\u003estate.frames = 0;\n+\t}\n+\trx_q-\u003estate_saved = false;\n \trx_q-\u003ebuf_alloc_num = 0;\n \trx_q-\u003exsk_pool = NULL;\n \n@@ -5457,8 +5465,8 @@ static int __stmmac_xdp_run_prog(struct stmmac_priv *priv,\n static struct sk_buff *stmmac_xdp_run_prog(struct stmmac_priv *priv,\n \t\t\t\t\t struct xdp_buff *xdp)\n {\n+\tint res = STMMAC_XDP_CONSUMED;\n \tstruct bpf_prog *prog;\n-\tint res;\n \n \tprog = READ_ONCE(priv-\u003exdp_prog);\n \tif (!prog) {\n@@ -5466,7 +5474,8 @@ static struct sk_buff *stmmac_xdp_run_prog(struct stmmac_priv *priv,\n \t\tgoto out;\n \t}\n \n-\tres = __stmmac_xdp_run_prog(priv, prog, xdp);\n+\tif (likely(!xdp_buff_has_frags(xdp) || prog-\u003eaux-\u003exdp_has_frags))\n+\t\tres = __stmmac_xdp_run_prog(priv, prog, xdp);\n out:\n \treturn ERR_PTR(-res);\n }\n@@ -5620,12 +5629,12 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \tunsigned int count = 0, error = 0, len = 0;\n \tint dirty = stmmac_rx_dirty(priv, queue);\n \tunsigned int next_entry = rx_q-\u003ecur_rx;\n+\tbool in_progress = rx_q-\u003estate_saved;\n \tu32 rx_errors = 0, rx_dropped = 0;\n \tunsigned int desc_size;\n \tstruct bpf_prog *prog;\n \tbool failure = false;\n \tint xdp_status = 0;\n-\tint status = 0;\n \n \tif (netif_msg_rx_status(priv)) {\n \t\tvoid *rx_head = stmmac_get_rx_desc(priv, rx_q, 0);\n@@ -5636,23 +5645,25 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tstmmac_display_ring(priv, rx_head, priv-\u003edma_conf.dma_rx_size, true,\n \t\t\t\t rx_q-\u003edma_rx_phy, desc_size);\n \t}\n+\n+\tif (rx_q-\u003estate_saved) {\n+\t\terror = rx_q-\u003estate.error;\n+\t\tlen = rx_q-\u003estate.len;\n+\t\trx_q-\u003estate_saved = false;\n+\t}\n+\n \twhile (count \u003c limit) {\n \t\tstruct stmmac_rx_buffer *buf;\n \t\tstruct stmmac_xdp_buff *ctx;\n \t\tunsigned int buf1_len = 0;\n \t\tstruct dma_desc *np, *p;\n-\t\tint entry;\n+\t\tint entry, status;\n \t\tint res;\n \n-\t\tif (!count \u0026\u0026 rx_q-\u003estate_saved) {\n-\t\t\terror = rx_q-\u003estate.error;\n-\t\t\tlen = rx_q-\u003estate.len;\n-\t\t} else {\n-\t\t\trx_q-\u003estate_saved = false;\n+\t\tif (!in_progress) {\n \t\t\terror = 0;\n \t\t\tlen = 0;\n \t\t}\n-\n read_again:\n \t\tif (count \u003e= limit)\n \t\t\tbreak;\n@@ -5691,21 +5702,26 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tif (!buf-\u003exdp)\n \t\t\tbreak;\n \n+\t\tin_progress = status \u0026 rx_not_ls;\n+\n \t\tif (priv-\u003eextend_desc)\n \t\t\tstmmac_rx_extended_status(priv, \u0026priv-\u003exstats,\n \t\t\t\t\t\t rx_q-\u003edma_erx + entry);\n-\t\tif (unlikely(status == discard_frame)) {\n-\t\t\txsk_buff_free(buf-\u003exdp);\n-\t\t\tbuf-\u003exdp = NULL;\n-\t\t\tdirty++;\n+\n+\t\tif (unlikely(status == discard_frame) \u0026\u0026 !error) {\n \t\t\terror = 1;\n \t\t\tif (!priv-\u003ehwts_rx_en)\n \t\t\t\trx_errors++;\n \t\t}\n \n-\t\tif (unlikely(error \u0026\u0026 (status \u0026 rx_not_ls)))\n-\t\t\tgoto read_again;\n \t\tif (unlikely(error)) {\n+\t\t\txsk_buff_free(buf-\u003exdp);\n+\t\t\tbuf-\u003exdp = NULL;\n+\t\t\tdirty++;\n+\n+\t\t\tif (status \u0026 rx_not_ls)\n+\t\t\t\tgoto read_again;\n+\n \t\t\tcount++;\n \t\t\tcontinue;\n \t\t}\n@@ -5714,8 +5730,9 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tif (likely(status \u0026 rx_not_ls)) {\n \t\t\txsk_buff_free(buf-\u003exdp);\n \t\t\tbuf-\u003exdp = NULL;\n+\t\t\trx_dropped++;\n+\t\t\terror = 1;\n \t\t\tdirty++;\n-\t\t\tcount++;\n \t\t\tgoto read_again;\n \t\t}\n \n@@ -5763,7 +5780,7 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tcount++;\n \t}\n \n-\tif (status \u0026 rx_not_ls) {\n+\tif (in_progress) {\n \t\trx_q-\u003estate_saved = true;\n \t\trx_q-\u003estate.error = error;\n \t\trx_q-\u003estate.len = len;\n@@ -5790,6 +5807,118 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)\n \treturn failure ? limit : (int)count;\n }\n \n+static void\n+stmmac_xdp_put_buff(struct stmmac_rx_queue *rx_q, struct xdp_buff *xdp,\n+\t\t int sync_len, bool allow_direct)\n+{\n+\tstruct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);\n+\tint i;\n+\n+\tif (likely(!xdp_buff_has_frags(xdp)))\n+\t\tgoto out;\n+\n+\tfor (i = 0; i \u003c sinfo-\u003enr_frags; i++)\n+\t\tpage_pool_put_full_page(rx_q-\u003epage_pool,\n+\t\t\t\t\tskb_frag_page(\u0026sinfo-\u003efrags[i]),\n+\t\t\t\t\tallow_direct);\n+out:\n+\tpage_pool_put_page(rx_q-\u003epage_pool, virt_to_head_page(xdp-\u003edata),\n+\t\t\t sync_len, allow_direct);\n+}\n+\n+static struct sk_buff *stmmac_build_skb(struct xdp_buff *xdp)\n+{\n+\tstruct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);\n+\tu32 metasize = xdp-\u003edata - xdp-\u003edata_meta;\n+\tstruct sk_buff *skb;\n+\tu8 num_frags = 0;\n+\n+\tif (unlikely(xdp_buff_has_frags(xdp)))\n+\t\tnum_frags = sinfo-\u003enr_frags;\n+\n+\tskb = napi_build_skb(xdp-\u003edata_hard_start, xdp-\u003eframe_sz);\n+\tif (!skb)\n+\t\treturn NULL;\n+\n+\tskb_mark_for_recycle(skb);\n+\tskb_reserve(skb, xdp-\u003edata - xdp-\u003edata_hard_start);\n+\tskb_put(skb, xdp-\u003edata_end - xdp-\u003edata);\n+\tif (metasize)\n+\t\tskb_metadata_set(skb, metasize);\n+\n+\tif (unlikely(xdp_buff_has_frags(xdp)))\n+\t\txdp_update_skb_frags_info(skb, num_frags, sinfo-\u003exdp_frags_size,\n+\t\t\t\t\t num_frags * xdp-\u003eframe_sz,\n+\t\t\t\t\t xdp_buff_get_skb_flags(xdp));\n+\treturn skb;\n+}\n+\n+static bool stmmac_build_xdp_frags(struct stmmac_priv *priv,\n+\t\t\t\t struct stmmac_rx_queue *rx_q,\n+\t\t\t\t unsigned int len, struct page *page,\n+\t\t\t\t unsigned int offset,\n+\t\t\t\t enum dma_data_direction dma_dir,\n+\t\t\t\t struct xdp_buff *xdp)\n+{\n+\tdma_addr_t dma_addr = page_pool_get_dma_addr(page) + offset;\n+\n+\tdma_sync_single_for_cpu(priv-\u003edevice, dma_addr, len, dma_dir);\n+\tif (!xdp_buff_add_frag(xdp, page_to_netmem(page), offset, len,\n+\t\t\t xdp-\u003eframe_sz)) {\n+\t\tpage_pool_put_full_page(rx_q-\u003epage_pool, page, true);\n+\t\treturn false;\n+\t}\n+\n+\treturn true;\n+}\n+\n+static int stmmac_xdp_shrink_tail(struct stmmac_rx_queue *rx_q,\n+\t\t\t\t struct xdp_buff *xdp, int offset)\n+{\n+\tstruct skb_shared_info *sinfo;\n+\tint i;\n+\n+\tif (unlikely(offset \u003c 0 ||\n+\t\t offset \u003e (int)xdp_get_buff_len(xdp) - ETH_HLEN))\n+\t\treturn -EINVAL;\n+\n+\tif (likely(!xdp_buff_has_frags(xdp))) {\n+\t\txdp-\u003edata_end -= offset;\n+\t\treturn 0;\n+\t}\n+\n+\tsinfo = xdp_get_shared_info_from_buff(xdp);\n+\tfor (i = sinfo-\u003enr_frags - 1; i \u003e= 0 \u0026\u0026 offset \u003e 0; i--) {\n+\t\tskb_frag_t *frag = \u0026sinfo-\u003efrags[i];\n+\t\tint delta = min_t(int, offset, skb_frag_size(frag));\n+\n+\t\tif (delta == skb_frag_size(frag)) {\n+\t\t\t/* The whole frag is consumed by the strip: return it\n+\t\t\t * to the page pool right away. Its ring slot still\n+\t\t\t * carries the page DMA address until stmmac_rx_refill()\n+\t\t\t * re-arms it at the end of the NAPI poll. This is\n+\t\t\t * safe because HW cannot touch the slot until then.\n+\t\t\t */\n+\t\t\tpage_pool_put_full_page(rx_q-\u003epage_pool,\n+\t\t\t\t\t\tskb_frag_page(frag), true);\n+\t\t\tsinfo-\u003enr_frags--;\n+\t\t} else {\n+\t\t\tskb_frag_size_sub(frag, delta);\n+\t\t}\n+\n+\t\tsinfo-\u003exdp_frags_size -= delta;\n+\t\toffset -= delta;\n+\t}\n+\n+\tif (unlikely(!sinfo-\u003enr_frags)) {\n+\t\txdp_buff_clear_frags_flag(xdp);\n+\t\txdp_buff_clear_frag_pfmemalloc(xdp);\n+\t\txdp-\u003edata_end -= offset;\n+\t}\n+\n+\treturn 0;\n+}\n+\n /**\n * stmmac_rx - manage the receive process\n * @priv: driver private structure\n@@ -5803,20 +5932,20 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \tu32 rx_errors = 0, rx_dropped = 0, rx_bytes = 0, rx_packets = 0;\n \tstruct stmmac_rxq_stats *rxq_stats = \u0026priv-\u003exstats.rxq_stats[queue];\n \tstruct stmmac_rx_queue *rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\n+\tunsigned int frames = 0, next_entry = rx_q-\u003ecur_rx;\n \tstruct stmmac_channel *ch = \u0026priv-\u003echannel[queue];\n \tunsigned int count = 0, error = 0, len = 0;\n-\tint status = 0, coe = priv-\u003ehw-\u003erx_csum;\n-\tunsigned int next_entry = rx_q-\u003ecur_rx;\n+\tbool in_progress = rx_q-\u003estate_saved;\n \tenum dma_data_direction dma_dir;\n-\tunsigned int desc_size;\n-\tstruct sk_buff *skb = NULL;\n+\tint coe = priv-\u003ehw-\u003erx_csum;\n \tstruct stmmac_xdp_buff ctx;\n-\tbool fcs_stripped = false;\n+\tunsigned int desc_size;\n \tint xdp_status = 0;\n \tint bufsz;\n \n \tdma_dir = page_pool_get_dma_dir(rx_q-\u003epage_pool);\n-\tbufsz = DIV_ROUND_UP(priv-\u003edma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;\n+\tbufsz = rx_q-\u003enapi_skb_frag_size;\n+\tctx.priv = priv;\n \n \tif (netif_msg_rx_status(priv)) {\n \t\tvoid *rx_head = stmmac_get_rx_desc(priv, rx_q, 0);\n@@ -5827,25 +5956,30 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tstmmac_display_ring(priv, rx_head, priv-\u003edma_conf.dma_rx_size, true,\n \t\t\t\t rx_q-\u003edma_rx_phy, desc_size);\n \t}\n+\n+\tif (rx_q-\u003estate_saved) {\n+\t\tctx.xdp = rx_q-\u003estate.xdp;\n+\t\terror = rx_q-\u003estate.error;\n+\t\tframes = rx_q-\u003estate.frames;\n+\t\tlen = rx_q-\u003estate.len;\n+\t\trx_q-\u003estate_saved = false;\n+\t\trx_q-\u003estate.frames = 0;\n+\t}\n+\n \twhile (count \u003c limit) {\n \t\tunsigned int buf1_len = 0, buf2_len = 0;\n+\t\tunsigned int pre_len, sync_len;\n \t\tenum pkt_hash_types hash_type;\n \t\tstruct stmmac_rx_buffer *buf;\n \t\tstruct dma_desc *np, *p;\n-\t\tint entry;\n+\t\tstruct sk_buff *skb;\n+\t\tint entry, status;\n \t\tu32 hash;\n \n-\t\tif (!count \u0026\u0026 rx_q-\u003estate_saved) {\n-\t\t\tskb = rx_q-\u003estate.skb;\n-\t\t\terror = rx_q-\u003estate.error;\n-\t\t\tlen = rx_q-\u003estate.len;\n-\t\t} else {\n-\t\t\trx_q-\u003estate_saved = false;\n-\t\t\tskb = NULL;\n+\t\tif (!in_progress) {\n \t\t\terror = 0;\n \t\t\tlen = 0;\n \t\t}\n-\n read_again:\n \t\tif (count \u003e= limit)\n \t\t\tbreak;\n@@ -5874,23 +6008,22 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \n \t\tprefetch(np);\n \n+\t\tin_progress = status \u0026 rx_not_ls;\n+\n \t\tif (priv-\u003eextend_desc)\n \t\t\tstmmac_rx_extended_status(priv, \u0026priv-\u003exstats, rx_q-\u003edma_erx + entry);\n-\t\tif (unlikely(status == discard_frame)) {\n-\t\t\tpage_pool_put_page(rx_q-\u003epage_pool, buf-\u003epage, 0, true);\n-\t\t\tbuf-\u003epage = NULL;\n+\n+\t\tif (unlikely(!error \u0026\u0026 status == discard_frame)) {\n \t\t\terror = 1;\n \t\t\tif (!priv-\u003ehwts_rx_en)\n \t\t\t\trx_errors++;\n \t\t}\n \n-\t\tif (unlikely(error \u0026\u0026 (status \u0026 rx_not_ls)))\n-\t\t\tgoto read_again;\n \t\tif (unlikely(error)) {\n-\t\t\tdev_kfree_skb(skb);\n-\t\t\tskb = NULL;\n-\t\t\tcount++;\n-\t\t\tcontinue;\n+\t\t\tif (status \u0026 rx_not_ls)\n+\t\t\t\tgoto read_again;\n+\n+\t\t\tgoto error_free_frag;\n \t\t}\n \n \t\t/* Buffer is good. Go on. */\n@@ -5900,135 +6033,89 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \t\tbuf2_len = stmmac_rx_buf2_len(priv, p, status, len);\n \t\tlen += buf2_len;\n \n-\t\t/* ACS is disabled; strip manually. */\n-\t\tif (likely(!(status \u0026 rx_not_ls)))\n-\t\t\tlen -= ETH_FCS_LEN;\n-\n-\t\tif (!skb) {\n-\t\t\tunsigned int pre_len, sync_len;\n-\n-\t\t\t/* Each frame starts here: reset the FCS handling */\n-\t\t\tfcs_stripped = false;\n-\n+\t\tif (!frames) {\n \t\t\tdma_sync_single_for_cpu(priv-\u003edevice, buf-\u003eaddr,\n \t\t\t\t\t\tbuf1_len, dma_dir);\n \t\t\tnet_prefetch(page_address(buf-\u003epage) +\n \t\t\t\t buf-\u003epage_offset);\n \n-\t\t\tif (stmmac_xdp_is_enabled(priv) \u0026\u0026 !buf2_len) {\n-\t\t\t\tbuf1_len -= ETH_FCS_LEN;\n-\t\t\t\tfcs_stripped = true;\n-\t\t\t}\n-\n \t\t\txdp_init_buff(\u0026ctx.xdp, bufsz, \u0026rx_q-\u003exdp_rxq);\n \t\t\txdp_prepare_buff(\u0026ctx.xdp, page_address(buf-\u003epage),\n \t\t\t\t\t buf-\u003epage_offset, buf1_len, true);\n-\n-\t\t\tpre_len = ctx.xdp.data_end - ctx.xdp.data_hard_start -\n-\t\t\t\t buf-\u003epage_offset;\n-\n-\t\t\tctx.priv = priv;\n-\t\t\tctx.desc = p;\n-\t\t\tctx.ndesc = np;\n-\n-\t\t\tskb = stmmac_xdp_run_prog(priv, \u0026ctx.xdp);\n-\t\t\t/* Due xdp_adjust_tail: DMA sync for_device\n-\t\t\t * cover max len CPU touch\n-\t\t\t */\n-\t\t\tsync_len = ctx.xdp.data_end - ctx.xdp.data_hard_start -\n-\t\t\t\t buf-\u003epage_offset;\n-\t\t\tsync_len = max(sync_len, pre_len);\n-\n-\t\t\t/* For Not XDP_PASS verdict */\n-\t\t\tif (IS_ERR(skb)) {\n-\t\t\t\tunsigned int xdp_res = -PTR_ERR(skb);\n-\n-\t\t\t\tif (xdp_res \u0026 STMMAC_XDP_CONSUMED) {\n-\t\t\t\t\tpage_pool_put_page(rx_q-\u003epage_pool,\n-\t\t\t\t\t\t\t virt_to_head_page(ctx.xdp.data),\n-\t\t\t\t\t\t\t sync_len, true);\n-\t\t\t\t\tbuf-\u003epage = NULL;\n-\t\t\t\t\trx_dropped++;\n-\n-\t\t\t\t\t/* Clear skb as it was set as\n-\t\t\t\t\t * status by XDP program.\n-\t\t\t\t\t */\n-\t\t\t\t\tskb = NULL;\n-\n-\t\t\t\t\tif (unlikely((status \u0026 rx_not_ls)))\n-\t\t\t\t\t\tgoto read_again;\n-\n-\t\t\t\t\tcount++;\n-\t\t\t\t\tcontinue;\n-\t\t\t\t} else if (xdp_res \u0026 (STMMAC_XDP_TX |\n-\t\t\t\t\t\t STMMAC_XDP_REDIRECT)) {\n-\t\t\t\t\txdp_status |= xdp_res;\n-\t\t\t\t\tbuf-\u003epage = NULL;\n-\t\t\t\t\tskb = NULL;\n-\t\t\t\t\tcount++;\n-\t\t\t\t\tcontinue;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t}\n-\n-\t\tif (!skb) {\n-\t\t\tunsigned int head_pad_len;\n-\n-\t\t\t/* XDP program may expand or reduce tail */\n-\t\t\tbuf1_len = ctx.xdp.data_end - ctx.xdp.data;\n-\n-\t\t\tskb = napi_build_skb(page_address(buf-\u003epage),\n-\t\t\t\t\t rx_q-\u003enapi_skb_frag_size);\n-\t\t\tif (!skb) {\n-\t\t\t\tpage_pool_recycle_direct(rx_q-\u003epage_pool,\n-\t\t\t\t\t\t\t buf-\u003epage);\n-\t\t\t\tbuf-\u003epage = NULL;\n-\t\t\t\trx_dropped++;\n-\t\t\t\tcount++;\n-\t\t\t\tgoto drain_data;\n-\t\t\t}\n-\n-\t\t\t/* XDP program may adjust header */\n-\t\t\thead_pad_len = ctx.xdp.data - ctx.xdp.data_hard_start;\n-\t\t\tskb_reserve(skb, head_pad_len);\n-\t\t\tskb_put(skb, buf1_len);\n-\t\t\tskb_mark_for_recycle(skb);\n \t\t\tbuf-\u003epage = NULL;\n \t\t} else if (buf1_len) {\n-\t\t\tdma_sync_single_for_cpu(priv-\u003edevice, buf-\u003eaddr,\n-\t\t\t\t\t\tbuf1_len, dma_dir);\n-\t\t\tskb_add_rx_frag(skb, skb_shinfo(skb)-\u003enr_frags,\n-\t\t\t\t\tbuf-\u003epage, buf-\u003epage_offset, buf1_len,\n-\t\t\t\t\tpriv-\u003edma_conf.dma_buf_sz);\n+\t\t\tif (!stmmac_build_xdp_frags(priv, rx_q, buf1_len,\n+\t\t\t\t\t\t buf-\u003epage,\n+\t\t\t\t\t\t buf-\u003epage_offset,\n+\t\t\t\t\t\t dma_dir, \u0026ctx.xdp)) {\n+\t\t\t\tif (!error)\n+\t\t\t\t\trx_dropped++;\n+\t\t\t\terror = 1;\n+\t\t\t}\n \t\t\tbuf-\u003epage = NULL;\n \t\t}\n \n \t\tif (buf2_len) {\n-\t\t\tdma_sync_single_for_cpu(priv-\u003edevice, buf-\u003esec_addr,\n-\t\t\t\t\t\tbuf2_len, dma_dir);\n-\t\t\tskb_add_rx_frag(skb, skb_shinfo(skb)-\u003enr_frags,\n-\t\t\t\t\tbuf-\u003esec_page, 0, buf2_len,\n-\t\t\t\t\tpriv-\u003edma_conf.dma_buf_sz);\n+\t\t\tif (!stmmac_build_xdp_frags(priv, rx_q, buf2_len,\n+\t\t\t\t\t\t buf-\u003esec_page, 0,\n+\t\t\t\t\t\t dma_dir, \u0026ctx.xdp)) {\n+\t\t\t\tif (!error)\n+\t\t\t\t\trx_dropped++;\n+\t\t\t\terror = 1;\n+\t\t\t}\n \t\t\tbuf-\u003esec_page = NULL;\n \t\t}\n+\t\tframes++;\n \n-drain_data:\n \t\tif (likely(status \u0026 rx_not_ls))\n \t\t\tgoto read_again;\n-\t\tif (!skb)\n-\t\t\tcontinue;\n \n-\t\t/* Got entire packet into SKB. Finish it. */\n+\t\t/* ACS is disabled; strip manually. */\n+\t\tlen -= ETH_FCS_LEN;\n+\t\tif (stmmac_xdp_shrink_tail(rx_q, \u0026ctx.xdp, ETH_FCS_LEN)) {\n+\t\t\tif (!error)\n+\t\t\t\trx_dropped++;\n+\t\t\terror = 1;\n+\t\t}\n \n-\t\t/* Remove FCS if needed */\n-\t\tif (!fcs_stripped \u0026\u0026 pskb_trim(skb, len)) {\n-\t\t\tdev_kfree_skb_any(skb);\n-\t\t\tskb = NULL;\n+\t\tif (unlikely(error))\n+\t\t\tgoto error_free_frag;\n+\n+\t\tpre_len = ctx.xdp.data_end - ctx.xdp.data_hard_start;\n+\n+\t\tctx.desc = p;\n+\t\tctx.ndesc = np;\n+\n+\t\tskb = stmmac_xdp_run_prog(priv, \u0026ctx.xdp);\n+\t\t/* Due xdp_adjust_tail: DMA sync for_device\n+\t\t * cover max len CPU touch\n+\t\t */\n+\t\tsync_len = ctx.xdp.data_end - ctx.xdp.data_hard_start;\n+\t\tsync_len = max(sync_len, pre_len);\n+\n+\t\t/* For Not XDP_PASS verdict */\n+\t\tif (IS_ERR(skb)) {\n+\t\t\tunsigned int xdp_res = -PTR_ERR(skb);\n+\n+\t\t\tif (xdp_res \u0026 STMMAC_XDP_CONSUMED) {\n+\t\t\t\tstmmac_xdp_put_buff(rx_q, \u0026ctx.xdp, sync_len,\n+\t\t\t\t\t\t true);\n+\t\t\t\trx_dropped++;\n+\t\t\t} else if (xdp_res \u0026 (STMMAC_XDP_TX |\n+\t\t\t\t\t STMMAC_XDP_REDIRECT)) {\n+\t\t\t\txdp_status |= xdp_res;\n+\t\t\t}\n+\n+\t\t\tgoto next;\n+\t\t}\n+\n+\t\tskb = stmmac_build_skb(\u0026ctx.xdp);\n+\t\tif (!skb) {\n \t\t\trx_dropped++;\n-\t\t\tcount++;\n-\t\t\tcontinue;\n+\t\t\tgoto error_free_frag;\n \t\t}\n \n+\t\t/* Got entire packet into SKB. Finish it. */\n \t\tstmmac_get_rx_hwtstamp(priv, p, np, skb);\n \n \t\tif (priv-\u003ehw-\u003ehw_vlan_en)\n@@ -6051,18 +6138,27 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)\n \n \t\tskb_record_rx_queue(skb, queue);\n \t\tnapi_gro_receive(\u0026ch-\u003erx_napi, skb);\n-\t\tskb = NULL;\n-\n \t\trx_packets++;\n \t\trx_bytes += len;\n+next:\n+\t\tin_progress = false;\n+\t\tframes = 0;\n+\t\tcount++;\n+\t\tcontinue;\n+error_free_frag:\n+\t\tif (frames)\n+\t\t\tstmmac_xdp_put_buff(rx_q, \u0026ctx.xdp, -1, true);\n+\t\tin_progress = false;\n+\t\tframes = 0;\n \t\tcount++;\n \t}\n \n-\tif (status \u0026 rx_not_ls || skb) {\n-\t\trx_q-\u003estate_saved = true;\n-\t\trx_q-\u003estate.skb = skb;\n+\tif (in_progress || frames) {\n+\t\trx_q-\u003estate.xdp = ctx.xdp;\n+\t\trx_q-\u003estate.frames = frames;\n \t\trx_q-\u003estate.error = error;\n \t\trx_q-\u003estate.len = len;\n+\t\trx_q-\u003estate_saved = true;\n \t}\n \n \tstmmac_finalize_xdp_rx(priv, xdp_status);\n@@ -8058,6 +8154,7 @@ static int __stmmac_dvr_probe(struct device *device,\n \tndev-\u003ehw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |\n \t\t\t NETIF_F_RXCSUM;\n \tndev-\u003exdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |\n+\t\t\t NETDEV_XDP_ACT_RX_SG |\n \t\t\t NETDEV_XDP_ACT_XSK_ZEROCOPY;\n \n \tret = stmmac_tc_init(priv, priv);\n@@ -8378,6 +8475,12 @@ static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue)\n {\n \tstruct stmmac_rx_queue *rx_q = \u0026priv-\u003edma_conf.rx_queue[queue];\n \n+\tif (rx_q-\u003estate.frames \u0026\u0026 !rx_q-\u003exsk_pool) {\n+\t\tstmmac_xdp_put_buff(rx_q, \u0026rx_q-\u003estate.xdp, -1, false);\n+\t\trx_q-\u003estate.frames = 0;\n+\t}\n+\trx_q-\u003estate_saved = false;\n+\n \trx_q-\u003ecur_rx = 0;\n \trx_q-\u003edirty_rx = 0;\n }\n"
} |
| 2/1 | 2026/10/12 18:45 | agent | patch-evaluator |
1mModel:core Args: null Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch modifies the STMicroelectronics Multi-Gigabit Ethernet (stmmac) driver, adding multi-buffer (frags) support to its XDP receive path. STMMAC/DWMAC ethernet controllers require specific physical SoC or PCIe hardware that is not emulated in standard virtualized environments (QEMU or GCE on amd64). As such, the modified code is structurally unreachable during standard fuzzing.",
"WorthFuzzing": false
}Instruction: You are an expert Linux kernel maintainer and security engineer.
Your job is to review a provided patch series and evaluate whether it warrants fuzzing with syzkaller.
IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in
your workspace. Do NOT rely on internal assumptions. You must actively use your code access
tools to inspect the actual source code, callers, and surrounding context.
================================================================================
1. CORE TRIAGE PHILOSOPHY
================================================================================
The goal of patch fuzzing is to discover crashes, regressions, exposed latent bugs,
and newly triggered assertions introduced by the patch series.
- REACHABILITY IS THE PRIMARY GATE:
Fuzzing can only discover bugs in code that can actually execute in standard virtualized
environments (GCE or QEMU, utilizing software-emulated devices like USB gadgets, netdev, tun/tap).
If the modified code is structurally unreachable (see Section 2), it MUST NOT be fuzzed,
regardless of whether it adds assertions or complex logic.
- DO NOT BLINDLY TRUST "NO FUNCTIONAL CHANGE" (NFCI) OR "REFACTORING" CLAIMS:
Patch authors routinely label changes as "cleanups", "refactorings", or state
"No functional change intended". Do NOT take these claims at face value.
Code refactorings that rearrange logic, introduce helper functions, or alter state management
in core subsystems frequently introduce subtle semantic shifts or uncover latent kernel bugs.
If reachable executable code is modified or refactored, it MUST be fuzzed.
- NEW OR MODIFIED ASSERTIONS IN REACHABLE CODE MUST BE FUZZED:
When a patch introduces or modifies runtime checks or assertions (e.g., WARN_ON*, VM_WARN_ON*,
BUG_ON*, lockdep_assert*) in reachable code paths, it enforces new or stricter invariants.
Even if the author believes the invariant always holds, fuzzing is essential to verify whether
an unusual sequence of operations can violate it.
================================================================================
2. WHEN TO RETURN WorthFuzzing=false (NEGATIVE CRITERIA)
================================================================================
Return WorthFuzzing=false ONLY IF all modified code falls strictly into one or more of these categories:
- Non-kernel and non-executable changes:
* Modifications to Documentation/, comments, or spelling fixes.
* User-space directories, self-tests, samples, or scripts (e.g., tools/, samples/, scripts/, usr/)
that do not affect the compiled kernel image (vmlinux) or kernel modules.
* Purely decorative logging (e.g., message strings in pr_err, printk, dev_info) or tracepoints
that do not alter control flow or data structures.
* Build system or Kconfig changes that do not alter compiled C logic.
- Structurally unreachable hardware:
* Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed,
ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU.
- Unreachable execution paths:
* Driver teardown callbacks (.remove, .shutdown, pci_unregister_driver) executed only during
physical PCI hot-unplug or manual sysfs driver unbinding.
* Code paths exclusive to architectures other than the target architecture.
================================================================================
3. WHEN TO RETURN WorthFuzzing=true (POSITIVE CRITERIA)
================================================================================
Return WorthFuzzing=true whenever the patch touches reachable executable code, including:
- Core Subsystems:
* Any logic modifications in memory management (mm/), synchronization/locking (kernel/locking/),
BPF, scheduler, core networking, VFS, or syscall handling.
- Refactorings and Code Cleanups:
* Any restructuring of reachable data structures, helper abstractions, or algorithm flows.
- Runtime Assertions and Defensive Checks:
* Any introduction or alteration of assertions (WARN_ON*, VM_WARN_ON*, BUG_ON*, etc.) in reachable paths.
- Reachable Drivers and Protocols:
* Drivers accessible via virtual buses (virtio, USB gadget, loopback, netlink, binder, sockets, etc.).
================================================================================
4. EXTRACTING FocusSymbols (PREVENTING DILUTION)
================================================================================
When WorthFuzzing=true, you must extract specific kernel functions into FocusSymbols to guide the fuzzer:
- AVOID UBIQUITOUS LIFECYCLE HOT-PATHS:
Do NOT list generic, ubiquitous functions called by almost every program in the corpus
(including, but not limited to: general memory allocators and deallocators, page fault
and trap handlers, or core synchronization primitives; this is not an exhaustive list).
Listing ubiquitous functions causes the fuzzer to classify thousands of unrelated tests as "focused",
which severely dilutes fuzzing effort away from the actual changes.
- TARGET SPECIFIC FEATURE LOGIC AND ENTRYPOINTS:
List functions that specifically implement the logic being added or altered, or direct API entrypoints
for the subsystem feature under review.
- HANDLING STATIC INLINE FUNCTIONS IN HEADERS (.h):
Compiler-inlined static functions (such as static inlines in mm/*.h or include/linux/*.h) lack
distinct symbol addresses in vmlinux and cannot be targeted directly by symbol coverage filters.
If the changes are primarily in static inline helpers, identify non-static, feature-specific caller
functions in .c files that exercise them (avoiding ubiquitous lifecycle wrappers).
================================================================================
5. IDENTIFYING EnableConfigs
================================================================================
Identify any specific CONFIG_ options required to properly compile and reach the modified code:
- Inspect Kconfig files and #ifdef guards; do not make assumptions.
- Check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed.
- Strip any 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4").
Prefer calling several tools at the same time to save round-trips.
Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.
Prompt: Target architecture: amd64
For your convenience, here is the diff of the changes:
commit 17c400256719698b78bd93b75c6bbad252bb51c9
Author: syz-cluster <triage@syzkaller.com>
Date: Mon Oct 12 18:45:56 2026 +0000
syz-cluster: applied patch under review
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 9278378407e83..63020e8edd8a7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -132,7 +132,8 @@ struct stmmac_rx_queue {
dma_addr_t dma_rx_phy;
unsigned int state_saved;
struct {
- struct sk_buff *skb;
+ struct xdp_buff xdp;
+ unsigned int frames;
unsigned int len;
unsigned int error;
} state;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index b8b4de4c5b1a7..fd04368543c23 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -158,6 +158,9 @@ static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue);
static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode,
u32 rxmode, u32 chan);
static void stmmac_vlan_restore(struct stmmac_priv *priv);
+static void stmmac_xdp_put_buff(struct stmmac_rx_queue *rx_q,
+ struct xdp_buff *xdp, int sync_len,
+ bool allow_direct);
#ifdef CONFIG_DEBUG_FS
static const struct net_device_ops stmmac_netdev_ops;
@@ -2180,6 +2183,11 @@ static void __free_dma_rx_desc_resources(struct stmmac_priv *priv,
else
dma_free_rx_skbufs(priv, dma_conf, queue);
+ if (rx_q->state.frames && !rx_q->xsk_pool) {
+ stmmac_xdp_put_buff(rx_q, &rx_q->state.xdp, -1, false);
+ rx_q->state.frames = 0;
+ }
+ rx_q->state_saved = false;
rx_q->buf_alloc_num = 0;
rx_q->xsk_pool = NULL;
@@ -5457,8 +5465,8 @@ static int __stmmac_xdp_run_prog(struct stmmac_priv *priv,
static struct sk_buff *stmmac_xdp_run_prog(struct stmmac_priv *priv,
struct xdp_buff *xdp)
{
+ int res = STMMAC_XDP_CONSUMED;
struct bpf_prog *prog;
- int res;
prog = READ_ONCE(priv->xdp_prog);
if (!prog) {
@@ -5466,7 +5474,8 @@ static struct sk_buff *stmmac_xdp_run_prog(struct stmmac_priv *priv,
goto out;
}
- res = __stmmac_xdp_run_prog(priv, prog, xdp);
+ if (likely(!xdp_buff_has_frags(xdp) || prog->aux->xdp_has_frags))
+ res = __stmmac_xdp_run_prog(priv, prog, xdp);
out:
return ERR_PTR(-res);
}
@@ -5620,12 +5629,12 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
unsigned int count = 0, error = 0, len = 0;
int dirty = stmmac_rx_dirty(priv, queue);
unsigned int next_entry = rx_q->cur_rx;
+ bool in_progress = rx_q->state_saved;
u32 rx_errors = 0, rx_dropped = 0;
unsigned int desc_size;
struct bpf_prog *prog;
bool failure = false;
int xdp_status = 0;
- int status = 0;
if (netif_msg_rx_status(priv)) {
void *rx_head = stmmac_get_rx_desc(priv, rx_q, 0);
@@ -5636,23 +5645,25 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
stmmac_display_ring(priv, rx_head, priv->dma_conf.dma_rx_size, true,
rx_q->dma_rx_phy, desc_size);
}
+
+ if (rx_q->state_saved) {
+ error = rx_q->state.error;
+ len = rx_q->state.len;
+ rx_q->state_saved = false;
+ }
+
while (count < limit) {
struct stmmac_rx_buffer *buf;
struct stmmac_xdp_buff *ctx;
unsigned int buf1_len = 0;
struct dma_desc *np, *p;
- int entry;
+ int entry, status;
int res;
- if (!count && rx_q->state_saved) {
- error = rx_q->state.error;
- len = rx_q->state.len;
- } else {
- rx_q->state_saved = false;
+ if (!in_progress) {
error = 0;
len = 0;
}
-
read_again:
if (count >= limit)
break;
@@ -5691,21 +5702,26 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
if (!buf->xdp)
break;
+ in_progress = status & rx_not_ls;
+
if (priv->extend_desc)
stmmac_rx_extended_status(priv, &priv->xstats,
rx_q->dma_erx + entry);
- if (unlikely(status == discard_frame)) {
- xsk_buff_free(buf->xdp);
- buf->xdp = NULL;
- dirty++;
+
+ if (unlikely(status == discard_frame) && !error) {
error = 1;
if (!priv->hwts_rx_en)
rx_errors++;
}
- if (unlikely(error && (status & rx_not_ls)))
- goto read_again;
if (unlikely(error)) {
+ xsk_buff_free(buf->xdp);
+ buf->xdp = NULL;
+ dirty++;
+
+ if (status & rx_not_ls)
+ goto read_again;
+
count++;
continue;
}
@@ -5714,8 +5730,9 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
if (likely(status & rx_not_ls)) {
xsk_buff_free(buf->xdp);
buf->xdp = NULL;
+ rx_dropped++;
+ error = 1;
dirty++;
- count++;
goto read_again;
}
@@ -5763,7 +5780,7 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
count++;
}
- if (status & rx_not_ls) {
+ if (in_progress) {
rx_q->state_saved = true;
rx_q->state.error = error;
rx_q->state.len = len;
@@ -5790,6 +5807,118 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
return failure ? limit : (int)count;
}
+static void
+stmmac_xdp_put_buff(struct stmmac_rx_queue *rx_q, struct xdp_buff *xdp,
+ int sync_len, bool allow_direct)
+{
+ struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
+ int i;
+
+ if (likely(!xdp_buff_has_frags(xdp)))
+ goto out;
+
+ for (i = 0; i < sinfo->nr_frags; i++)
+ page_pool_put_full_page(rx_q->page_pool,
+ skb_frag_page(&sinfo->frags[i]),
+ allow_direct);
+out:
+ page_pool_put_page(rx_q->page_pool, virt_to_head_page(xdp->data),
+ sync_len, allow_direct);
+}
+
+static struct sk_buff *stmmac_build_skb(struct xdp_buff *xdp)
+{
+ struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
+ u32 metasize = xdp->data - xdp->data_meta;
+ struct sk_buff *skb;
+ u8 num_frags = 0;
+
+ if (unlikely(xdp_buff_has_frags(xdp)))
+ num_frags = sinfo->nr_frags;
+
+ skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
+ if (!skb)
+ return NULL;
+
+ skb_mark_for_recycle(skb);
+ skb_reserve(skb, xdp->data - xdp->data_hard_start);
+ skb_put(skb, xdp->data_end - xdp->data);
+ if (metasize)
+ skb_metadata_set(skb, metasize);
+
+ if (unlikely(xdp_buff_has_frags(xdp)))
+ xdp_update_skb_frags_info(skb, num_frags, sinfo->xdp_frags_size,
+ num_frags * xdp->frame_sz,
+ xdp_buff_get_skb_flags(xdp));
+ return skb;
+}
+
+static bool stmmac_build_xdp_frags(struct stmmac_priv *priv,
+ struct stmmac_rx_queue *rx_q,
+ unsigned int len, struct page *page,
+ unsigned int offset,
+ enum dma_data_direction dma_dir,
+ struct xdp_buff *xdp)
+{
+ dma_addr_t dma_addr = page_pool_get_dma_addr(page) + offset;
+
+ dma_sync_single_for_cpu(priv->device, dma_addr, len, dma_dir);
+ if (!xdp_buff_add_frag(xdp, page_to_netmem(page), offset, len,
+ xdp->frame_sz)) {
+ page_pool_put_full_page(rx_q->page_pool, page, true);
+ return false;
+ }
+
+ return true;
+}
+
+static int stmmac_xdp_shrink_tail(struct stmmac_rx_queue *rx_q,
+ struct xdp_buff *xdp, int offset)
+{
+ struct skb_shared_info *sinfo;
+ int i;
+
+ if (unlikely(offset < 0 ||
+ offset > (int)xdp_get_buff_len(xdp) - ETH_HLEN))
+ return -EINVAL;
+
+ if (likely(!xdp_buff_has_frags(xdp))) {
+ xdp->data_end -= offset;
+ return 0;
+ }
+
+ sinfo = xdp_get_shared_info_from_buff(xdp);
+ for (i = sinfo->nr_frags - 1; i >= 0 && offset > 0; i--) {
+ skb_frag_t *frag = &sinfo->frags[i];
+ int delta = min_t(int, offset, skb_frag_size(frag));
+
+ if (delta == skb_frag_size(frag)) {
+ /* The whole frag is consumed by the strip: return it
+ * to the page pool right away. Its ring slot still
+ * carries the page DMA address until stmmac_rx_refill()
+ * re-arms it at the end of the NAPI poll. This is
+ * safe because HW cannot touch the slot until then.
+ */
+ page_pool_put_full_page(rx_q->page_pool,
+ skb_frag_page(frag), true);
+ sinfo->nr_frags--;
+ } else {
+ skb_frag_size_sub(frag, delta);
+ }
+
+ sinfo->xdp_frags_size -= delta;
+ offset -= delta;
+ }
+
+ if (unlikely(!sinfo->nr_frags)) {
+ xdp_buff_clear_frags_flag(xdp);
+ xdp_buff_clear_frag_pfmemalloc(xdp);
+ xdp->data_end -= offset;
+ }
+
+ return 0;
+}
+
/**
* stmmac_rx - manage the receive process
* @priv: driver private structure
@@ -5803,20 +5932,20 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
u32 rx_errors = 0, rx_dropped = 0, rx_bytes = 0, rx_packets = 0;
struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[queue];
struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
+ unsigned int frames = 0, next_entry = rx_q->cur_rx;
struct stmmac_channel *ch = &priv->channel[queue];
unsigned int count = 0, error = 0, len = 0;
- int status = 0, coe = priv->hw->rx_csum;
- unsigned int next_entry = rx_q->cur_rx;
+ bool in_progress = rx_q->state_saved;
enum dma_data_direction dma_dir;
- unsigned int desc_size;
- struct sk_buff *skb = NULL;
+ int coe = priv->hw->rx_csum;
struct stmmac_xdp_buff ctx;
- bool fcs_stripped = false;
+ unsigned int desc_size;
int xdp_status = 0;
int bufsz;
dma_dir = page_pool_get_dma_dir(rx_q->page_pool);
- bufsz = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
+ bufsz = rx_q->napi_skb_frag_size;
+ ctx.priv = priv;
if (netif_msg_rx_status(priv)) {
void *rx_head = stmmac_get_rx_desc(priv, rx_q, 0);
@@ -5827,25 +5956,30 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
stmmac_display_ring(priv, rx_head, priv->dma_conf.dma_rx_size, true,
rx_q->dma_rx_phy, desc_size);
}
+
+ if (rx_q->state_saved) {
+ ctx.xdp = rx_q->state.xdp;
+ error = rx_q->state.error;
+ frames = rx_q->state.frames;
+ len = rx_q->state.len;
+ rx_q->state_saved = false;
+ rx_q->state.frames = 0;
+ }
+
while (count < limit) {
unsigned int buf1_len = 0, buf2_len = 0;
+ unsigned int pre_len, sync_len;
enum pkt_hash_types hash_type;
struct stmmac_rx_buffer *buf;
struct dma_desc *np, *p;
- int entry;
+ struct sk_buff *skb;
+ int entry, status;
u32 hash;
- if (!count && rx_q->state_saved) {
- skb = rx_q->state.skb;
- error = rx_q->state.error;
- len = rx_q->state.len;
- } else {
- rx_q->state_saved = false;
- skb = NULL;
+ if (!in_progress) {
error = 0;
len = 0;
}
-
read_again:
if (count >= limit)
break;
@@ -5874,23 +6008,22 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
prefetch(np);
+ in_progress = status & rx_not_ls;
+
if (priv->extend_desc)
stmmac_rx_extended_status(priv, &priv->xstats, rx_q->dma_erx + entry);
- if (unlikely(status == discard_frame)) {
- page_pool_put_page(rx_q->page_pool, buf->page, 0, true);
- buf->page = NULL;
+
+ if (unlikely(!error && status == discard_frame)) {
error = 1;
if (!priv->hwts_rx_en)
rx_errors++;
}
- if (unlikely(error && (status & rx_not_ls)))
- goto read_again;
if (unlikely(error)) {
- dev_kfree_skb(skb);
- skb = NULL;
- count++;
- continue;
+ if (status & rx_not_ls)
+ goto read_again;
+
+ goto error_free_frag;
}
/* Buffer is good. Go on. */
@@ -5900,135 +6033,89 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
buf2_len = stmmac_rx_buf2_len(priv, p, status, len);
len += buf2_len;
- /* ACS is disabled; strip manually. */
- if (likely(!(status & rx_not_ls)))
- len -= ETH_FCS_LEN;
-
- if (!skb) {
- unsigned int pre_len, sync_len;
-
- /* Each frame starts here: reset the FCS handling */
- fcs_stripped = false;
-
+ if (!frames) {
dma_sync_single_for_cpu(priv->device, buf->addr,
buf1_len, dma_dir);
net_prefetch(page_address(buf->page) +
buf->page_offset);
- if (stmmac_xdp_is_enabled(priv) && !buf2_len) {
- buf1_len -= ETH_FCS_LEN;
- fcs_stripped = true;
- }
-
xdp_init_buff(&ctx.xdp, bufsz, &rx_q->xdp_rxq);
xdp_prepare_buff(&ctx.xdp, page_address(buf->page),
buf->page_offset, buf1_len, true);
-
- pre_len = ctx.xdp.data_end - ctx.xdp.data_hard_start -
- buf->page_offset;
-
- ctx.priv = priv;
- ctx.desc = p;
- ctx.ndesc = np;
-
- skb = stmmac_xdp_run_prog(priv, &ctx.xdp);
- /* Due xdp_adjust_tail: DMA sync for_device
- * cover max len CPU touch
- */
- sync_len = ctx.xdp.data_end - ctx.xdp.data_hard_start -
- buf->page_offset;
- sync_len = max(sync_len, pre_len);
-
- /* For Not XDP_PASS verdict */
- if (IS_ERR(skb)) {
- unsigned int xdp_res = -PTR_ERR(skb);
-
- if (xdp_res & STMMAC_XDP_CONSUMED) {
- page_pool_put_page(rx_q->page_pool,
- virt_to_head_page(ctx.xdp.data),
- sync_len, true);
- buf->page = NULL;
- rx_dropped++;
-
- /* Clear skb as it was set as
- * status by XDP program.
- */
- skb = NULL;
-
- if (unlikely((status & rx_not_ls)))
- goto read_again;
-
- count++;
- continue;
- } else if (xdp_res & (STMMAC_XDP_TX |
- STMMAC_XDP_REDIRECT)) {
- xdp_status |= xdp_res;
- buf->page = NULL;
- skb = NULL;
- count++;
- continue;
- }
- }
- }
-
- if (!skb) {
- unsigned int head_pad_len;
-
- /* XDP program may expand or reduce tail */
- buf1_len = ctx.xdp.data_end - ctx.xdp.data;
-
- skb = napi_build_skb(page_address(buf->page),
- rx_q->napi_skb_frag_size);
- if (!skb) {
- page_pool_recycle_direct(rx_q->page_pool,
- buf->page);
- buf->page = NULL;
- rx_dropped++;
- count++;
- goto drain_data;
- }
-
- /* XDP program may adjust header */
- head_pad_len = ctx.xdp.data - ctx.xdp.data_hard_start;
- skb_reserve(skb, head_pad_len);
- skb_put(skb, buf1_len);
- skb_mark_for_recycle(skb);
buf->page = NULL;
} else if (buf1_len) {
- dma_sync_single_for_cpu(priv->device, buf->addr,
- buf1_len, dma_dir);
- skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
- buf->page, buf->page_offset, buf1_len,
- priv->dma_conf.dma_buf_sz);
+ if (!stmmac_build_xdp_frags(priv, rx_q, buf1_len,
+ buf->page,
+ buf->page_offset,
+ dma_dir, &ctx.xdp)) {
+ if (!error)
+ rx_dropped++;
+ error = 1;
+ }
buf->page = NULL;
}
if (buf2_len) {
- dma_sync_single_for_cpu(priv->device, buf->sec_addr,
- buf2_len, dma_dir);
- skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
- buf->sec_page, 0, buf2_len,
- priv->dma_conf.dma_buf_sz);
+ if (!stmmac_build_xdp_frags(priv, rx_q, buf2_len,
+ buf->sec_page, 0,
+ dma_dir, &ctx.xdp)) {
+ if (!error)
+ rx_dropped++;
+ error = 1;
+ }
buf->sec_page = NULL;
}
+ frames++;
-drain_data:
if (likely(status & rx_not_ls))
goto read_again;
- if (!skb)
- continue;
- /* Got entire packet into SKB. Finish it. */
+ /* ACS is disabled; strip manually. */
+ len -= ETH_FCS_LEN;
+ if (stmmac_xdp_shrink_tail(rx_q, &ctx.xdp, ETH_FCS_LEN)) {
+ if (!error)
+ rx_dropped++;
+ error = 1;
+ }
- /* Remove FCS if needed */
- if (!fcs_stripped && pskb_trim(skb, len)) {
- dev_kfree_skb_any(skb);
- skb = NULL;
+ if (unlikely(error))
+ goto error_free_frag;
+
+ pre_len = ctx.xdp.data_end - ctx.xdp.data_hard_start;
+
+ ctx.desc = p;
+ ctx.ndesc = np;
+
+ skb = stmmac_xdp_run_prog(priv, &ctx.xdp);
+ /* Due xdp_adjust_tail: DMA sync for_device
+ * cover max len CPU touch
+ */
+ sync_len = ctx.xdp.data_end - ctx.xdp.data_hard_start;
+ sync_len = max(sync_len, pre_len);
+
+ /* For Not XDP_PASS verdict */
+ if (IS_ERR(skb)) {
+ unsigned int xdp_res = -PTR_ERR(skb);
+
+ if (xdp_res & STMMAC_XDP_CONSUMED) {
+ stmmac_xdp_put_buff(rx_q, &ctx.xdp, sync_len,
+ true);
+ rx_dropped++;
+ } else if (xdp_res & (STMMAC_XDP_TX |
+ STMMAC_XDP_REDIRECT)) {
+ xdp_status |= xdp_res;
+ }
+
+ goto next;
+ }
+
+ skb = stmmac_build_skb(&ctx.xdp);
+ if (!skb) {
rx_dropped++;
- count++;
- continue;
+ goto error_free_frag;
}
+ /* Got entire packet into SKB. Finish it. */
stmmac_get_rx_hwtstamp(priv, p, np, skb);
if (priv->hw->hw_vlan_en)
@@ -6051,18 +6138,27 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
skb_record_rx_queue(skb, queue);
napi_gro_receive(&ch->rx_napi, skb);
- skb = NULL;
-
rx_packets++;
rx_bytes += len;
+next:
+ in_progress = false;
+ frames = 0;
+ count++;
+ continue;
+error_free_frag:
+ if (frames)
+ stmmac_xdp_put_buff(rx_q, &ctx.xdp, -1, true);
+ in_progress = false;
+ frames = 0;
count++;
}
- if (status & rx_not_ls || skb) {
- rx_q->state_saved = true;
- rx_q->state.skb = skb;
+ if (in_progress || frames) {
+ rx_q->state.xdp = ctx.xdp;
+ rx_q->state.frames = frames;
rx_q->state.error = error;
rx_q->state.len = len;
+ rx_q->state_saved = true;
}
stmmac_finalize_xdp_rx(priv, xdp_status);
@@ -8058,6 +8154,7 @@ static int __stmmac_dvr_probe(struct device *device,
ndev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
NETIF_F_RXCSUM;
ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
+ NETDEV_XDP_ACT_RX_SG |
NETDEV_XDP_ACT_XSK_ZEROCOPY;
ret = stmmac_tc_init(priv, priv);
@@ -8378,6 +8475,12 @@ static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue)
{
struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
+ if (rx_q->state.frames && !rx_q->xsk_pool) {
+ stmmac_xdp_put_buff(rx_q, &rx_q->state.xdp, -1, false);
+ rx_q->state.frames = 0;
+ }
+ rx_q->state_saved = false;
+
rx_q->cur_rx = 0;
rx_q->dirty_rx = 0;
}
|
| 3/2 | 2026/10/12 18:45 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 10760 output: 39 thoughts: 219 Thoughts: **Evaluating the Syzkaller Patch for AMD64 Fuzzing** Okay, so I've got this patch series for fuzzing with syzkaller, specifically targeting the `amd64` architecture. My immediate focus is on understanding its implications for this particular platform. The patch touches `drivers/net/ethernet/stmicro/stmmac/stmmac.h` and `drivers/net/ethernet/stmicro/stmmac/stmmac_main.c`. Right, `stmmac`... that's the STMicroelectronics 10/100/1000/EQOS Ethernet driver. The crux of the matter is whether this driver is actually *reachable* on `amd64` within a typical QEMU or virtualized environment used for fuzzing. Is it tied to some structurally unreachable hardware configuration, or can it be brought up within a standard configuration? Does QEMU even *emulate* `stmmac`, or is it using some other underlying Ethernet controller like Synopsys DesignWare Ethernet or something similar? I need to check how `stmmac` is instantiated and used. Is it a PCI device, a platform device, or something else entirely? To figure this out, I'll need to dig into the kernel source and search for any glue layers that might provide QEMU support or any evidence that this driver is actually reachable on the `amd64` platform. This needs to be checked. |
| 4/2 | 2026/10/12 18:46 | tool | grepper |
0mArgs:{
"Expression": "config STMMAC",
"PathPrefixes": [
"drivers/net/ethernet/stmicro/stmmac/"
]
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/Kconfig-1-# SPDX-License-Identifier: GPL-2.0-only\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:2:config STMMAC_ETH\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-3-\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=18=if STMMAC_ETH\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-19-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:20:config STMMAC_SELFTESTS\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-21-\tbool \"Support for STMMAC Selftests\"\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-28-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:29:config STMMAC_PLATFORM\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-30-\ttristate \"STMMAC Platform bus support\"\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=382=endif # STMMAC_PLATFORM\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-383-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:384:config STMMAC_LIBPCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-385-\ttristate\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=409=config DWMAC_MOTORCOMM\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-417-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:418:config STMMAC_PCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-419-\ttristate \"STMMAC PCI bus support\"\n"
} |
| 5/2 | 2026/10/12 18:46 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 11856 output: 49 thoughts: 61 Thoughts: **Investigating STMMAC_PCI Support** Okay, so I need to get a handle on the `STMMAC_PCI` driver. My initial thought is to quickly look for any PCI IDs or specific devices it explicitly supports. Maybe QEMU emulates it? That would be useful information. But hold on, let's take a more methodical approach. I should start by diving into the source code itself, and the most logical place to begin is `drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c`. This should give me the ground truth on what this driver is designed to handle. This is the best way to get a solid grasp of its capabilities and limitations. |
| 6/2 | 2026/10/12 18:46 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c",
"FirstLine": 1,
"LineCount": 100
}Results: {
"Contents": " 1:\t// SPDX-License-Identifier: GPL-2.0-only\n 2:\t/*******************************************************************************\n 3:\t This contains the functions to handle the pci driver.\n 4:\t\n 5:\t Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd\n 6:\t\n 7:\t\n 8:\t Author: Rayagond Kokatanur \u003crayagond@vayavyalabs.com\u003e\n 9:\t Author: Giuseppe Cavallaro \u003cpeppe.cavallaro@st.com\u003e\n 10:\t*******************************************************************************/\n 11:\t\n 12:\t#include \u003clinux/clk-provider.h\u003e\n 13:\t#include \u003clinux/pci.h\u003e\n 14:\t#include \u003clinux/dmi.h\u003e\n 15:\t\n 16:\t#include \"stmmac.h\"\n 17:\t#include \"stmmac_libpci.h\"\n 18:\t\n 19:\tstruct stmmac_pci_info {\n 20:\t\tint (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);\n 21:\t};\n 22:\t\n 23:\tstatic void common_default_data(struct plat_stmmacenet_data *plat)\n 24:\t{\n 25:\t\t/* clk_csr_i = 20-35MHz \u0026 MDC = clk_csr_i/16 */\n 26:\t\tplat-\u003eclk_csr = STMMAC_CSR_20_35M;\n 27:\t\tplat-\u003ecore_type = DWMAC_CORE_GMAC;\n 28:\t\tplat-\u003eforce_sf_dma_mode = true;\n 29:\t\n 30:\t\tplat-\u003emdio_bus_data-\u003eneeds_reset = true;\n 31:\t}\n 32:\t\n 33:\tstatic int stmmac_default_data(struct pci_dev *pdev,\n 34:\t\t\t\t struct plat_stmmacenet_data *plat)\n 35:\t{\n 36:\t\t/* Set common default data first */\n 37:\t\tcommon_default_data(plat);\n 38:\t\n 39:\t\tplat-\u003ebus_id = 1;\n 40:\t\tplat-\u003ephy_addr = 0;\n 41:\t\tplat-\u003ephy_interface = PHY_INTERFACE_MODE_GMII;\n 42:\t\n 43:\t\tplat-\u003edma_cfg-\u003epbl = 32;\n 44:\t\tplat-\u003edma_cfg-\u003epblx8 = true;\n 45:\t\t/* TODO: AXI */\n 46:\t\n 47:\t\treturn 0;\n 48:\t}\n 49:\t\n 50:\tstatic const struct stmmac_pci_info stmmac_pci_info = {\n 51:\t\t.setup = stmmac_default_data,\n 52:\t};\n 53:\t\n 54:\tstatic int snps_gmac5_default_data(struct pci_dev *pdev,\n 55:\t\t\t\t\t struct plat_stmmacenet_data *plat)\n 56:\t{\n 57:\t\tint i;\n 58:\t\n 59:\t\tplat-\u003eclk_csr = STMMAC_CSR_250_300M;\n 60:\t\tplat-\u003ecore_type = DWMAC_CORE_GMAC4;\n 61:\t\tplat-\u003eforce_sf_dma_mode = true;\n 62:\t\tplat-\u003eflags |= STMMAC_FLAG_TSO_EN;\n 63:\t\tplat-\u003epmt = true;\n 64:\t\n 65:\t\t/* Set default number of RX and TX queues to use */\n 66:\t\tplat-\u003etx_queues_to_use = 4;\n 67:\t\tplat-\u003erx_queues_to_use = 4;\n 68:\t\n 69:\t\tplat-\u003etx_sched_algorithm = MTL_TX_ALGORITHM_WRR;\n 70:\t\tfor (i = 0; i \u003c plat-\u003etx_queues_to_use; i++) {\n 71:\t\t\tplat-\u003etx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;\n 72:\t\t\tplat-\u003etx_queues_cfg[i].weight = 25;\n 73:\t\t\tif (i \u003e 0)\n 74:\t\t\t\tplat-\u003etx_queues_cfg[i].tbs_en = 1;\n 75:\t\t}\n 76:\t\n 77:\t\tplat-\u003erx_sched_algorithm = MTL_RX_ALGORITHM_SP;\n 78:\t\tfor (i = 0; i \u003c plat-\u003erx_queues_to_use; i++)\n 79:\t\t\tplat-\u003erx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;\n 80:\t\n 81:\t\tplat-\u003ebus_id = 1;\n 82:\t\tplat-\u003ephy_interface = PHY_INTERFACE_MODE_GMII;\n 83:\t\n 84:\t\tplat-\u003edma_cfg-\u003epbl = 32;\n 85:\t\tplat-\u003edma_cfg-\u003epblx8 = true;\n 86:\t\n 87:\t\t/* Axi Configuration */\n 88:\t\tplat-\u003eaxi = devm_kzalloc(\u0026pdev-\u003edev, sizeof(*plat-\u003eaxi), GFP_KERNEL);\n 89:\t\tif (!plat-\u003eaxi)\n 90:\t\t\treturn -ENOMEM;\n 91:\t\n 92:\t\tplat-\u003eaxi-\u003eaxi_wr_osr_lmt = 31;\n 93:\t\tplat-\u003eaxi-\u003eaxi_rd_osr_lmt = 31;\n 94:\t\n 95:\t\tplat-\u003eaxi-\u003eaxi_fb = false;\n 96:\t\tplat-\u003eaxi-\u003eaxi_blen_regval = DMA_AXI_BLEN4 | DMA_AXI_BLEN8 |\n 97:\t\t\t\t\t DMA_AXI_BLEN16 | DMA_AXI_BLEN32;\n 98:\t\n 99:\t\treturn 0;\n 100:\t}\n"
} |
| 7/2 | 2026/10/12 18:46 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 13694 output: 51 thoughts: 19 Thoughts: Okay, let's dive into this. Here's my understanding, presented as my own mental processing: **Analyzing `stmmac_pci.c` Device Support** Alright, I need to get a clear picture of what's supported in `stmmac_pci.c`. My primary interest here is in understanding the breadth of hardware this driver handles. I need to know the specific PCI device IDs, and perhaps associated quirks, that this driver is designed to work with. I'll be looking for the crucial device ID checks and how the driver interacts with the hardware based on those IDs. This will give me a solid foundation for evaluating its overall design and potential integration challenges. Knowing this will give me a strong basis for further analysis. |
| 8/2 | 2026/10/12 18:46 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c",
"FirstLine": 101,
"LineCount": 100
}Results: {
"Contents": " 101:\t\n 102:\tstatic const struct stmmac_pci_info snps_gmac5_pci_info = {\n 103:\t\t.setup = snps_gmac5_default_data,\n 104:\t};\n 105:\t\n 106:\t/**\n 107:\t * stmmac_pci_probe\n 108:\t *\n 109:\t * @pdev: pci device pointer\n 110:\t * @id: pointer to table of device id/id's.\n 111:\t *\n 112:\t * Description: This probing function gets called for all PCI devices which\n 113:\t * match the ID table and are not \"owned\" by other driver yet. This function\n 114:\t * gets passed a \"struct pci_dev *\" for each device whose entry in the ID table\n 115:\t * matches the device. The probe functions returns zero when the driver choose\n 116:\t * to take \"ownership\" of the device or an error code(-ve no) otherwise.\n 117:\t */\n 118:\tstatic int stmmac_pci_probe(struct pci_dev *pdev,\n 119:\t\t\t\t const struct pci_device_id *id)\n 120:\t{\n 121:\t\tstruct stmmac_pci_info *info = (struct stmmac_pci_info *)id-\u003edriver_data;\n 122:\t\tstruct plat_stmmacenet_data *plat;\n 123:\t\tstruct stmmac_resources res = {};\n 124:\t\tint ret;\n 125:\t\tint i;\n 126:\t\n 127:\t\tplat = stmmac_plat_dat_alloc(\u0026pdev-\u003edev);\n 128:\t\tif (!plat)\n 129:\t\t\treturn -ENOMEM;\n 130:\t\n 131:\t\tplat-\u003emdio_bus_data = devm_kzalloc(\u0026pdev-\u003edev,\n 132:\t\t\t\t\t\t sizeof(*plat-\u003emdio_bus_data),\n 133:\t\t\t\t\t\t GFP_KERNEL);\n 134:\t\tif (!plat-\u003emdio_bus_data)\n 135:\t\t\treturn -ENOMEM;\n 136:\t\n 137:\t\tplat-\u003esafety_feat_cfg = devm_kzalloc(\u0026pdev-\u003edev,\n 138:\t\t\t\t\t\t sizeof(*plat-\u003esafety_feat_cfg),\n 139:\t\t\t\t\t\t GFP_KERNEL);\n 140:\t\tif (!plat-\u003esafety_feat_cfg)\n 141:\t\t\treturn -ENOMEM;\n 142:\t\n 143:\t\t/* Enable pci device */\n 144:\t\tret = pcim_enable_device(pdev);\n 145:\t\tif (ret) {\n 146:\t\t\tdev_err(\u0026pdev-\u003edev, \"%s: ERROR: failed to enable device\\n\",\n 147:\t\t\t\t__func__);\n 148:\t\t\treturn ret;\n 149:\t\t}\n 150:\t\n 151:\t\t/* Get the base address of device */\n 152:\t\tfor (i = 0; i \u003c PCI_STD_NUM_BARS; i++) {\n 153:\t\t\tif (pci_resource_len(pdev, i) == 0)\n 154:\t\t\t\tcontinue;\n 155:\t\t\tres.addr = pcim_iomap_region(pdev, i, STMMAC_RESOURCE_NAME);\n 156:\t\t\tif (IS_ERR(res.addr))\n 157:\t\t\t\treturn PTR_ERR(res.addr);\n 158:\t\t\tbreak;\n 159:\t\t}\n 160:\t\n 161:\t\tpci_set_master(pdev);\n 162:\t\n 163:\t\tret = info-\u003esetup(pdev, plat);\n 164:\t\tif (ret)\n 165:\t\t\treturn ret;\n 166:\t\n 167:\t\tres.wol_irq = pdev-\u003eirq;\n 168:\t\tres.irq = pdev-\u003eirq;\n 169:\t\n 170:\t\tplat-\u003esafety_feat_cfg-\u003etsoee = 1;\n 171:\t\tplat-\u003esafety_feat_cfg-\u003emrxpee = 1;\n 172:\t\tplat-\u003esafety_feat_cfg-\u003emestee = 1;\n 173:\t\tplat-\u003esafety_feat_cfg-\u003emrxee = 1;\n 174:\t\tplat-\u003esafety_feat_cfg-\u003emtxee = 1;\n 175:\t\tplat-\u003esafety_feat_cfg-\u003eepsi = 1;\n 176:\t\tplat-\u003esafety_feat_cfg-\u003eedpp = 1;\n 177:\t\tplat-\u003esafety_feat_cfg-\u003eprtyen = 1;\n 178:\t\tplat-\u003esafety_feat_cfg-\u003etmouten = 1;\n 179:\t\n 180:\t\tplat-\u003esuspend = stmmac_pci_plat_suspend;\n 181:\t\tplat-\u003eresume = stmmac_pci_plat_resume;\n 182:\t\n 183:\t\treturn stmmac_dvr_probe(\u0026pdev-\u003edev, plat, \u0026res);\n 184:\t}\n 185:\t\n 186:\t/**\n 187:\t * stmmac_pci_remove\n 188:\t *\n 189:\t * @pdev: platform device pointer\n 190:\t * Description: this function calls the main to free the net resources.\n 191:\t */\n 192:\tstatic void stmmac_pci_remove(struct pci_dev *pdev)\n 193:\t{\n 194:\t\tstmmac_dvr_remove(\u0026pdev-\u003edev);\n 195:\t}\n 196:\t\n 197:\t/* synthetic ID, no official vendor */\n 198:\t#define PCI_VENDOR_ID_STMMAC\t\t0x0700\n 199:\t\n 200:\t#define PCI_DEVICE_ID_STMMAC_STMMAC\t\t0x1108\n"
} |
| 9/2 | 2026/10/12 18:46 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 15517 output: 50 thoughts: 17 Thoughts: Okay, here's my interpretation of that thought process, tailored for an expert audience, and written in the first person: **Diving Deeper into stmmac_pci.c** Alright, so the clue is the request to go deeper, which tells me there's more context needed than what we've already considered. I need to get further into `stmmac_pci.c`, likely to understand the issue better, or to gain more details. I am going to keep an eye out for details specific to the PCI interface and not general to the STMMAC. |
| 10/2 | 2026/10/12 18:46 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c",
"FirstLine": 200,
"LineCount": 80
}Results: {
"Contents": " 200:\t#define PCI_DEVICE_ID_STMMAC_STMMAC\t\t0x1108\n 201:\t#define PCI_DEVICE_ID_SYNOPSYS_GMAC5_ID\t\t0x7102\n 202:\t\n 203:\tstatic const struct pci_device_id stmmac_id_table[] = {\n 204:\t\t{ PCI_DEVICE_DATA(STMMAC, STMMAC, \u0026stmmac_pci_info) },\n 205:\t\t{ PCI_DEVICE_DATA(STMICRO, MAC, \u0026stmmac_pci_info) },\n 206:\t\t{ PCI_DEVICE_DATA(SYNOPSYS, GMAC5_ID, \u0026snps_gmac5_pci_info) },\n 207:\t\t{}\n 208:\t};\n 209:\t\n 210:\tMODULE_DEVICE_TABLE(pci, stmmac_id_table);\n 211:\t\n 212:\tstatic struct pci_driver stmmac_pci_driver = {\n 213:\t\t.name = STMMAC_RESOURCE_NAME,\n 214:\t\t.id_table = stmmac_id_table,\n 215:\t\t.probe = stmmac_pci_probe,\n 216:\t\t.remove = stmmac_pci_remove,\n 217:\t\t.driver = {\n 218:\t\t\t.pm = \u0026stmmac_simple_pm_ops,\n 219:\t\t},\n 220:\t};\n 221:\t\n 222:\tmodule_pci_driver(stmmac_pci_driver);\n 223:\t\n 224:\tMODULE_DESCRIPTION(\"STMMAC 10/100/1000 Ethernet PCI driver\");\n 225:\tMODULE_AUTHOR(\"Rayagond Kokatanur \u003crayagond.kokatanur@vayavyalabs.com\u003e\");\n 226:\tMODULE_AUTHOR(\"Giuseppe Cavallaro \u003cpeppe.cavallaro@st.com\u003e\");\n 227:\tMODULE_LICENSE(\"GPL\");\n"
} |
| 11/2 | 2026/10/12 18:46 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 16264 output: 40 thoughts: 48 Thoughts: Okay, let's dive into this. Here's how I'd approach understanding the usage of the stmmac driver: **Investigating STMMAC Driver Dependencies and Usage** My immediate instinct is to figure out the scope of the `stmmac` driver's usage within the kernel ecosystem. I need to get a handle on where it's employed. To do this, I'm going to leverage my knowledge of the kernel's build system and configuration options. I'll need to use the tools available. First, I'll go directly to the source. A direct grep for "STMMAC" within the `Kconfig` files of the `drivers/net/ethernet/stmicro/stmmac/` directory seems like the best starting point. This will reveal if it's directly included in any configuration option in that directory, perhaps the main Kconfig file. I will look for lines that use "select" or "depends on". After that, or as a complementary approach, I might broaden the search. I should see what other drivers or features might explicitly *depend* on or *select* the `stmmac` driver at the higher levels of the kernel configuration tree. This information is crucial for understanding the driver's integration and its relationship with other components. If other drivers 'depend on' it, then they require the stmmac driver. If other drivers 'select' it, then the stmmac driver is automatically enabled if the other driver is enabled. |
| 12/2 | 2026/10/12 18:46 | tool | grepper |
0mArgs:{
"Expression": "STMMAC",
"PathPrefixes": [
"drivers/net/ethernet/stmicro/stmmac/Kconfig"
]
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/Kconfig-1-# SPDX-License-Identifier: GPL-2.0-only\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:2:config STMMAC_ETH\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-3-\ttristate \"STMicroelectronics Multi-Gigabit Ethernet driver\"\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-17-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:18:if STMMAC_ETH\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-19-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:20:config STMMAC_SELFTESTS\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:21:\tbool \"Support for STMMAC Selftests\"\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-22-\tdepends on INET\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-24-\thelp\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:25:\t This adds support for STMMAC Selftests using ethtool. Enable this\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-26-\t feature if you are facing problems with your HW and submit the test\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-28-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:29:config STMMAC_PLATFORM\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:30:\ttristate \"STMMAC Platform bus support\"\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-31-\tselect MFD_SYSCON\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-41-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:42:if STMMAC_PLATFORM\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-43-\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=52=config DWMAC_GENERIC\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-53-\ttristate \"Generic driver for DWMAC\"\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:54:\tdefault STMMAC_PLATFORM\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-55-\thelp\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=375=config DWMAC_VISCONTI\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-381-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:382:endif # STMMAC_PLATFORM\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-383-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:384:config STMMAC_LIBPCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-385-\ttristate\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=399=config DWMAC_LOONGSON\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-403-\tdepends on COMMON_CLK\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:404:\tselect STMMAC_LIBPCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-405-\thelp\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig=409=config DWMAC_MOTORCOMM\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-412-\tselect MOTORCOMM_PHY\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:413:\tselect STMMAC_LIBPCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-414-\thelp\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-417-\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:418:config STMMAC_PCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:419:\ttristate \"STMMAC PCI bus support\"\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-420-\tdepends on PCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-421-\tdepends on COMMON_CLK\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:422:\tselect STMMAC_LIBPCI\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-423-\thelp\n--\ndrivers/net/ethernet/stmicro/stmmac/Kconfig-430-\t If unsure, say N.\ndrivers/net/ethernet/stmicro/stmmac/Kconfig:431:endif # STMMAC_ETH\n"
} |
| 13/2 | 2026/10/12 18:46 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 17981 output: 46 thoughts: 689 Thoughts: **My Analysis of STMMAC Emulation Possibilities in QEMU for Fuzzing** Okay, so I need to figure out if I can even *reach* this STMMAC code in a standard, fuzzable environment. The goal is to identify bugs, but if the code's not executable in GCE or QEMU, there's no point in fuzzing it. The primary roadblock here is structural reachability. First, let's establish the basics. Can QEMU even *emulate* STMMAC or DWMAC? I'm targeting x86_64, which is crucial. Forget about specific ARM or RISC-V QEMU machine configurations with their own emulated NICs; I need to focus on x86_64. Does standard QEMU, especially in a cloud environment like Google Compute Engine (GCE), even *have* STMMAC functionality, either physically or virtually? Is there a device model for STMMAC that I can leverage? My understanding is that QEMU often doesn't directly emulate every piece of hardware. I need to know if STMMAC, specifically the PCI variant, is something QEMU can handle. This brings me back to Section 2 of the documentation, which hammers home the point about reachability. Specifically, vendor-specific PCIe devices and hardware not emulated by QEMU like SmartNICs and certain GPUs are considered structurally unreachable. This means I need to narrow down which network devices *are* emulated, so I can see if STMMAC is among them. Let's quickly review the QEMU-emulated network devices. I see e1000, e1000e, igb, rtl8139, pcnet, virtio-net, vmxnet3, and usb-net (along with tun/tap and related interfaces) are all listed. **No!** STMMAC isn't on that list. QEMU does *not* emulate Synopsys DesignWare Ethernet or STMMAC for PCI or x86. So it appears direct hardware emulation is not going to work. But wait. Just because there's no direct emulation, I shouldn't give up entirely. Is there any workaround? Could STMMAC be probed as a *platform* device, even without physical hardware? I need to investigate if I can reach the code, perhaps through a virtual bus or platform device mechanism, or through a similar generic driver such as dwmac_generic.c. Let me start digging into `stmmac_platform.c` and `dwmac_generic.c` to see if there's a workaround. |
| 14/2 | 2026/10/12 18:47 | tool | read-file |
0mError:the file does not exist Args: {
"File": "drivers/net/ethernet/stmicro/stmmac/dwmac_generic.c",
"FirstLine": 1,
"LineCount": 80
}Results: {
"error": "the file does not exist"
} |
| 15/2 | 2026/10/12 18:47 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 19301 output: 32 thoughts: 26 Thoughts: Okay, here's my take on those thoughts, tailored for an expert audience: **Diving into the STMMAC Drivers** Alright, let's get down to brass tacks. I need to understand the current state of the STMicroelectronics MAC drivers. Specifically, I'm going to pinpoint their location within the kernel tree. My initial assumption is that they reside under the standard Ethernet driver hierarchy, so I'll zero in on `drivers/net/ethernet/stmicro/stmmac/`. That's the expected place. This initial path check is important to understand the overall architecture, and from there to dive down into the code. |
| 16/2 | 2026/10/12 18:47 | tool | codesearch-dir-index |
0mArgs:{
"Dir": "drivers/net/ethernet/stmicro/stmmac/"
}Results: {
"Files": [
"chain_mode.c",
"common.h",
"descs.h",
"descs_com.h",
"dwmac-anarion.c",
"dwmac-dwc-qos-eth.c",
"dwmac-eic7700.c",
"dwmac-generic.c",
"dwmac-imx.c",
"dwmac-ingenic.c",
"dwmac-intel-plat.c",
"dwmac-intel.c",
"dwmac-intel.h",
"dwmac-ipq806x.c",
"dwmac-loongson.c",
"dwmac-loongson1.c",
"dwmac-lpc18xx.c",
"dwmac-mediatek.c",
"dwmac-meson.c",
"dwmac-meson8b.c",
"dwmac-motorcomm.c",
"dwmac-nuvoton.c",
"dwmac-qcom-ethqos.c",
"dwmac-renesas-gbeth.c",
"dwmac-rk.c",
"dwmac-rzn1.c",
"dwmac-s32.c",
"dwmac-socfpga.c",
"dwmac-sophgo.c",
"dwmac-spacemit.c",
"dwmac-starfive.c",
"dwmac-sti.c",
"dwmac-stm32.c",
"dwmac-sun55i.c",
"dwmac-sun8i.c",
"dwmac-sunxi.c",
"dwmac-tegra.c",
"dwmac-thead.c",
"dwmac-ultrarisc.c",
"dwmac-visconti.c",
"dwmac100.h",
"dwmac1000.h",
"dwmac1000_core.c",
"dwmac1000_dma.c",
"dwmac100_core.c",
"dwmac100_dma.c",
"dwmac4.h",
"dwmac4_core.c",
"dwmac4_descs.c",
"dwmac4_descs.h",
"dwmac4_dma.c",
"dwmac4_dma.h",
"dwmac4_lib.c",
"dwmac5.c",
"dwmac5.h",
"dwmac_dma.h",
"dwmac_lib.c",
"dwxgmac2.h",
"dwxgmac2_core.c",
"dwxgmac2_descs.c",
"dwxgmac2_dma.c",
"dwxlgmac2.h",
"enh_desc.c",
"hwif.c",
"hwif.h",
"mmc.h",
"mmc_core.c",
"norm_desc.c",
"ring_mode.c",
"stmmac.h",
"stmmac_est.c",
"stmmac_est.h",
"stmmac_ethtool.c",
"stmmac_fpe.c",
"stmmac_fpe.h",
"stmmac_hwtstamp.c",
"stmmac_libpci.c",
"stmmac_libpci.h",
"stmmac_main.c",
"stmmac_mdio.c",
"stmmac_pci.c",
"stmmac_pcs.c",
"stmmac_pcs.h",
"stmmac_platform.c",
"stmmac_platform.h",
"stmmac_ptp.c",
"stmmac_ptp.h",
"stmmac_selftests.c",
"stmmac_tc.c",
"stmmac_vlan.c",
"stmmac_vlan.h",
"stmmac_xdp.c",
"stmmac_xdp.h"
],
"Subdirs": null
} |
| 17/2 | 2026/10/12 18:47 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 20472 output: 46 thoughts: 117 Thoughts: Okay, here's my take on those files... **Digging into the Ethernet Drivers** Alright, let's see, a bunch of Ethernet driver source files, *dwmac-* this, *stmmac-* that. Seems like the standard suspects. I recognize a few names right away, `dwmac-anarion.c`, `dwmac-rk.c`, and `dwmac-sunxi.c` immediately suggest SoCs used in embedded systems. And `stmmac` is, of course, the Synopsys standard MAC driver. But wait a second... `dwmac-generic.c`? That feels a bit... broad. Generic is almost always a warning sign. I need to understand that file. What is the scope? Why is it considered "generic"? Is it a base implementation, an abstraction layer, or something else entirely? Time to dive into that one specifically. Let's start there. |
| 18/2 | 2026/10/12 18:47 | tool | read-file |
0mArgs:{
"File": "drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c",
"FirstLine": 1,
"LineCount": 80
}Results: {
"Contents": " 1:\t/*\n 2:\t * Generic DWMAC platform driver\n 3:\t *\n 4:\t * Copyright (C) 2007-2011 STMicroelectronics Ltd\n 5:\t * Copyright (C) 2015 Joachim Eastwood \u003cmanabian@gmail.com\u003e\n 6:\t *\n 7:\t * This file is licensed under the terms of the GNU General Public\n 8:\t * License version 2. This program is licensed \"as is\" without any\n 9:\t * warranty of any kind, whether express or implied.\n 10:\t */\n 11:\t\n 12:\t#include \u003clinux/module.h\u003e\n 13:\t#include \u003clinux/of.h\u003e\n 14:\t#include \u003clinux/platform_device.h\u003e\n 15:\t\n 16:\t#include \"stmmac.h\"\n 17:\t#include \"stmmac_platform.h\"\n 18:\t\n 19:\tstatic int dwmac_generic_probe(struct platform_device *pdev)\n 20:\t{\n 21:\t\tstruct plat_stmmacenet_data *plat_dat;\n 22:\t\tstruct stmmac_resources stmmac_res;\n 23:\t\tint ret;\n 24:\t\n 25:\t\tret = stmmac_get_platform_resources(pdev, \u0026stmmac_res);\n 26:\t\tif (ret)\n 27:\t\t\treturn ret;\n 28:\t\n 29:\t\tif (pdev-\u003edev.of_node) {\n 30:\t\t\tplat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);\n 31:\t\t\tif (IS_ERR(plat_dat)) {\n 32:\t\t\t\tdev_err(\u0026pdev-\u003edev, \"dt configuration failed\\n\");\n 33:\t\t\t\treturn PTR_ERR(plat_dat);\n 34:\t\t\t}\n 35:\t\t} else {\n 36:\t\t\tplat_dat = dev_get_platdata(\u0026pdev-\u003edev);\n 37:\t\t\tif (!plat_dat) {\n 38:\t\t\t\tdev_err(\u0026pdev-\u003edev, \"no platform data provided\\n\");\n 39:\t\t\t\treturn -EINVAL;\n 40:\t\t\t}\n 41:\t\n 42:\t\t\t/* Set default value for multicast hash bins */\n 43:\t\t\tplat_dat-\u003emulticast_filter_bins = HASH_TABLE_SIZE;\n 44:\t\n 45:\t\t\t/* Set default value for unicast filter entries */\n 46:\t\t\tplat_dat-\u003eunicast_filter_entries = 1;\n 47:\t\t}\n 48:\t\n 49:\t\treturn devm_stmmac_pltfr_probe(pdev, plat_dat, \u0026stmmac_res);\n 50:\t}\n 51:\t\n 52:\tstatic const struct of_device_id dwmac_generic_match[] = {\n 53:\t\t{ .compatible = \"st,spear600-gmac\"},\n 54:\t\t{ .compatible = \"snps,dwmac-3.40a\"},\n 55:\t\t{ .compatible = \"snps,dwmac-3.50a\"},\n 56:\t\t{ .compatible = \"snps,dwmac-3.610\"},\n 57:\t\t{ .compatible = \"snps,dwmac-3.70a\"},\n 58:\t\t{ .compatible = \"snps,dwmac-3.710\"},\n 59:\t\t{ .compatible = \"snps,dwmac-3.72a\"},\n 60:\t\t{ .compatible = \"snps,dwmac-4.00\"},\n 61:\t\t{ .compatible = \"snps,dwmac-4.10a\"},\n 62:\t\t{ .compatible = \"snps,dwmac\"},\n 63:\t\t{ .compatible = \"snps,dwxgmac-2.10\"},\n 64:\t\t{ .compatible = \"snps,dwxgmac\"},\n 65:\t\t{ }\n 66:\t};\n 67:\tMODULE_DEVICE_TABLE(of, dwmac_generic_match);\n 68:\t\n 69:\tstatic struct platform_driver dwmac_generic_driver = {\n 70:\t\t.probe = dwmac_generic_probe,\n 71:\t\t.driver = {\n 72:\t\t\t.name = STMMAC_RESOURCE_NAME,\n 73:\t\t\t.pm\t\t= \u0026stmmac_pltfr_pm_ops,\n 74:\t\t\t.of_match_table = dwmac_generic_match,\n 75:\t\t},\n 76:\t};\n 77:\tmodule_platform_driver(dwmac_generic_driver);\n 78:\t\n 79:\tMODULE_DESCRIPTION(\"Generic dwmac driver\");\n 80:\tMODULE_LICENSE(\"GPL v2\");\n"
} |
| 19/2 | 2026/10/12 18:47 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 22069 output: 46 thoughts: 121 Thoughts: **Probing Platform and PCI Devices in Virtualized Environments** Okay, so I'm wondering about something specific here: can I actually probe platform devices or PCI devices specifically for `stmmac` in standard virtualized setups like QEMU or Google Compute Engine, all running on amd64? This seems like a good question to investigate. Let's break this down. First, I need to check QEMU on x86_64 and see what's available. Does QEMU, in its standard configuration, emulate or provide any of the relevant devices? Specifically, I'm looking for either the Synopsys DWmac IP core (`snps,dwmac`), the STMicroelectronics MAC (`stmmac`), a specific PCI ID that is commonly associated with those(`0x0700:0x1108`) or any GMAC device from Intel or Synopsys. Now, that brings up another question, actually. Which Intel chips actually *do* use the `dwmac-intel` driver? I should check the source for `dwmac-intel.c`. That should give me the answers I need. |
| 20/2 | 2026/10/12 18:47 | tool | grepper |
0mArgs:{
"Expression": "PCI_DEVICE_ID",
"PathPrefixes": [
"drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c"
]
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c=1398=static void intel_eth_pci_remove(struct pci_dev *pdev)\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1409-\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1410:#define PCI_DEVICE_ID_INTEL_QUARK\t\t0x0937\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1411:#define PCI_DEVICE_ID_INTEL_EHL_RGMII1G\t\t0x4b30\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1412:#define PCI_DEVICE_ID_INTEL_EHL_SGMII1G\t\t0x4b31\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1413:#define PCI_DEVICE_ID_INTEL_EHL_SGMII2G5\t0x4b32\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1414-/* Intel(R) Programmable Services Engine (Intel(R) PSE) consist of 2 MAC\n--\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1416- */\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1417:#define PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G\t0x4ba0\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1418:#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G\t0x4ba1\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1419:#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5\t0x4ba2\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1420:#define PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G\t0x4bb0\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1421:#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G\t0x4bb1\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1422:#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5\t0x4bb2\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1423:#define PCI_DEVICE_ID_INTEL_TGLH_SGMII1G_0\t0x43ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1424:#define PCI_DEVICE_ID_INTEL_TGLH_SGMII1G_1\t0x43a2\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1425:#define PCI_DEVICE_ID_INTEL_TGL_SGMII1G\t\t0xa0ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1426:#define PCI_DEVICE_ID_INTEL_ADLS_SGMII1G_0\t0x7aac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1427:#define PCI_DEVICE_ID_INTEL_ADLS_SGMII1G_1\t0x7aad\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1428:#define PCI_DEVICE_ID_INTEL_ADLN_SGMII1G\t0x54ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:1429:#define PCI_DEVICE_ID_INTEL_RPLP_SGMII1G\t0x51ac\ndrivers/net/ethernet/stmicro/stmmac/dwmac-intel.c-1430-\n"
} |
| 21/2 | 2026/10/12 18:47 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 23566 output: 58 thoughts: 1517 Thoughts: **My Assessment of the Fuzzing Applicability** Okay, so I'm looking at this patch series and the primary goal is to discover crashes and bugs. My initial thought was, "These are Intel Ethernet controllers, Quark, etc., which aren't emulated in standard QEMU or GCE." So, I need to figure out if it's reachable. I wondered if QEMU had *stmmac*, but I remembered *stmmac* is a Synopsys DesignWare MAC found in various SoCs, and Intel's specific implementations, not a generic model. I quickly checked QEMU's source code under `hw/net/` and did find a lot of emulated NICs, and spotted `xgmac.c`, but that's for the Calxeda Highbank. No `dwmac` or `stmmac` there. So no, QEMU doesn't have an emulation of this. Then I carefully reviewed sections 2 and 3 of the prompt. I went straight to the "Negative Criteria" for "Structurally unreachable hardware." Specifically the one: "Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed, ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU." It clicked. The *stmmac* is a vendor-specific NIC driver that requires either ASIC or specific SoC hardware (STM32, Rockchip, Allwinner, Intel EHL/TGL/ADL, etc). No standard QEMU (or GCE) emulation. And, what if I'm wrong and the code does not require real hardware? Then I looked specifically at what the patch modifies: `stmmac_rx`, `stmmac_rx_zc`, `stmmac_build_skb`, and so on. All these are in `stmmac_main.c` (and `stmmac.h`), handling RX buffer management and XDP multi-buff support. To *run* any of this code, the driver needs to probe successfully and receive packets from a DMA ring buffer. This means there *must* be an stmmac net_device, and it *must* receive packets through hardware DMA ring descriptors. This won't work without emulation of the STMMAC / DWMAC DMA engine. To be absolutely sure, I'll need to double check the hardware init path through `__stmmac_dvr_probe`. So based on this, I conclude that the modified code falls into the "Structurally unreachable hardware" category and is NOT reachable in standard virtualized environments. I'm returning WorthFuzzing=false. |
| 22/2 | 2026/10/12 18:47 | tool | grepper |
0mArgs:{
"Expression": "stmmac_hw_init|stmmac_dma_cap",
"PathPrefixes": [
"drivers/net/ethernet/stmicro/stmmac/stmmac_main.c"
]
}Results: {
"Output": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6773=DEFINE_SHOW_ATTRIBUTE(stmmac_rings_status);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6774-\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6775:static int stmmac_dma_cap_show(struct seq_file *seq, void *v)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6776-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6958-}\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:6959:DEFINE_SHOW_ATTRIBUTE(stmmac_dma_cap);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6960-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=6985=static void stmmac_init_fs(struct net_device *dev)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-6999-\tdebugfs_create_file(\"dma_cap\", 0444, priv-\u003edbgfs_dir, dev,\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:7000:\t\t\t \u0026stmmac_dma_cap_fops);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7001-\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=7577=static void stmmac_print_actphyif(struct stmmac_priv *priv)\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7611-/**\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:7612: * stmmac_hw_init - Init the MAC device\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7613- * @priv: driver private structure\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7618- */\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:7619:static int stmmac_hw_init(struct stmmac_priv *priv)\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-7620-{\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c=8034=static int __stmmac_dvr_probe(struct device *device,\n--\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-8137-\t/* Init MAC and get the capabilities */\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c:8138:\tret = stmmac_hw_init(priv);\ndrivers/net/ethernet/stmicro/stmmac/stmmac_main.c-8139-\tif (ret)\n"
} |
| 23/2 | 2026/10/12 18:47 | llm | patch-evaluator |
0mModel:gemini-3.8-flash Args: null Results: null Tokens: input: 26590 output: 117 thoughts: 361 Thoughts: **My Assessment of the STMMAC Driver's Fuzzing Suitability** Okay, so here's the deal. I'm looking at this `stmmac_hw_init` function, and I see it's directly interacting with the hardware registers of the MAC device through Memory-Mapped I/O (MMIO). Naturally, if there's no actual STMMAC hardware present, the probe is going to fail – either right there in `stmmac_hw_init` or even earlier if the platform or PCI device doesn't match any hardware. We know that in the typical virtualized environments like QEMU or Google Compute Engine on amd64, there *won't* be any STMMAC hardware. Let me just quickly check if there is some kind of software or virtual testing mechanism for stmmac, or something like netdevsim. Ah, no, netdevsim is in `drivers/net/netdevsim/`, which I am familiar with. That's for completely different devices. STMMAC is strictly designed for *real* STMMAC hardware. So, this falls squarely under Section 2: "Structurally unreachable hardware," specifically the examples that mention things like vendor-specific PCIe switches, SmartNICs, or GPU drivers (mlxsw, pds_core, qed, ionic, amdgpu) which all require physical ASIC/PCIe cards that are not emulated in standard QEMU environments. Looking at the code, all the modifications are within `drivers/net/ethernet/stmicro/stmmac/`. That code is, essentially, structurally unreachable because STMMAC/DWMAC ethernet controllers require that specific physical hardware, an ASIC, SoC, or PCIe device, none of which are emulated in standard virtualized environments. Therefore, for fuzzing, I'm setting: * `WorthFuzzing = false`. * `FocusSymbols = []`. * `EnableConfigs = []`. Let's do a final check of the requirements for `set-results`: * `EnableConfigs`: Empty. Good. * `FocusSymbols`: Empty. Check. * `Reasoning`: Concise explanation of the fuzzing verdict: Clear and done. * `WorthFuzzing`: False. Correct. Yup, everything's clear, and unambiguous. We aren't going to get any meaningful fuzzing results here, and it's not worth the effort. |
| 24/2 | 2026/10/12 18:47 | tool | set-results |
0mArgs:{
"EnableConfigs": [],
"FocusSymbols": [],
"Reasoning": "The patch modifies the STMicroelectronics Multi-Gigabit Ethernet (stmmac) driver, adding multi-buffer (frags) support to its XDP receive path. STMMAC/DWMAC ethernet controllers require specific physical SoC or PCIe hardware that is not emulated in standard virtualized environments (QEMU or GCE on amd64). As such, the modified code is structurally unreachable during standard fuzzing.",
"WorthFuzzing": false
}Results: {
"EnableConfigs": null,
"FocusSymbols": [],
"Reasoning": "The patch modifies the STMicroelectronics Multi-Gigabit Ethernet (stmmac) driver, adding multi-buffer (frags) support to its XDP receive path. STMMAC/DWMAC ethernet controllers require specific physical SoC or PCIe hardware that is not emulated in standard virtualized environments (QEMU or GCE on amd64). As such, the modified code is structurally unreachable during standard fuzzing.",
"WorthFuzzing": false
} |
| 25/1 | 2026/10/12 18:47 | action | If |
0mArgs:{
"WorthFuzzing": false
}Results: null |
| Total Calls | Total Tokens | Avg Tokens | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|
| Total Calls | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|