AI Trajectory

null

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "KMSANReasoning": "",
  "NeedsKMSAN": false,
  "Reasoning": "The changes affect the probe error path in drivers/gpu/drm/panel/panel-novatek-nt35950.c, which is a MIPI DSI panel driver for specific display hardware (Sharp LS055D1SX04 panel used in Sony Xperia mobile phones). This requires specialized physical hardware and Device Tree descriptions not present or emulated in standard amd64 virtualized environments (QEMU/GCE), making the modified code structurally unreachable.",
  "WorthFuzzing": false
}

null

{
  "PatchDiff": "commit e93619cd9bf756d5888278bd92255130f14f74ca\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate:   Wed Sep 16 07:24:49 2026 +0000\n\n    syz-cluster: applied patch under review\n\ndiff --git a/drivers/gpu/drm/panel/panel-novatek-nt35950.c b/drivers/gpu/drm/panel/panel-novatek-nt35950.c\nindex 94aa6489d99fc..8edd0aa363cec 100644\n--- a/drivers/gpu/drm/panel/panel-novatek-nt35950.c\n+++ b/drivers/gpu/drm/panel/panel-novatek-nt35950.c\n@@ -514,12 +514,19 @@ static int nt35950_probe(struct mipi_dsi_device *dsi)\n \n \t\tret = mipi_dsi_attach(nt-\u003edsi[i]);\n \t\tif (ret \u003c 0) {\n-\t\t\t/* If we fail to attach to either host, we're done */\n+\t\t\tdev_err_probe(dev, ret,\n+\t\t\t\t      \"Cannot attach to DSI%d host.\\n\", i);\n+\n+\t\t\t/* Detach from all previously attached DSI hosts */\n+\t\t\twhile (i--)\n+\t\t\t\tmipi_dsi_detach(nt-\u003edsi[i]);\n+\n \t\t\tif (num_dsis == 2)\n \t\t\t\tmipi_dsi_device_unregister(nt-\u003edsi[1]);\n \n-\t\t\treturn dev_err_probe(dev, ret,\n-\t\t\t\t\t     \"Cannot attach to DSI%d host.\\n\", i);\n+\t\t\tdrm_panel_remove(\u0026nt-\u003epanel);\n+\n+\t\t\treturn ret;\n \t\t}\n \t}\n \n"
}

core

null

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The changes affect the probe error path in drivers/gpu/drm/panel/panel-novatek-nt35950.c, which is a MIPI DSI panel driver for specific display hardware (Sharp LS055D1SX04 panel used in Sony Xperia mobile phones). This requires specialized physical hardware and Device Tree descriptions not present or emulated in standard amd64 virtualized environments (QEMU/GCE), making the modified code structurally unreachable.",
  "WorthFuzzing": false
}

You are an expert Linux kernel maintainer and security engineer.
Your job is to review a provided patch series and evaluate whether it warrants fuzzing with syzkaller.

IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in
your workspace. Do NOT rely on internal assumptions. You must actively use your code access
tools to inspect the actual source code, callers, and surrounding context.

================================================================================
1. CORE TRIAGE PHILOSOPHY
================================================================================
The goal of patch fuzzing is to discover crashes, regressions, exposed latent bugs,
and newly triggered assertions introduced by the patch series.

- REACHABILITY IS THE PRIMARY GATE:
  Fuzzing can only discover bugs in code that can actually execute in standard virtualized
  environments (GCE or QEMU, utilizing software-emulated devices like USB gadgets, netdev, tun/tap).
  If the modified code is structurally unreachable (see Section 2), it MUST NOT be fuzzed,
  regardless of whether it adds assertions or complex logic.

- DO NOT BLINDLY TRUST "NO FUNCTIONAL CHANGE" (NFCI) OR "REFACTORING" CLAIMS:
  Patch authors routinely label changes as "cleanups", "refactorings", or state
  "No functional change intended". Do NOT take these claims at face value.
  Code refactorings that rearrange logic, introduce helper functions, or alter state management
  in core subsystems frequently introduce subtle semantic shifts or uncover latent kernel bugs.
  If reachable executable code is modified or refactored, it MUST be fuzzed.

- NEW OR MODIFIED ASSERTIONS IN REACHABLE CODE MUST BE FUZZED:
  When a patch introduces or modifies runtime checks or assertions (e.g., WARN_ON*, VM_WARN_ON*,
  BUG_ON*, lockdep_assert*) in reachable code paths, it enforces new or stricter invariants.
  Even if the author believes the invariant always holds, fuzzing is essential to verify whether
  an unusual sequence of operations can violate it.

================================================================================
2. WHEN TO RETURN WorthFuzzing=false (NEGATIVE CRITERIA)
================================================================================
Return WorthFuzzing=false ONLY IF all modified code falls strictly into one or more of these categories:

- Non-kernel and non-executable changes:
  * Modifications to Documentation/, comments, or spelling fixes.
  * User-space directories, self-tests, samples, or scripts (e.g., tools/, samples/, scripts/, usr/)
    that do not affect the compiled kernel image (vmlinux) or kernel modules.
  * Purely decorative logging (e.g., message strings in pr_err, printk, dev_info) or tracepoints
    that do not alter control flow or data structures.
  * Build system or Kconfig changes that do not alter compiled C logic.
- Structurally unreachable hardware:
  * Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed,
    ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU.
- Unreachable execution paths:
  * Driver teardown callbacks (.remove, .shutdown, pci_unregister_driver) executed only during
    physical PCI hot-unplug or manual sysfs driver unbinding.
  * Code paths exclusive to architectures other than the target architecture.

================================================================================
3. WHEN TO RETURN WorthFuzzing=true (POSITIVE CRITERIA)
================================================================================
Return WorthFuzzing=true whenever the patch touches reachable executable code, including:
- Core Subsystems:
  * Any logic modifications in memory management (mm/), synchronization/locking (kernel/locking/),
    BPF, scheduler, core networking, VFS, or syscall handling.
- Refactorings and Code Cleanups:
  * Any restructuring of reachable data structures, helper abstractions, or algorithm flows.
- Runtime Assertions and Defensive Checks:
  * Any introduction or alteration of assertions (WARN_ON*, VM_WARN_ON*, BUG_ON*, etc.) in reachable paths.
- Reachable Drivers and Protocols:
  * Drivers accessible via virtual buses (virtio, USB gadget, loopback, netlink, binder, sockets, etc.).

================================================================================
4. EXTRACTING FocusSymbols (PREVENTING DILUTION)
================================================================================
When WorthFuzzing=true, you must extract specific kernel functions into FocusSymbols to guide the fuzzer:

- AVOID UBIQUITOUS LIFECYCLE HOT-PATHS:
  Do NOT list generic, ubiquitous functions called by almost every program in the corpus
  (including, but not limited to: general memory allocators and deallocators, page fault
  and trap handlers, or core synchronization primitives; this is not an exhaustive list).
  Listing ubiquitous functions causes the fuzzer to classify thousands of unrelated tests as "focused",
  which severely dilutes fuzzing effort away from the actual changes.

- TARGET SPECIFIC FEATURE LOGIC AND ENTRYPOINTS:
  List functions that specifically implement the logic being added or altered, or direct API entrypoints
  for the subsystem feature under review.

- HANDLING STATIC INLINE FUNCTIONS IN HEADERS (.h):
  Compiler-inlined static functions (such as static inlines in mm/*.h or include/linux/*.h) lack
  distinct symbol addresses in vmlinux and cannot be targeted directly by symbol coverage filters.
  If the changes are primarily in static inline helpers, identify non-static, feature-specific caller
  functions in .c files that exercise them (avoiding ubiquitous lifecycle wrappers).

================================================================================
5. IDENTIFYING EnableConfigs
================================================================================
Identify any specific CONFIG_ options required to properly compile and reach the modified code:
- Inspect Kconfig files and #ifdef guards; do not make assumptions.
- Check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed.
- Strip any 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4").
Prefer calling several tools at the same time to save round-trips.


Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.

Target architecture: amd64

For your convenience, here is the diff of the changes:
commit e93619cd9bf756d5888278bd92255130f14f74ca
Author: syz-cluster <triage@syzkaller.com>
Date:   Wed Sep 16 07:24:49 2026 +0000

    syz-cluster: applied patch under review

diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35950.c b/drivers/gpu/drm/panel/panel-novatek-nt35950.c
index 94aa6489d99fc..8edd0aa363cec 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35950.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35950.c
@@ -514,12 +514,19 @@ static int nt35950_probe(struct mipi_dsi_device *dsi)
 
 		ret = mipi_dsi_attach(nt->dsi[i]);
 		if (ret < 0) {
-			/* If we fail to attach to either host, we're done */
+			dev_err_probe(dev, ret,
+				      "Cannot attach to DSI%d host.\n", i);
+
+			/* Detach from all previously attached DSI hosts */
+			while (i--)
+				mipi_dsi_detach(nt->dsi[i]);
+
 			if (num_dsis == 2)
 				mipi_dsi_device_unregister(nt->dsi[1]);
 
-			return dev_err_probe(dev, ret,
-					     "Cannot attach to DSI%d host.\n", i);
+			drm_panel_remove(&nt->panel);
+
+			return ret;
 		}
 	}
 

gemini-3.8-flash

null

null

							input: 3054
							output: 43
							thoughts: 521
						

**Analyzing a DSI Panel Driver Patch**

Okay, so I've got a patch here modifying `drivers/gpu/drm/panel/panel-novatek-nt35950.c`.  Let's dive in. The first thing I'll do is inspect the diff itself. It looks like it's in the `nt35950_probe` function, specifically related to how the driver attaches to the MIPI DSI host(s). The original code had a rather rudimentary error handling strategy. If attaching to either DSI host failed, it just bailed. This patch is making things more robust.

Now, instead of just returning on the first failure, it's cleaning up. If attaching to a DSI host fails, it now iterates backward through any previously attached hosts, detaching them before completely failing. It's also unregistering the `mipi_dsi_device` and removing the `drm_panel` if there's a total failure. This is much better, preventing potential resource leaks and a cleaner overall exit strategy. The `dev_err_probe` call is a nice touch, giving us a more descriptive error message during probe.

Okay, let's take a quick look at the broader context. This is a MIPI DSI panel driver. Knowing the file path tells me immediately what kind of hardware we're dealing with. I'll probably want to double-check `Kconfig` to see how this driver is compiled, probed and used and how it interacts with the broader display subsystem. This improved error handling seems like a good catch, and I'll need to confirm that my initial assumptions about how this driver is organized are accurate.

{
  "Expression": "DRM_PANEL_NOVATEK_NT35950",
  "PathPrefix": "drivers/gpu/drm/panel"
}

{
  "Output": "drivers/gpu/drm/panel/Kconfig=645=config DRM_PANEL_NOVATEK_NT35560\n--\ndrivers/gpu/drm/panel/Kconfig-656-\ndrivers/gpu/drm/panel/Kconfig:657:config DRM_PANEL_NOVATEK_NT35950\ndrivers/gpu/drm/panel/Kconfig-658-\ttristate \"Novatek NT35950 DSI panel\"\n--\ndrivers/gpu/drm/panel/Makefile=65=obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o\ndrivers/gpu/drm/panel/Makefile:66:obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o\ndrivers/gpu/drm/panel/Makefile-67-obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o\n"
}

gemini-3.8-flash

null

null

							input: 4255
							output: 38
							thoughts: 26
						

Here's my summary, as though I'm processing those thoughts:

**Analyzing the Panel Kconfig**

Alright, let's dive into this. The task at hand is to dissect the Kconfig file, specifically around line 657 within the `drivers/gpu/drm/panel/` directory. Given the context, I'm expecting this section to pertain to configuration options related to display panels – the devices that actually output the visual information. I'll be looking for things like: the different types of panels supported, features enabled or disabled for them (backlight control, power management, etc.), and the dependencies on other kernel subsystems. I'll want to see how these options are structured, any conditional logic, and how they relate to the overall DRM (Direct Rendering Manager) driver framework. This line likely marks a specific, potentially crucial, configuration block. I'm already anticipating the typical Kconfig syntax: `config`, `bool`, `tristate`, `select`, `depends on`, `default`, etc. My focus will be on understanding the implications of each configuration setting on the functionality and integration of panel drivers within the broader system. I'll be paying close attention to any relationships with other drivers or platform-specific information.

{
  "File": "drivers/gpu/drm/panel/Kconfig",
  "FirstLine": 655,
  "LineCount": 20
}

{
  "Contents": " 655:\t\t  ACX424AKP.\n 656:\t\n 657:\tconfig DRM_PANEL_NOVATEK_NT35950\n 658:\t\ttristate \"Novatek NT35950 DSI panel\"\n 659:\t\tdepends on OF\n 660:\t\tdepends on DRM_MIPI_DSI\n 661:\t\tdepends on BACKLIGHT_CLASS_DEVICE\n 662:\t\thelp\n 663:\t\t  Say Y here if you want to enable support for the panels built\n 664:\t\t  around the Novatek NT35950 display controller, such as some\n 665:\t\t  Sharp panels used in Sony Xperia Z5 Premium and XZ Premium\n 666:\t\t  mobile phones.\n 667:\t\n 668:\tconfig DRM_PANEL_NOVATEK_NT36523\n 669:\t\ttristate \"Novatek NT36523 panel driver\"\n 670:\t\tdepends on OF\n 671:\t\tdepends on DRM_MIPI_DSI\n 672:\t\tdepends on BACKLIGHT_CLASS_DEVICE\n 673:\t\thelp\n 674:\t\t  Say Y here if you want to enable support for the panels built\n"
}

gemini-3.8-flash

null

null

							input: 4908
							output: 49
							thoughts: 28
						

Okay, let's dive into this. Here's how I'd approach this task, as if these were my internal thoughts:

**Analyzing the Novatek NT35950 Driver**

Alright, time to get to work. First, I need to understand this `panel-novatek-nt35950.c` driver. The obvious starting point for me is always the probe function. That's where the driver gets initialized and bound to the hardware, so that's where I can get the best idea of the overall control flow and what's going on with this panel. Let's see how it handles the initial setup and resource allocation, how it communicates with the Novatek chip, and what it expects in terms of platform data. I'm hoping to get a quick grasp of the general structure of the driver and how it interfaces with the display hardware. Knowing the probe function will give me a better understanding of how the driver handles initialization.

{
  "File": "drivers/gpu/drm/panel/panel-novatek-nt35950.c",
  "FirstLine": 460,
  "LineCount": 90
}

{
  "Contents": " 460:\t\n 461:\t\tnt-\u003edesc = of_device_get_match_data(dev);\n 462:\t\tif (!nt-\u003edesc)\n 463:\t\t\treturn -ENODEV;\n 464:\t\n 465:\t\tnt-\u003ereset_gpio = devm_gpiod_get(dev, \"reset\", GPIOD_ASIS);\n 466:\t\tif (IS_ERR(nt-\u003ereset_gpio)) {\n 467:\t\t\treturn dev_err_probe(dev, PTR_ERR(nt-\u003ereset_gpio),\n 468:\t\t\t\t\t     \"Failed to get reset gpio\\n\");\n 469:\t\t}\n 470:\t\n 471:\t\t/* If the panel is connected on two DSIs then DSI0 left, DSI1 right */\n 472:\t\tif (nt-\u003edesc-\u003eis_dual_dsi) {\n 473:\t\t\tinfo = \u0026nt-\u003edesc-\u003edsi_info;\n 474:\t\t\tdsi_r = of_graph_get_remote_node(dsi-\u003edev.of_node, 1, -1);\n 475:\t\t\tif (!dsi_r) {\n 476:\t\t\t\tdev_err(dev, \"Cannot get secondary DSI node.\\n\");\n 477:\t\t\t\treturn -ENODEV;\n 478:\t\t\t}\n 479:\t\t\tdsi_r_host = of_find_mipi_dsi_host_by_node(dsi_r);\n 480:\t\t\tof_node_put(dsi_r);\n 481:\t\t\tif (!dsi_r_host)\n 482:\t\t\t\treturn dev_err_probe(dev, -EPROBE_DEFER, \"Cannot get secondary DSI host\\n\");\n 483:\t\n 484:\t\t\tnt-\u003edsi[1] = mipi_dsi_device_register_full(dsi_r_host, info);\n 485:\t\t\tif (IS_ERR(nt-\u003edsi[1])) {\n 486:\t\t\t\tdev_err(dev, \"Cannot get secondary DSI node\\n\");\n 487:\t\t\t\treturn PTR_ERR(nt-\u003edsi[1]);\n 488:\t\t\t}\n 489:\t\t\tnum_dsis++;\n 490:\t\t}\n 491:\t\n 492:\t\tnt-\u003edsi[0] = dsi;\n 493:\t\tmipi_dsi_set_drvdata(dsi, nt);\n 494:\t\n 495:\t\tret = drm_panel_of_backlight(\u0026nt-\u003epanel);\n 496:\t\tif (ret) {\n 497:\t\t\tif (num_dsis == 2)\n 498:\t\t\t\tmipi_dsi_device_unregister(nt-\u003edsi[1]);\n 499:\t\n 500:\t\t\treturn dev_err_probe(dev, ret, \"Failed to get backlight\\n\");\n 501:\t\t}\n 502:\t\n 503:\t\tdrm_panel_add(\u0026nt-\u003epanel);\n 504:\t\n 505:\t\tfor (i = 0; i \u003c num_dsis; i++) {\n 506:\t\t\tnt-\u003edsi[i]-\u003elanes = nt-\u003edesc-\u003enum_lanes;\n 507:\t\t\tnt-\u003edsi[i]-\u003eformat = MIPI_DSI_FMT_RGB888;\n 508:\t\n 509:\t\t\tnt-\u003edsi[i]-\u003emode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS |\n 510:\t\t\t\t\t\t MIPI_DSI_MODE_LPM;\n 511:\t\n 512:\t\t\tif (nt-\u003edesc-\u003emode_data[0].is_video_mode)\n 513:\t\t\t\tnt-\u003edsi[i]-\u003emode_flags |= MIPI_DSI_MODE_VIDEO;\n 514:\t\n 515:\t\t\tret = mipi_dsi_attach(nt-\u003edsi[i]);\n 516:\t\t\tif (ret \u003c 0) {\n 517:\t\t\t\tdev_err_probe(dev, ret,\n 518:\t\t\t\t\t      \"Cannot attach to DSI%d host.\\n\", i);\n 519:\t\n 520:\t\t\t\t/* Detach from all previously attached DSI hosts */\n 521:\t\t\t\twhile (i--)\n 522:\t\t\t\t\tmipi_dsi_detach(nt-\u003edsi[i]);\n 523:\t\n 524:\t\t\t\tif (num_dsis == 2)\n 525:\t\t\t\t\tmipi_dsi_device_unregister(nt-\u003edsi[1]);\n 526:\t\n 527:\t\t\t\tdrm_panel_remove(\u0026nt-\u003epanel);\n 528:\t\n 529:\t\t\t\treturn ret;\n 530:\t\t\t}\n 531:\t\t}\n 532:\t\n 533:\t\t/* Make sure to set RESX LOW before starting the power-on sequence */\n 534:\t\tgpiod_set_value_cansleep(nt-\u003ereset_gpio, 0);\n 535:\t\treturn 0;\n 536:\t}\n 537:\t\n 538:\tstatic void nt35950_remove(struct mipi_dsi_device *dsi)\n 539:\t{\n 540:\t\tstruct nt35950 *nt = mipi_dsi_get_drvdata(dsi);\n 541:\t\tint ret;\n 542:\t\n 543:\t\tret = mipi_dsi_detach(nt-\u003edsi[0]);\n 544:\t\tif (ret \u003c 0)\n 545:\t\t\tdev_err(\u0026dsi-\u003edev,\n 546:\t\t\t\t\"Failed to detach from DSI0 host: %d\\n\", ret);\n 547:\t\n 548:\t\tif (nt-\u003edsi[1]) {\n 549:\t\t\tret = mipi_dsi_detach(nt-\u003edsi[1]);\n"
}

gemini-3.8-flash

null

null

							input: 6717
							output: 27
							thoughts: 352
						

**My Assessment of the Panel Driver**

Okay, so I'm looking at this driver, `panel-novatek-nt35950`. Right away, I see it's for a MIPI DSI panel. My initial question is always, can I even *test* this in a standard virtualized environment like GCE or QEMU? Let's see...

The description says it's for Novatek NT35950-based panels, like the ones in those Sony Xperia phones. Okay, that gives me some context. It's dependent on Device Tree, specifically `depends on OF`. Now, given that the target architecture is amd64, this triggers a red flag. On x86, Device Tree isn't the norm. `CONFIG_OF` can be enabled, yeah, for specific use cases like unit tests, ACPI, or device tree emulation, but it's not the default. Even *if* Device Tree is enabled, this driver needs a specific Device Tree node that describes the Novatek controller connected to a MIPI DSI host.

Now I'm thinking about the bigger picture: Can I even reach or emulate that MIPI DSI host in QEMU or syzkaller? I need to know what bus MIPI DSI is. Okay, MIPI DSI is a hardware bus, and its host controllers are usually SoC display controllers. Think Qualcomm, Allwinner, Rockchip, i.MX... those kinds of things.

So, the real question here is: Can I instantiate a `mipi_dsi_device` from userspace? Or better, is there a way to mock or emulate it? I'm going to have to dig around and check if there are any syzkaller pseudo-syscalls or userspace interfaces for MIPI DSI. That's the key to even getting this driver under test.

{
  "Expression": "mipi_dsi",
  "PathPrefix": "drivers/"
}

{
  "Output": "\nFull output is too long, showing 500 out of 27645 lines.\nUse more precise expression if possible.\n\ndrivers/clk/imx/clk-imx7d.c=110=static const char *lcdif_pixel_sel[] = { \"osc\", \"pll_sys_pfd5_clk\",\n--\ndrivers/clk/imx/clk-imx7d.c-114-\ndrivers/clk/imx/clk-imx7d.c:115:static const char *mipi_dsi_sel[] = { \"osc\", \"pll_sys_pfd5_clk\",\ndrivers/clk/imx/clk-imx7d.c-116-\t\"pll_sys_pfd3_clk\", \"pll_sys_main_clk\", \"pll_sys_pfd0_196m_clk\",\n--\ndrivers/clk/imx/clk-imx7d.c=380=static void __init imx7d_clocks_init(struct device_node *ccm_node)\n--\ndrivers/clk/imx/clk-imx7d.c-507-\thws[IMX7D_LCDIF_PIXEL_ROOT_SRC] = imx_clk_hw_mux2_flags(\"lcdif_pixel_src\", base + 0xa300, 24, 3, lcdif_pixel_sel, ARRAY_SIZE(lcdif_pixel_sel), CLK_SET_PARENT_GATE | CL...\ndrivers/clk/imx/clk-imx7d.c:508:\thws[IMX7D_MIPI_DSI_ROOT_SRC] = imx_clk_hw_mux2_flags(\"mipi_dsi_src\", base + 0xa380, 24, 3,  mipi_dsi_sel, ARRAY_SIZE(mipi_dsi_sel), CLK_SET_PARENT_GATE);\ndrivers/clk/imx/clk-imx7d.c-509-\thws[IMX7D_MIPI_CSI_ROOT_SRC] = imx_clk_hw_mux2_flags(\"mipi_csi_src\", base + 0xa400, 24, 3, mipi_csi_sel, ARRAY_SIZE(mipi_csi_sel), CLK_SET_PARENT_GATE);\n--\ndrivers/clk/imx/clk-imx7d.c-578-\thws[IMX7D_LCDIF_PIXEL_ROOT_CG] = imx_clk_hw_gate3(\"lcdif_pixel_cg\", \"lcdif_pixel_src\", base + 0xa300, 28);\ndrivers/clk/imx/clk-imx7d.c:579:\thws[IMX7D_MIPI_DSI_ROOT_CG] = imx_clk_hw_gate3(\"mipi_dsi_cg\", \"mipi_dsi_src\", base + 0xa380, 28);\ndrivers/clk/imx/clk-imx7d.c-580-\thws[IMX7D_MIPI_CSI_ROOT_CG] = imx_clk_hw_gate3(\"mipi_csi_cg\", \"mipi_csi_src\", base + 0xa400, 28);\n--\ndrivers/clk/imx/clk-imx7d.c-645-\thws[IMX7D_LCDIF_PIXEL_ROOT_PRE_DIV] = imx_clk_hw_divider2(\"lcdif_pixel_pre_div\", \"lcdif_pixel_cg\", base + 0xa300, 16, 3);\ndrivers/clk/imx/clk-imx7d.c:646:\thws[IMX7D_MIPI_DSI_ROOT_PRE_DIV] = imx_clk_hw_divider2(\"mipi_dsi_pre_div\", \"mipi_dsi_cg\", base + 0xa380, 16, 3);\ndrivers/clk/imx/clk-imx7d.c-647-\thws[IMX7D_MIPI_CSI_ROOT_PRE_DIV] = imx_clk_hw_divider2(\"mipi_csi_pre_div\", \"mipi_csi_cg\", base + 0xa400, 16, 3);\n--\ndrivers/clk/imx/clk-imx7d.c-716-\thws[IMX7D_LCDIF_PIXEL_ROOT_DIV] = imx_clk_hw_divider2(\"lcdif_pixel_post_div\", \"lcdif_pixel_pre_div\", base + 0xa300, 0, 6);\ndrivers/clk/imx/clk-imx7d.c:717:\thws[IMX7D_MIPI_DSI_ROOT_DIV] = imx_clk_hw_divider2(\"mipi_dsi_post_div\", \"mipi_dsi_pre_div\", base + 0xa380, 0, 6);\ndrivers/clk/imx/clk-imx7d.c-718-\thws[IMX7D_MIPI_CSI_ROOT_DIV] = imx_clk_hw_divider2(\"mipi_csi_post_div\", \"mipi_csi_pre_div\", base + 0xa400, 0, 6);\n--\ndrivers/clk/imx/clk-imx7d.c-792-\thws[IMX7D_PXP_CLK] = imx_clk_hw_gate4(\"pxp_clk\", \"main_axi_root_clk\", base + 0x44c0, 0);\ndrivers/clk/imx/clk-imx7d.c:793:\thws[IMX7D_MIPI_DSI_ROOT_CLK] = imx_clk_hw_gate4(\"mipi_dsi_root_clk\", \"mipi_dsi_post_div\", base + 0x4650, 0);\ndrivers/clk/imx/clk-imx7d.c-794-\thws[IMX7D_MIPI_CSI_ROOT_CLK] = imx_clk_hw_gate4(\"mipi_csi_root_clk\", \"mipi_csi_post_div\", base + 0x4640, 0);\n--\ndrivers/clk/imx/clk-imx8mp.c=126=static const char * const imx8mp_audio_ahb_sels[] = {\"osc_24m\", \"sys_pll2_500m\", \"sys_pll1_800m\",\n--\ndrivers/clk/imx/clk-imx8mp.c-129-\ndrivers/clk/imx/clk-imx8mp.c:130:static const char * const imx8mp_mipi_dsi_esc_rx_sels[] = {\"osc_24m\", \"sys_pll2_100m\", \"sys_pll1_80m\",\ndrivers/clk/imx/clk-imx8mp.c-131-\t\t\t\t\t\t\t   \"sys_pll1_800m\", \"sys_pll2_1000m\",\n--\ndrivers/clk/imx/clk-imx8mp.c=549=static int imx8mp_clocks_probe(struct platform_device *pdev)\n--\ndrivers/clk/imx/clk-imx8mp.c-690-\thws[IMX8MP_CLK_AUDIO_AHB] = imx8m_clk_hw_composite_bus(\"audio_ahb\", imx8mp_audio_ahb_sels, ccm_base + 0x9100);\ndrivers/clk/imx/clk-imx8mp.c:691:\thws[IMX8MP_CLK_MIPI_DSI_ESC_RX] = imx8m_clk_hw_composite_bus(\"mipi_dsi_esc_rx\", imx8mp_mipi_dsi_esc_rx_sels, ccm_base + 0x9200);\ndrivers/clk/imx/clk-imx8mp.c-692-\thws[IMX8MP_CLK_MEDIA_DISP2_PIX] = imx8m_clk_hw_composite_bus_flags(\"media_disp2_pix\", imx8mp_media_disp_pix_sels, ccm_base + 0x9300, CLK_SET_RATE_PARENT);\n--\ndrivers/clk/imx/clk-imx8ulp.c=449=static int imx8ulp_clk_pcc5_init(struct platform_device *pdev)\n--\ndrivers/clk/imx/clk-imx8ulp.c-523-\tclks[IMX8ULP_CLK_RGPIOD] = imx_clk_hw_gate(\"rgpiod\", \"lpav_axi_div\", base + 0x114, 30);\ndrivers/clk/imx/clk-imx8ulp.c:524:\tclks[IMX8ULP_CLK_DSI_TX_ESC] = imx_clk_hw_fixed_factor(\"mipi_dsi_tx_esc\", \"dsi\", 1, 4);\ndrivers/clk/imx/clk-imx8ulp.c-525-\n--\ndrivers/clk/imx/clk-imx93.c=161=static const struct imx93_clk_ccgr {\n--\ndrivers/clk/imx/clk-imx93.c-241-\t{ IMX93_CLK_MIPI_CSI_GATE,\t\"mipi_csi\",\t\"media_apb_root\",\t0x9580, },\ndrivers/clk/imx/clk-imx93.c:242:\t{ IMX93_CLK_MIPI_DSI_GATE,\t\"mipi_dsi\",\t\"media_apb_root\",\t0x95c0, 0, NULL, PLAT_IMX93 },\ndrivers/clk/imx/clk-imx93.c-243-\t{ IMX93_CLK_LVDS_GATE,\t\t\"lvds\",\t\t\"media_ldb_root\",\t0x9600, 0, NULL, PLAT_IMX93 },\n--\ndrivers/clk/meson/a9-peripherals.c=93=static A9_SYS_PCLK(sys_dos,\t\tSYS_CLK_EN0_REG0, 1);\ndrivers/clk/meson/a9-peripherals.c:94:static A9_SYS_PCLK(sys_mipi_dsi0,\tSYS_CLK_EN0_REG0, 3);\ndrivers/clk/meson/a9-peripherals.c-95-static A9_SYS_PCLK(sys_eth_phy,\t\tSYS_CLK_EN0_REG0, 4);\n--\ndrivers/clk/meson/a9-peripherals.c=107=static A9_SYS_PCLK(sys_hdmirx_pclk,\tSYS_CLK_EN0_REG0, 19);\ndrivers/clk/meson/a9-peripherals.c:108:static A9_SYS_PCLK(sys_mipi_dsi0_phy,\tSYS_CLK_EN0_REG0, 20);\ndrivers/clk/meson/a9-peripherals.c-109-static A9_SYS_PCLK(sys_can0,\t\tSYS_CLK_EN0_REG0, 21);\n--\ndrivers/clk/meson/a9-peripherals.c=118=static A9_SYS_PCLK(sys_audio,\t\tSYS_CLK_EN0_REG1, 0);\ndrivers/clk/meson/a9-peripherals.c:119:static A9_SYS_PCLK(sys_mipi_dsi1,\tSYS_CLK_EN0_REG1, 1);\ndrivers/clk/meson/a9-peripherals.c:120:static A9_SYS_PCLK(sys_mipi_dsi1_phy,\tSYS_CLK_EN0_REG1, 2);\ndrivers/clk/meson/a9-peripherals.c-121-static A9_SYS_PCLK(sys_eth,\t\tSYS_CLK_EN0_REG1, 3);\n--\ndrivers/clk/meson/a9-peripherals.c=1716=static struct clk_hw *a9_peripherals_hw_clks[] = {\n--\ndrivers/clk/meson/a9-peripherals.c-1718-\t[CLKID_SYS_DOS]\t\t\t= \u0026a9_sys_dos.hw,\ndrivers/clk/meson/a9-peripherals.c:1719:\t[CLKID_SYS_MIPI_DSI0]\t\t= \u0026a9_sys_mipi_dsi0.hw,\ndrivers/clk/meson/a9-peripherals.c-1720-\t[CLKID_SYS_ETH_PHY]\t\t= \u0026a9_sys_eth_phy.hw,\n--\ndrivers/clk/meson/a9-peripherals.c-1732-\t[CLKID_SYS_HDMIRX_PCLK]\t\t= \u0026a9_sys_hdmirx_pclk.hw,\ndrivers/clk/meson/a9-peripherals.c:1733:\t[CLKID_SYS_MIPI_DSI0_PHY]\t= \u0026a9_sys_mipi_dsi0_phy.hw,\ndrivers/clk/meson/a9-peripherals.c-1734-\t[CLKID_SYS_CAN0]\t\t= \u0026a9_sys_can0.hw,\n--\ndrivers/clk/meson/a9-peripherals.c-1743-\t[CLKID_SYS_AUDIO]\t\t= \u0026a9_sys_audio.hw,\ndrivers/clk/meson/a9-peripherals.c:1744:\t[CLKID_SYS_MIPI_DSI1]\t\t= \u0026a9_sys_mipi_dsi1.hw,\ndrivers/clk/meson/a9-peripherals.c:1745:\t[CLKID_SYS_MIPI_DSI1_PHY]\t= \u0026a9_sys_mipi_dsi1_phy.hw,\ndrivers/clk/meson/a9-peripherals.c-1746-\t[CLKID_SYS_ETH]\t\t\t= \u0026a9_sys_eth.hw,\n--\ndrivers/clk/meson/axg.c=1934=static AXG_PCLK(audio_locker,\t\tHHI_GCLK_MPEG0,  2, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/axg.c:1935:static AXG_PCLK(mipi_dsi_host,\t\tHHI_GCLK_MPEG0,  3, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/axg.c-1936-static AXG_PCLK(isa,\t\t\tHHI_GCLK_MPEG0,  5, CLK_IGNORE_UNUSED);\n--\ndrivers/clk/meson/axg.c=1942=static AXG_PCLK(uart0,\t\t\tHHI_GCLK_MPEG0, 13, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/axg.c:1943:static AXG_PCLK(mipi_dsi_phy,\t\tHHI_GCLK_MPEG0, 14, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/axg.c-1944-static AXG_PCLK(spicc_1,\t\tHHI_GCLK_MPEG0, 15, CLK_IGNORE_UNUSED);\n--\ndrivers/clk/meson/axg.c=1985=static struct clk_hw *axg_hw_clks[] = {\n--\ndrivers/clk/meson/axg.c-2002-\t[CLKID_AUDIO_LOCKER]\t\t= \u0026axg_audio_locker.hw,\ndrivers/clk/meson/axg.c:2003:\t[CLKID_MIPI_DSI_HOST]\t\t= \u0026axg_mipi_dsi_host.hw,\ndrivers/clk/meson/axg.c-2004-\t[CLKID_ISA]\t\t\t= \u0026axg_isa.hw,\n--\ndrivers/clk/meson/axg.c-2010-\t[CLKID_UART0]\t\t\t= \u0026axg_uart0.hw,\ndrivers/clk/meson/axg.c:2011:\t[CLKID_MIPI_DSI_PHY]\t\t= \u0026axg_mipi_dsi_phy.hw,\ndrivers/clk/meson/axg.c-2012-\t[CLKID_SPICC1]\t\t\t= \u0026axg_spicc_1.hw,\n--\ndrivers/clk/meson/c3-peripherals.c=272=static C3_SYS_PCLK(sys_gpv_cve_nic,\tSYS_CLK_EN0_REG1, 25, 0);\ndrivers/clk/meson/c3-peripherals.c:273:static C3_SYS_PCLK(sys_mipi_dsi_host,\tSYS_CLK_EN0_REG1, 26, 0);\ndrivers/clk/meson/c3-peripherals.c:274:static C3_SYS_PCLK(sys_mipi_dsi_phy,\tSYS_CLK_EN0_REG1, 27, 0);\ndrivers/clk/meson/c3-peripherals.c-275-static C3_SYS_PCLK(sys_eth_phy,\t\tSYS_CLK_EN0_REG1, 28, 0);\n--\ndrivers/clk/meson/c3-peripherals.c=671=static struct clk_regmap c3_eth_rmii = {\n--\ndrivers/clk/meson/c3-peripherals.c-686-\ndrivers/clk/meson/c3-peripherals.c:687:static const struct clk_parent_data c3_mipi_dsi_meas_parents[] = {\ndrivers/clk/meson/c3-peripherals.c-688-\t{ .fw_name = \"oscin\" },\n--\ndrivers/clk/meson/c3-peripherals.c-697-\ndrivers/clk/meson/c3-peripherals.c:698:static C3_COMP_SEL(mipi_dsi_meas, VDIN_MEAS_CLK_CTRL, 21, 0x7, c3_mipi_dsi_meas_parents);\ndrivers/clk/meson/c3-peripherals.c:699:static C3_COMP_DIV(mipi_dsi_meas, VDIN_MEAS_CLK_CTRL, 12, 7);\ndrivers/clk/meson/c3-peripherals.c:700:static C3_COMP_GATE(mipi_dsi_meas, VDIN_MEAS_CLK_CTRL, 20);\ndrivers/clk/meson/c3-peripherals.c-701-\n--\ndrivers/clk/meson/c3-peripherals.c=895=static struct clk_hw *c3_peripherals_hw_clks[] = {\n--\ndrivers/clk/meson/c3-peripherals.c-953-\t[CLKID_SYS_GPV_CVE_NIC]\t\t= \u0026c3_sys_gpv_cve_nic.hw,\ndrivers/clk/meson/c3-peripherals.c:954:\t[CLKID_SYS_MIPI_DSI_HOST]\t= \u0026c3_sys_mipi_dsi_host.hw,\ndrivers/clk/meson/c3-peripherals.c:955:\t[CLKID_SYS_MIPI_DSI_PHY]\t= \u0026c3_sys_mipi_dsi_phy.hw,\ndrivers/clk/meson/c3-peripherals.c-956-\t[CLKID_SYS_ETH_PHY]\t\t= \u0026c3_sys_eth_phy.hw,\n--\ndrivers/clk/meson/c3-peripherals.c-1053-\t[CLKID_ETH_RMII]\t\t= \u0026c3_eth_rmii.hw,\ndrivers/clk/meson/c3-peripherals.c:1054:\t[CLKID_MIPI_DSI_MEAS_SEL]\t= \u0026c3_mipi_dsi_meas_sel.hw,\ndrivers/clk/meson/c3-peripherals.c:1055:\t[CLKID_MIPI_DSI_MEAS_DIV]\t= \u0026c3_mipi_dsi_meas_div.hw,\ndrivers/clk/meson/c3-peripherals.c:1056:\t[CLKID_MIPI_DSI_MEAS]\t\t= \u0026c3_mipi_dsi_meas.hw,\ndrivers/clk/meson/c3-peripherals.c-1057-\t[CLKID_DSI_PHY_SEL]\t\t= \u0026c3_dsi_phy_sel.hw,\n--\ndrivers/clk/meson/g12a.c=3808=static struct clk_regmap g12a_hdmi_tx = {\n--\ndrivers/clk/meson/g12a.c-3825-\ndrivers/clk/meson/g12a.c:3826:static const struct clk_hw *g12a_mipi_dsi_pxclk_parents[] = {\ndrivers/clk/meson/g12a.c-3827-\t\u0026g12a_vid_pll.hw,\n--\ndrivers/clk/meson/g12a.c-3836-\ndrivers/clk/meson/g12a.c:3837:static struct clk_regmap g12a_mipi_dsi_pxclk_sel = {\ndrivers/clk/meson/g12a.c-3838-\t.data = \u0026(struct clk_regmap_mux_data){\n--\ndrivers/clk/meson/g12a.c-3844-\t.hw.init = \u0026(struct clk_init_data){\ndrivers/clk/meson/g12a.c:3845:\t\t.name = \"mipi_dsi_pxclk_sel\",\ndrivers/clk/meson/g12a.c-3846-\t\t.ops = \u0026clk_regmap_mux_ops,\ndrivers/clk/meson/g12a.c:3847:\t\t.parent_hws = g12a_mipi_dsi_pxclk_parents,\ndrivers/clk/meson/g12a.c:3848:\t\t.num_parents = ARRAY_SIZE(g12a_mipi_dsi_pxclk_parents),\ndrivers/clk/meson/g12a.c-3849-\t\t.flags = CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,\n--\ndrivers/clk/meson/g12a.c-3857- */\ndrivers/clk/meson/g12a.c:3858:static const struct clk_div_table g12a_mipi_dsi_pxclk_div_table[] = {\ndrivers/clk/meson/g12a.c-3859-\t{ .val = 0, .div = 1 },\n--\ndrivers/clk/meson/g12a.c-3862-\ndrivers/clk/meson/g12a.c:3863:static struct clk_regmap g12a_mipi_dsi_pxclk_div = {\ndrivers/clk/meson/g12a.c-3864-\t.data = \u0026(struct clk_regmap_div_data){\n--\ndrivers/clk/meson/g12a.c-3867-\t\t.width = 7,\ndrivers/clk/meson/g12a.c:3868:\t\t.table = g12a_mipi_dsi_pxclk_div_table,\ndrivers/clk/meson/g12a.c-3869-\t},\ndrivers/clk/meson/g12a.c-3870-\t.hw.init = \u0026(struct clk_init_data){\ndrivers/clk/meson/g12a.c:3871:\t\t.name = \"mipi_dsi_pxclk_div\",\ndrivers/clk/meson/g12a.c-3872-\t\t.ops = \u0026clk_regmap_divider_ops,\ndrivers/clk/meson/g12a.c-3873-\t\t.parent_hws = (const struct clk_hw *[]) {\ndrivers/clk/meson/g12a.c:3874:\t\t\t\u0026g12a_mipi_dsi_pxclk_sel.hw\ndrivers/clk/meson/g12a.c-3875-\t\t},\n--\ndrivers/clk/meson/g12a.c-3880-\ndrivers/clk/meson/g12a.c:3881:static struct clk_regmap g12a_mipi_dsi_pxclk = {\ndrivers/clk/meson/g12a.c-3882-\t.data = \u0026(struct clk_regmap_gate_data){\n--\ndrivers/clk/meson/g12a.c-3886-\t.hw.init = \u0026(struct clk_init_data) {\ndrivers/clk/meson/g12a.c:3887:\t\t.name = \"mipi_dsi_pxclk\",\ndrivers/clk/meson/g12a.c-3888-\t\t.ops = \u0026clk_regmap_gate_ops,\ndrivers/clk/meson/g12a.c-3889-\t\t.parent_hws = (const struct clk_hw *[]) {\ndrivers/clk/meson/g12a.c:3890:\t\t\t\u0026g12a_mipi_dsi_pxclk_div.hw\ndrivers/clk/meson/g12a.c-3891-\t\t},\n--\ndrivers/clk/meson/g12a.c=4419=static G12A_PCLK(g12a_audio_locker,\t\tHHI_GCLK_MPEG0,\t 2, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/g12a.c:4420:static G12A_PCLK(g12a_mipi_dsi_host,\t\tHHI_GCLK_MPEG0,\t 3, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/g12a.c-4421-static G12A_PCLK(g12a_eth_phy,\t\t\tHHI_GCLK_MPEG0,\t 4, CLK_IGNORE_UNUSED);\n--\ndrivers/clk/meson/g12a.c=4432=static G12A_PCLK(g12a_hiu_reg,\t\t\tHHI_GCLK_MPEG0,\t19, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/g12a.c:4433:static G12A_PCLK(g12a_mipi_dsi_phy,\t\tHHI_GCLK_MPEG0,\t20, CLK_IGNORE_UNUSED);\ndrivers/clk/meson/g12a.c-4434-static G12A_PCLK(g12a_assist_misc,\t\tHHI_GCLK_MPEG0,\t23, CLK_IGNORE_UNUSED);\n--\ndrivers/clk/meson/g12a.c=4495=static struct clk_hw *g12a_hw_clks[] = {\n--\ndrivers/clk/meson/g12a.c-4514-\t[CLKID_AUDIO_LOCKER]\t\t= \u0026g12a_audio_locker.hw,\ndrivers/clk/meson/g12a.c:4515:\t[CLKID_MIPI_DSI_HOST]\t\t= \u0026g12a_mipi_dsi_host.hw,\ndrivers/clk/meson/g12a.c-4516-\t[CLKID_ETH_PHY]\t\t\t= \u0026g12a_eth_phy.hw,\n--\ndrivers/clk/meson/g12a.c-4527-\t[CLKID_HIU_IFACE]\t\t= \u0026g12a_hiu_reg.hw,\ndrivers/clk/meson/g12a.c:4528:\t[CLKID_MIPI_DSI_PHY]\t\t= \u0026g12a_mipi_dsi_phy.hw,\ndrivers/clk/meson/g12a.c-4529-\t[CLKID_ASSIST_MISC]\t\t= \u0026g12a_assist_misc.hw,\n--\ndrivers/clk/meson/g12a.c-4716-\t[CLKID_SPICC1_SCLK]\t\t= \u0026g12a_spicc1_sclk.hw,\ndrivers/clk/meson/g12a.c:4717:\t[CLKID_MIPI_DSI_PXCLK_SEL]\t= \u0026g12a_mipi_dsi_pxclk_sel.hw,\ndrivers/clk/meson/g12a.c:4718:\t[CLKID_MIPI_DSI_PXCLK_DIV]\t= \u0026g12a_mipi_dsi_pxclk_div.hw,\ndrivers/clk/meson/g12a.c:4719:\t[CLKID_MIPI_DSI_PXCLK]\t\t= \u0026g12a_mipi_dsi_pxclk.hw,\ndrivers/clk/meson/g12a.c-4720-};\n--\ndrivers/clk/meson/g12a.c=4722=static struct clk_hw *g12b_hw_clks[] = {\n--\ndrivers/clk/meson/g12a.c-4741-\t[CLKID_AUDIO_LOCKER]\t\t= \u0026g12a_audio_locker.hw,\ndrivers/clk/meson/g12a.c:4742:\t[CLKID_MIPI_DSI_HOST]\t\t= \u0026g12a_mipi_dsi_host.hw,\ndrivers/clk/meson/g12a.c-4743-\t[CLKID_ETH_PHY]\t\t\t= \u0026g12a_eth_phy.hw,\n--\ndrivers/clk/meson/g12a.c-4754-\t[CLKID_HIU_IFACE]\t\t= \u0026g12a_hiu_reg.hw,\ndrivers/clk/meson/g12a.c:4755:\t[CLKID_MIPI_DSI_PHY]\t\t= \u0026g12a_mipi_dsi_phy.hw,\ndrivers/clk/meson/g12a.c-4756-\t[CLKID_ASSIST_MISC]\t\t= \u0026g12a_assist_misc.hw,\n--\ndrivers/clk/meson/g12a.c-4978-\t[CLKID_NNA_CORE_CLK]\t\t= \u0026sm1_nna_core_clk.hw,\ndrivers/clk/meson/g12a.c:4979:\t[CLKID_MIPI_DSI_PXCLK_SEL]\t= \u0026g12a_mipi_dsi_pxclk_sel.hw,\ndrivers/clk/meson/g12a.c:4980:\t[CLKID_MIPI_DSI_PXCLK_DIV]\t= \u0026g12a_mipi_dsi_pxclk_div.hw,\ndrivers/clk/meson/g12a.c:4981:\t[CLKID_MIPI_DSI_PXCLK]\t\t= \u0026g12a_mipi_dsi_pxclk.hw,\ndrivers/clk/meson/g12a.c-4982-\t[CLKID_MIPI_ISP_SEL]\t\t= \u0026g12b_mipi_isp_sel.hw,\n--\ndrivers/clk/meson/g12a.c=4990=static struct clk_hw *sm1_hw_clks[] = {\n--\ndrivers/clk/meson/g12a.c-5009-\t[CLKID_AUDIO_LOCKER]\t\t= \u0026g12a_audio_locker.hw,\ndrivers/clk/meson/g12a.c:5010:\t[CLKID_MIPI_DSI_HOST]\t\t= \u0026g12a_mipi_dsi_host.hw,\ndrivers/clk/meson/g12a.c-5011-\t[CLKID_ETH_PHY]\t\t\t= \u0026g12a_eth_phy.hw,\n--\ndrivers/clk/meson/g12a.c-5022-\t[CLKID_HIU_IFACE]\t\t= \u0026g12a_hiu_reg.hw,\ndrivers/clk/meson/g12a.c:5023:\t[CLKID_MIPI_DSI_PHY]\t\t= \u0026g12a_mipi_dsi_phy.hw,\ndrivers/clk/meson/g12a.c-5024-\t[CLKID_ASSIST_MISC]\t\t= \u0026g12a_assist_misc.hw,\n--\ndrivers/clk/meson/g12a.c-5231-\t[CLKID_NNA_CORE_CLK]\t\t= \u0026sm1_nna_core_clk.hw,\ndrivers/clk/meson/g12a.c:5232:\t[CLKID_MIPI_DSI_PXCLK_SEL]\t= \u0026g12a_mipi_dsi_pxclk_sel.hw,\ndrivers/clk/meson/g12a.c:5233:\t[CLKID_MIPI_DSI_PXCLK_DIV]\t= \u0026g12a_mipi_dsi_pxclk_div.hw,\ndrivers/clk/meson/g12a.c:5234:\t[CLKID_MIPI_DSI_PXCLK]\t\t= \u0026g12a_mipi_dsi_pxclk.hw,\ndrivers/clk/meson/g12a.c-5235-};\n--\ndrivers/clk/meson/t7-peripherals.c=938=static T7_SYS_PCLK(sys_dos,\t\tSYS_CLK_EN0_REG0, 1,\t0);\ndrivers/clk/meson/t7-peripherals.c:939:static T7_SYS_PCLK(sys_mipi_dsi_a,\tSYS_CLK_EN0_REG0, 2,\t0);\ndrivers/clk/meson/t7-peripherals.c:940:static T7_SYS_PCLK(sys_mipi_dsi_b,\tSYS_CLK_EN0_REG0, 3,\t0);\ndrivers/clk/meson/t7-peripherals.c-941-static T7_SYS_PCLK(sys_ethphy,\t\tSYS_CLK_EN0_REG0, 4,\t0);\n--\ndrivers/clk/meson/t7-peripherals.c=1022=static struct clk_hw *t7_peripherals_hw_clks[] = {\n--\ndrivers/clk/meson/t7-peripherals.c-1165-\t[CLKID_SYS_DOS]\t\t\t= \u0026t7_sys_dos.hw,\ndrivers/clk/meson/t7-peripherals.c:1166:\t[CLKID_SYS_MIPI_DSI_A]\t\t= \u0026t7_sys_mipi_dsi_a.hw,\ndrivers/clk/meson/t7-peripherals.c:1167:\t[CLKID_SYS_MIPI_DSI_B]\t\t= \u0026t7_sys_mipi_dsi_b.hw,\ndrivers/clk/meson/t7-peripherals.c-1168-\t[CLKID_SYS_ETHPHY]\t\t= \u0026t7_sys_ethphy.hw,\n--\ndrivers/clk/rockchip/clk-px30.c=264=static struct rockchip_clk_branch px30_clk_branches[] __initdata = {\n--\ndrivers/clk/rockchip/clk-px30.c-825-\tGATE(0, \"pclk_vo_niu\", \"pclk_vo_pre\", 0, PX30_CLKGATE_CON(3), 2, GFLAGS),\ndrivers/clk/rockchip/clk-px30.c:826:\tGATE(PCLK_MIPI_DSI, \"pclk_mipi_dsi\", \"pclk_vo_pre\", 0, PX30_CLKGATE_CON(3), 9, GFLAGS),\ndrivers/clk/rockchip/clk-px30.c-827-\n--\ndrivers/clk/rockchip/clk-rk3288.c=282=static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {\n--\ndrivers/clk/rockchip/clk-rk3288.c-792-\tGATE(HCLK_VIO2_H2P, \"hclk_vio2_h2p\", \"hclk_vio\", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(16), 10, GFLAGS),\ndrivers/clk/rockchip/clk-rk3288.c:793:\tGATE(PCLK_MIPI_DSI0, \"pclk_mipi_dsi0\", \"hclk_vio\", 0, RK3288_CLKGATE_CON(16), 4, GFLAGS),\ndrivers/clk/rockchip/clk-rk3288.c:794:\tGATE(PCLK_MIPI_DSI1, \"pclk_mipi_dsi1\", \"hclk_vio\", 0, RK3288_CLKGATE_CON(16), 5, GFLAGS),\ndrivers/clk/rockchip/clk-rk3288.c-795-\tGATE(PCLK_MIPI_CSI, \"pclk_mipi_csi\", \"hclk_vio\", 0, RK3288_CLKGATE_CON(16), 6, GFLAGS),\n--\ndrivers/clk/rockchip/clk-rk3368.c=274=static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {\n--\ndrivers/clk/rockchip/clk-rk3368.c-755-\tGATE(PCLK_MIPI_CSI, \"pclk_mipi_csi\", \"hclk_vio\", 0, RK3368_CLKGATE_CON(17), 4, GFLAGS),\ndrivers/clk/rockchip/clk-rk3368.c:756:\tGATE(PCLK_MIPI_DSI0, \"pclk_mipi_dsi0\", \"hclk_vio\", 0, RK3368_CLKGATE_CON(17), 3, GFLAGS),\ndrivers/clk/rockchip/clk-rk3368.c-757-\n--\ndrivers/clk/rockchip/clk-rk3399.c=400=static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {\n--\ndrivers/clk/rockchip/clk-rk3399.c-1086-\ndrivers/clk/rockchip/clk-rk3399.c:1087:\tGATE(PCLK_MIPI_DSI0, \"pclk_mipi_dsi0\", \"pclk_vio\", 0,\ndrivers/clk/rockchip/clk-rk3399.c-1088-\t\t\tRK3399_CLKGATE_CON(29), 1, GFLAGS),\ndrivers/clk/rockchip/clk-rk3399.c:1089:\tGATE(PCLK_MIPI_DSI1, \"pclk_mipi_dsi1\", \"pclk_vio\", 0,\ndrivers/clk/rockchip/clk-rk3399.c-1090-\t\t\tRK3399_CLKGATE_CON(29), 2, GFLAGS),\n--\ndrivers/clk/rockchip/clk-rv1108.c=191=static struct rockchip_clk_branch rv1108_clk_branches[] __initdata = {\n--\ndrivers/clk/rockchip/clk-rv1108.c-471-\t\t\tRV1108_CLKGATE_CON(6), 9, GFLAGS),\ndrivers/clk/rockchip/clk-rv1108.c:472:\tGATE(PCLK_MIPI_DSI, \"pclk_mipi_dsi\", \"pclk_vio_pre\", 0,\ndrivers/clk/rockchip/clk-rv1108.c-473-\t\t\tRV1108_CLKGATE_CON(18), 8, GFLAGS),\n--\ndrivers/clk/rockchip/clk-rv1108.c-488-\t\t\tRV1108_CLKGATE_CON(14), 9, GFLAGS),\ndrivers/clk/rockchip/clk-rv1108.c:489:\tGATE(0, \"pclk_mipi_dsiphy\", \"pclk_top_pre\", CLK_IGNORE_UNUSED,\ndrivers/clk/rockchip/clk-rv1108.c-490-\t\t\tRV1108_CLKGATE_CON(14), 11, GFLAGS),\n--\ndrivers/clk/rockchip/clk-rv1126b.c=183=static struct rockchip_clk_branch rv1126b_clk_branches[] __initdata = {\n--\ndrivers/clk/rockchip/clk-rv1126b.c-701-\t\t\tRV1126B_VDOCLKGATE_CON(1), 10, GFLAGS),\ndrivers/clk/rockchip/clk-rv1126b.c:702:\tGATE(PCLK_MIPI_DSI, \"pclk_mipi_dsi\", \"pclk_vdo_root\", 0,\ndrivers/clk/rockchip/clk-rv1126b.c-703-\t\t\tRV1126B_VDOCLKGATE_CON(1), 12, GFLAGS),\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c=721=static SUNXI_CCU_GATE_HWS(bus_hdmi_clk, \"bus-hdmi\", psi_ahb_hws,\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-723-\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:724:static const struct clk_parent_data mipi_dsi_parents[] = {\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-725-\t{ .fw_name = \"hosc\" },\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-730-};\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:731:static SUNXI_CCU_M_DATA_WITH_MUX_GATE(mipi_dsi_clk, \"mipi-dsi\", mipi_dsi_parents, 0xb24,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-732-\t\t\t\t      0, 4,\t/* M */\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-736-\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:737:static SUNXI_CCU_GATE_HWS(bus_mipi_dsi_clk, \"bus-mipi-dsi\", psi_ahb_hws,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-738-\t\t\t  0xb4c, BIT(0), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c=947=static struct ccu_common *sun20i_d1_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-1050-\t\u0026bus_hdmi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:1051:\t\u0026mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:1052:\t\u0026bus_mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-1053-\t\u0026tcon_lcd0_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c=1088=static struct clk_hw_onecell_data sun20i_d1_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-1202-\t\t[CLK_BUS_HDMI]\t\t= \u0026bus_hdmi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:1203:\t\t[CLK_MIPI_DSI]\t\t= \u0026mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c:1204:\t\t[CLK_BUS_MIPI_DSI]\t= \u0026bus_mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun20i-d1.c-1205-\t\t[CLK_TCON_LCD0]\t\t= \u0026tcon_lcd0_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c=662=static SUNXI_CCU_GATE(bus_dpss_top1_clk, \"bus-dpss-top1\", \"ahb3\",\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-664-\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:665:static const char * const mipi_dsi_parents[] = { \"dcxo24M\", \"pll-periph0-2x\",\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-666-\t\t\t\t\t\t \"pll-periph0\" };\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:667:static SUNXI_CCU_M_WITH_MUX_GATE(mipi_dsi_clk, \"mipi-dsi\",\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:668:\t\t\t\t mipi_dsi_parents,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-669-\t\t\t\t 0xb24,\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-674-\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:675:static SUNXI_CCU_GATE(bus_mipi_dsi_clk, \"bus-mipi-dsi\", \"ahb3\",\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-676-\t\t      0xb4c, BIT(0), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c=807=static struct ccu_common *sun50i_a100_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-914-\t\u0026bus_dpss_top1_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:915:\t\u0026mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:916:\t\u0026bus_mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-917-\t\u0026tcon_lcd_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c=928=static struct clk_hw_onecell_data sun50i_a100_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-1048-\t\t[CLK_BUS_DPSS_TOP1]\t= \u0026bus_dpss_top1_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:1049:\t\t[CLK_MIPI_DSI]\t\t= \u0026mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c:1050:\t\t[CLK_BUS_MIPI_DSI]\t= \u0026bus_mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun50i-a100.c-1051-\t\t[CLK_TCON_LCD]\t\t= \u0026tcon_lcd_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c=280=static struct ccu_mux ahb2_clk = {\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c-297-\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c:298:static SUNXI_CCU_GATE(bus_mipi_dsi_clk,\t\"bus-mipi-dsi\",\t\"ahb1\",\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c-299-\t\t      0x060, BIT(1), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c=636=static struct ccu_common *sun50i_a64_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c-655-\t\u0026ahb2_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c:656:\t\u0026bus_mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c-657-\t\u0026bus_ce_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c=743=static struct clk_hw_onecell_data sun50i_a64_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c-771-\t\t[CLK_AHB2]\t\t= \u0026ahb2_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c:772:\t\t[CLK_BUS_MIPI_DSI]\t= \u0026bus_mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun50i-a64.c-773-\t\t[CLK_BUS_CE]\t\t= \u0026bus_ce_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c=915=static SUNXI_CCU_GATE_HWS(bus_hdmi_clk, \"bus-hdmi\", ahb_hws, 0xb1c, BIT(0), 0);\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-916-\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:917:static const struct clk_parent_data mipi_dsi_parents[] = {\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-918-\t{ .fw_name = \"hosc\" },\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-921-};\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:922:static SUNXI_CCU_M_DATA_WITH_MUX_GATE(mipi_dsi0_clk, \"mipi-dsi0\",\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:923:\t\t\t\t      mipi_dsi_parents, 0xb24,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-924-\t\t\t\t      0, 5,\t/* M */\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-928-\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:929:static SUNXI_CCU_M_DATA_WITH_MUX_GATE(mipi_dsi1_clk, \"mipi-dsi1\",\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:930:\t\t\t\t      mipi_dsi_parents, 0xb28,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-931-\t\t\t\t      0, 5,\t/* M */\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-935-\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:936:static SUNXI_CCU_GATE_HWS(bus_mipi_dsi0_clk, \"bus-mipi-dsi0\", ahb_hws, 0xb4c,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-937-\t\t\t  BIT(0), 0);\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-938-\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:939:static SUNXI_CCU_GATE_HWS(bus_mipi_dsi1_clk, \"bus-mipi-dsi1\", ahb_hws, 0xb4c,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-940-\t\t\t  BIT(1), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c=1194=static struct ccu_common *sun55i_a523_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-1319-\t\u0026bus_hdmi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1320:\t\u0026mipi_dsi0_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1321:\t\u0026mipi_dsi1_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1322:\t\u0026bus_mipi_dsi0_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1323:\t\u0026bus_mipi_dsi1_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-1324-\t\u0026tcon_lcd0_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c=1359=static struct clk_hw_onecell_data sun55i_a523_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-1502-\t\t[CLK_BUS_HDMI]\t\t= \u0026bus_hdmi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1503:\t\t[CLK_MIPI_DSI0]\t\t= \u0026mipi_dsi0_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1504:\t\t[CLK_MIPI_DSI1]\t\t= \u0026mipi_dsi1_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1505:\t\t[CLK_BUS_MIPI_DSI0]\t= \u0026bus_mipi_dsi0_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c:1506:\t\t[CLK_BUS_MIPI_DSI1]\t= \u0026bus_mipi_dsi1_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun55i-a523.c-1507-\t\t[CLK_TCON_LCD0]\t\t= \u0026tcon_lcd0_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c=630=static SUNXI_CCU_MP_WITH_MUX_GATE(mbus1_clk, \"mbus1\", mbus_parents, 0x160,\n--\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-636-\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c:637:static SUNXI_CCU_M_WITH_MUX_GATE(mipi_dsi_clk, \"mipi-dsi\", lcd_ch1_parents,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-638-\t\t\t\t 0x168, 16, 3, 24, 2, BIT(31),\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-639-\t\t\t\t CLK_SET_RATE_PARENT);\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c:640:static SUNXI_CCU_M_WITH_MUX_GATE(mipi_dsi_dphy_clk, \"mipi-dsi-dphy\",\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-641-\t\t\t\t lcd_ch1_parents, 0x168, 0, 3, 8, 2,\n--\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c=806=static struct ccu_common *sun6i_a31_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-941-\t\u0026mbus1_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c:942:\t\u0026mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c:943:\t\u0026mipi_dsi_dphy_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-944-\t\u0026mipi_csi_dphy_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c=986=static struct clk_hw_onecell_data sun6i_a31_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-1129-\t\t[CLK_MBUS1]\t\t= \u0026mbus1_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c:1130:\t\t[CLK_MIPI_DSI]\t\t= \u0026mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c:1131:\t\t[CLK_MIPI_DSI_DPHY]\t= \u0026mipi_dsi_dphy_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun6i-a31.c-1132-\t\t[CLK_MIPI_CSI_DPHY]\t= \u0026mipi_csi_dphy_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c=214=static SUNXI_CCU_MP_WITH_MUX(apb2_clk, \"apb2\", apb2_parents, 0x058,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c-219-\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c:220:static SUNXI_CCU_GATE(bus_mipi_dsi_clk,\t\"bus-mipi-dsi\",\t\"ahb1\",\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c-221-\t\t      0x060, BIT(1), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c=456=static struct ccu_common *sun8i_a23_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c-471-\t\u0026apb2_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c:472:\t\u0026bus_mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c-473-\t\u0026bus_dma_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c=571=static struct clk_hw_onecell_data sun8i_a23_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c-593-\t\t[CLK_APB2]\t\t= \u0026apb2_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c:594:\t\t[CLK_BUS_MIPI_DSI]\t= \u0026bus_mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a23.c-595-\t\t[CLK_BUS_DMA]\t\t= \u0026bus_dma_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c=224=static SUNXI_CCU_MP_WITH_MUX(apb2_clk, \"apb2\", apb2_parents, 0x058,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c-229-\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c:230:static SUNXI_CCU_GATE(bus_mipi_dsi_clk,\t\"bus-mipi-dsi\",\t\"ahb1\",\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c-231-\t\t      0x060, BIT(1), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c=486=static struct ccu_common *sun8i_a33_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c-503-\t\u0026apb2_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c:504:\t\u0026bus_mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c-505-\t\u0026bus_ss_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c=608=static struct clk_hw_onecell_data sun8i_a33_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c-632-\t\t[CLK_APB2]\t\t= \u0026apb2_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c:633:\t\t[CLK_BUS_MIPI_DSI]\t= \u0026bus_mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a33.c-634-\t\t[CLK_BUS_SS]\t\t= \u0026bus_ss_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c=279=static struct ccu_mux ahb2_clk = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-294-\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:295:static SUNXI_CCU_GATE(bus_mipi_dsi_clk,\t\"bus-mipi-dsi\",\t\"ahb1\",\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-296-\t\t      0x060, BIT(1), 0);\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c=547=static SUNXI_CCU_M_WITH_MUX_GATE(mbus_clk, \"mbus\", mbus_parents,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-553-\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:554:static const char * const mipi_dsi0_parents[] = { \"pll-video0\" };\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:555:static const u8 mipi_dsi0_table[] = { 8 };\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:556:static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(mipi_dsi0_clk, \"mipi-dsi0\",\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:557:\t\t\t\t       mipi_dsi0_parents, mipi_dsi0_table,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-558-\t\t\t\t       0x168,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-563-\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:564:static const char * const mipi_dsi1_parents[] = { \"osc24M\", \"pll-video0\" };\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:565:static const u8 mipi_dsi1_table[] = { 0, 9 };\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:566:static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(mipi_dsi1_clk, \"mipi-dsi1\",\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:567:\t\t\t\t       mipi_dsi1_parents, mipi_dsi1_table,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-568-\t\t\t\t       0x16c,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c=589=static struct ccu_common *sun8i_a83t_ccu_clks[] = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-608-\t\u0026apb2_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:609:\t\u0026bus_mipi_dsi_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-610-\t\u0026bus_ss_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-685-\t\u0026mbus_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:686:\t\u0026mipi_dsi0_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:687:\t\u0026mipi_dsi1_clk.common,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-688-\t\u0026gpu_core_clk.common,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c=693=static struct clk_hw_onecell_data sun8i_a83t_hw_clks = {\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-713-\t\t[CLK_APB2]\t\t= \u0026apb2_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:714:\t\t[CLK_BUS_MIPI_DSI]\t= \u0026bus_mipi_dsi_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-715-\t\t[CLK_BUS_SS]\t\t= \u0026bus_ss_clk.common.hw,\n--\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-790-\t\t[CLK_MBUS]\t\t= \u0026mbus_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:791:\t\t[CLK_MIPI_DSI0]\t\t= \u0026mipi_dsi0_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c:792:\t\t[CLK_MIPI_DSI1]\t\t= \u0026mipi_dsi1_clk.common.hw,\ndrivers/clk/sunxi-ng/ccu-sun8i-a83t.c-793-\t\t[CLK_GPU_CORE]\t\t= \u0026gpu_core_clk.common.hw,\n\n"
}

gemini-3.8-flash

null

null

							input: 25671
							output: 49
							thoughts: 69
						

Here's my summary, as if I were thinking it:

**Digging into the NT35950 Panel Driver**

Okay, so I'm looking at `panel-novatek-nt35950.c` right now. My initial thought is that `nt35950_probe` is the function we want; it's defined within this file. And of course, it must be registered with the MIPI DSI subsystem. Right, I see it's registered through `mipi_dsi_driver_register`. Makes perfect sense. Now, let's just make sure I'm not missing anything obvious. Time to quickly scan to the very bottom of this file and make sure I've got the whole picture of the driver registration, and any supporting structures.

{
  "File": "drivers/gpu/drm/panel/panel-novatek-nt35950.c",
  "FirstLine": 565,
  "LineCount": 40
}

{
  "Contents": " 565:\t\t\t\t.hsync_start = 1080 + 400,\n 566:\t\t\t\t.hsync_end = 1080 + 400 + 40,\n 567:\t\t\t\t.htotal = 1080 + 400 + 40 + 300,\n 568:\t\t\t\t.vdisplay = 1920,\n 569:\t\t\t\t.vsync_start = 1920 + 12,\n 570:\t\t\t\t.vsync_end = 1920 + 12 + 2,\n 571:\t\t\t\t.vtotal = 1920 + 12 + 2 + 10,\n 572:\t\t\t\t.width_mm = 68,\n 573:\t\t\t\t.height_mm = 121,\n 574:\t\t\t},\n 575:\t\t\t.compression = MCS_DATA_COMPRESSION_NONE,\n 576:\t\t\t.enable_sram = true,\n 577:\t\t\t.is_video_mode = false,\n 578:\t\t\t.scaler_on = 1,\n 579:\t\t\t.scaler_mode = MCS_SCALEUP_DUPLICATE,\n 580:\t\t},\n 581:\t\t/* TODO: Add 2160x3840 60Hz when DSC is supported */\n 582:\t};\n 583:\t\n 584:\tstatic const struct nt35950_panel_desc sharp_ls055d1sx04 = {\n 585:\t\t.model_name = \"Sharp LS055D1SX04\",\n 586:\t\t.dsi_info = {\n 587:\t\t\t.type = \"LS055D1SX04\",\n 588:\t\t\t.channel = 0,\n 589:\t\t\t.node = NULL,\n 590:\t\t},\n 591:\t\t.mode_data = sharp_ls055d1sx04_modes,\n 592:\t\t.num_modes = ARRAY_SIZE(sharp_ls055d1sx04_modes),\n 593:\t\t.is_dual_dsi = true,\n 594:\t\t.num_lanes = 4,\n 595:\t};\n 596:\t\n 597:\tstatic const struct of_device_id nt35950_of_match[] = {\n 598:\t\t{ .compatible = \"sharp,ls055d1sx04\", .data = \u0026sharp_ls055d1sx04 },\n 599:\t\t{  }\n 600:\t};\n 601:\tMODULE_DEVICE_TABLE(of, nt35950_of_match);\n 602:\t\n 603:\tstatic struct mipi_dsi_driver nt35950_driver = {\n 604:\t\t.probe = nt35950_probe,\n"
}

gemini-3.8-flash

null

null

							input: 26724
							output: 34
							thoughts: 441
						

**My Assessment of `nt35950_probe` for Fuzzing**

Okay, so `nt35950_probe` is the probe function for the `mipi_dsi_driver`. It's triggered by a match with the `sharp,ls055d1sx04` OF match table. My immediate thought is, "can this even *be* fuzzed?" Let's see what the guidelines say. Section 2's emphasis on reachability jumps out at me: fuzzing only finds bugs in code that *executes* in standard virtualized environments. If the code is unreachable, forget about it. That's the primary hurdle.

The guidelines are explicit about negative criteria: *when* to return `WorthFuzzing=false`. I have to look closely. Specifically, structurally unreachable hardware is a big red flag – things like vendor-specific PCIe switches or GPU drivers that need actual hardware I can't emulate in QEMU. Also, unreachable execution paths, like driver teardown callbacks that only trigger under very specific circumstances such as hot-unplug.

Now the question is, *can* I actually reach `nt35950_probe` in QEMU? MIPI DSI is fundamentally an ARM/mobile display bus, right? My gut tells me this is going to be a problem. This is where experience kicks in. I need to figure out if there is *any* emulated MIPI DSI host in QEMU or even some sort of virtual bus that supports MIPI DSI. Is there *any* scenario where an x86/amd64 system could *ever* have a MIPI DSI host or virtual equivalent? If there isn't, there is no way to reach this function, and there is no point in fuzzing.

{
  "Expression": "mipi_dsi_host_register",
  "PathPrefix": "drivers/gpu/drm"
}

{
  "Output": "drivers/gpu/drm/adp/adp-mipi.c=232=static int adp_mipi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/adp/adp-mipi.c-251-\tdev_set_drvdata(\u0026pdev-\u003edev, adp);\ndrivers/gpu/drm/adp/adp-mipi.c:252:\treturn mipi_dsi_host_register(\u0026adp-\u003edsi);\ndrivers/gpu/drm/adp/adp-mipi.c-253-}\n--\ndrivers/gpu/drm/bridge/cadence/cdns-dsi-core.c=1257=static int cdns_dsi_drm_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/bridge/cadence/cdns-dsi-core.c-1353-\ndrivers/gpu/drm/bridge/cadence/cdns-dsi-core.c:1354:\tret = mipi_dsi_host_register(\u0026dsi-\u003ebase);\ndrivers/gpu/drm/bridge/cadence/cdns-dsi-core.c-1355-\tif (ret)\n--\ndrivers/gpu/drm/bridge/nwl-dsi.c=1145=static int nwl_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/bridge/nwl-dsi.c-1172-\tdsi-\u003edsi_host.dev = dev;\ndrivers/gpu/drm/bridge/nwl-dsi.c:1173:\tret = mipi_dsi_host_register(\u0026dsi-\u003edsi_host);\ndrivers/gpu/drm/bridge/nwl-dsi.c-1174-\tif (ret) {\n--\ndrivers/gpu/drm/bridge/samsung-dsim.c=2111=static int generic_dsim_register_host(struct samsung_dsim *dsi)\ndrivers/gpu/drm/bridge/samsung-dsim.c-2112-{\ndrivers/gpu/drm/bridge/samsung-dsim.c:2113:\treturn mipi_dsi_host_register(\u0026dsi-\u003edsi_host);\ndrivers/gpu/drm/bridge/samsung-dsim.c-2114-}\n--\ndrivers/gpu/drm/bridge/ssd2825.c=694=static int ssd2825_probe(struct spi_device *spi)\n--\ndrivers/gpu/drm/bridge/ssd2825.c-746-\ndrivers/gpu/drm/bridge/ssd2825.c:747:\treturn mipi_dsi_host_register(\u0026priv-\u003edsi_host);\ndrivers/gpu/drm/bridge/ssd2825.c-748-}\n--\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c=1194=__dw_mipi_dsi_probe(struct platform_device *pdev,\n--\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c-1264-\tdsi-\u003edsi_host.dev = dev;\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c:1265:\tret = mipi_dsi_host_register(\u0026dsi-\u003edsi_host);\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c-1266-\tif (ret) {\n--\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c=913=__dw_mipi_dsi2_probe(struct platform_device *pdev,\n--\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c-980-\tdsi2-\u003edsi_host.dev = dev;\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c:981:\tret = mipi_dsi_host_register(\u0026dsi2-\u003edsi_host);\ndrivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c-982-\tif (ret) {\n--\ndrivers/gpu/drm/bridge/tc358768.c=1393=static int tc358768_i2c_probe(struct i2c_client *client)\n--\ndrivers/gpu/drm/bridge/tc358768.c-1442-\ndrivers/gpu/drm/bridge/tc358768.c:1443:\treturn mipi_dsi_host_register(\u0026priv-\u003edsi_host);\ndrivers/gpu/drm/bridge/tc358768.c-1444-}\n--\ndrivers/gpu/drm/drm_bridge.c-124- *   \u0026mipi_dsi_host_ops.attach and \u0026mipi_dsi_host_ops.detach operations.\ndrivers/gpu/drm/drm_bridge.c:125: *   Therefore, it must run mipi_dsi_host_register() in its probe\ndrivers/gpu/drm/drm_bridge.c-126- *   function, and then run drm_bridge_attach() in its\n--\ndrivers/gpu/drm/drm_bridge.c-131- *   controlled. This is the same situation than above, and can run\ndrivers/gpu/drm/drm_bridge.c:132: *   mipi_dsi_host_register() in either its probe or bind hooks.\ndrivers/gpu/drm/drm_bridge.c-133- *\n--\ndrivers/gpu/drm/drm_bridge.c-143- *\ndrivers/gpu/drm/drm_bridge.c:144: * - The MIPI-DSI host driver must run mipi_dsi_host_register() in its\ndrivers/gpu/drm/drm_bridge.c-145- *   probe hook. It will make sure that the MIPI-DSI host sticks around,\n--\ndrivers/gpu/drm/drm_mipi_dsi.c=329=EXPORT_SYMBOL(of_find_mipi_dsi_host_by_node);\ndrivers/gpu/drm/drm_mipi_dsi.c-330-\ndrivers/gpu/drm/drm_mipi_dsi.c:331:int mipi_dsi_host_register(struct mipi_dsi_host *host)\ndrivers/gpu/drm/drm_mipi_dsi.c-332-{\n--\ndrivers/gpu/drm/drm_mipi_dsi.c-347-}\ndrivers/gpu/drm/drm_mipi_dsi.c:348:EXPORT_SYMBOL(mipi_dsi_host_register);\ndrivers/gpu/drm/drm_mipi_dsi.c-349-\n--\ndrivers/gpu/drm/exynos/exynos_drm_dsi.c=78=static int exynos_dsi_bind(struct device *dev, struct device *master, void *data)\n--\ndrivers/gpu/drm/exynos/exynos_drm_dsi.c-94-\ndrivers/gpu/drm/exynos/exynos_drm_dsi.c:95:\treturn mipi_dsi_host_register(\u0026dsim-\u003edsi_host);\ndrivers/gpu/drm/exynos/exynos_drm_dsi.c-96-}\n--\ndrivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c=766=static int dsi_host_init(struct device *dev, struct dw_dsi *dsi)\n--\ndrivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c-772-\thost-\u003eops = \u0026dsi_host_ops;\ndrivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c:773:\tret = mipi_dsi_host_register(host);\ndrivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c-774-\tif (ret) {\n--\ndrivers/gpu/drm/i915/display/intel_dsi.c=82=struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,\n--\ndrivers/gpu/drm/i915/display/intel_dsi.c-97-\t/*\ndrivers/gpu/drm/i915/display/intel_dsi.c:98:\t * We should call mipi_dsi_host_register(\u0026host-\u003ebase) here, but we don't\ndrivers/gpu/drm/i915/display/intel_dsi.c-99-\t * have a host-\u003edev, and we don't have OF stuff either. So just use the\n--\ndrivers/gpu/drm/kmb/kmb_dsi.c=217=int kmb_dsi_host_bridge_init(struct device *dev)\n--\ndrivers/gpu/drm/kmb/kmb_dsi.c-237-\t\tdsi_host-\u003edev = dev;\ndrivers/gpu/drm/kmb/kmb_dsi.c:238:\t\tmipi_dsi_host_register(dsi_host);\ndrivers/gpu/drm/kmb/kmb_dsi.c-239-\t}\n--\ndrivers/gpu/drm/mcde/mcde_dsi.c=1177=static int mcde_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/mcde/mcde_dsi.c-1208-\thost-\u003eops = \u0026mcde_dsi_host_ops;\ndrivers/gpu/drm/mcde/mcde_dsi.c:1209:\tret = mipi_dsi_host_register(host);\ndrivers/gpu/drm/mcde/mcde_dsi.c-1210-\tif (ret \u003c 0) {\n--\ndrivers/gpu/drm/mediatek/mtk_dsi.c=1206=static int mtk_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/mediatek/mtk_dsi.c-1253-\ndrivers/gpu/drm/mediatek/mtk_dsi.c:1254:\tret = mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/mediatek/mtk_dsi.c-1255-\tif (ret \u003c 0)\n--\ndrivers/gpu/drm/msm/dsi/dsi_host.c=2130=int msm_dsi_host_register(struct mipi_dsi_host *host)\n--\ndrivers/gpu/drm/msm/dsi/dsi_host.c-2138-\t\thost-\u003eops = \u0026dsi_host_ops;\ndrivers/gpu/drm/msm/dsi/dsi_host.c:2139:\t\tret = mipi_dsi_host_register(host);\ndrivers/gpu/drm/msm/dsi/dsi_host.c-2140-\t\tif (ret)\n--\ndrivers/gpu/drm/omapdrm/dss/dsi.c=4886=static int dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/omapdrm/dss/dsi.c-5021-\ndrivers/gpu/drm/omapdrm/dss/dsi.c:5022:\tr = mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/omapdrm/dss/dsi.c-5023-\tif (r \u003c 0) {\n--\ndrivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c=1264=static int rcar_mipi_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c-1300-\tdsi-\u003ehost.ops = \u0026rcar_mipi_dsi_host_ops;\ndrivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c:1301:\tret = mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c-1302-\tif (ret \u003c 0)\n--\ndrivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c=1397=static int rzg2l_mipi_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c-1480-\tdsi-\u003ehost.ops = \u0026rzg2l_mipi_dsi_host_ops;\ndrivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c:1481:\tret = mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c-1482-\tif (ret \u003c 0)\n--\ndrivers/gpu/drm/sprd/sprd_dsi.c=1030=static int sprd_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/sprd/sprd_dsi.c-1043-\ndrivers/gpu/drm/sprd/sprd_dsi.c:1044:\treturn mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/sprd/sprd_dsi.c-1045-}\n--\ndrivers/gpu/drm/sun4i/sun6i_mipi_dsi.c=1110=static int sun6i_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/sun4i/sun6i_mipi_dsi.c-1185-\ndrivers/gpu/drm/sun4i/sun6i_mipi_dsi.c:1186:\tret = mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/sun4i/sun6i_mipi_dsi.c-1187-\tif (ret) {\n--\ndrivers/gpu/drm/tegra/dsi.c=1600=static int tegra_dsi_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/tegra/dsi.c-1694-\ndrivers/gpu/drm/tegra/dsi.c:1695:\terr = mipi_dsi_host_register(\u0026dsi-\u003ehost);\ndrivers/gpu/drm/tegra/dsi.c-1696-\tif (err \u003c 0) {\n--\ndrivers/gpu/drm/vc4/vc4_dsi.c=1789=static int vc4_dsi_dev_probe(struct platform_device *pdev)\n--\ndrivers/gpu/drm/vc4/vc4_dsi.c-1805-\tdsi-\u003edsi_host.dev = dev;\ndrivers/gpu/drm/vc4/vc4_dsi.c:1806:\tmipi_dsi_host_register(\u0026dsi-\u003edsi_host);\ndrivers/gpu/drm/vc4/vc4_dsi.c-1807-\n"
}

gemini-3.8-flash

null

null

							input: 31498
							output: 130
							thoughts: 861
						

**Analysis of the Target Code's Reachability**

Okay, so I've examined this code modification in `nt35950_probe` within the `panel-novatek-nt35950.c` driver, and it's pretty clear to me that this is a dead end for fuzzing in a standard environment. All the host drivers listed, things like `adp`, `imx/cadence`, and so on, are all SoC platform devices. None of those are going to show up in a standard x86 or amd64 virtual machine, like QEMU or Google Compute Engine.

The fact that `CONFIG_DRM_PANEL_NOVATEK_NT35950` depends on `OF` is another red flag. In x86 kernels, `CONFIG_OF` is either disabled, or if it *is* enabled, there won't be a device tree node for `"sharp,ls055d1sx04"`. This `nt35950_probe` is specifically for that panel, the Sharp LS055D1SX04, used in Sony Xperia Z5 Premium and XZ Premium phones. That's *physical mobile hardware*, a specific display panel hooked up to a MIPI DSI bus on a Novatek NT35950 display controller, running on a Qualcomm Snapdragon SoC.

I've just confirmed my initial assessment by re-reading Section 2 of the triage instructions. Specifically, the "Structurally unreachable hardware" and "Unreachable execution paths" criteria. This definitely falls into "structurally unreachable hardware". This is a MIPI DSI panel driver, an ARM-based phone display that relies on Device Tree (OF) to be configured. The target execution path is unreachable within QEMU or GCE.

Let me make sure I've got my ducks in a row. I'm seeing the following configs involved: `CONFIG_DRM_PANEL_NOVATEK_NT35950`, `CONFIG_OF`, `CONFIG_DRM_MIPI_DSI`, and `CONFIG_BACKLIGHT_CLASS_DEVICE`. And I've double-checked; the `nt35950_driver` is only registered using `module_mipi_dsi_driver`.

So, the verdict is clear. The code modification is in `nt35950_probe` of a MIPI DSI panel driver specifically designed for mobile phone display hardware (Sharp LS055D1SX04 on Sony Xperia Z5/XZ Premium). It's going to need specialized physical hardware and Device Tree (OF), which makes it structurally unreachable in standard amd64 QEMU/GCE virtualized environments. Therefore, I need to set the `WorthFuzzing` flag to `false`. My `FocusSymbols` and `EnableConfigs` will be empty. I need to note this reasoning. Time to call `set-results`.

{
  "EnableConfigs": [],
  "FocusSymbols": [],
  "Reasoning": "The changes affect the probe error path in drivers/gpu/drm/panel/panel-novatek-nt35950.c, which is a MIPI DSI panel driver for specific display hardware (Sharp LS055D1SX04 panel used in Sony Xperia mobile phones). This requires specialized physical hardware and Device Tree descriptions not present or emulated in standard amd64 virtualized environments (QEMU/GCE), making the modified code structurally unreachable.",
  "WorthFuzzing": false
}

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The changes affect the probe error path in drivers/gpu/drm/panel/panel-novatek-nt35950.c, which is a MIPI DSI panel driver for specific display hardware (Sharp LS055D1SX04 panel used in Sony Xperia mobile phones). This requires specialized physical hardware and Device Tree descriptions not present or emulated in standard amd64 virtualized environments (QEMU/GCE), making the modified code structurally unreachable.",
  "WorthFuzzing": false
}

{
  "WorthFuzzing": false
}

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