AI Trajectory

null

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "KMSANReasoning": "",
  "NeedsKMSAN": false,
  "Reasoning": "The patch modifies the chip reset logic (rtl8365mb_reset_chip) in the Realtek RTL8365MB Ethernet switch driver. This driver targets physical Realtek switch ASICs connected over MDIO or SMI buses, which are not emulated in standard virtualized environments (QEMU/KVM on amd64) used by syzkaller. As such, the modified code is structurally unreachable for fuzzing.",
  "WorthFuzzing": false
}

null

{
  "PatchDiff": "commit b2fd673781f8bd7cd0ebfac5c9a299d1a7f2dc66\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate:   Tue Sep 8 00:36:23 2026 +0000\n\n    syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/dsa/realtek/rtl8365mb_main.c b/drivers/net/dsa/realtek/rtl8365mb_main.c\nindex 728231d8f94ca..508e1bea8fc5c 100644\n--- a/drivers/net/dsa/realtek/rtl8365mb_main.c\n+++ b/drivers/net/dsa/realtek/rtl8365mb_main.c\n@@ -136,6 +136,9 @@\n #define RTL8365MB_CHIP_RESET_SW_MASK\t0x0002\n #define RTL8365MB_CHIP_RESET_HW_MASK\t0x0001\n \n+/* Time the chip needs to complete a reset, per Realtek documentation */\n+#define RTL8365MB_CHIP_RESET_TIME_MS\t1000\n+\n /* Interrupt polarity register */\n #define RTL8365MB_INTR_POLARITY_REG\t0x1100\n #define   RTL8365MB_INTR_POLARITY_MASK\t0x0001\n@@ -2980,18 +2983,38 @@ static int rtl8365mb_switch_init(struct realtek_priv *priv)\n \n static int rtl8365mb_reset_chip(struct realtek_priv *priv)\n {\n+\tunsigned long deadline;\n+\tunsigned long remaining;\n \tu32 val;\n+\tint ret;\n \n \tpriv-\u003ewrite_reg_noack(priv, RTL8365MB_CHIP_RESET_REG,\n \t\t\t      FIELD_PREP(RTL8365MB_CHIP_RESET_HW_MASK, 1));\n \n+\tdeadline = jiffies + msecs_to_jiffies(RTL8365MB_CHIP_RESET_TIME_MS);\n+\n \t/* Realtek documentation says the chip needs 1 second to reset. Sleep\n \t * for 100 ms before accessing any registers to prevent ACK timeouts.\n \t */\n \tmsleep(100);\n-\treturn regmap_read_poll_timeout(priv-\u003emap, RTL8365MB_CHIP_RESET_REG, val,\n-\t\t\t\t\t!(val \u0026 RTL8365MB_CHIP_RESET_HW_MASK),\n-\t\t\t\t\t20000, 1e6);\n+\tret = regmap_read_poll_timeout(priv-\u003emap, RTL8365MB_CHIP_RESET_REG, val,\n+\t\t\t\t       !(val \u0026 RTL8365MB_CHIP_RESET_HW_MASK),\n+\t\t\t\t       20000, 1e6);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\t/* The bit clearing only means the reset was accepted, not that the\n+\t * chip is ready: register writes issued before the documented reset\n+\t * time has elapsed are silently dropped by blocks that are still\n+\t * coming up, which leaves the switch half configured. Wait out\n+\t * whatever is left of that second, measured from the reset write, so\n+\t * the poll above does not add to the total.\n+\t */\n+\tremaining = deadline - jiffies;\n+\tif ((long)remaining \u003e 0)\n+\t\tmsleep(jiffies_to_msecs(remaining));\n+\n+\treturn 0;\n }\n \n static int rtl8365mb_setup(struct dsa_switch *ds)\n"
}

core

null

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The patch modifies the chip reset logic (rtl8365mb_reset_chip) in the Realtek RTL8365MB Ethernet switch driver. This driver targets physical Realtek switch ASICs connected over MDIO or SMI buses, which are not emulated in standard virtualized environments (QEMU/KVM on amd64) used by syzkaller. As such, the modified code is structurally unreachable for fuzzing.",
  "WorthFuzzing": false
}

You are an expert Linux kernel maintainer and security engineer.
Your job is to review a provided patch series and evaluate whether it warrants fuzzing with syzkaller.

IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in
your workspace. Do NOT rely on internal assumptions. You must actively use your code access
tools to inspect the actual source code, callers, and surrounding context.

================================================================================
1. CORE TRIAGE PHILOSOPHY
================================================================================
The goal of patch fuzzing is to discover crashes, regressions, exposed latent bugs,
and newly triggered assertions introduced by the patch series.

- REACHABILITY IS THE PRIMARY GATE:
  Fuzzing can only discover bugs in code that can actually execute in standard virtualized
  environments (GCE or QEMU, utilizing software-emulated devices like USB gadgets, netdev, tun/tap).
  If the modified code is structurally unreachable (see Section 2), it MUST NOT be fuzzed,
  regardless of whether it adds assertions or complex logic.

- DO NOT BLINDLY TRUST "NO FUNCTIONAL CHANGE" (NFCI) OR "REFACTORING" CLAIMS:
  Patch authors routinely label changes as "cleanups", "refactorings", or state
  "No functional change intended". Do NOT take these claims at face value.
  Code refactorings that rearrange logic, introduce helper functions, or alter state management
  in core subsystems frequently introduce subtle semantic shifts or uncover latent kernel bugs.
  If reachable executable code is modified or refactored, it MUST be fuzzed.

- NEW OR MODIFIED ASSERTIONS IN REACHABLE CODE MUST BE FUZZED:
  When a patch introduces or modifies runtime checks or assertions (e.g., WARN_ON*, VM_WARN_ON*,
  BUG_ON*, lockdep_assert*) in reachable code paths, it enforces new or stricter invariants.
  Even if the author believes the invariant always holds, fuzzing is essential to verify whether
  an unusual sequence of operations can violate it.

================================================================================
2. WHEN TO RETURN WorthFuzzing=false (NEGATIVE CRITERIA)
================================================================================
Return WorthFuzzing=false ONLY IF all modified code falls strictly into one or more of these categories:

- Non-kernel and non-executable changes:
  * Modifications to Documentation/, comments, or spelling fixes.
  * User-space directories, self-tests, samples, or scripts (e.g., tools/, samples/, scripts/, usr/)
    that do not affect the compiled kernel image (vmlinux) or kernel modules.
  * Purely decorative logging (e.g., message strings in pr_err, printk, dev_info) or tracepoints
    that do not alter control flow or data structures.
  * Build system or Kconfig changes that do not alter compiled C logic.
- Structurally unreachable hardware:
  * Vendor-specific PCIe switches, SmartNICs, or GPU drivers (e.g., mlxsw, pds_core, qed,
    ionic, amdgpu) requiring physical ASIC/PCIe cards not emulated in standard QEMU.
- Unreachable execution paths:
  * Driver teardown callbacks (.remove, .shutdown, pci_unregister_driver) executed only during
    physical PCI hot-unplug or manual sysfs driver unbinding.
  * Code paths exclusive to architectures other than the target architecture.

================================================================================
3. WHEN TO RETURN WorthFuzzing=true (POSITIVE CRITERIA)
================================================================================
Return WorthFuzzing=true whenever the patch touches reachable executable code, including:
- Core Subsystems:
  * Any logic modifications in memory management (mm/), synchronization/locking (kernel/locking/),
    BPF, scheduler, core networking, VFS, or syscall handling.
- Refactorings and Code Cleanups:
  * Any restructuring of reachable data structures, helper abstractions, or algorithm flows.
- Runtime Assertions and Defensive Checks:
  * Any introduction or alteration of assertions (WARN_ON*, VM_WARN_ON*, BUG_ON*, etc.) in reachable paths.
- Reachable Drivers and Protocols:
  * Drivers accessible via virtual buses (virtio, USB gadget, loopback, netlink, binder, sockets, etc.).

================================================================================
4. EXTRACTING FocusSymbols (PREVENTING DILUTION)
================================================================================
When WorthFuzzing=true, you must extract specific kernel functions into FocusSymbols to guide the fuzzer:

- AVOID UBIQUITOUS LIFECYCLE HOT-PATHS:
  Do NOT list generic, ubiquitous functions called by almost every program in the corpus
  (including, but not limited to: general memory allocators and deallocators, page fault
  and trap handlers, or core synchronization primitives; this is not an exhaustive list).
  Listing ubiquitous functions causes the fuzzer to classify thousands of unrelated tests as "focused",
  which severely dilutes fuzzing effort away from the actual changes.

- TARGET SPECIFIC FEATURE LOGIC AND ENTRYPOINTS:
  List functions that specifically implement the logic being added or altered, or direct API entrypoints
  for the subsystem feature under review.

- HANDLING STATIC INLINE FUNCTIONS IN HEADERS (.h):
  Compiler-inlined static functions (such as static inlines in mm/*.h or include/linux/*.h) lack
  distinct symbol addresses in vmlinux and cannot be targeted directly by symbol coverage filters.
  If the changes are primarily in static inline helpers, identify non-static, feature-specific caller
  functions in .c files that exercise them (avoiding ubiquitous lifecycle wrappers).

================================================================================
5. IDENTIFYING EnableConfigs
================================================================================
Identify any specific CONFIG_ options required to properly compile and reach the modified code:
- Inspect Kconfig files and #ifdef guards; do not make assumptions.
- Check "depends on" lines in Kconfig to include any non-standard parent subsystem configs needed.
- Strip any 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4").
Prefer calling several tools at the same time to save round-trips.


Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.

Target architecture: amd64

For your convenience, here is the diff of the changes:
commit b2fd673781f8bd7cd0ebfac5c9a299d1a7f2dc66
Author: syz-cluster <triage@syzkaller.com>
Date:   Tue Sep 8 00:36:23 2026 +0000

    syz-cluster: applied patch under review

diff --git a/drivers/net/dsa/realtek/rtl8365mb_main.c b/drivers/net/dsa/realtek/rtl8365mb_main.c
index 728231d8f94ca..508e1bea8fc5c 100644
--- a/drivers/net/dsa/realtek/rtl8365mb_main.c
+++ b/drivers/net/dsa/realtek/rtl8365mb_main.c
@@ -136,6 +136,9 @@
 #define RTL8365MB_CHIP_RESET_SW_MASK	0x0002
 #define RTL8365MB_CHIP_RESET_HW_MASK	0x0001
 
+/* Time the chip needs to complete a reset, per Realtek documentation */
+#define RTL8365MB_CHIP_RESET_TIME_MS	1000
+
 /* Interrupt polarity register */
 #define RTL8365MB_INTR_POLARITY_REG	0x1100
 #define   RTL8365MB_INTR_POLARITY_MASK	0x0001
@@ -2980,18 +2983,38 @@ static int rtl8365mb_switch_init(struct realtek_priv *priv)
 
 static int rtl8365mb_reset_chip(struct realtek_priv *priv)
 {
+	unsigned long deadline;
+	unsigned long remaining;
 	u32 val;
+	int ret;
 
 	priv->write_reg_noack(priv, RTL8365MB_CHIP_RESET_REG,
 			      FIELD_PREP(RTL8365MB_CHIP_RESET_HW_MASK, 1));
 
+	deadline = jiffies + msecs_to_jiffies(RTL8365MB_CHIP_RESET_TIME_MS);
+
 	/* Realtek documentation says the chip needs 1 second to reset. Sleep
 	 * for 100 ms before accessing any registers to prevent ACK timeouts.
 	 */
 	msleep(100);
-	return regmap_read_poll_timeout(priv->map, RTL8365MB_CHIP_RESET_REG, val,
-					!(val & RTL8365MB_CHIP_RESET_HW_MASK),
-					20000, 1e6);
+	ret = regmap_read_poll_timeout(priv->map, RTL8365MB_CHIP_RESET_REG, val,
+				       !(val & RTL8365MB_CHIP_RESET_HW_MASK),
+				       20000, 1e6);
+	if (ret)
+		return ret;
+
+	/* The bit clearing only means the reset was accepted, not that the
+	 * chip is ready: register writes issued before the documented reset
+	 * time has elapsed are silently dropped by blocks that are still
+	 * coming up, which leaves the switch half configured. Wait out
+	 * whatever is left of that second, measured from the reset write, so
+	 * the poll above does not add to the total.
+	 */
+	remaining = deadline - jiffies;
+	if ((long)remaining > 0)
+		msleep(jiffies_to_msecs(remaining));
+
+	return 0;
 }
 
 static int rtl8365mb_setup(struct dsa_switch *ds)

gemini-3.7-flash

null

null

							input: 3524
							output: 35
							thoughts: 170
						

**Analyzing the Realtek RTL8365MB Driver Patch**

Okay, let's dive into this patch. My initial thought is to analyze this modification to `drivers/net/dsa/realtek/rtl8365mb_main.c`, specifically the `rtl8365mb_reset_chip` function. First, I need to remind myself precisely what the `rtl8365mb` driver entails. Is this indeed a Distributed Switch Architecture (DSA) driver targeting those Realtek RTL8365MB / RTL8366RB ethernet switch chips? I need to quickly verify its purpose and intended environment.

I'll take a look at the broader context within `drivers/net/dsa/realtek/`. I want to understand the driver's probing mechanism and usage within the kernel's DSA framework. The critical question for me is whether this driver necessitates specific physical hardware for operation, or if it's potentially reachable and testable within standard fuzzing environments like syzkaller or QEMU. That will inform how aggressively to pursue this.

To gain a deeper understanding quickly, I’ll leverage `grepper` or `read-file` to efficiently dissect the driver and its interactions. This should provide the necessary context to assess the patch's impact and potential vulnerabilities.

{
  "Expression": "rtl8365mb",
  "PathPrefix": "drivers/net/dsa/realtek"
}

{
  "Output": "\nFull output is too long, showing 500 out of 1677 lines.\nUse more precise expression if possible.\n\ndrivers/net/dsa/realtek/Makefile=17=endif\ndrivers/net/dsa/realtek/Makefile:18:obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o\ndrivers/net/dsa/realtek/Makefile:19:rtl8365mb-objs := rtl8365mb_main.o \\\ndrivers/net/dsa/realtek/Makefile:20:\t\t  rtl8365mb_table.o \\\ndrivers/net/dsa/realtek/Makefile:21:\t\t  rtl8365mb_vlan.o \\\ndrivers/net/dsa/realtek/Makefile:22:\t\t  rtl8365mb_l2.o \\\ndrivers/net/dsa/realtek/Makefile:23:# end of rtl8365mb-objs\n--\ndrivers/net/dsa/realtek/realtek.h=190=extern const struct realtek_variant rtl8366rb_variant;\ndrivers/net/dsa/realtek/realtek.h:191:extern const struct realtek_variant rtl8365mb_variant;\ndrivers/net/dsa/realtek/realtek.h-192-\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-1-// SPDX-License-Identifier: GPL-2.0\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:2:/* Forwarding and multicast database interface for the rtl8365mb switch family\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-3- *\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-8-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:9:#include \"rtl8365mb_l2.h\"\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:10:#include \"rtl8365mb_table.h\"\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-11-#include \u003clinux/regmap.h\u003e\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-91-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:92:struct rtl8365mb_l2_uc_key {\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-93-\tu8 mac_addr[ETH_ALEN];\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-99-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:100:struct rtl8365mb_l2_uc {\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:101:\tstruct rtl8365mb_l2_uc_key key;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-102-\tu8 port;\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-113-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:114:struct rtl8365mb_l2_mc_key {\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-115-\tu8 mac_addr[ETH_ALEN];\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-122-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:123:struct rtl8365mb_l2_mc {\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:124:\tstruct rtl8365mb_l2_mc_key key;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-125-\tu16 member;\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-133-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:134:static void rtl8365mb_l2_data_to_uc(const u16 *data, struct rtl8365mb_l2_uc *uc)\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-135-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-163-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:164:static void rtl8365mb_l2_uc_to_data(const struct rtl8365mb_l2_uc *uc, u16 *data)\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-165-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-202-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:203:static void rtl8365mb_l2_data_to_mc(const u16 *data, struct rtl8365mb_l2_mc *mc)\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-204-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-230-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:231:static void rtl8365mb_l2_mc_to_data(const struct rtl8365mb_l2_mc *mc, u16 *data)\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-232-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-261-/*\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:262: * rtl8365mb_l2_get_next_uc() - get the next Unicast L2 entry\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-263- * @priv: realtek_priv pointer\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-281- **/\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:282:int rtl8365mb_l2_get_next_uc(struct realtek_priv *priv, u16 *addr, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-283-\t\t\t     struct realtek_fdb_entry *entry)\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-285-\tu16 data[RTL8365MB_L2_ENTRY_SIZE] = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:286:\tstruct rtl8365mb_l2_uc uc;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-287-\tint ret;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-288-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:289:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-290-\t\t\t\t    RTL8365MB_TABLE_OP_READ, addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-295-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:296:\trtl8365mb_l2_data_to_uc(data, \u0026uc);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-297-\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-304-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:305:int rtl8365mb_l2_add_uc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-306-\t\t\tconst unsigned char mac_addr[static ETH_ALEN],\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-309-\tu16 data[RTL8365MB_L2_ENTRY_SIZE] = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:310:\tstruct rtl8365mb_l2_uc uc = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-311-\tu16 addr;\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-328-\tuc.age = 1;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:329:\trtl8365mb_l2_uc_to_data(\u0026uc, data);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-330-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-331-\t/* add the new entry or update an existing one */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:332:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-333-\t\t\t\t    RTL8365MB_TABLE_OP_WRITE, \u0026addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-344-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:345:int rtl8365mb_l2_del_uc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-346-\t\t\tconst unsigned char mac_addr[static ETH_ALEN],\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-349-\tu16 data[RTL8365MB_L2_ENTRY_SIZE] = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:350:\tstruct rtl8365mb_l2_uc uc = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-351-\tu16 addr;\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-360-\tuc.age = 0;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:361:\trtl8365mb_l2_uc_to_data(\u0026uc, data);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-362-\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-367-\t */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:368:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-369-\t\t\t\t    RTL8365MB_TABLE_OP_WRITE, \u0026addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-383-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:384:int rtl8365mb_l2_flush(struct realtek_priv *priv, int port, u16 vid)\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-385-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-448-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:449:int rtl8365mb_l2_add_mc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-450-\t\t\tconst unsigned char mac_addr[static ETH_ALEN],\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-453-\tu16 data[RTL8365MB_L2_ENTRY_SIZE] = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:454:\tstruct rtl8365mb_l2_mc mc = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-455-\tu16 addr;\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-465-\tmc.is_static = 1;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:466:\trtl8365mb_l2_mc_to_data(\u0026mc, data);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-467-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-468-\t/* First look for an existing entry (to get existing port members) */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:469:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-470-\t\t\t\t    RTL8365MB_TABLE_OP_READ, \u0026addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-474-\t\t/* There is already an entry... */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:475:\t\trtl8365mb_l2_data_to_mc(data, \u0026mc);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-476-\t\tdev_dbg(priv-\u003edev,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-489-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:490:\t\trtl8365mb_l2_mc_to_data(\u0026mc, data);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-491-\t} else if (ret == -ENOENT) {\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-507-\t/* add the new entry or update an existing one */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:508:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-509-\t\t\t\t    RTL8365MB_TABLE_OP_WRITE, \u0026addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-519-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:520:int rtl8365mb_l2_del_mc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-521-\t\t\tconst unsigned char mac_addr[static ETH_ALEN],\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-524-\tu16 data[RTL8365MB_L2_ENTRY_SIZE] = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:525:\tstruct rtl8365mb_l2_mc mc = { 0 };\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-526-\tu16 addr;\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-531-\tmc.key.ivl = true;\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:532:\trtl8365mb_l2_mc_to_data(\u0026mc, data);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-533-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-534-\t/* First look for an existing entry (to get existing port members) */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:535:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-536-\t\t\t\t    RTL8365MB_TABLE_OP_READ, \u0026addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-549-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:550:\trtl8365mb_l2_data_to_mc(data, \u0026mc);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-551-\tdev_dbg(priv-\u003edev,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-567-\t}\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:568:\trtl8365mb_l2_mc_to_data(\u0026mc, data);\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-569-\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-570-\t/* update the existing entry. */\ndrivers/net/dsa/realtek/rtl8365mb_l2.c:571:\tret = rtl8365mb_table_query(priv, RTL8365MB_TABLE_L2,\ndrivers/net/dsa/realtek/rtl8365mb_l2.c-572-\t\t\t\t    RTL8365MB_TABLE_OP_WRITE, \u0026addr,\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-1-/* SPDX-License-Identifier: GPL-2.0 */\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:2:/* Forwarding and multicast database interface for the rtl8365mb switch family\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-3- *\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-14-\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:15:int rtl8365mb_l2_get_next_uc(struct realtek_priv *priv, u16 *addr, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-16-\t\t\t     struct realtek_fdb_entry *entry);\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:17:int rtl8365mb_l2_add_uc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-18-\t\t\tconst unsigned char addr[static ETH_ALEN],\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-19-\t\t\tu16 efid, u16 vid);\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:20:int rtl8365mb_l2_del_uc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-21-\t\t\tconst unsigned char addr[static ETH_ALEN],\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-22-\t\t\tu16 efid, u16 vid);\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:23:int rtl8365mb_l2_flush(struct realtek_priv *priv, int port, u16 vid);\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-24-\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:25:int rtl8365mb_l2_add_mc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-26-\t\t\tconst unsigned char mac_addr[static ETH_ALEN],\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-27-\t\t\tu16 vid);\ndrivers/net/dsa/realtek/rtl8365mb_l2.h:28:int rtl8365mb_l2_del_mc(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_l2.h-29-\t\t\tconst unsigned char mac_addr[static ETH_ALEN],\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-64- * require the rtl8367d vendor driver. With all this uncertainty, the driver has\ndrivers/net/dsa/realtek/rtl8365mb_main.c:65: * been modestly named rtl8365mb. Future implementors may wish to rename things\ndrivers/net/dsa/realtek/rtl8365mb_main.c-66- * accordingly.\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-109-#include \"rtl83xx.h\"\ndrivers/net/dsa/realtek/rtl8365mb_main.c:110:#include \"rtl8365mb_l2.h\"\ndrivers/net/dsa/realtek/rtl8365mb_main.c:111:#include \"rtl8365mb_vlan.h\"\ndrivers/net/dsa/realtek/rtl8365mb_main.c-112-\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-259- * 3-bit MSB field (CTRL1). The chip resets them to 0x1FFFF; see\ndrivers/net/dsa/realtek/rtl8365mb_main.c:260: * rtl8365mb_sds_raise_rate_limits().\ndrivers/net/dsa/realtek/rtl8365mb_main.c-261- */\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-427-#define   RTL8365MB_PORT_MISC_CFG_MAC_LOOPBACK_MASK\t\t0x0040\ndrivers/net/dsa/realtek/rtl8365mb_main.c:428:/* See \u0026rtl8365mb_vlan_egress_mode */\ndrivers/net/dsa/realtek/rtl8365mb_main.c-429-#define   RTL8365MB_PORT_MISC_CFG_VLAN_EGRESS_MODE_MASK\t\t0x0030\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-432-/**\ndrivers/net/dsa/realtek/rtl8365mb_main.c:433: * enum rtl8365mb_vlan_egress_mode - port VLAN egress mode\ndrivers/net/dsa/realtek/rtl8365mb_main.c-434- * @RTL8365MB_VLAN_EGRESS_MODE_ORIGINAL: follow untag mask in VLAN4k table entry\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-442- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:443:enum rtl8365mb_vlan_egress_mode {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-444-\tRTL8365MB_VLAN_EGRESS_MODE_ORIGINAL = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-486-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:487:enum rtl8365mb_mib_counter_index {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-488-\tRTL8365MB_MIB_ifInOctets,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-548-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:549:struct rtl8365mb_mib_counter {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-550-\tu32 offset;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-557-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:558:static struct rtl8365mb_mib_counter rtl8365mb_mib_counters[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-559-\tRTL8365MB_MAKE_MIB_COUNTER(0, 4, ifInOctets),\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-618-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:619:static_assert(ARRAY_SIZE(rtl8365mb_mib_counters) == RTL8365MB_MIB_END);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-620-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:621:struct rtl8365mb_jam_tbl_entry {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-622-\tu16 reg;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-626-/* Lifted from the vendor driver sources */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:627:static const struct rtl8365mb_jam_tbl_entry rtl8365mb_init_jam_8365mb_vc[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-628-\t{ 0x13EB, 0x15BB }, { 0x1303, 0x06D6 }, { 0x1304, 0x0700 },\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-635-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:636:static const struct rtl8365mb_jam_tbl_entry rtl8365mb_init_jam_common[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-637-\t{ 0x1200, 0x7FCB }, { 0x0884, 0x0003 }, { 0x06EB, 0x0001 },\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-646- * option, which is what RTL8367S parts seen so far report. See\ndrivers/net/dsa/realtek/rtl8365mb_main.c:647: * rtl8365mb_sds_probe_option().\ndrivers/net/dsa/realtek/rtl8365mb_main.c-648- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:649:static const struct rtl8365mb_jam_tbl_entry rtl8365mb_sds_jam_sgmii[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-650-\t{ 0x0480, 0x04D7 }, { 0x0481, 0xF994 }, { 0x0482, 0x2420 },\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-658- * option, which is what RTL8367S parts seen so far report. See\ndrivers/net/dsa/realtek/rtl8365mb_main.c:659: * rtl8365mb_sds_probe_option().\ndrivers/net/dsa/realtek/rtl8365mb_main.c-660- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:661:static const struct rtl8365mb_jam_tbl_entry rtl8365mb_sds_jam_hsgmii[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-662-\t{ 0x0500, 0x82F0 }, { 0x0501, 0xF195 }, { 0x0502, 0x31A2 },\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-666-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:667:enum rtl8365mb_phy_interface_mode {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-668-\tRTL8365MB_PHY_INTERFACE_MODE_INVAL = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-678-/**\ndrivers/net/dsa/realtek/rtl8365mb_main.c:679: * struct rtl8365mb_extint - external interface info\ndrivers/net/dsa/realtek/rtl8365mb_main.c-680- * @port: the port with an external interface\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-684- * Represents a mapping: port -\u003e { id, supported_interfaces }. To be embedded\ndrivers/net/dsa/realtek/rtl8365mb_main.c:685: * in \u0026struct rtl8365mb_chip_info for every port with an external interface.\ndrivers/net/dsa/realtek/rtl8365mb_main.c-686- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:687:struct rtl8365mb_extint {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-688-\tint port;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-693-/**\ndrivers/net/dsa/realtek/rtl8365mb_main.c:694: * struct rtl8365mb_chip_info - static chip-specific info\ndrivers/net/dsa/realtek/rtl8365mb_main.c-695- * @name: human-readable chip name\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-703- * by this driver. When adding support for another chip in the family, a new\ndrivers/net/dsa/realtek/rtl8365mb_main.c:704: * chip info should be added to the rtl8365mb_chip_infos array.\ndrivers/net/dsa/realtek/rtl8365mb_main.c-705- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:706:struct rtl8365mb_chip_info {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-707-\tconst char *name;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-709-\tu32 chip_ver;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:710:\tconst struct rtl8365mb_extint extints[RTL8365MB_MAX_NUM_EXTINTS];\ndrivers/net/dsa/realtek/rtl8365mb_main.c:711:\tconst struct rtl8365mb_jam_tbl_entry *jam_table;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-712-\tsize_t jam_size;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-716-#define PHY_INTF(_mode) (RTL8365MB_PHY_INTERFACE_MODE_ ## _mode)\ndrivers/net/dsa/realtek/rtl8365mb_main.c:717:static const struct rtl8365mb_chip_info rtl8365mb_chip_infos[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-718-\t{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-725-\t\t},\ndrivers/net/dsa/realtek/rtl8365mb_main.c:726:\t\t.jam_table = rtl8365mb_init_jam_8365mb_vc,\ndrivers/net/dsa/realtek/rtl8365mb_main.c:727:\t\t.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),\ndrivers/net/dsa/realtek/rtl8365mb_main.c-728-\t},\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-737-\t\t},\ndrivers/net/dsa/realtek/rtl8365mb_main.c:738:\t\t.jam_table = rtl8365mb_init_jam_8365mb_vc,\ndrivers/net/dsa/realtek/rtl8365mb_main.c:739:\t\t.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),\ndrivers/net/dsa/realtek/rtl8365mb_main.c-740-\t},\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-751-\t\t},\ndrivers/net/dsa/realtek/rtl8365mb_main.c:752:\t\t.jam_table = rtl8365mb_init_jam_8365mb_vc,\ndrivers/net/dsa/realtek/rtl8365mb_main.c:753:\t\t.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),\ndrivers/net/dsa/realtek/rtl8365mb_main.c-754-\t},\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-764-\t\t},\ndrivers/net/dsa/realtek/rtl8365mb_main.c:765:\t\t.jam_table = rtl8365mb_init_jam_8365mb_vc,\ndrivers/net/dsa/realtek/rtl8365mb_main.c:766:\t\t.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),\ndrivers/net/dsa/realtek/rtl8365mb_main.c-767-\t},\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-769-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:770:enum rtl8365mb_stp_state {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-771-\tRTL8365MB_STP_STATE_DISABLED = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-776-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:777:enum rtl8365mb_cpu_insert {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-778-\tRTL8365MB_CPU_INSERT_TO_ALL = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-782-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:783:enum rtl8365mb_cpu_position {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-784-\tRTL8365MB_CPU_POS_AFTER_SA = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-787-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:788:enum rtl8365mb_cpu_format {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-789-\tRTL8365MB_CPU_FORMAT_8BYTES = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-792-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:793:enum rtl8365mb_cpu_rxlen {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-794-\tRTL8365MB_CPU_RXLEN_72BYTES = 0,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-798-/**\ndrivers/net/dsa/realtek/rtl8365mb_main.c:799: * struct rtl8365mb_cpu - CPU port configuration\ndrivers/net/dsa/realtek/rtl8365mb_main.c-800- * @enable: enable/disable hardware insertion of CPU tag in switch-\u003eCPU frames\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-810- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:811:struct rtl8365mb_cpu {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-812-\tbool enable;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-814-\tu32 trap_port;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:815:\tenum rtl8365mb_cpu_insert insert;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:816:\tenum rtl8365mb_cpu_position position;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:817:\tenum rtl8365mb_cpu_rxlen rx_length;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:818:\tenum rtl8365mb_cpu_format format;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-819-};\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-821-/**\ndrivers/net/dsa/realtek/rtl8365mb_main.c:822: * struct rtl8365mb_port - private per-port data\ndrivers/net/dsa/realtek/rtl8365mb_main.c-823- * @priv: pointer to parent realtek_priv data\ndrivers/net/dsa/realtek/rtl8365mb_main.c-824- * @index: DSA port index, same as dsa_port::index\ndrivers/net/dsa/realtek/rtl8365mb_main.c:825: * @stats: link statistics populated by rtl8365mb_stats_poll, ready for atomic\ndrivers/net/dsa/realtek/rtl8365mb_main.c:826: *         access via rtl8365mb_get_stats64\ndrivers/net/dsa/realtek/rtl8365mb_main.c-827- * @stats_lock: protect the stats structure during read/update\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-829- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:830:struct rtl8365mb_port {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-831-\tstruct realtek_priv *priv;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-838-/**\ndrivers/net/dsa/realtek/rtl8365mb_main.c:839: * struct rtl8365mb - driver private data\ndrivers/net/dsa/realtek/rtl8365mb_main.c-840- * @priv: pointer to parent realtek_priv data\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-851- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:852:struct rtl8365mb {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-853-\tstruct realtek_priv *priv;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-854-\tint irq;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:855:\tconst struct rtl8365mb_chip_info *chip_info;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:856:\tstruct rtl8365mb_cpu cpu;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-857-\tstruct mutex mib_lock;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:858:\tstruct rtl8365mb_port ports[RTL8365MB_MAX_NUM_PORTS];\ndrivers/net/dsa/realtek/rtl8365mb_main.c-859-\tstruct phylink_pcs pcs;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-862-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:863:#define pcs_to_rtl8365mb(_pcs) container_of((_pcs), struct rtl8365mb, pcs)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-864-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:865:static int rtl8365mb_phy_poll_busy(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-866-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-873-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:874:static int rtl8365mb_phy_ocp_prepare(struct realtek_priv *priv, int phy,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-875-\t\t\t\t     u32 ocp_addr)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-903-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:904:static int rtl8365mb_phy_ocp_read(struct realtek_priv *priv, int phy,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-905-\t\t\t\t  u32 ocp_addr, u16 *data)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-911-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:912:\tret = rtl8365mb_phy_poll_busy(priv);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-913-\tif (ret)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-915-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:916:\tret = rtl8365mb_phy_ocp_prepare(priv, phy, ocp_addr);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-917-\tif (ret)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-929-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:930:\tret = rtl8365mb_phy_poll_busy(priv);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-931-\tif (ret)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-947-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:948:static int rtl8365mb_phy_ocp_write(struct realtek_priv *priv, int phy,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-949-\t\t\t\t   u32 ocp_addr, u16 data)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-955-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:956:\tret = rtl8365mb_phy_poll_busy(priv);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-957-\tif (ret)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-959-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:960:\tret = rtl8365mb_phy_ocp_prepare(priv, phy, ocp_addr);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-961-\tif (ret)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-979-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:980:\tret = rtl8365mb_phy_poll_busy(priv);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-981-\tif (ret)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-989-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:990:static int rtl8365mb_phy_read(struct realtek_priv *priv, int phy, int regnum)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-991-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1003-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1004:\tret = rtl8365mb_phy_ocp_read(priv, phy, ocp_addr, \u0026val);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1005-\tif (ret) {\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1017-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1018:static int rtl8365mb_phy_write(struct realtek_priv *priv, int phy, int regnum,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1019-\t\t\t       u16 val)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1031-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1032:\tret = rtl8365mb_phy_ocp_write(priv, phy, ocp_addr, val);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1033-\tif (ret) {\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1045-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1046:static const struct rtl8365mb_extint *\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1047:rtl8365mb_get_port_extint(struct realtek_priv *priv, int port)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1048-{\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1049:\tstruct rtl8365mb *mb = priv-\u003echip_data;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1050-\tint i;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1052-\tfor (i = 0; i \u003c RTL8365MB_MAX_NUM_EXTINTS; i++) {\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1053:\t\tconst struct rtl8365mb_extint *extint =\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1054-\t\t\t\u0026mb-\u003echip_info-\u003eextints[i];\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c=1066=static enum dsa_tag_protocol\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1067:rtl8365mb_get_tag_protocol(struct dsa_switch *ds, int port,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1068-\t\t\t   enum dsa_tag_protocol mp)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1070-\tstruct realtek_priv *priv = ds-\u003epriv;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1071:\tstruct rtl8365mb_cpu *cpu;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1072:\tstruct rtl8365mb *mb;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1073-\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1082-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1083:static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1084-\t\t\t\t      phy_interface_t interface)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1085-{\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1086:\tconst struct rtl8365mb_extint *extint =\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1087:\t\trtl8365mb_get_port_extint(priv, port);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1088-\tstruct dsa_switch *ds = \u0026priv-\u003eds;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1115-\t * forcing the external interface into a particular mode, which is done\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1116:\t * in the rtl8365mb_phylink_mac_link_{up,down} functions.\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1117-\t *\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1164-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1165:static int rtl8365mb_sds_write(struct realtek_priv *priv, u16 addr, u16 data)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1166-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1185-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1186:static int rtl8365mb_sds_read(struct realtek_priv *priv, u16 addr, u16 *data)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1187-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1227- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1228:static int rtl8365mb_sds_probe_option(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1229-{\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1230:\tstruct rtl8365mb *mb = priv-\u003echip_data;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1231:\tconst struct rtl8365mb_extint *extint;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1232-\tu32 option;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1273- * their maximum in its switch init, unconditionally for the whole chip\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1274: * family. The chip reset in rtl8365mb_setup() puts them back to their reset\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1275- * default of 0x1FFFF, a ~1.048 Gbps limit which caps the aggregate\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1282- */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1283:static int rtl8365mb_sds_raise_rate_limits(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1284-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1308-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1309:static int rtl8365mb_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1310-\t\t\t\tphy_interface_t interface,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1313-{\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1314:\tconst struct rtl8365mb_jam_tbl_entry *sds_jam;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1315-\tconst int id = RTL8365MB_SDS_EXT_INTERFACE_ID;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1316:\tstruct rtl8365mb *mb = pcs_to_rtl8365mb(pcs);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1317-\tstruct realtek_priv *priv;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1326-\tif (interface == PHY_INTERFACE_MODE_2500BASEX) {\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1327:\t\tsds_jam = rtl8365mb_sds_jam_hsgmii;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1328:\t\tsds_jam_size = ARRAY_SIZE(rtl8365mb_sds_jam_hsgmii);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1329-\t\tmode = RTL8365MB_EXT_PORT_MODE_HSGMII;\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1330-\t} else {\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1331:\t\tsds_jam = rtl8365mb_sds_jam_sgmii;\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1332:\t\tsds_jam_size = ARRAY_SIZE(rtl8365mb_sds_jam_sgmii);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1333-\t\tmode = RTL8365MB_EXT_PORT_MODE_SGMII;\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1363-\tfor (i = 0; i \u003c sds_jam_size; i++) {\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1364:\t\tret = rtl8365mb_sds_write(priv, sds_jam[i].reg,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1365-\t\t\t\t\t  sds_jam[i].val);\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1390-\t */\ndrivers/net/dsa/realtek/rtl8365mb_main.c:1391:\tret = rtl8365mb_sds_write(priv, RTL8365MB_SDS_REG_RESET,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-1392-\t\t\t\t  RTL8365MB_SDS_RESET_DEASSERT);\n--\n\n"
}

gemini-3.7-flash

null

null

							input: 19893
							output: 37
							thoughts: 45
						

Okay, let's dive into this `rtl8365mb` probe process. My initial instinct is to pinpoint how this specific driver is registered within the system. To do that efficiently, I need to understand where the critical registration points are, so I'll start by focusing my search on the `drivers/net/dsa/realtek/` directory.

I'll be using `grep` to find instances of `rtl8365mb_variant`. This should give me a good handle on where the variant-specific code lives, and hopefully, I'll be able to trace back from there to the probe function itself. I'm expecting this `rtl8365mb_variant` to be a key element for identifying the hardware and instantiating the correct driver. From there, I can figure out where the module and the probe are registered.

{
  "Expression": "rtl8365mb_variant",
  "PathPrefix": "drivers/net/dsa/realtek"
}

{
  "Output": "drivers/net/dsa/realtek/realtek.h=190=extern const struct realtek_variant rtl8366rb_variant;\ndrivers/net/dsa/realtek/realtek.h:191:extern const struct realtek_variant rtl8365mb_variant;\ndrivers/net/dsa/realtek/realtek.h-192-\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c=3341=static const struct realtek_ops rtl8365mb_ops = {\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3359-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3360:const struct realtek_variant rtl8365mb_variant = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3361-\t.ds_ops = \u0026rtl8365mb_switch_ops,\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c=3370=static const struct of_device_id rtl8365mb_of_match[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3371:\t{ .compatible = \"realtek,rtl8365mb\", .data = \u0026rtl8365mb_variant, },\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3372-\t{ /* sentinel */ },\n"
}

gemini-3.7-flash

null

null

							input: 20565
							output: 38
							thoughts: 30
						

Okay, here's my take on those thoughts, framed as an expert's internal monologue:

**Investigating RTL8365MB Driver Usage and Probing**

Alright, time to get to the bottom of this. My initial instinct is to dig into the kernel source and identify precisely which drivers are leveraging the `rtl8365mb_variant` enumeration. I need to understand the relationship between the `rtl8365mb` base and its specific variants. Knowing the variants will give me insights into specific hardware revisions or configurations.

Then, I'll need to figure out the probing mechanism. How does the system *find* and identify this chip? I want to trace the device initialization. Is it a standard PCI/SPI/I2C enumeration, or is there something more custom going on? Understanding the probe flow will be critical to any debugging or customization I might need to do. I need to understand the detection process - the checks, the registers examined, the fallback if the device isn't immediately identified. I'll need to look for any quirks or specific flags that might influence how the chip is handled. Hopefully, the comments are sufficient, but I'm prepared to follow the execution flow meticulously.

{
  "Expression": "MODULE_DEVICE_TABLE|realtek_",
  "PathPrefix": "drivers/net/dsa/realtek"
}

{
  "Output": "\nFull output is too long, showing 500 out of 1566 lines.\nUse more precise expression if possible.\n\ndrivers/net/dsa/realtek/Makefile-1-# SPDX-License-Identifier: GPL-2.0\ndrivers/net/dsa/realtek/Makefile:2:obj-$(CONFIG_NET_DSA_REALTEK)\t\t+= realtek_dsa.o\ndrivers/net/dsa/realtek/Makefile:3:realtek_dsa-objs\t\t\t:= rtl83xx.o\ndrivers/net/dsa/realtek/Makefile-4-\ndrivers/net/dsa/realtek/Makefile=5=ifdef CONFIG_NET_DSA_REALTEK_MDIO\ndrivers/net/dsa/realtek/Makefile:6:realtek_dsa-objs += realtek-mdio.o\ndrivers/net/dsa/realtek/Makefile-7-endif\n--\ndrivers/net/dsa/realtek/Makefile=9=ifdef CONFIG_NET_DSA_REALTEK_SMI\ndrivers/net/dsa/realtek/Makefile:10:realtek_dsa-objs += realtek-smi.o\ndrivers/net/dsa/realtek/Makefile-11-endif\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-43-\ndrivers/net/dsa/realtek/realtek-mdio.c:44:static int realtek_mdio_write(void *ctx, u32 reg, u32 val)\ndrivers/net/dsa/realtek/realtek-mdio.c-45-{\ndrivers/net/dsa/realtek/realtek-mdio.c:46:\tstruct realtek_priv *priv = ctx;\ndrivers/net/dsa/realtek/realtek-mdio.c-47-\tstruct mii_bus *bus = priv-\u003ebus;\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-71-\ndrivers/net/dsa/realtek/realtek-mdio.c:72:static int realtek_mdio_read(void *ctx, u32 reg, u32 *val)\ndrivers/net/dsa/realtek/realtek-mdio.c-73-{\ndrivers/net/dsa/realtek/realtek-mdio.c:74:\tstruct realtek_priv *priv = ctx;\ndrivers/net/dsa/realtek/realtek-mdio.c-75-\tstruct mii_bus *bus = priv-\u003ebus;\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-103-\ndrivers/net/dsa/realtek/realtek-mdio.c:104:static const struct realtek_interface_info realtek_mdio_info = {\ndrivers/net/dsa/realtek/realtek-mdio.c:105:\t.reg_read = realtek_mdio_read,\ndrivers/net/dsa/realtek/realtek-mdio.c:106:\t.reg_write = realtek_mdio_write,\ndrivers/net/dsa/realtek/realtek-mdio.c-107-};\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-109-/**\ndrivers/net/dsa/realtek/realtek-mdio.c:110: * realtek_mdio_probe() - Probe a platform device for an MDIO-connected switch\ndrivers/net/dsa/realtek/realtek-mdio.c-111- * @mdiodev: mdio_device to probe on.\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-120- */\ndrivers/net/dsa/realtek/realtek-mdio.c:121:int realtek_mdio_probe(struct mdio_device *mdiodev)\ndrivers/net/dsa/realtek/realtek-mdio.c-122-{\ndrivers/net/dsa/realtek/realtek-mdio.c-123-\tstruct device *dev = \u0026mdiodev-\u003edev;\ndrivers/net/dsa/realtek/realtek-mdio.c:124:\tstruct realtek_priv *priv;\ndrivers/net/dsa/realtek/realtek-mdio.c-125-\tint ret;\ndrivers/net/dsa/realtek/realtek-mdio.c-126-\ndrivers/net/dsa/realtek/realtek-mdio.c:127:\tpriv = rtl83xx_probe(dev, \u0026realtek_mdio_info);\ndrivers/net/dsa/realtek/realtek-mdio.c-128-\tif (IS_ERR(priv))\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-132-\tpriv-\u003emdio_addr = mdiodev-\u003eaddr;\ndrivers/net/dsa/realtek/realtek-mdio.c:133:\tpriv-\u003ewrite_reg_noack = realtek_mdio_write;\ndrivers/net/dsa/realtek/realtek-mdio.c-134-\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-142-}\ndrivers/net/dsa/realtek/realtek-mdio.c:143:EXPORT_SYMBOL_NS_GPL(realtek_mdio_probe, \"REALTEK_DSA\");\ndrivers/net/dsa/realtek/realtek-mdio.c-144-\ndrivers/net/dsa/realtek/realtek-mdio.c-145-/**\ndrivers/net/dsa/realtek/realtek-mdio.c:146: * realtek_mdio_remove() - Remove the driver of an MDIO-connected switch\ndrivers/net/dsa/realtek/realtek-mdio.c-147- * @mdiodev: mdio_device to be removed.\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-154- */\ndrivers/net/dsa/realtek/realtek-mdio.c:155:void realtek_mdio_remove(struct mdio_device *mdiodev)\ndrivers/net/dsa/realtek/realtek-mdio.c-156-{\ndrivers/net/dsa/realtek/realtek-mdio.c:157:\tstruct realtek_priv *priv = dev_get_drvdata(\u0026mdiodev-\u003edev);\ndrivers/net/dsa/realtek/realtek-mdio.c-158-\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-165-}\ndrivers/net/dsa/realtek/realtek-mdio.c:166:EXPORT_SYMBOL_NS_GPL(realtek_mdio_remove, \"REALTEK_DSA\");\ndrivers/net/dsa/realtek/realtek-mdio.c-167-\ndrivers/net/dsa/realtek/realtek-mdio.c-168-/**\ndrivers/net/dsa/realtek/realtek-mdio.c:169: * realtek_mdio_shutdown() - Shutdown the driver of a MDIO-connected switch\ndrivers/net/dsa/realtek/realtek-mdio.c-170- * @mdiodev: mdio_device shutting down.\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-177- */\ndrivers/net/dsa/realtek/realtek-mdio.c:178:void realtek_mdio_shutdown(struct mdio_device *mdiodev)\ndrivers/net/dsa/realtek/realtek-mdio.c-179-{\ndrivers/net/dsa/realtek/realtek-mdio.c:180:\tstruct realtek_priv *priv = dev_get_drvdata(\u0026mdiodev-\u003edev);\ndrivers/net/dsa/realtek/realtek-mdio.c-181-\n--\ndrivers/net/dsa/realtek/realtek-mdio.c-186-}\ndrivers/net/dsa/realtek/realtek-mdio.c:187:EXPORT_SYMBOL_NS_GPL(realtek_mdio_shutdown, \"REALTEK_DSA\");\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-7-\ndrivers/net/dsa/realtek/realtek-mdio.h:8:static inline int realtek_mdio_driver_register(struct mdio_driver *drv)\ndrivers/net/dsa/realtek/realtek-mdio.h-9-{\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-12-\ndrivers/net/dsa/realtek/realtek-mdio.h:13:static inline void realtek_mdio_driver_unregister(struct mdio_driver *drv)\ndrivers/net/dsa/realtek/realtek-mdio.h-14-{\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-17-\ndrivers/net/dsa/realtek/realtek-mdio.h:18:int realtek_mdio_probe(struct mdio_device *mdiodev);\ndrivers/net/dsa/realtek/realtek-mdio.h:19:void realtek_mdio_remove(struct mdio_device *mdiodev);\ndrivers/net/dsa/realtek/realtek-mdio.h:20:void realtek_mdio_shutdown(struct mdio_device *mdiodev);\ndrivers/net/dsa/realtek/realtek-mdio.h-21-\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-23-\ndrivers/net/dsa/realtek/realtek-mdio.h:24:static inline int realtek_mdio_driver_register(struct mdio_driver *drv)\ndrivers/net/dsa/realtek/realtek-mdio.h-25-{\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-28-\ndrivers/net/dsa/realtek/realtek-mdio.h:29:static inline void realtek_mdio_driver_unregister(struct mdio_driver *drv)\ndrivers/net/dsa/realtek/realtek-mdio.h-30-{\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-32-\ndrivers/net/dsa/realtek/realtek-mdio.h:33:static inline int realtek_mdio_probe(struct mdio_device *mdiodev)\ndrivers/net/dsa/realtek/realtek-mdio.h-34-{\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-37-\ndrivers/net/dsa/realtek/realtek-mdio.h:38:static inline void realtek_mdio_remove(struct mdio_device *mdiodev)\ndrivers/net/dsa/realtek/realtek-mdio.h-39-{\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-41-\ndrivers/net/dsa/realtek/realtek-mdio.h:42:static inline void realtek_mdio_shutdown(struct mdio_device *mdiodev)\ndrivers/net/dsa/realtek/realtek-mdio.h-43-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-46-\ndrivers/net/dsa/realtek/realtek-smi.c:47:static inline void realtek_smi_clk_delay(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/realtek-smi.c-48-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-51-\ndrivers/net/dsa/realtek/realtek-smi.c:52:static void realtek_smi_start(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/realtek-smi.c-53-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-58-\tgpiod_direction_output(priv-\u003emdio, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:59:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-60-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-62-\tgpiod_set_value(priv-\u003emdc, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:63:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-64-\tgpiod_set_value(priv-\u003emdc, 0);\ndrivers/net/dsa/realtek/realtek-smi.c:65:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-66-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-68-\tgpiod_set_value(priv-\u003emdc, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:69:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-70-\tgpiod_set_value(priv-\u003emdio, 0);\ndrivers/net/dsa/realtek/realtek-smi.c:71:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-72-\tgpiod_set_value(priv-\u003emdc, 0);\ndrivers/net/dsa/realtek/realtek-smi.c:73:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-74-\tgpiod_set_value(priv-\u003emdio, 1);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-76-\ndrivers/net/dsa/realtek/realtek-smi.c:77:static void realtek_smi_stop(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/realtek-smi.c-78-{\ndrivers/net/dsa/realtek/realtek-smi.c:79:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-80-\tgpiod_set_value(priv-\u003emdio, 0);\ndrivers/net/dsa/realtek/realtek-smi.c-81-\tgpiod_set_value(priv-\u003emdc, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:82:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-83-\tgpiod_set_value(priv-\u003emdio, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:84:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-85-\tgpiod_set_value(priv-\u003emdc, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:86:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-87-\tgpiod_set_value(priv-\u003emdc, 0);\ndrivers/net/dsa/realtek/realtek-smi.c:88:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-89-\tgpiod_set_value(priv-\u003emdc, 1);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-91-\t/* Add a click */\ndrivers/net/dsa/realtek/realtek-smi.c:92:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-93-\tgpiod_set_value(priv-\u003emdc, 0);\ndrivers/net/dsa/realtek/realtek-smi.c:94:\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-95-\tgpiod_set_value(priv-\u003emdc, 1);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-101-\ndrivers/net/dsa/realtek/realtek-smi.c:102:static void realtek_smi_write_bits(struct realtek_priv *priv, u32 data, u32 len)\ndrivers/net/dsa/realtek/realtek-smi.c-103-{\ndrivers/net/dsa/realtek/realtek-smi.c-104-\tfor (; len \u003e 0; len--) {\ndrivers/net/dsa/realtek/realtek-smi.c:105:\t\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-106-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-108-\t\tgpiod_set_value(priv-\u003emdio, !!(data \u0026 (1 \u003c\u003c (len - 1))));\ndrivers/net/dsa/realtek/realtek-smi.c:109:\t\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-110-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-112-\t\tgpiod_set_value(priv-\u003emdc, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:113:\t\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-114-\t\tgpiod_set_value(priv-\u003emdc, 0);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-117-\ndrivers/net/dsa/realtek/realtek-smi.c:118:static void realtek_smi_read_bits(struct realtek_priv *priv, u32 len, u32 *data)\ndrivers/net/dsa/realtek/realtek-smi.c-119-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-124-\ndrivers/net/dsa/realtek/realtek-smi.c:125:\t\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-126-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-128-\t\tgpiod_set_value(priv-\u003emdc, 1);\ndrivers/net/dsa/realtek/realtek-smi.c:129:\t\trealtek_smi_clk_delay(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-130-\t\tu = !!gpiod_get_value(priv-\u003emdio);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-138-\ndrivers/net/dsa/realtek/realtek-smi.c:139:static int realtek_smi_wait_for_ack(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/realtek-smi.c-140-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-146-\ndrivers/net/dsa/realtek/realtek-smi.c:147:\t\trealtek_smi_read_bits(priv, 1, \u0026ack);\ndrivers/net/dsa/realtek/realtek-smi.c-148-\t\tif (ack == 0)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-159-\ndrivers/net/dsa/realtek/realtek-smi.c:160:static int realtek_smi_write_byte(struct realtek_priv *priv, u8 data)\ndrivers/net/dsa/realtek/realtek-smi.c-161-{\ndrivers/net/dsa/realtek/realtek-smi.c:162:\trealtek_smi_write_bits(priv, data, 8);\ndrivers/net/dsa/realtek/realtek-smi.c:163:\treturn realtek_smi_wait_for_ack(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-164-}\ndrivers/net/dsa/realtek/realtek-smi.c-165-\ndrivers/net/dsa/realtek/realtek-smi.c:166:static int realtek_smi_write_byte_noack(struct realtek_priv *priv, u8 data)\ndrivers/net/dsa/realtek/realtek-smi.c-167-{\ndrivers/net/dsa/realtek/realtek-smi.c:168:\trealtek_smi_write_bits(priv, data, 8);\ndrivers/net/dsa/realtek/realtek-smi.c-169-\treturn 0;\n--\ndrivers/net/dsa/realtek/realtek-smi.c-171-\ndrivers/net/dsa/realtek/realtek-smi.c:172:static int realtek_smi_read_byte0(struct realtek_priv *priv, u8 *data)\ndrivers/net/dsa/realtek/realtek-smi.c-173-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-176-\t/* Read data */\ndrivers/net/dsa/realtek/realtek-smi.c:177:\trealtek_smi_read_bits(priv, 8, \u0026t);\ndrivers/net/dsa/realtek/realtek-smi.c-178-\t*data = (t \u0026 0xff);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-180-\t/* Send an ACK */\ndrivers/net/dsa/realtek/realtek-smi.c:181:\trealtek_smi_write_bits(priv, 0x00, 1);\ndrivers/net/dsa/realtek/realtek-smi.c-182-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-185-\ndrivers/net/dsa/realtek/realtek-smi.c:186:static int realtek_smi_read_byte1(struct realtek_priv *priv, u8 *data)\ndrivers/net/dsa/realtek/realtek-smi.c-187-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-190-\t/* Read data */\ndrivers/net/dsa/realtek/realtek-smi.c:191:\trealtek_smi_read_bits(priv, 8, \u0026t);\ndrivers/net/dsa/realtek/realtek-smi.c-192-\t*data = (t \u0026 0xff);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-194-\t/* Send an ACK */\ndrivers/net/dsa/realtek/realtek-smi.c:195:\trealtek_smi_write_bits(priv, 0x01, 1);\ndrivers/net/dsa/realtek/realtek-smi.c-196-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-199-\ndrivers/net/dsa/realtek/realtek-smi.c:200:static int realtek_smi_read_reg(struct realtek_priv *priv, u32 addr, u32 *data)\ndrivers/net/dsa/realtek/realtek-smi.c-201-{\n--\ndrivers/net/dsa/realtek/realtek-smi.c-208-\ndrivers/net/dsa/realtek/realtek-smi.c:209:\trealtek_smi_start(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-210-\ndrivers/net/dsa/realtek/realtek-smi.c-211-\t/* Send READ command */\ndrivers/net/dsa/realtek/realtek-smi.c:212:\tret = realtek_smi_write_byte(priv, priv-\u003evariant-\u003ecmd_read);\ndrivers/net/dsa/realtek/realtek-smi.c-213-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-216-\t/* Set ADDR[7:0] */\ndrivers/net/dsa/realtek/realtek-smi.c:217:\tret = realtek_smi_write_byte(priv, addr \u0026 0xff);\ndrivers/net/dsa/realtek/realtek-smi.c-218-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-221-\t/* Set ADDR[15:8] */\ndrivers/net/dsa/realtek/realtek-smi.c:222:\tret = realtek_smi_write_byte(priv, addr \u003e\u003e 8);\ndrivers/net/dsa/realtek/realtek-smi.c-223-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-226-\t/* Read DATA[7:0] */\ndrivers/net/dsa/realtek/realtek-smi.c:227:\trealtek_smi_read_byte0(priv, \u0026lo);\ndrivers/net/dsa/realtek/realtek-smi.c-228-\t/* Read DATA[15:8] */\ndrivers/net/dsa/realtek/realtek-smi.c:229:\trealtek_smi_read_byte1(priv, \u0026hi);\ndrivers/net/dsa/realtek/realtek-smi.c-230-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-235- out:\ndrivers/net/dsa/realtek/realtek-smi.c:236:\trealtek_smi_stop(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-237-\tspin_unlock_irqrestore(\u0026priv-\u003elock, flags);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-241-\ndrivers/net/dsa/realtek/realtek-smi.c:242:static int realtek_smi_write_reg(struct realtek_priv *priv,\ndrivers/net/dsa/realtek/realtek-smi.c-243-\t\t\t\t u32 addr, u32 data, bool ack)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-249-\ndrivers/net/dsa/realtek/realtek-smi.c:250:\trealtek_smi_start(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-251-\ndrivers/net/dsa/realtek/realtek-smi.c-252-\t/* Send WRITE command */\ndrivers/net/dsa/realtek/realtek-smi.c:253:\tret = realtek_smi_write_byte(priv, priv-\u003evariant-\u003ecmd_write);\ndrivers/net/dsa/realtek/realtek-smi.c-254-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-257-\t/* Set ADDR[7:0] */\ndrivers/net/dsa/realtek/realtek-smi.c:258:\tret = realtek_smi_write_byte(priv, addr \u0026 0xff);\ndrivers/net/dsa/realtek/realtek-smi.c-259-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-262-\t/* Set ADDR[15:8] */\ndrivers/net/dsa/realtek/realtek-smi.c:263:\tret = realtek_smi_write_byte(priv, addr \u003e\u003e 8);\ndrivers/net/dsa/realtek/realtek-smi.c-264-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-267-\t/* Write DATA[7:0] */\ndrivers/net/dsa/realtek/realtek-smi.c:268:\tret = realtek_smi_write_byte(priv, data \u0026 0xff);\ndrivers/net/dsa/realtek/realtek-smi.c-269-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-273-\tif (ack)\ndrivers/net/dsa/realtek/realtek-smi.c:274:\t\tret = realtek_smi_write_byte(priv, data \u003e\u003e 8);\ndrivers/net/dsa/realtek/realtek-smi.c-275-\telse\ndrivers/net/dsa/realtek/realtek-smi.c:276:\t\tret = realtek_smi_write_byte_noack(priv, data \u003e\u003e 8);\ndrivers/net/dsa/realtek/realtek-smi.c-277-\tif (ret)\n--\ndrivers/net/dsa/realtek/realtek-smi.c-282- out:\ndrivers/net/dsa/realtek/realtek-smi.c:283:\trealtek_smi_stop(priv);\ndrivers/net/dsa/realtek/realtek-smi.c-284-\tspin_unlock_irqrestore(\u0026priv-\u003elock, flags);\n--\ndrivers/net/dsa/realtek/realtek-smi.c-292- */\ndrivers/net/dsa/realtek/realtek-smi.c:293:static int realtek_smi_write_reg_noack(void *ctx, u32 reg, u32 val)\ndrivers/net/dsa/realtek/realtek-smi.c-294-{\ndrivers/net/dsa/realtek/realtek-smi.c:295:\treturn realtek_smi_write_reg(ctx, reg, val, false);\ndrivers/net/dsa/realtek/realtek-smi.c-296-}\n--\ndrivers/net/dsa/realtek/realtek-smi.c-299-\ndrivers/net/dsa/realtek/realtek-smi.c:300:static int realtek_smi_write(void *ctx, u32 reg, u32 val)\ndrivers/net/dsa/realtek/realtek-smi.c-301-{\ndrivers/net/dsa/realtek/realtek-smi.c:302:\tstruct realtek_priv *priv = ctx;\ndrivers/net/dsa/realtek/realtek-smi.c-303-\ndrivers/net/dsa/realtek/realtek-smi.c:304:\treturn realtek_smi_write_reg(priv, reg, val, true);\ndrivers/net/dsa/realtek/realtek-smi.c-305-}\ndrivers/net/dsa/realtek/realtek-smi.c-306-\ndrivers/net/dsa/realtek/realtek-smi.c:307:static int realtek_smi_read(void *ctx, u32 reg, u32 *val)\ndrivers/net/dsa/realtek/realtek-smi.c-308-{\ndrivers/net/dsa/realtek/realtek-smi.c:309:\tstruct realtek_priv *priv = ctx;\ndrivers/net/dsa/realtek/realtek-smi.c-310-\ndrivers/net/dsa/realtek/realtek-smi.c:311:\treturn realtek_smi_read_reg(priv, reg, val);\ndrivers/net/dsa/realtek/realtek-smi.c-312-}\ndrivers/net/dsa/realtek/realtek-smi.c-313-\ndrivers/net/dsa/realtek/realtek-smi.c:314:static const struct realtek_interface_info realtek_smi_info = {\ndrivers/net/dsa/realtek/realtek-smi.c:315:\t.reg_read = realtek_smi_read,\ndrivers/net/dsa/realtek/realtek-smi.c:316:\t.reg_write = realtek_smi_write,\ndrivers/net/dsa/realtek/realtek-smi.c-317-};\n--\ndrivers/net/dsa/realtek/realtek-smi.c-319-/**\ndrivers/net/dsa/realtek/realtek-smi.c:320: * realtek_smi_probe() - Probe a platform device for an SMI-connected switch\ndrivers/net/dsa/realtek/realtek-smi.c-321- * @pdev: platform_device to probe on.\n--\ndrivers/net/dsa/realtek/realtek-smi.c-330- */\ndrivers/net/dsa/realtek/realtek-smi.c:331:int realtek_smi_probe(struct platform_device *pdev)\ndrivers/net/dsa/realtek/realtek-smi.c-332-{\ndrivers/net/dsa/realtek/realtek-smi.c-333-\tstruct device *dev = \u0026pdev-\u003edev;\ndrivers/net/dsa/realtek/realtek-smi.c:334:\tstruct realtek_priv *priv;\ndrivers/net/dsa/realtek/realtek-smi.c-335-\tint ret;\ndrivers/net/dsa/realtek/realtek-smi.c-336-\ndrivers/net/dsa/realtek/realtek-smi.c:337:\tpriv = rtl83xx_probe(dev, \u0026realtek_smi_info);\ndrivers/net/dsa/realtek/realtek-smi.c-338-\tif (IS_ERR(priv))\n--\ndrivers/net/dsa/realtek/realtek-smi.c-353-\ndrivers/net/dsa/realtek/realtek-smi.c:354:\tpriv-\u003ewrite_reg_noack = realtek_smi_write_reg_noack;\ndrivers/net/dsa/realtek/realtek-smi.c-355-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-363-}\ndrivers/net/dsa/realtek/realtek-smi.c:364:EXPORT_SYMBOL_NS_GPL(realtek_smi_probe, \"REALTEK_DSA\");\ndrivers/net/dsa/realtek/realtek-smi.c-365-\ndrivers/net/dsa/realtek/realtek-smi.c-366-/**\ndrivers/net/dsa/realtek/realtek-smi.c:367: * realtek_smi_remove() - Remove the driver of a SMI-connected switch\ndrivers/net/dsa/realtek/realtek-smi.c-368- * @pdev: platform_device to be removed.\n--\ndrivers/net/dsa/realtek/realtek-smi.c-375- */\ndrivers/net/dsa/realtek/realtek-smi.c:376:void realtek_smi_remove(struct platform_device *pdev)\ndrivers/net/dsa/realtek/realtek-smi.c-377-{\ndrivers/net/dsa/realtek/realtek-smi.c:378:\tstruct realtek_priv *priv = platform_get_drvdata(pdev);\ndrivers/net/dsa/realtek/realtek-smi.c-379-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-386-}\ndrivers/net/dsa/realtek/realtek-smi.c:387:EXPORT_SYMBOL_NS_GPL(realtek_smi_remove, \"REALTEK_DSA\");\ndrivers/net/dsa/realtek/realtek-smi.c-388-\ndrivers/net/dsa/realtek/realtek-smi.c-389-/**\ndrivers/net/dsa/realtek/realtek-smi.c:390: * realtek_smi_shutdown() - Shutdown the driver of a SMI-connected switch\ndrivers/net/dsa/realtek/realtek-smi.c-391- * @pdev: platform_device shutting down.\n--\ndrivers/net/dsa/realtek/realtek-smi.c-398- */\ndrivers/net/dsa/realtek/realtek-smi.c:399:void realtek_smi_shutdown(struct platform_device *pdev)\ndrivers/net/dsa/realtek/realtek-smi.c-400-{\ndrivers/net/dsa/realtek/realtek-smi.c:401:\tstruct realtek_priv *priv = platform_get_drvdata(pdev);\ndrivers/net/dsa/realtek/realtek-smi.c-402-\n--\ndrivers/net/dsa/realtek/realtek-smi.c-407-}\ndrivers/net/dsa/realtek/realtek-smi.c:408:EXPORT_SYMBOL_NS_GPL(realtek_smi_shutdown, \"REALTEK_DSA\");\n--\ndrivers/net/dsa/realtek/realtek-smi.h-7-\ndrivers/net/dsa/realtek/realtek-smi.h:8:static inline int realtek_smi_driver_register(struct platform_driver *drv)\ndrivers/net/dsa/realtek/realtek-smi.h-9-{\n--\ndrivers/net/dsa/realtek/realtek-smi.h-12-\ndrivers/net/dsa/realtek/realtek-smi.h:13:static inline void realtek_smi_driver_unregister(struct platform_driver *drv)\ndrivers/net/dsa/realtek/realtek-smi.h-14-{\n--\ndrivers/net/dsa/realtek/realtek-smi.h-17-\ndrivers/net/dsa/realtek/realtek-smi.h:18:int realtek_smi_probe(struct platform_device *pdev);\ndrivers/net/dsa/realtek/realtek-smi.h:19:void realtek_smi_remove(struct platform_device *pdev);\ndrivers/net/dsa/realtek/realtek-smi.h:20:void realtek_smi_shutdown(struct platform_device *pdev);\ndrivers/net/dsa/realtek/realtek-smi.h-21-\n--\ndrivers/net/dsa/realtek/realtek-smi.h-23-\ndrivers/net/dsa/realtek/realtek-smi.h:24:static inline int realtek_smi_driver_register(struct platform_driver *drv)\ndrivers/net/dsa/realtek/realtek-smi.h-25-{\n--\ndrivers/net/dsa/realtek/realtek-smi.h-28-\ndrivers/net/dsa/realtek/realtek-smi.h:29:static inline void realtek_smi_driver_unregister(struct platform_driver *drv)\ndrivers/net/dsa/realtek/realtek-smi.h-30-{\n--\ndrivers/net/dsa/realtek/realtek-smi.h-32-\ndrivers/net/dsa/realtek/realtek-smi.h:33:static inline int realtek_smi_probe(struct platform_device *pdev)\ndrivers/net/dsa/realtek/realtek-smi.h-34-{\n--\ndrivers/net/dsa/realtek/realtek-smi.h-37-\ndrivers/net/dsa/realtek/realtek-smi.h:38:static inline void realtek_smi_remove(struct platform_device *pdev)\ndrivers/net/dsa/realtek/realtek-smi.h-39-{\n--\ndrivers/net/dsa/realtek/realtek-smi.h-41-\ndrivers/net/dsa/realtek/realtek-smi.h:42:static inline void realtek_smi_shutdown(struct platform_device *pdev)\ndrivers/net/dsa/realtek/realtek-smi.h-43-{\n--\ndrivers/net/dsa/realtek/realtek.h=20=struct phylink_mac_ops;\ndrivers/net/dsa/realtek/realtek.h:21:struct realtek_ops;\ndrivers/net/dsa/realtek/realtek.h-22-\n--\ndrivers/net/dsa/realtek/realtek.h=41=struct rtl8366_vlan_4k {\n--\ndrivers/net/dsa/realtek/realtek.h-47-\ndrivers/net/dsa/realtek/realtek.h:48:struct realtek_fdb_entry {\ndrivers/net/dsa/realtek/realtek.h-49-\tu8 mac_addr[ETH_ALEN];\n--\ndrivers/net/dsa/realtek/realtek.h-53-\ndrivers/net/dsa/realtek/realtek.h:54:struct realtek_priv {\ndrivers/net/dsa/realtek/realtek.h-55-\tstruct device\t\t*dev;\n--\ndrivers/net/dsa/realtek/realtek.h-80-\ndrivers/net/dsa/realtek/realtek.h:81:\tconst struct realtek_variant *variant;\ndrivers/net/dsa/realtek/realtek.h-82-\n--\ndrivers/net/dsa/realtek/realtek.h-93-\ndrivers/net/dsa/realtek/realtek.h:94:\tconst struct realtek_ops *ops;\ndrivers/net/dsa/realtek/realtek.h-95-\tint\t\t\t(*write_reg_noack)(void *ctx, u32 addr, u32 data);\n--\ndrivers/net/dsa/realtek/realtek.h-104-/*\ndrivers/net/dsa/realtek/realtek.h:105: * struct realtek_ops - vtable for the per-SMI-chiptype operations\ndrivers/net/dsa/realtek/realtek.h-106- * @detect: detects the chiptype\ndrivers/net/dsa/realtek/realtek.h-107- */\ndrivers/net/dsa/realtek/realtek.h:108:struct realtek_ops {\ndrivers/net/dsa/realtek/realtek.h:109:\tint\t(*detect)(struct realtek_priv *priv);\ndrivers/net/dsa/realtek/realtek.h:110:\tint\t(*reset_chip)(struct realtek_priv *priv);\ndrivers/net/dsa/realtek/realtek.h:111:\tint\t(*setup)(struct realtek_priv *priv);\ndrivers/net/dsa/realtek/realtek.h:112:\tint\t(*get_mib_counter)(struct realtek_priv *priv,\ndrivers/net/dsa/realtek/realtek.h-113-\t\t\t\t   int port,\n--\ndrivers/net/dsa/realtek/realtek.h-115-\t\t\t\t   u64 *mibvalue);\ndrivers/net/dsa/realtek/realtek.h:116:\tint\t(*get_vlan_mc)(struct realtek_priv *priv, u32 index,\ndrivers/net/dsa/realtek/realtek.h-117-\t\t\t       struct rtl8366_vlan_mc *vlanmc);\ndrivers/net/dsa/realtek/realtek.h:118:\tint\t(*set_vlan_mc)(struct realtek_priv *priv, u32 index,\ndrivers/net/dsa/realtek/realtek.h-119-\t\t\t       const struct rtl8366_vlan_mc *vlanmc);\ndrivers/net/dsa/realtek/realtek.h:120:\tint\t(*get_vlan_4k)(struct realtek_priv *priv, u32 vid,\ndrivers/net/dsa/realtek/realtek.h-121-\t\t\t       struct rtl8366_vlan_4k *vlan4k);\ndrivers/net/dsa/realtek/realtek.h:122:\tint\t(*set_vlan_4k)(struct realtek_priv *priv,\ndrivers/net/dsa/realtek/realtek.h-123-\t\t\t       const struct rtl8366_vlan_4k *vlan4k);\ndrivers/net/dsa/realtek/realtek.h:124:\tint\t(*get_mc_index)(struct realtek_priv *priv, int port, int *val);\ndrivers/net/dsa/realtek/realtek.h:125:\tint\t(*set_mc_index)(struct realtek_priv *priv, int port, int index);\ndrivers/net/dsa/realtek/realtek.h:126:\tbool\t(*is_vlan_valid)(struct realtek_priv *priv, unsigned int vlan);\ndrivers/net/dsa/realtek/realtek.h:127:\tint\t(*enable_vlan)(struct realtek_priv *priv, bool enable);\ndrivers/net/dsa/realtek/realtek.h:128:\tint\t(*enable_vlan4k)(struct realtek_priv *priv, bool enable);\ndrivers/net/dsa/realtek/realtek.h:129:\tint\t(*enable_port)(struct realtek_priv *priv, int port, bool enable);\ndrivers/net/dsa/realtek/realtek.h:130:\tint\t(*port_add_isolation)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-131-\t\t\t\t      u32 mask);\ndrivers/net/dsa/realtek/realtek.h:132:\tint\t(*port_remove_isolation)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-133-\t\t\t\t\t u32 mask);\ndrivers/net/dsa/realtek/realtek.h:134:\tint\t(*port_set_efid)(struct realtek_priv *priv, int port, u32 efid);\ndrivers/net/dsa/realtek/realtek.h:135:\tint\t(*port_set_learning)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-136-\t\t\t\t     bool enable);\ndrivers/net/dsa/realtek/realtek.h:137:\tint\t(*port_set_ucast_flood)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-138-\t\t\t\t\tbool enable);\ndrivers/net/dsa/realtek/realtek.h:139:\tint\t(*port_set_mcast_flood)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-140-\t\t\t\t\tbool enable);\ndrivers/net/dsa/realtek/realtek.h:141:\tint\t(*port_set_bcast_flood)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-142-\t\t\t\t\tbool enable);\ndrivers/net/dsa/realtek/realtek.h:143:\tint\t(*l2_add_uc)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-144-\t\t\t     const unsigned char addr[ETH_ALEN],\ndrivers/net/dsa/realtek/realtek.h-145-\t\t\t     u16 efid, u16 vid);\ndrivers/net/dsa/realtek/realtek.h:146:\tint\t(*l2_del_uc)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-147-\t\t\t     const unsigned char addr[ETH_ALEN],\ndrivers/net/dsa/realtek/realtek.h-148-\t\t\t     u16 efid, u16 vid);\ndrivers/net/dsa/realtek/realtek.h:149:\tint\t(*l2_get_next_uc)(struct realtek_priv *priv, u16 *addr,\ndrivers/net/dsa/realtek/realtek.h:150:\t\t\t\t  int port, struct realtek_fdb_entry *entry);\ndrivers/net/dsa/realtek/realtek.h:151:\tint\t(*l2_add_mc)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-152-\t\t\t     const unsigned char addr[ETH_ALEN], u16 vid);\ndrivers/net/dsa/realtek/realtek.h:153:\tint\t(*l2_del_mc)(struct realtek_priv *priv, int port,\ndrivers/net/dsa/realtek/realtek.h-154-\t\t\t     const unsigned char addr[ETH_ALEN], u16 vid);\ndrivers/net/dsa/realtek/realtek.h:155:\tint\t(*l2_flush)(struct realtek_priv *priv, int port, u16 vid);\ndrivers/net/dsa/realtek/realtek.h:156:\tint\t(*phy_read)(struct realtek_priv *priv, int phy, int regnum);\ndrivers/net/dsa/realtek/realtek.h:157:\tint\t(*phy_write)(struct realtek_priv *priv, int phy, int regnum,\ndrivers/net/dsa/realtek/realtek.h-158-\t\t\t     u16 val);\n--\ndrivers/net/dsa/realtek/realtek.h-160-\ndrivers/net/dsa/realtek/realtek.h:161:struct realtek_variant {\ndrivers/net/dsa/realtek/realtek.h-162-\tconst struct dsa_switch_ops *ds_ops;\ndrivers/net/dsa/realtek/realtek.h:163:\tconst struct realtek_ops *ops;\ndrivers/net/dsa/realtek/realtek.h-164-\tconst struct phylink_mac_ops *phylink_mac_ops;\n--\ndrivers/net/dsa/realtek/realtek.h-171-/* RTL8366 library helpers */\ndrivers/net/dsa/realtek/realtek.h:172:int rtl8366_mc_is_used(struct realtek_priv *priv, int mc_index, int *used);\ndrivers/net/dsa/realtek/realtek.h:173:int rtl8366_set_vlan(struct realtek_priv *priv, int vid, u32 member,\ndrivers/net/dsa/realtek/realtek.h-174-\t\t     u32 untag, u32 fid);\ndrivers/net/dsa/realtek/realtek.h:175:int rtl8366_set_pvid(struct realtek_priv *priv, unsigned int port,\ndrivers/net/dsa/realtek/realtek.h-176-\t\t     unsigned int vid);\ndrivers/net/dsa/realtek/realtek.h:177:int rtl8366_enable_vlan4k(struct realtek_priv *priv, bool enable);\ndrivers/net/dsa/realtek/realtek.h:178:int rtl8366_enable_vlan(struct realtek_priv *priv, bool enable);\ndrivers/net/dsa/realtek/realtek.h:179:int rtl8366_reset_vlan(struct realtek_priv *priv);\ndrivers/net/dsa/realtek/realtek.h-180-int rtl8366_vlan_add(struct dsa_switch *ds, int port,\n--\ndrivers/net/dsa/realtek/realtek.h=188=void rtl8366_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data);\ndrivers/net/dsa/realtek/realtek.h-189-\ndrivers/net/dsa/realtek/realtek.h:190:extern const struct realtek_variant rtl8366rb_variant;\ndrivers/net/dsa/realtek/realtek.h:191:extern const struct realtek_variant rtl8365mb_variant;\ndrivers/net/dsa/realtek/realtek.h-192-\n--\ndrivers/net/dsa/realtek/rtl8365mb_l2.c=231=static void rtl8365mb_l2_mc_to_data(const struct rtl8365mb_l2_mc *mc, u16 *data)\n\n"
}

gemini-3.7-flash

null

null

							input: 34659
							output: 36
							thoughts: 38
						

Here's my take on those thoughts:

**Analyzing the Kconfig for Realtek DSA Drivers**

Okay, so I'm diving into the Kconfig files now, specifically looking for `CONFIG_NET_DSA_REALTEK` and `CONFIG_NET_DSA_REALTEK_RTL8365MB`. I need to understand how these drivers are configured within the broader networking stack. I'm likely trying to trace dependencies, find out what other options they rely on, and understand any conditional compilation logic. Is `RTL8365MB` a specific chip? I'll probably be looking to see if it's a sub-option, or a general enablement option. I'll need to know whether the configuration interacts with specific hardware revisions or platform features. I'm hoping to get a quick grasp of the build process and how these options fit into the overall picture.

{
  "Expression": "NET_DSA_REALTEK",
  "PathPrefix": "drivers/net/dsa/realtek"
}

{
  "Output": "drivers/net/dsa/realtek/Kconfig-1-# SPDX-License-Identifier: GPL-2.0-only\ndrivers/net/dsa/realtek/Kconfig:2:menuconfig NET_DSA_REALTEK\ndrivers/net/dsa/realtek/Kconfig-3-\ttristate \"Realtek Ethernet switch family support\"\n--\ndrivers/net/dsa/realtek/Kconfig-15-\ndrivers/net/dsa/realtek/Kconfig:16:if NET_DSA_REALTEK\ndrivers/net/dsa/realtek/Kconfig-17-\ndrivers/net/dsa/realtek/Kconfig:18:config NET_DSA_REALTEK_MDIO\ndrivers/net/dsa/realtek/Kconfig-19-\tbool \"Realtek MDIO interface support\"\n--\ndrivers/net/dsa/realtek/Kconfig-24-\ndrivers/net/dsa/realtek/Kconfig:25:config NET_DSA_REALTEK_SMI\ndrivers/net/dsa/realtek/Kconfig-26-\tbool \"Realtek SMI interface support\"\n--\ndrivers/net/dsa/realtek/Kconfig-31-\ndrivers/net/dsa/realtek/Kconfig:32:config NET_DSA_REALTEK_RTL8365MB\ndrivers/net/dsa/realtek/Kconfig-33-\ttristate \"Realtek RTL8365MB switch driver\"\ndrivers/net/dsa/realtek/Kconfig:34:\tdepends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO\ndrivers/net/dsa/realtek/Kconfig-35-\tselect NET_DSA_TAG_RTL8_4\n--\ndrivers/net/dsa/realtek/Kconfig-38-\ndrivers/net/dsa/realtek/Kconfig:39:config NET_DSA_REALTEK_RTL8366RB\ndrivers/net/dsa/realtek/Kconfig-40-\ttristate \"Realtek RTL8366RB switch driver\"\ndrivers/net/dsa/realtek/Kconfig:41:\tdepends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO\ndrivers/net/dsa/realtek/Kconfig-42-\tselect NET_DSA_TAG_RTL4_A\n--\ndrivers/net/dsa/realtek/Kconfig-45-\ndrivers/net/dsa/realtek/Kconfig:46:config NET_DSA_REALTEK_RTL8366RB_LEDS\ndrivers/net/dsa/realtek/Kconfig-47-\tbool\ndrivers/net/dsa/realtek/Kconfig:48:\tdepends on (LEDS_CLASS=y || LEDS_CLASS=NET_DSA_REALTEK_RTL8366RB)\ndrivers/net/dsa/realtek/Kconfig:49:\tdepends on NET_DSA_REALTEK_RTL8366RB\ndrivers/net/dsa/realtek/Kconfig:50:\tdefault NET_DSA_REALTEK_RTL8366RB\ndrivers/net/dsa/realtek/Kconfig-51-\n--\ndrivers/net/dsa/realtek/Makefile-1-# SPDX-License-Identifier: GPL-2.0\ndrivers/net/dsa/realtek/Makefile:2:obj-$(CONFIG_NET_DSA_REALTEK)\t\t+= realtek_dsa.o\ndrivers/net/dsa/realtek/Makefile-3-realtek_dsa-objs\t\t\t:= rtl83xx.o\ndrivers/net/dsa/realtek/Makefile-4-\ndrivers/net/dsa/realtek/Makefile:5:ifdef CONFIG_NET_DSA_REALTEK_MDIO\ndrivers/net/dsa/realtek/Makefile-6-realtek_dsa-objs += realtek-mdio.o\ndrivers/net/dsa/realtek/Makefile=7=endif\ndrivers/net/dsa/realtek/Makefile-8-\ndrivers/net/dsa/realtek/Makefile:9:ifdef CONFIG_NET_DSA_REALTEK_SMI\ndrivers/net/dsa/realtek/Makefile-10-realtek_dsa-objs += realtek-smi.o\ndrivers/net/dsa/realtek/Makefile=11=endif\ndrivers/net/dsa/realtek/Makefile-12-\ndrivers/net/dsa/realtek/Makefile:13:obj-$(CONFIG_NET_DSA_REALTEK_RTL8366RB) += rtl8366.o\ndrivers/net/dsa/realtek/Makefile-14-rtl8366-objs \t\t\t\t:= rtl8366-core.o rtl8366rb.o\ndrivers/net/dsa/realtek/Makefile:15:ifdef CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS\ndrivers/net/dsa/realtek/Makefile-16-rtl8366-objs \t\t\t\t+= rtl8366rb-leds.o\ndrivers/net/dsa/realtek/Makefile=17=endif\ndrivers/net/dsa/realtek/Makefile:18:obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o\ndrivers/net/dsa/realtek/Makefile-19-rtl8365mb-objs := rtl8365mb_main.o \\\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-5-\ndrivers/net/dsa/realtek/realtek-mdio.h:6:#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_MDIO)\ndrivers/net/dsa/realtek/realtek-mdio.h-7-\n--\ndrivers/net/dsa/realtek/realtek-mdio.h=20=void realtek_mdio_shutdown(struct mdio_device *mdiodev);\ndrivers/net/dsa/realtek/realtek-mdio.h-21-\ndrivers/net/dsa/realtek/realtek-mdio.h:22:#else /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_MDIO) */\ndrivers/net/dsa/realtek/realtek-mdio.h-23-\n--\ndrivers/net/dsa/realtek/realtek-mdio.h=42=static inline void realtek_mdio_shutdown(struct mdio_device *mdiodev)\n--\ndrivers/net/dsa/realtek/realtek-mdio.h-45-\ndrivers/net/dsa/realtek/realtek-mdio.h:46:#endif /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_MDIO) */\ndrivers/net/dsa/realtek/realtek-mdio.h-47-\n--\ndrivers/net/dsa/realtek/realtek-smi.h-5-\ndrivers/net/dsa/realtek/realtek-smi.h:6:#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_SMI)\ndrivers/net/dsa/realtek/realtek-smi.h-7-\n--\ndrivers/net/dsa/realtek/realtek-smi.h=20=void realtek_smi_shutdown(struct platform_device *pdev);\ndrivers/net/dsa/realtek/realtek-smi.h-21-\ndrivers/net/dsa/realtek/realtek-smi.h:22:#else /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_SMI) */\ndrivers/net/dsa/realtek/realtek-smi.h-23-\n--\ndrivers/net/dsa/realtek/realtek-smi.h=42=static inline void realtek_smi_shutdown(struct platform_device *pdev)\n--\ndrivers/net/dsa/realtek/realtek-smi.h-45-\ndrivers/net/dsa/realtek/realtek-smi.h:46:#endif /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_SMI) */\ndrivers/net/dsa/realtek/realtek-smi.h-47-\n--\ndrivers/net/dsa/realtek/rtl8366rb.h=47=enum rtl8366_ledgroup_mode {\n--\ndrivers/net/dsa/realtek/rtl8366rb.h-67-\ndrivers/net/dsa/realtek/rtl8366rb.h:68:#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS)\ndrivers/net/dsa/realtek/rtl8366rb.h-69-\n--\ndrivers/net/dsa/realtek/rtl8366rb.h=94=struct rtl8366rb {\n--\ndrivers/net/dsa/realtek/rtl8366rb.h-96-\tbool pvid_enabled[RTL8366RB_NUM_PORTS];\ndrivers/net/dsa/realtek/rtl8366rb.h:97:#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS)\ndrivers/net/dsa/realtek/rtl8366rb.h-98-\tstruct rtl8366rb_led leds[RTL8366RB_NUM_PORTS][RTL8366RB_NUM_LEDGROUPS];\n"
}

gemini-3.7-flash

null

null

							input: 37286
							output: 42
							thoughts: 44
						

**Diving into Realtek DSA Switch Registration**

Okay, so I need to refresh my memory on how these `rtl83xx` chips and DSA switches get integrated into the system. Let's see... the most logical place to start is likely with the `rtl83xx_probe` function or, more generally, how these DSA switches are registered and probed. Right, that makes sense.

Now, where's that code? Ah, yes, I believe I remember seeing Realtek's DSA driver in `drivers/net/dsa/realtek/rtl83xx.c`. Time to dig in and see how they've implemented the probing and registration process. Should be an interesting read.

{
  "File": "drivers/net/dsa/realtek/rtl83xx.c",
  "FirstLine": 1,
  "LineCount": 80
}

{
  "Contents": "   1:\t// SPDX-License-Identifier: GPL-2.0+\n   2:\t\n   3:\t#include \u003clinux/module.h\u003e\n   4:\t#include \u003clinux/regmap.h\u003e\n   5:\t#include \u003clinux/of_mdio.h\u003e\n   6:\t#include \u003clinux/if_bridge.h\u003e\n   7:\t#include \u003clinux/etherdevice.h\u003e\n   8:\t\n   9:\t#include \"realtek.h\"\n  10:\t#include \"rtl83xx.h\"\n  11:\t\n  12:\t/**\n  13:\t * rtl83xx_lock() - Locks the mutex used by regmaps\n  14:\t * @ctx: realtek_priv pointer\n  15:\t *\n  16:\t * This function is passed to regmap to be used as the lock function.\n  17:\t * It is also used externally to block regmap before executing multiple\n  18:\t * operations that must happen in sequence (which will use\n  19:\t * realtek_priv.map_nolock instead).\n  20:\t *\n  21:\t * Context: Can sleep. Holds priv-\u003emap_lock lock.\n  22:\t * Return: nothing\n  23:\t */\n  24:\tvoid rtl83xx_lock(void *ctx)\n  25:\t{\n  26:\t\tstruct realtek_priv *priv = ctx;\n  27:\t\n  28:\t\tmutex_lock(\u0026priv-\u003emap_lock);\n  29:\t}\n  30:\tEXPORT_SYMBOL_NS_GPL(rtl83xx_lock, \"REALTEK_DSA\");\n  31:\t\n  32:\t/**\n  33:\t * rtl83xx_unlock() - Unlocks the mutex used by regmaps\n  34:\t * @ctx: realtek_priv pointer\n  35:\t *\n  36:\t * This function unlocks the lock acquired by rtl83xx_lock.\n  37:\t *\n  38:\t * Context: Releases priv-\u003emap_lock lock.\n  39:\t * Return: nothing\n  40:\t */\n  41:\tvoid rtl83xx_unlock(void *ctx)\n  42:\t{\n  43:\t\tstruct realtek_priv *priv = ctx;\n  44:\t\n  45:\t\tmutex_unlock(\u0026priv-\u003emap_lock);\n  46:\t}\n  47:\tEXPORT_SYMBOL_NS_GPL(rtl83xx_unlock, \"REALTEK_DSA\");\n  48:\t\n  49:\tstatic int rtl83xx_user_mdio_read(struct mii_bus *bus, int addr, int regnum)\n  50:\t{\n  51:\t\tstruct realtek_priv *priv = bus-\u003epriv;\n  52:\t\n  53:\t\treturn priv-\u003eops-\u003ephy_read(priv, addr, regnum);\n  54:\t}\n  55:\t\n  56:\tstatic int rtl83xx_user_mdio_write(struct mii_bus *bus, int addr, int regnum,\n  57:\t\t\t\t\t   u16 val)\n  58:\t{\n  59:\t\tstruct realtek_priv *priv = bus-\u003epriv;\n  60:\t\n  61:\t\treturn priv-\u003eops-\u003ephy_write(priv, addr, regnum, val);\n  62:\t}\n  63:\t\n  64:\t/**\n  65:\t * rtl83xx_setup_user_mdio() - register the user mii bus driver\n  66:\t * @ds: DSA switch associated with this user_mii_bus\n  67:\t *\n  68:\t * Registers the MDIO bus for built-in Ethernet PHYs, and associates it with\n  69:\t * the mandatory 'mdio' child OF node of the switch.\n  70:\t *\n  71:\t * Context: Can sleep.\n  72:\t * Return: 0 on success, negative value for failure.\n  73:\t */\n  74:\tint rtl83xx_setup_user_mdio(struct dsa_switch *ds)\n  75:\t{\n  76:\t\tstruct realtek_priv *priv = ds-\u003epriv;\n  77:\t\tstruct device_node *mdio_np;\n  78:\t\tstruct mii_bus *bus;\n  79:\t\tint ret = 0;\n  80:\t\n"
}

gemini-3.7-flash

null

null

							input: 38636
							output: 43
							thoughts: 15
						

Okay, let's dive into the rest of `rtl83xx.c`. I need to get a comprehensive understanding of this driver.

{
  "File": "drivers/net/dsa/realtek/rtl83xx.c",
  "FirstLine": 81,
  "LineCount": 80
}

{
  "Contents": "  81:\t\tmdio_np = of_get_child_by_name(priv-\u003edev-\u003eof_node, \"mdio\");\n  82:\t\tif (!mdio_np) {\n  83:\t\t\tdev_err(priv-\u003edev, \"no MDIO bus node\\n\");\n  84:\t\t\treturn -ENODEV;\n  85:\t\t}\n  86:\t\n  87:\t\tbus = devm_mdiobus_alloc(priv-\u003edev);\n  88:\t\tif (!bus) {\n  89:\t\t\tret = -ENOMEM;\n  90:\t\t\tgoto err_put_node;\n  91:\t\t}\n  92:\t\n  93:\t\tbus-\u003epriv = priv;\n  94:\t\tbus-\u003ename = \"Realtek user MII\";\n  95:\t\tbus-\u003eread = rtl83xx_user_mdio_read;\n  96:\t\tbus-\u003ewrite = rtl83xx_user_mdio_write;\n  97:\t\tsnprintf(bus-\u003eid, MII_BUS_ID_SIZE, \"%s:user_mii\", dev_name(priv-\u003edev));\n  98:\t\tbus-\u003eparent = priv-\u003edev;\n  99:\t\n 100:\t\tret = devm_of_mdiobus_register(priv-\u003edev, bus, mdio_np);\n 101:\t\tif (ret) {\n 102:\t\t\tdev_err(priv-\u003edev, \"unable to register MDIO bus %s\\n\",\n 103:\t\t\t\tbus-\u003eid);\n 104:\t\t\tgoto err_put_node;\n 105:\t\t}\n 106:\t\n 107:\t\tpriv-\u003euser_mii_bus = bus;\n 108:\t\n 109:\terr_put_node:\n 110:\t\tof_node_put(mdio_np);\n 111:\t\n 112:\t\treturn ret;\n 113:\t}\n 114:\tEXPORT_SYMBOL_NS_GPL(rtl83xx_setup_user_mdio, \"REALTEK_DSA\");\n 115:\t\n 116:\t/**\n 117:\t * rtl83xx_probe() - probe a Realtek switch\n 118:\t * @dev: the device being probed\n 119:\t * @interface_info: specific management interface info.\n 120:\t *\n 121:\t * This function initializes realtek_priv and reads data from the device tree\n 122:\t * node. The switch is hard resetted if a method is provided.\n 123:\t *\n 124:\t * Context: Can sleep.\n 125:\t * Return: Pointer to the realtek_priv or ERR_PTR() in case of failure.\n 126:\t *\n 127:\t * The realtek_priv pointer does not need to be freed as it is controlled by\n 128:\t * devres.\n 129:\t */\n 130:\tstruct realtek_priv *\n 131:\trtl83xx_probe(struct device *dev,\n 132:\t\t      const struct realtek_interface_info *interface_info)\n 133:\t{\n 134:\t\tconst struct realtek_variant *var;\n 135:\t\tstruct realtek_priv *priv;\n 136:\t\tstruct regmap_config rc = {\n 137:\t\t\t.reg_bits = 10, /* A4..A0 R4..R0 */\n 138:\t\t\t.val_bits = 16,\n 139:\t\t\t.reg_stride = 1,\n 140:\t\t\t.max_register = 0xffff,\n 141:\t\t\t.reg_format_endian = REGMAP_ENDIAN_BIG,\n 142:\t\t\t.reg_read = interface_info-\u003ereg_read,\n 143:\t\t\t.reg_write = interface_info-\u003ereg_write,\n 144:\t\t\t.cache_type = REGCACHE_NONE,\n 145:\t\t\t.lock = rtl83xx_lock,\n 146:\t\t\t.unlock = rtl83xx_unlock,\n 147:\t\t};\n 148:\t\tint ret;\n 149:\t\n 150:\t\tvar = of_device_get_match_data(dev);\n 151:\t\tif (!var)\n 152:\t\t\treturn ERR_PTR(-EINVAL);\n 153:\t\n 154:\t\tpriv = devm_kzalloc(dev, size_add(sizeof(*priv), var-\u003echip_data_sz),\n 155:\t\t\t\t    GFP_KERNEL);\n 156:\t\tif (!priv)\n 157:\t\t\treturn ERR_PTR(-ENOMEM);\n 158:\t\n 159:\t\tret = devm_mutex_init(dev, \u0026priv-\u003emap_lock);\n 160:\t\tif (ret)\n"
}

gemini-3.7-flash

null

null

							input: 39969
							output: 44
							thoughts: 15
						

Okay, let's dive into the rest of `rtl83xx_probe`. I need to understand what happens *after* the initial setup. I'm assuming, based on my familiarity with these sorts of device drivers, that the next stages will likely involve a few key areas:

**Further Examination of `rtl83xx_probe`**

First, I expect to see the driver setting up the hardware, maybe configuring some basic registers or initializing the PHY. It's likely checking for and initializing interrupt handlers, since efficient communication with the hardware is critical. We'll be looking for configuration of the device's clocking as well, since that's another prerequisite.

Then, there'll be a phase of resource allocation - memory, IRQs, perhaps DMA channels. I'm keeping an eye out for potential pitfalls there; resource conflicts can be a major pain to debug. Given this is a switch, there'll definitely be a need to register the switch device with the appropriate subsystem, probably providing information about its ports, capabilities, and the like. We need to be checking the status returned by these calls, errors from resource allocations, because that's always a good starting point for problems in the kernel.

Finally, I'm anticipating some form of initial switch configuration, maybe setting up VLANs, port speeds, or other basic parameters. It's really the initialization of that switch chip that is key here, how it initializes. I'm keen to spot any indications of error handling and how robust it is to various scenarios. Overall, I'm expecting to see a structured approach that carefully sets up the hardware, registers it with the system, and then brings it into a known initial state. This, obviously, is the standard.

{
  "File": "drivers/net/dsa/realtek/rtl83xx.c",
  "FirstLine": 161,
  "LineCount": 60
}

{
  "Contents": " 161:\t\t\treturn ERR_PTR(ret);\n 162:\t\n 163:\t\tret = devm_mutex_init(dev, \u0026priv-\u003evlan_lock);\n 164:\t\tif (ret)\n 165:\t\t\treturn ERR_PTR(ret);\n 166:\t\n 167:\t\tret = devm_mutex_init(dev, \u0026priv-\u003el2_lock);\n 168:\t\tif (ret)\n 169:\t\t\treturn ERR_PTR(ret);\n 170:\t\n 171:\t\trc.lock_arg = priv;\n 172:\t\tpriv-\u003emap = devm_regmap_init(dev, NULL, priv, \u0026rc);\n 173:\t\tif (IS_ERR(priv-\u003emap)) {\n 174:\t\t\tret = PTR_ERR(priv-\u003emap);\n 175:\t\t\tdev_err(dev, \"regmap init failed: %d\\n\", ret);\n 176:\t\t\treturn ERR_PTR(ret);\n 177:\t\t}\n 178:\t\n 179:\t\trc.disable_locking = true;\n 180:\t\tpriv-\u003emap_nolock = devm_regmap_init(dev, NULL, priv, \u0026rc);\n 181:\t\tif (IS_ERR(priv-\u003emap_nolock)) {\n 182:\t\t\tret = PTR_ERR(priv-\u003emap_nolock);\n 183:\t\t\tdev_err(dev, \"regmap init failed: %d\\n\", ret);\n 184:\t\t\treturn ERR_PTR(ret);\n 185:\t\t}\n 186:\t\n 187:\t\t/* Link forward and backward */\n 188:\t\tpriv-\u003edev = dev;\n 189:\t\tpriv-\u003evariant = var;\n 190:\t\tpriv-\u003eops = var-\u003eops;\n 191:\t\tpriv-\u003echip_data = (void *)priv + sizeof(*priv);\n 192:\t\n 193:\t\tspin_lock_init(\u0026priv-\u003elock);\n 194:\t\n 195:\t\tpriv-\u003eleds_disabled = of_property_read_bool(dev-\u003eof_node,\n 196:\t\t\t\t\t\t\t    \"realtek,disable-leds\");\n 197:\t\n 198:\t\t/* TODO: if power is software controlled, set up any regulators here */\n 199:\t\tpriv-\u003ereset_ctl = devm_reset_control_get_optional(dev, NULL);\n 200:\t\tif (IS_ERR(priv-\u003ereset_ctl))\n 201:\t\t\treturn dev_err_cast_probe(dev, priv-\u003ereset_ctl,\n 202:\t\t\t\t\t\t  \"failed to get reset control\\n\");\n 203:\t\n 204:\t\tpriv-\u003ereset = devm_gpiod_get_optional(dev, \"reset\", GPIOD_OUT_LOW);\n 205:\t\tif (IS_ERR(priv-\u003ereset)) {\n 206:\t\t\tdev_err(dev, \"failed to get RESET GPIO\\n\");\n 207:\t\t\treturn ERR_CAST(priv-\u003ereset);\n 208:\t\t}\n 209:\t\n 210:\t\tdev_set_drvdata(dev, priv);\n 211:\t\n 212:\t\tif (priv-\u003ereset_ctl || priv-\u003ereset) {\n 213:\t\t\trtl83xx_reset_assert(priv);\n 214:\t\t\tdev_dbg(dev, \"asserted RESET\\n\");\n 215:\t\t\tmsleep(REALTEK_HW_STOP_DELAY);\n 216:\t\t\trtl83xx_reset_deassert(priv);\n 217:\t\t\tmsleep(REALTEK_HW_START_DELAY);\n 218:\t\t\tdev_dbg(dev, \"deasserted RESET\\n\");\n 219:\t\t}\n 220:\t\n"
}

gemini-3.7-flash

null

null

							input: 41375
							output: 44
							thoughts: 15
						

Okay, let's dive into this `rtl83xx_probe` function and see what it's all about. I need to understand its role within this driver, how it interacts with the hardware, and what its specific responsibilities are. I'm going to look beyond the initial snippets and understand the flow and data management. I want to see the error handling and initialization steps. This is where the magic (or the problems) typically happen. Specifically, I'm trying to determine how it identifies the chip, configures it, and integrates with the overall network stack. The details matter: register writes, interrupt configuration, clock settings – I need to get a firm grip on all of it. I'm looking for anything that stands out, any optimizations, or potential areas for improvement. Let's see the rest of this function and get to work.

{
  "File": "drivers/net/dsa/realtek/rtl83xx.c",
  "FirstLine": 221,
  "LineCount": 70
}

{
  "Contents": " 221:\t\treturn priv;\n 222:\t}\n 223:\tEXPORT_SYMBOL_NS_GPL(rtl83xx_probe, \"REALTEK_DSA\");\n 224:\t\n 225:\t/**\n 226:\t * rtl83xx_register_switch() - detects and register a switch\n 227:\t * @priv: realtek_priv pointer\n 228:\t *\n 229:\t * This function first checks the switch chip ID and register a DSA\n 230:\t * switch.\n 231:\t *\n 232:\t * Context: Can sleep. Takes and releases priv-\u003emap_lock.\n 233:\t * Return: 0 on success, negative value for failure.\n 234:\t */\n 235:\tint rtl83xx_register_switch(struct realtek_priv *priv)\n 236:\t{\n 237:\t\tstruct dsa_switch *ds = \u0026priv-\u003eds;\n 238:\t\tint ret;\n 239:\t\n 240:\t\tret = priv-\u003eops-\u003edetect(priv);\n 241:\t\tif (ret) {\n 242:\t\t\tdev_err_probe(priv-\u003edev, ret, \"unable to detect switch\\n\");\n 243:\t\t\treturn ret;\n 244:\t\t}\n 245:\t\n 246:\t\tds-\u003epriv = priv;\n 247:\t\tds-\u003edev = priv-\u003edev;\n 248:\t\tds-\u003eops = priv-\u003evariant-\u003eds_ops;\n 249:\t\tds-\u003ephylink_mac_ops = priv-\u003evariant-\u003ephylink_mac_ops;\n 250:\t\tds-\u003enum_ports = priv-\u003enum_ports;\n 251:\t\n 252:\t\tret = dsa_register_switch(ds);\n 253:\t\tif (ret) {\n 254:\t\t\tdev_err_probe(priv-\u003edev, ret, \"unable to register switch\\n\");\n 255:\t\t\treturn ret;\n 256:\t\t}\n 257:\t\n 258:\t\treturn 0;\n 259:\t}\n 260:\tEXPORT_SYMBOL_NS_GPL(rtl83xx_register_switch, \"REALTEK_DSA\");\n 261:\t\n 262:\t/**\n 263:\t * rtl83xx_unregister_switch() - unregister a switch\n 264:\t * @priv: realtek_priv pointer\n 265:\t *\n 266:\t * This function unregister a DSA switch.\n 267:\t *\n 268:\t * Context: Can sleep.\n 269:\t * Return: Nothing.\n 270:\t */\n 271:\tvoid rtl83xx_unregister_switch(struct realtek_priv *priv)\n 272:\t{\n 273:\t\tstruct dsa_switch *ds = \u0026priv-\u003eds;\n 274:\t\n 275:\t\tdsa_unregister_switch(ds);\n 276:\t}\n 277:\tEXPORT_SYMBOL_NS_GPL(rtl83xx_unregister_switch, \"REALTEK_DSA\");\n 278:\t\n 279:\t/**\n 280:\t * rtl83xx_shutdown() - shutdown a switch\n 281:\t * @priv: realtek_priv pointer\n 282:\t *\n 283:\t * This function shuts down the DSA switch and cleans the platform driver data,\n 284:\t * to prevent realtek_{smi,mdio}_remove() from running afterwards, which is\n 285:\t * possible if the parent bus implements its own .shutdown() as .remove().\n 286:\t *\n 287:\t * Context: Can sleep.\n 288:\t * Return: Nothing.\n 289:\t */\n 290:\tvoid rtl83xx_shutdown(struct realtek_priv *priv)\n"
}

gemini-3.7-flash

null

null

							input: 42635
							output: 32
							thoughts: 104
						

**Analyzing Realtek Switch Initialization**

Okay, let's break this down. My focus right now is on how these Realtek Ethernet switch ASICs, specifically those connected via MDIO or SMI like the rtl8365mb and rtl8366rb, are initialized and reset within the system. I see that `realtek_mdio_probe` and `realtek_smi_probe` are responsible for the probing process. Now, I need to understand the reset sequence. I need to trace the execution path of the reset function, particularly `rtl8365mb_reset_chip`. My next step is to examine where `rtl8365mb_reset_chip` is called within the code. To be thorough, I should also search for any other instances of `reset_chip` or, as a sanity check,  `rtl8365mb_reset_chip` to see if there are other places that are relevant.

{
  "Expression": "reset_chip",
  "PathPrefix": "drivers/net/dsa/realtek"
}

{
  "Output": "drivers/net/dsa/realtek/realtek.h=108=struct realtek_ops {\ndrivers/net/dsa/realtek/realtek.h-109-\tint\t(*detect)(struct realtek_priv *priv);\ndrivers/net/dsa/realtek/realtek.h:110:\tint\t(*reset_chip)(struct realtek_priv *priv);\ndrivers/net/dsa/realtek/realtek.h-111-\tint\t(*setup)(struct realtek_priv *priv);\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c=2954=static int rtl8365mb_switch_init(struct realtek_priv *priv)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-2983-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:2984:static int rtl8365mb_reset_chip(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/rtl8365mb_main.c-2985-{\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c=3020=static int rtl8365mb_setup(struct dsa_switch *ds)\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3040-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3041:\tret = rtl8365mb_reset_chip(priv);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3042-\tif (ret) {\n--\ndrivers/net/dsa/realtek/rtl8366rb.c=1685=static int rtl8366rb_phy_write(struct realtek_priv *priv, int phy, int regnum,\n--\ndrivers/net/dsa/realtek/rtl8366rb.c-1715-\ndrivers/net/dsa/realtek/rtl8366rb.c:1716:static int rtl8366rb_reset_chip(struct realtek_priv *priv)\ndrivers/net/dsa/realtek/rtl8366rb.c-1717-{\n--\ndrivers/net/dsa/realtek/rtl8366rb.c=1742=static int rtl8366rb_detect(struct realtek_priv *priv)\n--\ndrivers/net/dsa/realtek/rtl8366rb.c-1773-\ndrivers/net/dsa/realtek/rtl8366rb.c:1774:\tret = rtl8366rb_reset_chip(priv);\ndrivers/net/dsa/realtek/rtl8366rb.c-1775-\tif (ret)\n"
}

gemini-3.7-flash

null

null

							input: 43720
							output: 49
							thoughts: 94
						

Here's my thinking process:

**Diving into the RTL8365MB Initialization**

Okay, so I'm looking at the Realtek RTL8365MB switch driver. I see that `rtl8365mb_reset_chip` is called by `rtl8365mb_setup`. The `rtl8365mb_setup` function is clearly crucial for initializing this particular switch model, and it's located within `drivers/net/dsa/realtek/rtl8365mb_main.c`. I need to understand what's happening within `rtl8365mb_setup`, and how `rtl8365mb_reset_chip` fits into the whole initialization sequence. My next step is to examine the code surrounding `rtl8365mb_setup` in the `rtl8365mb_main.c` file. I need to understand the larger context of the setup function.

{
  "File": "drivers/net/dsa/realtek/rtl8365mb_main.c",
  "FirstLine": 3015,
  "LineCount": 50
}

{
  "Contents": "3015:\t\t\tmsleep(jiffies_to_msecs(remaining));\n3016:\t\n3017:\t\treturn 0;\n3018:\t}\n3019:\t\n3020:\tstatic int rtl8365mb_setup(struct dsa_switch *ds)\n3021:\t{\n3022:\t\tstruct realtek_priv *priv = ds-\u003epriv;\n3023:\t\tstruct rtl8365mb_cpu *cpu;\n3024:\t\tu32 downports_mask = 0;\n3025:\t\tu32 upports_mask = 0;\n3026:\t\tstruct rtl8365mb *mb;\n3027:\t\tstruct dsa_port *dp;\n3028:\t\tint ret;\n3029:\t\n3030:\t\tmb = priv-\u003echip_data;\n3031:\t\tcpu = \u0026mb-\u003ecpu;\n3032:\t\n3033:\t\tmb-\u003epcs.ops = \u0026rtl8365mb_pcs_ops;\n3034:\t\n3035:\t\t/* The SerDes has no link interrupt wired up, so phylink must poll the\n3036:\t\t * PCS for link changes when it tracks the link through pcs_get_state()\n3037:\t\t * (in-band mode with autonegotiation disabled).\n3038:\t\t */\n3039:\t\tmb-\u003epcs.poll = true;\n3040:\t\n3041:\t\tret = rtl8365mb_reset_chip(priv);\n3042:\t\tif (ret) {\n3043:\t\t\tdev_err(priv-\u003edev, \"failed to reset chip: %pe\\n\",\n3044:\t\t\t\tERR_PTR(ret));\n3045:\t\t\tgoto out_error;\n3046:\t\t}\n3047:\t\n3048:\t\tret = rtl8365mb_sds_probe_option(priv);\n3049:\t\tif (ret) {\n3050:\t\t\tdev_err(priv-\u003edev, \"failed to probe SerDes chip option: %pe\\n\",\n3051:\t\t\t\tERR_PTR(ret));\n3052:\t\t\tgoto out_error;\n3053:\t\t}\n3054:\t\n3055:\t\t/* Configure switch to vendor-defined initial state */\n3056:\t\tret = rtl8365mb_switch_init(priv);\n3057:\t\tif (ret) {\n3058:\t\t\tdev_err(priv-\u003edev, \"failed to initialize switch: %pe\\n\",\n3059:\t\t\t\tERR_PTR(ret));\n3060:\t\t\tgoto out_error;\n3061:\t\t}\n3062:\t\n3063:\t\tif (mb-\u003esds_supported) {\n3064:\t\t\tret = rtl8365mb_sds_raise_rate_limits(priv);\n"
}

gemini-3.7-flash

null

null

							input: 44829
							output: 49
							thoughts: 56
						

**Analyzing the rtl8365mb Driver Setup**

Okay, let's break this down. It looks like `rtl8365mb_setup` is the DSA setup callback function for the `rtl8365mb` driver, specifically within the `rtl8365mb_switch_ops` structure. My next step, naturally, is to pinpoint the exact definition of `rtl8365mb_switch_ops`. I need to understand its structure and how `rtl8365mb_setup` fits into the broader picture of the driver's operation. Knowing where this is defined will give me valuable context for how the switch is initialized.

{
  "File": "drivers/net/dsa/realtek/rtl8365mb_main.c",
  "FirstLine": 3300,
  "LineCount": 70
}

{
  "Contents": "3300:\t\n3301:\tstatic const struct phylink_mac_ops rtl8365mb_phylink_mac_ops = {\n3302:\t\t.mac_select_pcs = rtl8365mb_phylink_mac_select_pcs,\n3303:\t\t.mac_config = rtl8365mb_phylink_mac_config,\n3304:\t\t.mac_link_down = rtl8365mb_phylink_mac_link_down,\n3305:\t\t.mac_link_up = rtl8365mb_phylink_mac_link_up,\n3306:\t};\n3307:\t\n3308:\tstatic const struct dsa_switch_ops rtl8365mb_switch_ops = {\n3309:\t\t.get_tag_protocol = rtl8365mb_get_tag_protocol,\n3310:\t\t.change_tag_protocol = rtl8365mb_change_tag_protocol,\n3311:\t\t.setup = rtl8365mb_setup,\n3312:\t\t.teardown = rtl8365mb_teardown,\n3313:\t\t.phylink_get_caps = rtl8365mb_phylink_get_caps,\n3314:\t\t.port_bridge_join = rtl83xx_port_bridge_join,\n3315:\t\t.port_bridge_leave = rtl83xx_port_bridge_leave,\n3316:\t\t.port_pre_bridge_flags = rtl8365mb_port_pre_bridge_flags,\n3317:\t\t.port_bridge_flags = rtl83xx_port_bridge_flags,\n3318:\t\t.port_stp_state_set = rtl8365mb_port_stp_state_set,\n3319:\t\t.port_fast_age = rtl83xx_port_fast_age,\n3320:\t\t.port_fdb_add = rtl83xx_port_fdb_add,\n3321:\t\t.port_fdb_del = rtl83xx_port_fdb_del,\n3322:\t\t.port_fdb_dump = rtl83xx_port_fdb_dump,\n3323:\t\t.port_mdb_add = rtl83xx_port_mdb_add,\n3324:\t\t.port_mdb_del = rtl83xx_port_mdb_del,\n3325:\t\t.port_vlan_add = rtl8365mb_port_vlan_add,\n3326:\t\t.port_vlan_del = rtl8365mb_port_vlan_del,\n3327:\t\t.port_vlan_filtering = rtl8365mb_port_vlan_filtering,\n3328:\t\t.get_strings = rtl8365mb_get_strings,\n3329:\t\t.get_ethtool_stats = rtl8365mb_get_ethtool_stats,\n3330:\t\t.get_sset_count = rtl8365mb_get_sset_count,\n3331:\t\t.get_eth_phy_stats = rtl8365mb_get_phy_stats,\n3332:\t\t.get_eth_mac_stats = rtl8365mb_get_mac_stats,\n3333:\t\t.get_eth_ctrl_stats = rtl8365mb_get_ctrl_stats,\n3334:\t\t.get_stats64 = rtl8365mb_get_stats64,\n3335:\t\t.port_change_mtu = rtl8365mb_port_change_mtu,\n3336:\t\t.port_max_mtu = rtl8365mb_port_max_mtu,\n3337:\t\t.port_hsr_join = dsa_port_simple_hsr_join,\n3338:\t\t.port_hsr_leave = dsa_port_simple_hsr_leave,\n3339:\t};\n3340:\t\n3341:\tstatic const struct realtek_ops rtl8365mb_ops = {\n3342:\t\t.detect = rtl8365mb_detect,\n3343:\t\t.port_add_isolation = rtl8365mb_port_add_isolation,\n3344:\t\t.port_remove_isolation = rtl8365mb_port_remove_isolation,\n3345:\t\t.port_set_efid = rtl8365mb_port_set_efid,\n3346:\t\t.port_set_learning = rtl8365mb_port_set_learning,\n3347:\t\t.port_set_ucast_flood = rtl8365mb_port_set_ucast_flood,\n3348:\t\t.port_set_mcast_flood = rtl8365mb_port_set_mcast_flood,\n3349:\t\t.port_set_bcast_flood = rtl8365mb_port_set_bcast_flood,\n3350:\t\t.l2_add_uc = rtl8365mb_l2_add_uc,\n3351:\t\t.l2_del_uc = rtl8365mb_l2_del_uc,\n3352:\t\t.l2_get_next_uc = rtl8365mb_l2_get_next_uc,\n3353:\t\t.l2_add_mc = rtl8365mb_l2_add_mc,\n3354:\t\t.l2_del_mc = rtl8365mb_l2_del_mc,\n3355:\t\t.l2_flush = rtl8365mb_l2_flush,\n3356:\t\t.phy_read = rtl8365mb_phy_read,\n3357:\t\t.phy_write = rtl8365mb_phy_write,\n3358:\t};\n3359:\t\n3360:\tconst struct realtek_variant rtl8365mb_variant = {\n3361:\t\t.ds_ops = \u0026rtl8365mb_switch_ops,\n3362:\t\t.ops = \u0026rtl8365mb_ops,\n3363:\t\t.phylink_mac_ops = \u0026rtl8365mb_phylink_mac_ops,\n3364:\t\t.clk_delay = 10,\n3365:\t\t.cmd_read = 0xb9,\n3366:\t\t.cmd_write = 0xb8,\n3367:\t\t.chip_data_sz = sizeof(struct rtl8365mb),\n3368:\t};\n3369:\t\n"
}

gemini-3.7-flash

null

null

							input: 46787
							output: 39
							thoughts: 42
						

Okay, let's dive into this. Here's how I'd approach this task, as if these were my internal thoughts:

**Investigating rtl8365mb_variant Instantiation**

Alright, I need to figure out which buses are actually using or instantiating this `rtl8365mb_variant` thing. That's the core question. I'm going to start with a targeted search for specific drivers related to this component. My immediate thought is to look for instances of `rtl8365mb_of_match` or related terms. I'm thinking about the standard mechanisms here. If this is a switch it probably is connected by SMI or MDIO. If the driver is written correctly it will use the correct compatible string and the driver probe function will be called during device tree instantiation.

Let's see what I can find. I expect that I'll quickly narrow down the relevant drivers and their corresponding bus associations.

{
  "Expression": "rtl8365mb_of_match",
  "PathPrefix": "drivers/net/dsa/realtek"
}

{
  "Output": "drivers/net/dsa/realtek/rtl8365mb_main.c=3360=const struct realtek_variant rtl8365mb_variant = {\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3369-\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3370:static const struct of_device_id rtl8365mb_of_match[] = {\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3371-\t{ .compatible = \"realtek,rtl8365mb\", .data = \u0026rtl8365mb_variant, },\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3373-};\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3374:MODULE_DEVICE_TABLE(of, rtl8365mb_of_match);\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3375-\ndrivers/net/dsa/realtek/rtl8365mb_main.c=3376=static struct platform_driver rtl8365mb_smi_driver = {\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3378-\t\t.name = \"rtl8365mb-smi\",\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3379:\t\t.of_match_table = rtl8365mb_of_match,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3380-\t},\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c=3386=static struct mdio_driver rtl8365mb_mdio_driver = {\n--\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3388-\t\t.name = \"rtl8365mb-mdio\",\ndrivers/net/dsa/realtek/rtl8365mb_main.c:3389:\t\t.of_match_table = rtl8365mb_of_match,\ndrivers/net/dsa/realtek/rtl8365mb_main.c-3390-\t},\n"
}

gemini-3.7-flash

null

null

							input: 47694
							output: 49
							thoughts: 364
						

**My Assessment of the RTL8365MB Switch Driver's Fuzzing Suitability**

Okay, let's break this down. I see we're dealing with the `rtl8365mb_smi_driver`, which is a `platform_driver`, and the `rtl8365mb_mdio_driver`, an `mdio_driver`. Both are matched through Device Tree, so it's a typical embedded system setup. The key question is whether this switch hardware is actually instantiated within a standard virtualized environment like QEMU. Are there any standard emulated devices, like virtio, USB gadgets, loopback interfaces, or tun/tap that would stand in for this hardware?

Now, considering the triage guidelines, "reachability is the primary gate". Fuzzing is pointless if the code *cannot* execute in a standard environment. Specifically, if the code is unreachable in GCE or QEMU using emulated devices, it's a no-go, regardless of complexity or assertions. The guidelines explicitly list structurally unreachable hardware like vendor-specific PCIe switches, SmartNICs, or GPUs that require physical ASIC cards that are not emulated in standard QEMU. That's what I'm concerned about here.

So, the real question is: Does the Realtek RTL8365MB DSA switch driver *require* physical hardware, specifically DT bindings on an embedded board? We're talking about a Realtek switch ASIC that's likely connected via an MDIO bus or GPIO-based SMI bus to a router SoC or similar embedded board. I need to dig into the source code to confirm, specifically `drivers/net/dsa/realtek/rtl8365mb_main.c`, and review its module initialization and probe functions to get a better sense of hardware dependencies.

{
  "File": "drivers/net/dsa/realtek/rtl8365mb_main.c",
  "FirstLine": 3370,
  "LineCount": 50
}

{
  "Contents": "3370:\tstatic const struct of_device_id rtl8365mb_of_match[] = {\n3371:\t\t{ .compatible = \"realtek,rtl8365mb\", .data = \u0026rtl8365mb_variant, },\n3372:\t\t{ /* sentinel */ },\n3373:\t};\n3374:\tMODULE_DEVICE_TABLE(of, rtl8365mb_of_match);\n3375:\t\n3376:\tstatic struct platform_driver rtl8365mb_smi_driver = {\n3377:\t\t.driver = {\n3378:\t\t\t.name = \"rtl8365mb-smi\",\n3379:\t\t\t.of_match_table = rtl8365mb_of_match,\n3380:\t\t},\n3381:\t\t.probe  = realtek_smi_probe,\n3382:\t\t.remove = realtek_smi_remove,\n3383:\t\t.shutdown = realtek_smi_shutdown,\n3384:\t};\n3385:\t\n3386:\tstatic struct mdio_driver rtl8365mb_mdio_driver = {\n3387:\t\t.mdiodrv.driver = {\n3388:\t\t\t.name = \"rtl8365mb-mdio\",\n3389:\t\t\t.of_match_table = rtl8365mb_of_match,\n3390:\t\t},\n3391:\t\t.probe  = realtek_mdio_probe,\n3392:\t\t.remove = realtek_mdio_remove,\n3393:\t\t.shutdown = realtek_mdio_shutdown,\n3394:\t};\n3395:\t\n3396:\tstatic int rtl8365mb_init(void)\n3397:\t{\n3398:\t\tint ret;\n3399:\t\n3400:\t\tret = realtek_mdio_driver_register(\u0026rtl8365mb_mdio_driver);\n3401:\t\tif (ret)\n3402:\t\t\treturn ret;\n3403:\t\n3404:\t\tret = realtek_smi_driver_register(\u0026rtl8365mb_smi_driver);\n3405:\t\tif (ret) {\n3406:\t\t\trealtek_mdio_driver_unregister(\u0026rtl8365mb_mdio_driver);\n3407:\t\t\treturn ret;\n3408:\t\t}\n3409:\t\n3410:\t\treturn 0;\n3411:\t}\n3412:\tmodule_init(rtl8365mb_init);\n3413:\t\n3414:\tstatic void __exit rtl8365mb_exit(void)\n3415:\t{\n3416:\t\trealtek_smi_driver_unregister(\u0026rtl8365mb_smi_driver);\n3417:\t\trealtek_mdio_driver_unregister(\u0026rtl8365mb_mdio_driver);\n3418:\t}\n3419:\tmodule_exit(rtl8365mb_exit);\n"
}

gemini-3.7-flash

null

null

							input: 49312
							output: 122
							thoughts: 340
						

**My Assessment of the RTL8365MB Driver's Fuzzing Potential**

Okay, so I've been looking at `rtl8365mb_main.c`, and it's pretty clear this is a dead end for standard fuzzing setups. I mean, it's a driver for the Realtek RTL8365MB ethernet switch ASIC. It's designed to talk to the chip via MDIO or GPIO SMI, which immediately tells me this isn't something I can trigger in a standard QEMU or syzkaller environment on amd64. These are virtualized setups; they're not going to magically emulate physical network switch hardware.

Even the crucial functions like `rtl8365mb_setup()` and `rtl8365mb_reset_chip()` – the heart of the driver – are only called when the kernel actually *probes* for this specific switch device. It's a fundamental hardware dependency.

Let me just solidify this in my mind by running through the checklist:

1.  **Architecture:** amd64 – Yep, standard for many fuzzing setups, but irrelevant here due to the hardware requirement.
2.  **File:** `drivers/net/dsa/realtek/rtl8365mb_main.c` – Confirmed, this is the driver code in question.
3.  **Hardware:** Realtek RTL8365MB switch ASIC connected via MDIO/SMI – Bingo. The dealbreaker.
4.  **WorthFuzzing:** False – Absolutely. We're not going to get any code coverage here without that specific hardware.
5.  **Reasoning:** Concise and correct. The code is unreachable in a standard virtual environment. That explanation is solid.
6.  **EnableConfigs:** Null or empty – Makes sense. No configuration changes will make a virtual machine magically create a real switch.
7.  **FocusSymbols:** Null or empty – Right again. No specific function calls will change the hardware dependency.

Yep, that's it. Time to call `set-results`. No point wasting cycles on something that can't be reached.

{
  "EnableConfigs": [],
  "FocusSymbols": [],
  "Reasoning": "The patch modifies the chip reset logic (rtl8365mb_reset_chip) in the Realtek RTL8365MB Ethernet switch driver. This driver targets physical Realtek switch ASICs connected over MDIO or SMI buses, which are not emulated in standard virtualized environments (QEMU/KVM on amd64) used by syzkaller. As such, the modified code is structurally unreachable for fuzzing.",
  "WorthFuzzing": false
}

{
  "EnableConfigs": null,
  "FocusSymbols": [],
  "Reasoning": "The patch modifies the chip reset logic (rtl8365mb_reset_chip) in the Realtek RTL8365MB Ethernet switch driver. This driver targets physical Realtek switch ASICs connected over MDIO or SMI buses, which are not emulated in standard virtualized environments (QEMU/KVM on amd64) used by syzkaller. As such, the modified code is structurally unreachable for fuzzing.",
  "WorthFuzzing": false
}

{
  "WorthFuzzing": false
}

null