AI Trajectory

Trajectory: (Expand/Collapse All)
Seq	Timestamp	Type	Name	Duration
0/0	2026/06/29 18:42	flow	patch-triage	0m Args: null Results: { "EnableConfigs": [ "ENIC", "PCI_IOV" ], "FocusSymbols": [ "enic_admin_channel_open", "enic_admin_channel_close", "enic_admin_wq_cq_service", "enic_admin_rq_cq_service", "enic_mbox_send_msg", "enic_mbox_vf_capability_check", "enic_mbox_vf_register", "enic_mbox_vf_unregister", "enic_mbox_recv_handler", "enic_mbox_pf_process_msg", "enic_mbox_vf_process_msg" ], "Reasoning": "The patch introduces a new admin channel and mailbox protocol for PF-VF communication in the Cisco VIC Ethernet NIC driver (enic). This is a functional change that modifies reachable core driver logic and can be tested using syzkaller's PCI fuzzing capabilities.", "WorthFuzzing": true }
1/1	2026/06/29 18:42	action	read-patch-diff	0m Args: null Results: { "PatchDiff": "commit 313bd531764a9bfa514ebc468739e3cdee960e6d\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Mon Jun 29 18:42:06 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/cisco/enic/Makefile b/drivers/net/ethernet/cisco/enic/Makefile\nindex a96b8332e6e2a8..e38aaf34c14839 100644\n--- a/drivers/net/ethernet/cisco/enic/Makefile\n+++ b/drivers/net/ethernet/cisco/enic/Makefile\n@@ -3,5 +3,6 @@ obj-$(CONFIG_ENIC) := enic.o\n \n enic-y := enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \\\n \tenic_res.o enic_dev.o enic_pp.o vnic_dev.o vnic_rq.o vnic_vic.o \\\n-\tenic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o\n+\tenic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o \\\n+\tenic_admin.o enic_mbox.o\n \ndiff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/cisco/enic/enic.h\nindex 08472420f3a1fd..62b8941489d773 100644\n--- a/drivers/net/ethernet/cisco/enic/enic.h\n+++ b/drivers/net/ethernet/cisco/enic/enic.h\n@@ -256,10 +256,10 @@ struct enic {\n \tstruct enic_rx_coal rx_coalesce_setting;\n \tu32 rx_coalesce_usecs;\n \tu32 tx_coalesce_usecs;\n-#ifdef CONFIG_PCI_IOV\n \tu16 num_vfs;\n-#endif\n \tenum enic_vf_type vf_type;\n+\tbool vf_registered;\n+\tu32 pf_cap_version;\n \tunsigned int enable_count;\n \tspinlock_t enic_api_lock;\n \tbool enic_api_busy;\n@@ -292,10 +292,45 @@ struct enic {\n \n \t/* Admin channel resources for SR-IOV MBOX /\n \tbool has_admin_channel;\n+\t/ true only while the admin WQ/RQ/CQ are allocated and enabled; gates\n+\t * enic_admin_channel_close() so it is a no-op after a failed (re)open\n+\t * left the resources freed.\n+\t /\n+\tbool admin_chan_up;\n+\t/ set on send timeout; cleared on channel re-open /\n+\tbool mbox_send_disabled;\n \tstruct vnic_wq admin_wq;\n \tstruct vnic_rq admin_rq;\n \tstruct vnic_cq admin_cq[2];\n \tstruct vnic_intr admin_intr;\n+\tstruct work_struct admin_poll_work;\n+\tunsigned int admin_intr_index;\n+\tstruct work_struct link_notify_work;\n+\tstruct work_struct admin_msg_work;\n+\tspinlock_t admin_msg_lock;\t/ protects admin_msg_list /\n+\tstruct list_head admin_msg_list;\n+\tunsigned int admin_msg_count;\t/ current depth of admin_msg_list /\n+\tvoid (admin_rq_handler)(struct enic enic, void buf,\n+\t\t\t\t unsigned int len);\n+\n+\t/* MBOX protocol state — mbox_lock serializes admin WQ sends /\n+\tstruct mutex mbox_lock;\n+\tu64 mbox_msg_num;\n+\t/ MBOX request-reply state. Written by the process-context request\n+\t * helpers (capability/register/unregister) and read/cleared by the\n+\t * admin_msg_work receive handlers. No explicit lock is needed because\n+\t * only one request is in flight at a time: requesters run under RTNL or\n+\t * single-threaded probe/remove, so each request is serialized and its\n+\t * reply completes mbox_comp before the next request is issued.\n+\t /\n+\tstruct completion mbox_comp;\n+\tu8 mbox_expected_reply;\n+\tbool mbox_initialized;\n+\n+\t/ PF: per-VF MBOX state, allocated when SRIOV V2 is enabled /\n+\tstruct enic_vf_state {\n+\t\tbool registered;\n+\t} vf_state;\n };\n \n static inline struct net_device vnic_get_netdev(struct vnic_dev vdev)\n@@ -417,6 +452,7 @@ void enic_reset_addr_lists(struct enic enic);\n int enic_sriov_enabled(struct enic enic);\n int enic_is_valid_vf(struct enic enic, int vf);\n int enic_is_dynamic(struct enic enic);\n+int enic_is_sriov_vf_v2(struct enic enic);\n void enic_set_ethtool_ops(struct net_device netdev);\n int __enic_set_rsskey(struct enic enic);\n void enic_ext_cq(struct enic enic);\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_admin.c b/drivers/net/ethernet/cisco/enic/enic_admin.c\nnew file mode 100644\nindex 00000000000000..242644fa2cbf90\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_admin.c\n@@ -0,0 +1,626 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+// Copyright 2025 Cisco Systems, Inc. All rights reserved.\n+\n+#include \u003clinux/kernel.h\u003e\n+#include \u003clinux/netdevice.h\u003e\n+#include \u003clinux/dma-mapping.h\u003e\n+#include \u003clinux/interrupt.h\u003e\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_intr.h\"\n+#include \"vnic_resource.h\"\n+#include \"vnic_devcmd.h\"\n+#include \"enic.h\"\n+#include \"enic_admin.h\"\n+#include \"cq_desc.h\"\n+#include \"cq_enet_desc.h\"\n+#include \"wq_enet_desc.h\"\n+#include \"rq_enet_desc.h\"\n+#include \"enic_mbox.h\"\n+\n+/* Clean up any admin WQ buffers still held by hardware at close time.\n+ * Normally buffers are freed inline after send completion, but a timed-out\n+ * send intentionally leaves the buffer live until the queue is stopped.\n+ /\n+static void enic_admin_wq_buf_clean(struct vnic_wq wq,\n+\t\t\t\t struct vnic_wq_buf buf)\n+{\n+\tstruct enic enic = vnic_dev_priv(wq-\u003evdev);\n+\n+\tif (buf-\u003eos_buf) {\n+\t\tdma_unmap_single(\u0026enic-\u003epdev-\u003edev, buf-\u003edma_addr,\n+\t\t\t\t buf-\u003elen, DMA_TO_DEVICE);\n+\t\tkfree(buf-\u003eos_buf);\n+\t\tbuf-\u003eos_buf = NULL;\n+\t}\n+}\n+\n+static void enic_admin_rq_buf_clean(struct vnic_rq rq,\n+\t\t\t\t struct vnic_rq_buf buf)\n+{\n+\tstruct enic enic = vnic_dev_priv(rq-\u003evdev);\n+\n+\tif (!buf-\u003eos_buf)\n+\t\treturn;\n+\n+\tdma_unmap_single(\u0026enic-\u003epdev-\u003edev, buf-\u003edma_addr, buf-\u003elen,\n+\t\t\t DMA_FROM_DEVICE);\n+\tkfree(buf-\u003eos_buf);\n+\tbuf-\u003eos_buf = NULL;\n+}\n+\n+static int enic_admin_rq_post_one(struct enic enic, gfp_t gfp)\n+{\n+\tstruct vnic_rq rq = \u0026enic-\u003eadmin_rq;\n+\tstruct rq_enet_desc desc;\n+\tdma_addr_t dma_addr;\n+\tvoid buf;\n+\n+\tbuf = kmalloc(ENIC_ADMIN_BUF_SIZE, gfp);\n+\tif (!buf)\n+\t\treturn -ENOMEM;\n+\n+\tdma_addr = dma_map_single(\u0026enic-\u003epdev-\u003edev, buf, ENIC_ADMIN_BUF_SIZE,\n+\t\t\t\t DMA_FROM_DEVICE);\n+\tif (dma_mapping_error(\u0026enic-\u003epdev-\u003edev, dma_addr)) {\n+\t\tkfree(buf);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tdesc = vnic_rq_next_desc(rq);\n+\trq_enet_desc_enc(desc, (u64)dma_addr \| VNIC_PADDR_TARGET,\n+\t\t\t RQ_ENET_TYPE_ONLY_SOP, ENIC_ADMIN_BUF_SIZE);\n+\tvnic_rq_post(rq, buf, 0, dma_addr, ENIC_ADMIN_BUF_SIZE, 0);\n+\n+\treturn 0;\n+}\n+\n+static int enic_admin_rq_fill(struct enic enic, gfp_t gfp)\n+{\n+\tstruct vnic_rq rq = \u0026enic-\u003eadmin_rq;\n+\tint err;\n+\n+\twhile (vnic_rq_desc_avail(rq) \u003e 0) {\n+\t\terr = enic_admin_rq_post_one(enic, gfp);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void enic_admin_rq_drain(struct enic enic)\n+{\n+\tvnic_rq_clean(\u0026enic-\u003eadmin_rq, enic_admin_rq_buf_clean);\n+}\n+\n+static unsigned int enic_admin_cq_color(void cq_desc, unsigned int desc_size)\n+{\n+\tu8 type_color = ((u8 )cq_desc + desc_size - 1);\n+\n+\treturn (type_color \u003e\u003e CQ_DESC_COLOR_SHIFT) \u0026 CQ_DESC_COLOR_MASK;\n+}\n+\n+unsigned int enic_admin_wq_cq_service(struct enic enic)\n+{\n+\tstruct vnic_cq cq = \u0026enic-\u003eadmin_cq[0];\n+\tunsigned int work = 0;\n+\tvoid desc;\n+\n+\tdesc = vnic_cq_to_clean(cq);\n+\twhile (enic_admin_cq_color(desc, cq-\u003ering.desc_size) !=\n+\t cq-\u003elast_color) {\n+\t\tvnic_cq_inc_to_clean(cq);\n+\t\twork++;\n+\t\tdesc = vnic_cq_to_clean(cq);\n+\t}\n+\n+\treturn work;\n+}\n+\n+/* Upper bound on pending admin messages. A buggy or hostile VF could flood\n+ * the PF admin channel faster than admin_msg_work drains it; cap the backlog\n+ * so a guest cannot drive the host out of memory.\n+ /\n+#define ENIC_ADMIN_MSG_MAX\t256\n+\n+static void enic_admin_msg_enqueue(struct enic enic, void buf,\n+\t\t\t\t unsigned int len)\n+{\n+\tstruct enic_admin_msg msg;\n+\n+\tmsg = kmalloc(struct_size(msg, data, len), GFP_KERNEL);\n+\tif (!msg)\n+\t\treturn;\n+\n+\tmsg-\u003elen = len;\n+\tmemcpy(msg-\u003edata, buf, len);\n+\n+\tspin_lock(\u0026enic-\u003eadmin_msg_lock);\n+\tif (enic-\u003eadmin_msg_count \u003e= ENIC_ADMIN_MSG_MAX) {\n+\t\tspin_unlock(\u0026enic-\u003eadmin_msg_lock);\n+\t\tkfree(msg);\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"admin msg backlog full (%u); dropping\\n\",\n+\t\t\t\t ENIC_ADMIN_MSG_MAX);\n+\t\treturn;\n+\t}\n+\tlist_add_tail(\u0026msg-\u003elist, \u0026enic-\u003eadmin_msg_list);\n+\tenic-\u003eadmin_msg_count++;\n+\tspin_unlock(\u0026enic-\u003eadmin_msg_lock);\n+}\n+\n+unsigned int enic_admin_rq_cq_service(struct enic enic)\n+{\n+\tstruct vnic_cq cq = \u0026enic-\u003eadmin_cq[1];\n+\tstruct vnic_rq rq = \u0026enic-\u003eadmin_rq;\n+\tstruct cq_enet_rq_desc rq_desc;\n+\tstruct vnic_rq_buf buf;\n+\tu16 bwf, bytes_written;\n+\tunsigned int work = 0;\n+\tvoid desc;\n+\n+\t/* The admin RQ and its CQ form a single in-order channel: firmware\n+\t * posts exactly one CQE per consumed RQ descriptor, in submission\n+\t * order. Each CQE therefore pairs with rq-\u003eto_clean below without a\n+\t * completed_index cross-check, mirroring the in-order assumption of\n+\t * the main enic RX path.\n+\t /\n+\tdesc = vnic_cq_to_clean(cq);\n+\twhile (enic_admin_cq_color(desc, cq-\u003ering.desc_size) !=\n+\t cq-\u003elast_color) {\n+\t\t/ Ensure DMA descriptor fields are read after\n+\t\t * the color/valid check. dma_rmb() is the\n+\t\t * correct barrier for DMA-written descriptors.\n+\t\t /\n+\t\tdma_rmb();\n+\t\tbuf = rq-\u003eto_clean;\n+\n+\t\t/ Decode the actual number of bytes hardware wrote into\n+\t\t * the RX buffer. buf-\u003elen is the static allocation size\n+\t\t * (ENIC_ADMIN_BUF_SIZE) and would expose uninitialised\n+\t\t * heap memory beyond the real payload. bytes_written_flags\n+\t\t * is at the same offset in every cq_enet_rq_desc[_32\|_64]\n+\t\t * variant.\n+\t\t /\n+\t\trq_desc = desc;\n+\t\tbwf = le16_to_cpu(rq_desc-\u003ebytes_written_flags);\n+\t\tbytes_written = bwf \u0026 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;\n+\t\tif (bytes_written \u003e buf-\u003elen)\n+\t\t\tgoto next_desc;\n+\n+\t\tdma_sync_single_for_cpu(\u0026enic-\u003epdev-\u003edev,\n+\t\t\t\t\tbuf-\u003edma_addr, buf-\u003elen,\n+\t\t\t\t\tDMA_FROM_DEVICE);\n+\n+\t\t/ Drop on hardware error indications. Admin messages\n+\t\t * are internal to the VIC, not received over the wire.\n+\t\t * Firmware sets TRUNCATED when the message does not fit\n+\t\t * in the posted buffer, and FCS_OK is always set on\n+\t\t * healthy admin completions.\n+\t\t /\n+\t\tif (bwf \u0026 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) {\n+\t\t\tnetdev_warn_once(enic-\u003enetdev,\n+\t\t\t\t\t \"admin RQ: truncated message dropped\\n\");\n+\t\t\tgoto next_desc;\n+\t\t}\n+\t\tif (!(rq_desc-\u003eflags \u0026 CQ_ENET_RQ_DESC_FLAGS_FCS_OK)) {\n+\t\t\tnetdev_warn_once(enic-\u003enetdev,\n+\t\t\t\t\t \"admin RQ: bad FCS, dropping message\\n\");\n+\t\t\tgoto next_desc;\n+\t\t}\n+\n+\t\tif (enic-\u003eadmin_rq_handler) {\n+\t\t\tu16 sender_vlan;\n+\n+\t\t\t/ Firmware sets the CQ VLAN field to identify the\n+\t\t\t * sender: 0 = PF, 1-based = VF index. Overwrite\n+\t\t\t * the untrusted src_vnic_id in the MBOX header with\n+\t\t\t * the hardware-verified value.\n+\t\t\t /\n+\t\t\tsender_vlan = le16_to_cpu(rq_desc-\u003evlan);\n+\t\t\tif (bytes_written \u003e= sizeof(struct enic_mbox_hdr)) {\n+\t\t\t\tstruct enic_mbox_hdr hdr = buf-\u003eos_buf;\n+\n+\t\t\t\thdr-\u003esrc_vnic_id = (sender_vlan == 0) ?\n+\t\t\t\t\tcpu_to_le16(ENIC_MBOX_DST_PF) :\n+\t\t\t\t\tcpu_to_le16(sender_vlan - 1);\n+\t\t\t}\n+\n+\t\t\tenic_admin_msg_enqueue(enic, buf-\u003eos_buf,\n+\t\t\t\t\t bytes_written);\n+\t\t}\n+\n+next_desc:\n+\t\tenic_admin_rq_buf_clean(rq, rq-\u003eto_clean);\n+\t\trq-\u003eto_clean = rq-\u003eto_clean-\u003enext;\n+\t\trq-\u003ering.desc_avail++;\n+\n+\t\tvnic_cq_inc_to_clean(cq);\n+\t\twork++;\n+\t\tdesc = vnic_cq_to_clean(cq);\n+\t}\n+\n+\tif (enic_admin_rq_fill(enic, GFP_KERNEL) \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"admin RQ refill failed\\n\");\n+\n+\treturn work;\n+}\n+\n+static irqreturn_t enic_admin_isr_msix(int irq, void data)\n+{\n+\tstruct enic enic = data;\n+\n+\tschedule_work(\u0026enic-\u003eadmin_poll_work);\n+\n+\treturn IRQ_HANDLED;\n+}\n+\n+static void enic_admin_msg_work_handler(struct work_struct work)\n+{\n+\tstruct enic enic = container_of(work, struct enic, admin_msg_work);\n+\tstruct enic_admin_msg msg, tmp;\n+\tLIST_HEAD(local_list);\n+\n+\tspin_lock_bh(\u0026enic-\u003eadmin_msg_lock);\n+\tlist_splice_init(\u0026enic-\u003eadmin_msg_list, \u0026local_list);\n+\tenic-\u003eadmin_msg_count = 0;\n+\tspin_unlock_bh(\u0026enic-\u003eadmin_msg_lock);\n+\n+\tlist_for_each_entry_safe(msg, tmp, \u0026local_list, list) {\n+\t\tif (enic-\u003eadmin_rq_handler)\n+\t\t\tenic-\u003eadmin_rq_handler(enic, msg-\u003edata, msg-\u003elen);\n+\t\tlist_del(\u0026msg-\u003elist);\n+\t\tkfree(msg);\n+\t}\n+}\n+\n+static void enic_admin_poll_work_handler(struct work_struct work)\n+{\n+\tstruct enic enic = container_of(work, struct enic, admin_poll_work);\n+\tunsigned int credits;\n+\tunsigned int rq_work;\n+\n+\tcredits = vnic_intr_credits(\u0026enic-\u003eadmin_intr);\n+\n+\trq_work = enic_admin_rq_cq_service(enic);\n+\n+\tif (rq_work \u003e 0)\n+\t\tschedule_work(\u0026enic-\u003eadmin_msg_work);\n+\n+\tvnic_intr_return_credits(\u0026enic-\u003eadmin_intr,\n+\t\t\t\t credits ?: 1,\n+\t\t\t\t 1 /* unmask /, 0);\n+}\n+\n+static int enic_admin_setup_intr(struct enic enic)\n+{\n+\tunsigned int intr_index = enic-\u003eintr_count;\n+\tint err;\n+\n+\tif (vnic_dev_get_intr_mode(enic-\u003evdev) != VNIC_DEV_INTR_MODE_MSIX \|\|\n+\t intr_index \u003e= enic-\u003eintr_avail)\n+\t\treturn -ENODEV;\n+\n+\t/* The admin INTR uses a slot in the same RES_TYPE_INTR_CTRL\n+\t * strided array of per-vector control blocks (mask, coalescing\n+\t * timer, credit return) that the data-path IRQs occupy in BAR0.\n+\t * vnic_intr_alloc() defaults to RES_TYPE_INTR_CTRL, which is what\n+\t * we want here.\n+\t /\n+\terr = vnic_intr_alloc(enic-\u003evdev, \u0026enic-\u003eadmin_intr, intr_index);\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"Failed to alloc admin intr at index %u: %d\\n\",\n+\t\t\t intr_index, err);\n+\t\treturn err;\n+\t}\n+\n+\tenic-\u003eadmin_intr_index = intr_index;\n+\n+\t/ A V2 VF opens the admin channel during probe, before\n+\t * register_netdev() resolves the \"eth%d\" name template, so using\n+\t * netdev-\u003ename here would register the literal \"eth%d-admin\" in\n+\t * /proc/interrupts. Use the already-stable PCI device name instead.\n+\t /\n+\tsnprintf(enic-\u003emsix[intr_index].devname,\n+\t\t sizeof(enic-\u003emsix[intr_index].devname),\n+\t\t \"%s-admin\", pci_name(enic-\u003epdev));\n+\tenic-\u003emsix[intr_index].isr = enic_admin_isr_msix;\n+\tenic-\u003emsix[intr_index].devid = enic;\n+\n+\terr = request_irq(enic-\u003emsix_entry[intr_index].vector,\n+\t\t\t enic-\u003emsix[intr_index].isr, 0,\n+\t\t\t enic-\u003emsix[intr_index].devname,\n+\t\t\t enic-\u003emsix[intr_index].devid);\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"Failed to request admin MSI-X irq: %d\\n\", err);\n+\t\tvnic_intr_free(\u0026enic-\u003eadmin_intr);\n+\t\treturn err;\n+\t}\n+\n+\tenic-\u003emsix[intr_index].requested = 1;\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t \"admin channel using MSI-X interrupt (index %u)\\n\",\n+\t\t intr_index);\n+\n+\treturn 0;\n+}\n+\n+static void enic_admin_teardown_intr(struct enic enic)\n+{\n+\tunsigned int intr_index = enic-\u003eadmin_intr_index;\n+\n+\tfree_irq(enic-\u003emsix_entry[intr_index].vector,\n+\t\t enic-\u003emsix[intr_index].devid);\n+\tcancel_work_sync(\u0026enic-\u003eadmin_poll_work);\n+\tenic-\u003emsix[intr_index].requested = 0;\n+}\n+\n+static int enic_admin_qp_type_set(struct enic enic, u32 enable)\n+{\n+\tu64 a0 = QP_TYPE_ADMIN, a1 = enable;\n+\tint wait = 1000;\n+\tint err;\n+\n+\tspin_lock_bh(\u0026enic-\u003edevcmd_lock);\n+\terr = vnic_dev_cmd(enic-\u003evdev, CMD_QP_TYPE_SET, \u0026a0, \u0026a1, wait);\n+\tspin_unlock_bh(\u0026enic-\u003edevcmd_lock);\n+\n+\treturn err;\n+}\n+\n+static int enic_admin_alloc_resources(struct enic enic)\n+{\n+\tint err;\n+\n+\terr = vnic_wq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_wq, 0,\n+\t\t\t\t ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t sizeof(struct wq_enet_desc),\n+\t\t\t\t RES_TYPE_ADMIN_WQ);\n+\tif (err)\n+\t\treturn err;\n+\n+\terr = vnic_rq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_rq, 0,\n+\t\t\t\t ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t sizeof(struct rq_enet_desc),\n+\t\t\t\t RES_TYPE_ADMIN_RQ);\n+\tif (err)\n+\t\tgoto free_wq;\n+\n+\t/* admin_cq[0] is the WQ completion queue. WQ CQEs are always\n+\t * 16 bytes wide; firmware always writes 16-byte CQEs for WQ\n+\t * completions on every WQ, including the admin channel WQ.\n+\t * Use sizeof(struct cq_desc) accordingly.\n+\t /\n+\terr = vnic_cq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_cq[0], 0,\n+\t\t\t\t ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t sizeof(struct cq_desc),\n+\t\t\t\t RES_TYPE_ADMIN_CQ);\n+\tif (err)\n+\t\tgoto free_rq;\n+\n+\t/ admin_cq[1] is the RQ completion queue. Its descriptor size\n+\t * must match what firmware writes. enic_ext_cq() called earlier\n+\t * in probe issues CMD_CQ_ENTRY_SIZE_SET for VNIC_RQ_ALL,\n+\t * programming firmware to write CQ entries of (16 \u003c\u003c enic-\u003eext_cq)\n+\t * bytes for every RQ CQ on the vNIC, including the admin RQ CQ.\n+\t * Allocating with the same size keeps the host poller and\n+\t * firmware in lockstep:\n+\t \n+\t - The color/valid bit lives at byte (desc_size - 1) of every\n+\t * cq_enet_rq_desc[_32\|_64] variant, so enic_admin_cq_color()\n+\t * reads it from the correct offset.\n+\t * - Only the first 15 bytes of the descriptor (vlan,\n+\t * bytes_written_flags, ...) are accessed by the admin path;\n+\t * these fields are identical across all three variants (see\n+\t * comment in enic_rq.c above cq_enet_rq_desc_dec()).\n+\t /\n+\terr = vnic_cq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_cq[1], 1,\n+\t\t\t\t ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t 16 \u003c\u003c enic-\u003eext_cq,\n+\t\t\t\t RES_TYPE_ADMIN_CQ);\n+\tif (err)\n+\t\tgoto free_cq0;\n+\n+\treturn 0;\n+\n+free_cq0:\n+\tvnic_cq_free(\u0026enic-\u003eadmin_cq[0]);\n+free_rq:\n+\tvnic_rq_free(\u0026enic-\u003eadmin_rq);\n+free_wq:\n+\tvnic_wq_free(\u0026enic-\u003eadmin_wq);\n+\treturn err;\n+}\n+\n+static void enic_admin_free_resources(struct enic enic)\n+{\n+\tvnic_intr_free(\u0026enic-\u003eadmin_intr);\n+\tvnic_cq_free(\u0026enic-\u003eadmin_cq[1]);\n+\tvnic_cq_free(\u0026enic-\u003eadmin_cq[0]);\n+\tvnic_rq_free(\u0026enic-\u003eadmin_rq);\n+\tvnic_wq_free(\u0026enic-\u003eadmin_wq);\n+}\n+\n+static void enic_admin_init_resources(struct enic enic)\n+{\n+\tunsigned int intr_offset = enic-\u003eadmin_intr_index;\n+\n+\tvnic_wq_init(\u0026enic-\u003eadmin_wq,\n+\t\t 0, 0, 0); / cq_index, err_intr_enable, err_intr_offset /\n+\tvnic_rq_init(\u0026enic-\u003eadmin_rq,\n+\t\t 1, 0, 0); / cq_index, err_intr_enable, err_intr_offset /\n+\tvnic_cq_init(\u0026enic-\u003eadmin_cq[0],\n+\t\t VNIC_CQ_FC_DISABLE,\n+\t\t VNIC_CQ_COLOR_ENABLE,\n+\t\t 0, 0, 1, / cq_head, cq_tail, cq_tail_color /\n+\t\t VNIC_CQ_INTR_DISABLE, / polled synchronously by mbox send /\n+\t\t VNIC_CQ_ENTRY_ENABLE,\n+\t\t VNIC_CQ_MSG_DISABLE,\n+\t\t intr_offset,\n+\t\t 0 / cq_message_addr /);\n+\tvnic_cq_init(\u0026enic-\u003eadmin_cq[1],\n+\t\t VNIC_CQ_FC_DISABLE,\n+\t\t VNIC_CQ_COLOR_ENABLE,\n+\t\t 0, 0, 1, / cq_head, cq_tail, cq_tail_color /\n+\t\t VNIC_CQ_INTR_ENABLE,\n+\t\t VNIC_CQ_ENTRY_ENABLE,\n+\t\t VNIC_CQ_MSG_DISABLE,\n+\t\t intr_offset,\n+\t\t 0 / cq_message_addr /);\n+\t/ coalescing_timer, coalescing_type, mask_on_assertion /\n+\tvnic_intr_init(\u0026enic-\u003eadmin_intr,\n+\t\t 0, 0, 1);\n+}\n+\n+static void enic_admin_msg_drain(struct enic enic)\n+{\n+\tstruct enic_admin_msg msg, tmp;\n+\n+\tspin_lock_bh(\u0026enic-\u003eadmin_msg_lock);\n+\tlist_for_each_entry_safe(msg, tmp, \u0026enic-\u003eadmin_msg_list, list) {\n+\t\tlist_del(\u0026msg-\u003elist);\n+\t\tkfree(msg);\n+\t}\n+\tenic-\u003eadmin_msg_count = 0;\n+\tspin_unlock_bh(\u0026enic-\u003eadmin_msg_lock);\n+}\n+\n+int enic_admin_channel_open(struct enic enic)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003ehas_admin_channel)\n+\t\treturn -ENODEV;\n+\n+\terr = enic_admin_alloc_resources(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"Failed to alloc admin channel resources: %d\\n\",\n+\t\t\t err);\n+\t\treturn err;\n+\t}\n+\n+\tspin_lock_init(\u0026enic-\u003eadmin_msg_lock);\n+\tINIT_LIST_HEAD(\u0026enic-\u003eadmin_msg_list);\n+\tINIT_WORK(\u0026enic-\u003eadmin_msg_work, enic_admin_msg_work_handler);\n+\tINIT_WORK(\u0026enic-\u003eadmin_poll_work, enic_admin_poll_work_handler);\n+\n+\terr = enic_admin_setup_intr(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"Admin channel requires MSI-X, SR-IOV unavailable: %d\\n\",\n+\t\t\t err);\n+\t\tgoto free_resources;\n+\t}\n+\n+\tenic_admin_init_resources(enic);\n+\n+\tvnic_wq_enable(\u0026enic-\u003eadmin_wq);\n+\tvnic_rq_enable(\u0026enic-\u003eadmin_rq);\n+\n+\terr = enic_admin_rq_fill(enic, GFP_KERNEL);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"Failed to fill admin RQ buffers: %d\\n\", err);\n+\t\tgoto disable_queues;\n+\t}\n+\n+\terr = enic_admin_qp_type_set(enic, QP_ENABLE);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"Failed to set admin QP type: %d\\n\", err);\n+\t\tgoto disable_queues;\n+\t}\n+\n+\tvnic_intr_unmask(\u0026enic-\u003eadmin_intr);\n+\n+\t/ Only now that the admin WQ/RQ/CQ and interrupt are fully allocated,\n+\t * programmed and enabled is it safe to allow MBOX sends. Clearing this\n+\t * earlier opened a window where a concurrent sender (e.g. link-notify\n+\t * work scheduled by a post-reset link-up) could call enic_mbox_send_msg()\n+\t * against a not-yet-allocated admin_wq and crash.\n+\t /\n+\tWRITE_ONCE(enic-\u003embox_send_disabled, false);\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t \"admin channel open: intr=%u wq_avail=%u rq_avail=%u cq0_color=%u cq1_color=%u\\n\",\n+\t\t enic-\u003eadmin_intr_index,\n+\t\t vnic_wq_desc_avail(\u0026enic-\u003eadmin_wq),\n+\t\t vnic_rq_desc_avail(\u0026enic-\u003eadmin_rq),\n+\t\t enic-\u003eadmin_cq[0].last_color,\n+\t\t enic-\u003eadmin_cq[1].last_color);\n+\n+\tenic-\u003eadmin_chan_up = true;\n+\n+\treturn 0;\n+\n+disable_queues:\n+\tenic_admin_teardown_intr(enic);\n+\tenic_admin_qp_type_set(enic, QP_DISABLE);\n+\tif (vnic_wq_disable(\u0026enic-\u003eadmin_wq))\n+\t\tnetdev_warn(enic-\u003enetdev, \"Failed to disable admin WQ\\n\");\n+\tif (vnic_rq_disable(\u0026enic-\u003eadmin_rq))\n+\t\tnetdev_warn(enic-\u003enetdev, \"Failed to disable admin RQ\\n\");\n+\tcancel_work_sync(\u0026enic-\u003eadmin_msg_work);\n+\tenic_admin_msg_drain(enic);\n+\tenic_admin_rq_drain(enic);\n+free_resources:\n+\tenic_admin_free_resources(enic);\n+\treturn err;\n+}\n+\n+void enic_admin_channel_close(struct enic enic)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003ehas_admin_channel)\n+\t\treturn;\n+\n+\t/* Nothing to tear down if the channel was never (re)opened, e.g. a\n+\t * failed enic_admin_channel_open() in probe or in the reset path;\n+\t * otherwise the disable/clean calls below dereference freed resources.\n+\t /\n+\tif (!enic-\u003eadmin_chan_up)\n+\t\treturn;\n+\n+\tWRITE_ONCE(enic-\u003embox_send_disabled, true);\n+\n+\tnetdev_dbg(enic-\u003enetdev, \"admin channel close\\n\");\n+\n+\tvnic_intr_mask(\u0026enic-\u003eadmin_intr);\n+\tenic_admin_teardown_intr(enic);\n+\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\n+\tcancel_work_sync(\u0026enic-\u003eadmin_msg_work);\n+\tenic_admin_msg_drain(enic);\n+\n+\tenic_admin_qp_type_set(enic, QP_DISABLE);\n+\n+\terr = vnic_wq_disable(\u0026enic-\u003eadmin_wq);\n+\tif (err)\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"Failed to disable admin WQ: %d\\n\", err);\n+\terr = vnic_rq_disable(\u0026enic-\u003eadmin_rq);\n+\tif (err)\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"Failed to disable admin RQ: %d\\n\", err);\n+\n+\tvnic_wq_clean(\u0026enic-\u003eadmin_wq, enic_admin_wq_buf_clean);\n+\tenic_admin_rq_drain(enic);\n+\tvnic_cq_clean(\u0026enic-\u003eadmin_cq[0]);\n+\tvnic_cq_clean(\u0026enic-\u003eadmin_cq[1]);\n+\tvnic_intr_clean(\u0026enic-\u003eadmin_intr);\n+\n+\tenic-\u003eadmin_rq_handler = NULL;\n+\tenic_admin_free_resources(enic);\n+\n+\tenic-\u003eadmin_chan_up = false;\n+}\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_admin.h b/drivers/net/ethernet/cisco/enic/enic_admin.h\nnew file mode 100644\nindex 00000000000000..62c80220b0cacc\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_admin.h\n@@ -0,0 +1,27 @@\n+/ SPDX-License-Identifier: GPL-2.0-only /\n+/ Copyright 2025 Cisco Systems, Inc. All rights reserved. /\n+\n+#ifndef _ENIC_ADMIN_H_\n+#define _ENIC_ADMIN_H_\n+\n+#define ENIC_ADMIN_DESC_COUNT\t64\n+#define ENIC_ADMIN_BUF_SIZE\t2048\n+\n+struct enic;\n+\n+/ Wrapper for received admin messages queued for deferred processing.\n+ * The admin CQ poll work handler enqueues these; a separate work handler\n+ * processes them where sleeping (mutex, GFP_KERNEL) is safe.\n+ /\n+struct enic_admin_msg {\n+\tstruct list_head list;\n+\tunsigned int len;\n+\tu8 data[] __aligned(8);\n+};\n+\n+int enic_admin_channel_open(struct enic enic);\n+void enic_admin_channel_close(struct enic enic);\n+unsigned int enic_admin_wq_cq_service(struct enic enic);\n+unsigned int enic_admin_rq_cq_service(struct enic enic);\n+\n+#endif / _ENIC_ADMIN_H_ /\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c\nindex e7125b81808799..de90332dc40cc7 100644\n--- a/drivers/net/ethernet/cisco/enic/enic_main.c\n+++ b/drivers/net/ethernet/cisco/enic/enic_main.c\n@@ -60,6 +60,8 @@\n #include \"enic_clsf.h\"\n #include \"enic_rq.h\"\n #include \"enic_wq.h\"\n+#include \"enic_admin.h\"\n+#include \"enic_mbox.h\"\n \n #define ENIC_NOTIFY_TIMER_PERIOD\t(2 HZ)\n \n@@ -314,6 +316,11 @@ static int enic_is_sriov_vf(struct enic enic)\n \t enic-\u003epdev-\u003edevice == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2;\n }\n \n+int enic_is_sriov_vf_v2(struct enic enic)\n+{\n+\treturn enic-\u003epdev-\u003edevice == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2;\n+}\n+\n int enic_is_valid_vf(struct enic enic, int vf)\n {\n #ifdef CONFIG_PCI_IOV\n@@ -411,6 +418,24 @@ static void enic_set_rx_coal_setting(struct enic enic)\n \trx_coal-\u003euse_adaptive_rx_coalesce = 1;\n }\n \n+static void enic_link_notify_work_handler(struct work_struct work)\n+{\n+\tstruct enic enic = container_of(work, struct enic,\n+\t\t\t\t\t link_notify_work);\n+\tu32 state;\n+\tu16 i;\n+\n+\tif (!enic_sriov_enabled(enic) \|\| !enic-\u003evf_state)\n+\t\treturn;\n+\n+\tstate = netif_carrier_ok(enic-\u003enetdev) ?\n+\t\tENIC_MBOX_LINK_STATE_ENABLE :\n+\t\tENIC_MBOX_LINK_STATE_DISABLE;\n+\n+\tfor (i = 0; i \u003c enic-\u003enum_vfs; i++)\n+\t\tenic_mbox_send_link_state(enic, i, state);\n+}\n+\n static void enic_link_check(struct enic enic)\n {\n \tint link_status = vnic_dev_link_status(enic-\u003evdev);\n@@ -420,9 +445,13 @@ static void enic_link_check(struct enic enic)\n \t\tnetdev_info(enic-\u003enetdev, \"Link UP\\n\");\n \t\tnetif_carrier_on(enic-\u003enetdev);\n \t\tenic_set_rx_coal_setting(enic);\n+\t\tif (enic_sriov_enabled(enic) \u0026\u0026 enic-\u003evf_state)\n+\t\t\tschedule_work(\u0026enic-\u003elink_notify_work);\n \t} else if (!link_status \u0026\u0026 carrier_ok) {\n \t\tnetdev_info(enic-\u003enetdev, \"Link DOWN\\n\");\n \t\tnetif_carrier_off(enic-\u003enetdev);\n+\t\tif (enic_sriov_enabled(enic) \u0026\u0026 enic-\u003evf_state)\n+\t\t\tschedule_work(\u0026enic-\u003elink_notify_work);\n \t}\n }\n \n@@ -2142,6 +2171,57 @@ static void enic_set_api_busy(struct enic enic, bool busy)\n \tspin_unlock(\u0026enic-\u003eenic_api_lock);\n }\n \n+/ The admin/MBOX channel exists on a V2 PF while SR-IOV is enabled and on\n+ * every V2 VF. A reset wipes the admin WQ/RQ/CQ, so such devices must tear\n+ * the channel down before the reset and re-establish it afterwards.\n+ /\n+static bool enic_has_admin_chan(struct enic enic)\n+{\n+\treturn enic_is_sriov_vf_v2(enic) \|\|\n+\t (enic_sriov_enabled(enic) \u0026\u0026 enic-\u003evf_type == ENIC_VF_TYPE_V2);\n+}\n+\n+/* Re-establish the admin/MBOX channel after a reset has re-created the data\n+ * path. Mirrors the relevant part of the probe / SR-IOV-enable sequence:\n+ * reopen the channel and reinitialise MBOX, then for a VF re-run the PF\n+ * handshake (its admin QP and PF-side registration were torn down by the\n+ * reset), or for a PF re-push the current link state to registered VFs.\n+ /\n+static void enic_admin_chan_reopen(struct enic enic)\n+{\n+\tint err;\n+\n+\terr = enic_admin_channel_open(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"admin channel reopen after reset failed: %d\\n\", err);\n+\t\treturn;\n+\t}\n+\n+\tenic_mbox_init(enic);\n+\n+\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\terr = enic_mbox_vf_capability_check(enic);\n+\t\tif (err) {\n+\t\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t\t \"MBOX capability check after reset failed: %d\\n\",\n+\t\t\t\t err);\n+\t\t\treturn;\n+\t\t}\n+\t\terr = enic_mbox_vf_register(enic);\n+\t\tif (err)\n+\t\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t\t \"MBOX VF re-registration after reset failed: %d\\n\",\n+\t\t\t\t err);\n+\t} else {\n+\t\t/* The link came back up during enic_open() above while MBOX\n+\t\t * sends were still disabled (channel not yet reopened), so that\n+\t\t * link-notify was dropped. Re-push current link state now.\n+\t\t /\n+\t\tschedule_work(\u0026enic-\u003elink_notify_work);\n+\t}\n+}\n+\n static void enic_reset(struct work_struct work)\n {\n \tstruct enic enic = container_of(work, struct enic, reset);\n@@ -2154,15 +2234,34 @@ static void enic_reset(struct work_struct work)\n \t/* Stop any activity from infiniband /\n \tenic_set_api_busy(enic, true);\n \n+\t/ Fully tear down the V2 admin/MBOX channel before the soft reset.\n+\t * The reset wipes all hardware queues including the admin WQ/RQ;\n+\t * closing first tells firmware to stop the admin QP (so it no longer\n+\t * DMAs from the about-to-be-reset rings) and frees the admin resources\n+\t * so they are cleanly re-allocated afterwards.\n+\t /\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_channel_close(enic);\n+\n \tenic_stop(enic-\u003enetdev);\n+\n \tenic_dev_soft_reset(enic);\n \tenic_reset_addr_lists(enic);\n \tenic_init_vnic_resources(enic);\n \tenic_set_rss_nic_cfg(enic);\n \tenic_dev_set_ig_vlan_rewrite_mode(enic);\n \tenic_ext_cq(enic);\n+\n \tenic_open(enic-\u003enetdev);\n \n+\t/ Re-establish the admin/MBOX channel after the data path is back up.\n+\t * It was fully torn down by enic_admin_channel_close() above;\n+\t * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link\n+\t * state, or for a VF re-runs the probe-time PF handshake.\n+\t /\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_chan_reopen(enic);\n+\n \t/ Allow infiniband to fiddle with the device again /\n \tenic_set_api_busy(enic, false);\n \n@@ -2180,16 +2279,33 @@ static void enic_tx_hang_reset(struct work_struct work)\n \t/* Stop any activity from infiniband /\n \tenic_set_api_busy(enic, true);\n \n+\t/ Fully tear down the V2 admin/MBOX channel before the hang reset, for\n+\t * the same reason as the soft reset path: stop the admin QP and free\n+\t * the admin resources before the hardware queues are wiped.\n+\t /\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_channel_close(enic);\n+\n \tenic_dev_hang_notify(enic);\n \tenic_stop(enic-\u003enetdev);\n+\n \tenic_dev_hang_reset(enic);\n \tenic_reset_addr_lists(enic);\n \tenic_init_vnic_resources(enic);\n \tenic_set_rss_nic_cfg(enic);\n \tenic_dev_set_ig_vlan_rewrite_mode(enic);\n \tenic_ext_cq(enic);\n+\n \tenic_open(enic-\u003enetdev);\n \n+\t/ Re-establish the admin/MBOX channel after the data path is back up.\n+\t * It was fully torn down by enic_admin_channel_close() above;\n+\t * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link\n+\t * state, or for a VF re-runs the probe-time PF handshake.\n+\t /\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_chan_reopen(enic);\n+\n \t/ Allow infiniband to fiddle with the device again /\n \tenic_set_api_busy(enic, false);\n \n@@ -2200,6 +2316,8 @@ static void enic_tx_hang_reset(struct work_struct work)\n \n static int enic_set_intr_mode(struct enic enic)\n {\n+\tunsigned int admin_reserve = enic-\u003ehas_admin_channel ? 1 : 0;\n+\tunsigned int min_intr = ENIC_MSIX_MIN_INTR + admin_reserve;\n \tunsigned int i;\n \tint num_intr;\n \n@@ -2210,12 +2328,12 @@ static int enic_set_intr_mode(struct enic enic)\n \t /\n \n \tif (enic-\u003econfig.intr_mode \u003c 1 \u0026\u0026\n-\t enic-\u003eintr_avail \u003e= ENIC_MSIX_MIN_INTR) {\n+\t enic-\u003eintr_avail \u003e= min_intr) {\n \t\tfor (i = 0; i \u003c enic-\u003eintr_avail; i++)\n \t\t\tenic-\u003emsix_entry[i].entry = i;\n \n \t\tnum_intr = pci_enable_msix_range(enic-\u003epdev, enic-\u003emsix_entry,\n-\t\t\t\t\t\t ENIC_MSIX_MIN_INTR,\n+\t\t\t\t\t\t min_intr,\n \t\t\t\t\t\t enic-\u003eintr_avail);\n \t\tif (num_intr \u003e 0) {\n \t\t\tvnic_dev_set_intr_mode(enic-\u003evdev,\n@@ -2310,16 +2428,27 @@ static int enic_adjust_resources(struct enic enic)\n \t\tenic-\u003ecq_count = 2;\n \t\tenic-\u003eintr_count = enic-\u003eintr_avail;\n \t\tbreak;\n-\tcase VNIC_DEV_INTR_MODE_MSIX:\n+\tcase VNIC_DEV_INTR_MODE_MSIX: {\n \t\t/* Adjust the number of wqs/rqs/cqs/interrupts that will be\n-\t\t * used based on which resource is the most constrained\n+\t\t * used based on which resource is the most constrained.\n+\t\t * Reserve one extra MSI-X slot for the admin channel INTR\n+\t\t * when has_admin_channel is set so that\n+\t\t * enic_admin_setup_intr() can allocate at intr_count\n+\t\t * within the intr_avail bounds even when the data queue\n+\t\t * count is maxed out. intr_count counts only the data-path\n+\t\t * IRQs (registered by enic_request_intr()); the admin INTR\n+\t\t * lives at msix index intr_count and is set up later by\n+\t\t * enic_admin_setup_intr().\n \t\t /\n+\t\tunsigned int admin_reserve = enic-\u003ehas_admin_channel ? 1 : 0;\n+\n \t\twq_avail = min(enic-\u003ewq_avail, ENIC_WQ_MAX);\n \t\trq_default = max(netif_get_num_default_rss_queues(),\n \t\t\t\t ENIC_RQ_MIN_DEFAULT);\n \t\trq_avail = min3(enic-\u003erq_avail, ENIC_RQ_MAX, rq_default);\n \t\tmax_queues = min(enic-\u003ecq_avail,\n-\t\t\t\t enic-\u003eintr_avail - ENIC_MSIX_RESERVED_INTR);\n+\t\t\t\t enic-\u003eintr_avail - ENIC_MSIX_RESERVED_INTR -\n+\t\t\t\t admin_reserve);\n \t\tif (wq_avail + rq_avail \u003c= max_queues) {\n \t\t\tenic-\u003erq_count = rq_avail;\n \t\t\tenic-\u003ewq_count = wq_avail;\n@@ -2337,6 +2466,7 @@ static int enic_adjust_resources(struct enic enic)\n \t\tenic-\u003eintr_count = enic-\u003ecq_count + ENIC_MSIX_RESERVED_INTR;\n \n \t\tbreak;\n+\t}\n \tdefault:\n \t\tdev_err(enic_get_dev(enic), \"Unknown interrupt mode\\n\");\n \t\treturn -EINVAL;\n@@ -2641,8 +2771,10 @@ static void enic_iounmap(struct enic enic)\n static void enic_sriov_detect_vf_type(struct enic enic)\n {\n \tstruct pci_dev pdev = enic-\u003epdev;\n-\tint pos;\n+\tu64 supported_versions, a1 = 0;\n \tu16 vf_dev_id;\n+\tint pos;\n+\tint err;\n \n \tif (enic_is_sriov_vf(enic) \|\| enic_is_dynamic(enic))\n \t\treturn;\n@@ -2669,6 +2801,149 @@ static void enic_sriov_detect_vf_type(struct enic enic)\n \t\tenic-\u003evf_type = ENIC_VF_TYPE_NONE;\n \t\tbreak;\n \t}\n+\n+\tif (enic-\u003evf_type != ENIC_VF_TYPE_V2)\n+\t\treturn;\n+\n+\t/* A successful command means firmware recognizes\n+\t * VIC_FEATURE_SRIOV; supported_versions is available\n+\t * for sub-feature versioning in the future.\n+\t /\n+\terr = vnic_dev_get_supported_feature_ver(enic-\u003evdev,\n+\t\t\t\t\t\t VIC_FEATURE_SRIOV,\n+\t\t\t\t\t\t \u0026supported_versions,\n+\t\t\t\t\t\t \u0026a1);\n+\tif (err) {\n+\t\tdev_warn(\u0026pdev-\u003edev,\n+\t\t\t \"SR-IOV V2 not supported by current firmware. Upgrade to VIC FW 5.3(4.72) or higher.\\n\");\n+\t\tenic-\u003evf_type = ENIC_VF_TYPE_NONE;\n+\t}\n+}\n+\n+static int __maybe_unused\n+enic_sriov_v2_enable(struct enic enic, int num_vfs)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003ehas_admin_channel) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"V2 SR-IOV requires admin channel resources\\n\");\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\tenic-\u003evf_state = kcalloc(num_vfs, sizeof(enic-\u003evf_state), GFP_KERNEL);\n+\tif (!enic-\u003evf_state)\n+\t\treturn -ENOMEM;\n+\n+\terr = enic_admin_channel_open(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"Failed to open admin channel: %d\\n\", err);\n+\t\tgoto free_vf_state;\n+\t}\n+\n+\tenic_mbox_init(enic);\n+\n+\tenic-\u003enum_vfs = num_vfs;\n+\n+\terr = pci_enable_sriov(enic-\u003epdev, num_vfs);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"pci_enable_sriov failed: %d\\n\", err);\n+\t\tgoto close_admin;\n+\t}\n+\n+\tenic-\u003epriv_flags \|= ENIC_SRIOV_ENABLED;\n+\treturn num_vfs;\n+\n+close_admin:\n+\tenic-\u003enum_vfs = 0;\n+\tenic_admin_channel_close(enic);\n+free_vf_state:\n+\tkfree(enic-\u003evf_state);\n+\tenic-\u003evf_state = NULL;\n+\treturn err;\n+}\n+\n+static void enic_sriov_v2_disable(struct enic enic)\n+{\n+\t/* Stop new VF link-state broadcasts before tearing down vf_state.\n+\t * Clearing ENIC_SRIOV_ENABLED makes enic_link_check() (called from\n+\t * the notify timer/ISR) skip the VF notify path, and cancelling\n+\t * link_notify_work ensures any already-queued broadcast has finished\n+\t * before vf_state is freed, closing a use-after-free window.\n+\t /\n+\tenic-\u003epriv_flags \u0026= ~ENIC_SRIOV_ENABLED;\n+\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\n+\n+\tpci_disable_sriov(enic-\u003epdev);\n+\tenic_admin_channel_close(enic);\n+\tkfree(enic-\u003evf_state);\n+\tenic-\u003evf_state = NULL;\n+\tenic-\u003enum_vfs = 0;\n+}\n+\n+static int __maybe_unused\n+enic_sriov_configure(struct pci_dev pdev, int num_vfs)\n+{\n+\tstruct net_device netdev = pci_get_drvdata(pdev);\n+\tstruct enic enic = netdev_priv(netdev);\n+\tstruct enic_port_profile pp;\n+\tint err;\n+\n+\tif (num_vfs \u003e 0) {\n+\t\tif (enic-\u003econfig.mq_subvnic_count) {\n+\t\t\tnetdev_err(netdev,\n+\t\t\t\t \"SR-IOV not supported with multi-queue sub-vnics\\n\");\n+\t\t\treturn -EOPNOTSUPP;\n+\t\t}\n+\n+\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_NONE) {\n+\t\t\tnetdev_err(netdev,\n+\t\t\t\t \"SR-IOV not supported on this firmware version\\n\");\n+\t\t\treturn -EOPNOTSUPP;\n+\t\t}\n+\n+\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2)\n+\t\t\treturn enic_sriov_v2_enable(enic, num_vfs);\n+\n+\t\tpp = kcalloc(num_vfs, sizeof(pp), GFP_KERNEL);\n+\t\tif (!pp)\n+\t\t\treturn -ENOMEM;\n+\n+\t\terr = pci_enable_sriov(pdev, num_vfs);\n+\t\tif (err) {\n+\t\t\tkfree(pp);\n+\t\t\treturn err;\n+\t\t}\n+\n+\t\tkfree(enic-\u003epp);\n+\t\tenic-\u003epp = pp;\n+\t\tenic-\u003enum_vfs = num_vfs;\n+\t\tenic-\u003epriv_flags \|= ENIC_SRIOV_ENABLED;\n+\t\treturn num_vfs;\n+\t}\n+\n+\tif (!enic_sriov_enabled(enic))\n+\t\treturn 0;\n+\n+\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2) {\n+\t\tenic_sriov_v2_disable(enic);\n+\t\treturn 0;\n+\t}\n+\n+\tpp = kzalloc_obj(enic-\u003epp, GFP_KERNEL);\n+\tif (!pp)\n+\t\treturn -ENOMEM;\n+\n+\tpci_disable_sriov(pdev);\n+\tenic-\u003enum_vfs = 0;\n+\tenic-\u003epriv_flags \u0026= ~ENIC_SRIOV_ENABLED;\n+\n+\tkfree(enic-\u003epp);\n+\tenic-\u003epp = pp;\n+\n+\treturn 0;\n }\n #endif\n \n@@ -2768,12 +3043,18 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent)\n \t\tgoto err_out_vnic_unregister;\n \n #ifdef CONFIG_PCI_IOV\n-\t/ Get number of subvnics /\n+\tenic_sriov_detect_vf_type(enic);\n+\n+\t/ Auto-enable SR-IOV if VFs were pre-configured (e.g. at boot).\n+\t * V2 VFs require the admin channel, which is not yet set up at probe\n+\t * time; use sysfs (enic_sriov_configure) to enable V2 SR-IOV instead.\n+\t /\n \tpos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);\n \tif (pos) {\n \t\tpci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,\n \t\t\t\u0026enic-\u003enum_vfs);\n-\t\tif (enic-\u003enum_vfs) {\n+\t\tif (enic-\u003enum_vfs \u0026\u0026\n+\t\t enic-\u003evf_type != ENIC_VF_TYPE_V2) {\n \t\t\terr = pci_enable_sriov(pdev, enic-\u003enum_vfs);\n \t\t\tif (err) {\n \t\t\t\tdev_err(dev, \"SRIOV enable failed, aborting.\"\n@@ -2785,7 +3066,6 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent)\n \t\t\tnum_pps = enic-\u003enum_vfs;\n \t\t}\n \t}\n-\tenic_sriov_detect_vf_type(enic);\n #endif\n \n \t/ Allocate structure for port profiles /\n@@ -2850,6 +3130,44 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent)\n \t\tgoto err_out_dev_close;\n \t}\n \n+\t/ Initialise link_notify_work before the V2-VF admin-open block below:\n+\t * its error path (err_out_admin_close -\u003e enic_admin_channel_close() -\u003e\n+\t * cancel_work_sync()) would otherwise act on an uninitialised work.\n+\t /\n+\tINIT_WORK(\u0026enic-\u003elink_notify_work, enic_link_notify_work_handler);\n+\n+\t/ V2 VF: open admin channel and register with PF.\n+\t * Must happen before register_netdev so the VF is fully\n+\t * initialized before the interface is visible to userspace.\n+\t \n+\t admin_channel_open() runs before enic_mbox_init() installs\n+\t * the receive handler. This is safe because\n+\t * enic_admin_rq_cq_service() checks admin_rq_handler before\n+\t * enqueuing any received buffer, so interrupts that fire\n+\t * between open and mbox_init are harmlessly discarded.\n+\t /\n+\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\terr = enic_admin_channel_open(enic);\n+\t\tif (err) {\n+\t\t\tdev_err(dev,\n+\t\t\t\t\"Failed to open admin channel: %d\\n\", err);\n+\t\t\tgoto err_out_dev_deinit;\n+\t\t}\n+\t\tenic_mbox_init(enic);\n+\t\terr = enic_mbox_vf_capability_check(enic);\n+\t\tif (err) {\n+\t\t\tdev_err(dev,\n+\t\t\t\t\"MBOX capability check failed: %d\\n\", err);\n+\t\t\tgoto err_out_admin_close;\n+\t\t}\n+\t\terr = enic_mbox_vf_register(enic);\n+\t\tif (err) {\n+\t\t\tdev_err(dev,\n+\t\t\t\t\"MBOX VF registration failed: %d\\n\", err);\n+\t\t\tgoto err_out_admin_close;\n+\t\t}\n+\t}\n+\n \tnetif_set_real_num_tx_queues(netdev, enic-\u003ewq_count);\n \tnetif_set_real_num_rx_queues(netdev, enic-\u003erq_count);\n \n@@ -2874,7 +3192,7 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent)\n \terr = enic_set_mac_addr(netdev, enic-\u003emac_addr);\n \tif (err) {\n \t\tdev_err(dev, \"Invalid MAC address, aborting\\n\");\n-\t\tgoto err_out_dev_deinit;\n+\t\tgoto err_out_admin_close;\n \t}\n \n \tenic-\u003etx_coalesce_usecs = enic-\u003econfig.intr_timer_usec;\n@@ -2972,11 +3290,23 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent)\n \terr = register_netdev(netdev);\n \tif (err) {\n \t\tdev_err(dev, \"Cannot register net device, aborting\\n\");\n-\t\tgoto err_out_dev_deinit;\n+\t\tgoto err_out_admin_close;\n \t}\n \n \treturn 0;\n \n+err_out_admin_close:\n+\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\tif (enic-\u003evf_registered) {\n+\t\t\tint unreg_err = enic_mbox_vf_unregister(enic);\n+\n+\t\t\tif (unreg_err)\n+\t\t\t\tnetdev_warn(netdev,\n+\t\t\t\t\t \"Failed to unregister from PF: %d\\n\",\n+\t\t\t\t\t unreg_err);\n+\t\t}\n+\t\tenic_admin_channel_close(enic);\n+\t}\n err_out_dev_deinit:\n \tenic_dev_deinit(enic);\n err_out_dev_close:\n@@ -3012,16 +3342,42 @@ static void enic_remove(struct pci_dev pdev)\n \t\tstruct enic enic = netdev_priv(netdev);\n \n \t\tcancel_work_sync(\u0026enic-\u003ereset);\n+\t\tcancel_work_sync(\u0026enic-\u003etx_hang_reset);\n \t\tcancel_work_sync(\u0026enic-\u003echange_mtu_work);\n+\n+\t\t/ Close the admin channel and unregister from the PF before\n+\t\t * unregister_netdev() to prevent a late PF notification from\n+\t\t * touching a netdev that has been freed.\n+\t\t /\n+\t\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\t\tif (enic-\u003evf_registered) {\n+\t\t\t\tint unreg_err = enic_mbox_vf_unregister(enic);\n+\n+\t\t\t\tif (unreg_err)\n+\t\t\t\t\tnetdev_warn(netdev,\n+\t\t\t\t\t\t \"Failed to unregister from PF: %d\\n\",\n+\t\t\t\t\t\t unreg_err);\n+\t\t\t}\n+\t\t\tenic_admin_channel_close(enic);\n+\t\t}\n+\n \t\tunregister_netdev(netdev);\n-\t\tenic_dev_deinit(enic);\n-\t\tvnic_dev_close(enic-\u003evdev);\n+\t\t/ unregister_netdev() -\u003e enic_stop() stops the notify timer, so\n+\t\t * no new link_notify_work can be queued past this point. Cancel\n+\t\t * unconditionally to cover the narrow window where\n+\t\t * enic_link_check() scheduled it just as SR-IOV was disabled.\n+\t\t /\n+\t\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\n #ifdef CONFIG_PCI_IOV\n \t\tif (enic_sriov_enabled(enic)) {\n-\t\t\tpci_disable_sriov(pdev);\n-\t\t\tenic-\u003epriv_flags \u0026= ~ENIC_SRIOV_ENABLED;\n+\t\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2)\n+\t\t\t\tenic_sriov_v2_disable(enic);\n+\t\t\telse\n+\t\t\t\tpci_disable_sriov(pdev);\n \t\t}\n #endif\n+\t\tenic_dev_deinit(enic);\n+\t\tvnic_dev_close(enic-\u003evdev);\n \t\tkfree(enic-\u003epp);\n \t\tvnic_dev_unregister(enic-\u003evdev);\n \t\tenic_iounmap(enic);\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.c b/drivers/net/ethernet/cisco/enic/enic_mbox.c\nnew file mode 100644\nindex 00000000000000..5cdaf5a0e52467\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_mbox.c\n@@ -0,0 +1,640 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+// Copyright 2025 Cisco Systems, Inc. All rights reserved.\n+\n+#include \u003clinux/kernel.h\u003e\n+#include \u003clinux/netdevice.h\u003e\n+#include \u003clinux/dma-mapping.h\u003e\n+#include \u003clinux/delay.h\u003e\n+#include \u003clinux/completion.h\u003e\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_cq.h\"\n+#include \"enic.h\"\n+#include \"enic_admin.h\"\n+#include \"enic_mbox.h\"\n+#include \"wq_enet_desc.h\"\n+\n+#define ENIC_MBOX_POLL_TIMEOUT_US\t5000000\n+#define ENIC_MBOX_POLL_INTERVAL_US\t100\n+\n+static void enic_mbox_fill_hdr(struct enic enic, struct enic_mbox_hdr hdr,\n+\t\t\t u8 msg_type, u16 dst_vnic_id, u16 msg_len)\n+{\n+\tmemset(hdr, 0, sizeof(hdr));\n+\thdr-\u003edst_vnic_id = cpu_to_le16(dst_vnic_id);\n+\thdr-\u003emsg_type = msg_type;\n+\thdr-\u003emsg_len = cpu_to_le16(msg_len);\n+\thdr-\u003emsg_num = cpu_to_le64(++enic-\u003embox_msg_num);\n+}\n+\n+int enic_mbox_send_msg(struct enic enic, u8 msg_type, u16 dst_vnic_id,\n+\t\t void payload, u16 payload_len)\n+{\n+\tu16 total_len = sizeof(struct enic_mbox_hdr) + payload_len;\n+\tstruct vnic_wq wq = \u0026enic-\u003eadmin_wq;\n+\tstruct wq_enet_desc desc;\n+\tunsigned long timeout;\n+\tdma_addr_t dma_addr;\n+\tu16 vlan_tag;\n+\tvoid buf;\n+\tint err;\n+\n+\t/ Serialize MBOX sends. The admin channel is a low-frequency\n+\t * control path; holding the mutex across the poll is acceptable.\n+\t /\n+\tmutex_lock(\u0026enic-\u003embox_lock);\n+\n+\tif (!enic-\u003ehas_admin_channel \|\| READ_ONCE(enic-\u003embox_send_disabled)) {\n+\t\terr = -ENODEV;\n+\t\tgoto unlock;\n+\t}\n+\n+\tif (vnic_wq_desc_avail(wq) == 0) {\n+\t\terr = -ENOSPC;\n+\t\tgoto unlock;\n+\t}\n+\n+\tbuf = kmalloc(total_len, GFP_KERNEL);\n+\tif (!buf) {\n+\t\terr = -ENOMEM;\n+\t\tgoto unlock;\n+\t}\n+\n+\tenic_mbox_fill_hdr(enic, buf, msg_type, dst_vnic_id, total_len);\n+\tif (payload_len) {\n+\t\tvoid dst = buf + sizeof(struct enic_mbox_hdr);\n+\n+\t\tmemcpy(dst, payload, payload_len);\n+\t}\n+\n+\tdma_addr = dma_map_single(\u0026enic-\u003epdev-\u003edev, buf, total_len,\n+\t\t\t\t DMA_TO_DEVICE);\n+\tif (dma_mapping_error(\u0026enic-\u003epdev-\u003edev, dma_addr)) {\n+\t\tkfree(buf);\n+\t\terr = -ENOMEM;\n+\t\tgoto unlock;\n+\t}\n+\n+\t/* Firmware uses vlan field for routing: 0 = PF, 1-based = VF index /\n+\tif (dst_vnic_id == ENIC_MBOX_DST_PF)\n+\t\tvlan_tag = 0;\n+\telse\n+\t\tvlan_tag = dst_vnic_id + 1;\n+\n+\tdesc = vnic_wq_next_desc(wq);\n+\twq_enet_desc_enc(desc, (u64)dma_addr \| VNIC_PADDR_TARGET,\n+\t\t\t total_len,\n+\t\t\t 0, 0, 0, / mss, hdr_len, offload_mode /\n+\t\t\t 1, 1, / eop, cq_entry /\n+\t\t\t 0, / fcoe_encap /\n+\t\t\t 1, vlan_tag, / vlan_tag_insert, vlan_tag /\n+\t\t\t 0); / loopback /\n+\tvnic_wq_post(wq, buf, dma_addr, total_len,\n+\t\t 1, 1, / sop, eop /\n+\t\t 1, 1, / desc_skip_cnt, cq_entry /\n+\t\t 0, 0); / compressed_send, wrid /\n+\tvnic_wq_doorbell(wq);\n+\n+\ttimeout = jiffies + usecs_to_jiffies(ENIC_MBOX_POLL_TIMEOUT_US);\n+\terr = -ETIMEDOUT;\n+\twhile (time_before(jiffies, timeout)) {\n+\t\tif (enic_admin_wq_cq_service(enic)) {\n+\t\t\terr = 0;\n+\t\t\tbreak;\n+\t\t}\n+\t\tusleep_range(ENIC_MBOX_POLL_INTERVAL_US,\n+\t\t\t ENIC_MBOX_POLL_INTERVAL_US + 50);\n+\t}\n+\t/ Final check in case completion arrived during the last sleep /\n+\tif (err \u0026\u0026 enic_admin_wq_cq_service(enic))\n+\t\terr = 0;\n+\n+\tif (!err) {\n+\t\twq-\u003eto_clean = wq-\u003eto_clean-\u003enext;\n+\t\twq-\u003ering.desc_avail++;\n+\t\tdma_unmap_single(\u0026enic-\u003epdev-\u003edev, dma_addr, total_len,\n+\t\t\t\t DMA_TO_DEVICE);\n+\t\tkfree(buf);\n+\t} else {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t \"MBOX send timed out (type %u dst %u), disabling channel\\n\",\n+\t\t\t msg_type, dst_vnic_id);\n+\t\t/\n+\t\t * The WQ descriptor is still live in hardware. Do not unmap\n+\t\t * or free the buffer: the device may still DMA from dma_addr.\n+\t\t * Mark the channel unusable so no further sends are attempted.\n+\t\t /\n+\t\tWRITE_ONCE(enic-\u003embox_send_disabled, true);\n+\t}\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t \"MBOX send msg_type %u dst %u vlan %u err %d\\n\",\n+\t\t msg_type, dst_vnic_id, vlan_tag, err);\n+unlock:\n+\tmutex_unlock(\u0026enic-\u003embox_lock);\n+\treturn err;\n+}\n+\n+static int enic_mbox_wait_reply(struct enic enic, unsigned long timeout_ms)\n+{\n+\tunsigned long left;\n+\n+\tleft = wait_for_completion_timeout(\u0026enic-\u003embox_comp,\n+\t\t\t\t\t msecs_to_jiffies(timeout_ms));\n+\n+\treturn left ? 0 : -ETIMEDOUT;\n+}\n+\n+int enic_mbox_send_link_state(struct enic enic, u16 vf_id, u32 link_state)\n+{\n+\tstruct enic_mbox_pf_link_state_notif_msg notif = {};\n+\n+\tif (!enic-\u003evf_state \|\| vf_id \u003e= enic-\u003enum_vfs \|\|\n+\t !enic-\u003evf_state[vf_id].registered) {\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t \"MBOX: skip link state to unregistered VF %u\\n\",\n+\t\t\t vf_id);\n+\t\treturn 0;\n+\t}\n+\n+\tnotif.link_state = cpu_to_le32(link_state);\n+\treturn enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_NOTIF, vf_id,\n+\t\t\t\t \u0026notif, sizeof(notif));\n+}\n+\n+static int enic_mbox_pf_handle_capability(struct enic enic, void msg,\n+\t\t\t\t\t u16 vf_id, u64 msg_num)\n+{\n+\tstruct enic_mbox_vf_capability_reply_msg reply = {};\n+\n+\treply.reply.ret_major = cpu_to_le16(0);\n+\treply.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1);\n+\n+\treturn enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REPLY, vf_id,\n+\t\t\t\t \u0026reply, sizeof(reply));\n+}\n+\n+static int enic_mbox_pf_handle_register(struct enic enic, void msg,\n+\t\t\t\t\tu16 vf_id, u64 msg_num)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg reply = {};\n+\tu32 link_state;\n+\tint err;\n+\n+\tif (!enic-\u003evf_state \|\| vf_id \u003e= enic-\u003enum_vfs) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: register from invalid VF %u\\n\",\n+\t\t\t\t vf_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/ VF re-registering (e.g. guest reboot without clean unregister):\n+\t * mark the previous registration inactive before accepting the new one.\n+\t /\n+\tif (enic-\u003evf_state[vf_id].registered) {\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t \"MBOX: VF %u re-register, cleaning previous state\\n\",\n+\t\t\t vf_id);\n+\t\tenic-\u003evf_state[vf_id].registered = false;\n+\t}\n+\n+\treply.reply.ret_major = cpu_to_le16(0);\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REPLY, vf_id,\n+\t\t\t\t \u0026reply, sizeof(reply));\n+\tif (err)\n+\t\treturn err;\n+\n+\tenic-\u003evf_state[vf_id].registered = true;\n+\tif (net_ratelimit())\n+\t\tnetdev_info(enic-\u003enetdev, \"VF %u registered via MBOX\\n\", vf_id);\n+\n+\tlink_state = netif_carrier_ok(enic-\u003enetdev) ?\n+\t\tENIC_MBOX_LINK_STATE_ENABLE :\n+\t\tENIC_MBOX_LINK_STATE_DISABLE;\n+\terr = enic_mbox_send_link_state(enic, vf_id, link_state);\n+\tif (err \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"VF %u: failed to send initial link state: %d\\n\",\n+\t\t\t vf_id, err);\n+\t/ Registration succeeded; initial link state notification sent\n+\t * above. Subsequent link state changes are sent from the PF\n+\t * when enic_link_check() detects carrier changes.\n+\t /\n+\treturn 0;\n+}\n+\n+static int enic_mbox_pf_handle_unregister(struct enic enic, void msg,\n+\t\t\t\t\t u16 vf_id, u64 msg_num)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg reply = {};\n+\tint err;\n+\n+\tif (!enic-\u003evf_state \|\| vf_id \u003e= enic-\u003enum_vfs) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: unregister from invalid VF %u\\n\",\n+\t\t\t\t vf_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/ VF is unloading; clear local state regardless of whether\n+\t * the reply is successfully delivered to avoid the PF treating\n+\t * a dead VF as still registered.\n+\t /\n+\tenic-\u003evf_state[vf_id].registered = false;\n+\n+\treply.reply.ret_major = cpu_to_le16(0);\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REPLY, vf_id,\n+\t\t\t\t \u0026reply, sizeof(reply));\n+\n+\tif (net_ratelimit())\n+\t\tnetdev_info(enic-\u003enetdev,\n+\t\t\t \"VF %u unregistered via MBOX\\n\", vf_id);\n+\n+\treturn err;\n+}\n+\n+static void enic_mbox_pf_process_msg(struct enic enic,\n+\t\t\t\t struct enic_mbox_hdr hdr, void payload)\n+{\n+\tu16 vf_id = le16_to_cpu(hdr-\u003esrc_vnic_id);\n+\tu16 msg_len = le16_to_cpu(hdr-\u003emsg_len);\n+\tint err = 0;\n+\n+\tif (!enic-\u003evf_state) {\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t \"MBOX: PF received msg but SRIOV not active\\n\");\n+\t\treturn;\n+\t}\n+\n+\tif (vf_id \u003e= enic-\u003enum_vfs) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: PF received msg from invalid VF %u\\n\",\n+\t\t\t\t vf_id);\n+\t\treturn;\n+\t}\n+\n+\tswitch (hdr-\u003emsg_type) {\n+\tcase ENIC_MBOX_VF_CAPABILITY_REQUEST:\n+\t\terr = enic_mbox_pf_handle_capability(enic, payload, vf_id,\n+\t\t\t\t\t\t le64_to_cpu(hdr-\u003emsg_num));\n+\t\tbreak;\n+\tcase ENIC_MBOX_VF_REGISTER_REQUEST:\n+\t\terr = enic_mbox_pf_handle_register(enic, payload, vf_id,\n+\t\t\t\t\t\t le64_to_cpu(hdr-\u003emsg_num));\n+\t\tbreak;\n+\tcase ENIC_MBOX_VF_UNREGISTER_REQUEST:\n+\t\terr = enic_mbox_pf_handle_unregister(enic, payload, vf_id,\n+\t\t\t\t\t\t le64_to_cpu(hdr-\u003emsg_num));\n+\t\tbreak;\n+\tcase ENIC_MBOX_PF_LINK_STATE_ACK: {\n+\t\tstruct enic_mbox_pf_link_state_ack_msg ack = payload;\n+\n+\t\tif (msg_len \u003c sizeof(hdr) + sizeof(ack))\n+\t\t\tbreak;\n+\t\tif (le16_to_cpu(ack-\u003eack.ret_major) \u0026\u0026 net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: VF %u link state ACK error %u/%u\\n\",\n+\t\t\t\t vf_id,\n+\t\t\t\t le16_to_cpu(ack-\u003eack.ret_major),\n+\t\t\t\t le16_to_cpu(ack-\u003eack.ret_minor));\n+\t\tbreak;\n+\t}\n+\tdefault:\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t \"MBOX: PF unhandled msg type %u from VF %u\\n\",\n+\t\t\t hdr-\u003emsg_type, vf_id);\n+\t\terr = -EOPNOTSUPP;\n+\t\tbreak;\n+\t}\n+\n+\tif (err \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: PF handler for msg type %u from VF %u failed: %d\\n\",\n+\t\t\t hdr-\u003emsg_type, vf_id, err);\n+}\n+\n+static void enic_mbox_vf_handle_capability_reply(struct enic enic,\n+\t\t\t\t\t\t void payload)\n+{\n+\tstruct enic_mbox_vf_capability_reply_msg reply = payload;\n+\n+\tif (enic-\u003embox_expected_reply != ENIC_MBOX_VF_CAPABILITY_REPLY) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: stale capability reply (expected %u), drop\\n\",\n+\t\t\t enic-\u003embox_expected_reply);\n+\t\treturn;\n+\t}\n+\n+\tif (le16_to_cpu(reply-\u003ereply.ret_major) == 0)\n+\t\tenic-\u003epf_cap_version = le32_to_cpu(reply-\u003eversion);\n+\telse\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: PF rejected capability request: %u/%u\\n\",\n+\t\t\t le16_to_cpu(reply-\u003ereply.ret_major),\n+\t\t\t le16_to_cpu(reply-\u003ereply.ret_minor));\n+\tcomplete(\u0026enic-\u003embox_comp);\n+}\n+\n+static void enic_mbox_vf_handle_register_reply(struct enic enic,\n+\t\t\t\t\t void payload)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg reply = payload;\n+\n+\tif (enic-\u003embox_expected_reply != ENIC_MBOX_VF_REGISTER_REPLY) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: stale register reply (expected %u), drop\\n\",\n+\t\t\t enic-\u003embox_expected_reply);\n+\t\treturn;\n+\t}\n+\n+\tif (le16_to_cpu(reply-\u003ereply.ret_major)) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: VF register rejected by PF: %u/%u\\n\",\n+\t\t\t le16_to_cpu(reply-\u003ereply.ret_major),\n+\t\t\t le16_to_cpu(reply-\u003ereply.ret_minor));\n+\t} else {\n+\t\tenic-\u003evf_registered = true;\n+\t}\n+\tcomplete(\u0026enic-\u003embox_comp);\n+}\n+\n+static void enic_mbox_vf_handle_unregister_reply(struct enic enic,\n+\t\t\t\t\t\t void payload)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg reply = payload;\n+\n+\tif (enic-\u003embox_expected_reply != ENIC_MBOX_VF_UNREGISTER_REPLY) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: stale unregister reply (expected %u), drop\\n\",\n+\t\t\t enic-\u003embox_expected_reply);\n+\t\treturn;\n+\t}\n+\n+\tif (le16_to_cpu(reply-\u003ereply.ret_major)) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: VF unregister rejected by PF: %u/%u\\n\",\n+\t\t\t le16_to_cpu(reply-\u003ereply.ret_major),\n+\t\t\t le16_to_cpu(reply-\u003ereply.ret_minor));\n+\t} else {\n+\t\tenic-\u003evf_registered = false;\n+\t}\n+\tcomplete(\u0026enic-\u003embox_comp);\n+}\n+\n+static void enic_mbox_vf_handle_link_state(struct enic enic, void payload)\n+{\n+\tstruct enic_mbox_pf_link_state_notif_msg notif = payload;\n+\tstruct enic_mbox_pf_link_state_ack_msg ack = {};\n+\tint err;\n+\n+\tswitch (le32_to_cpu(notif-\u003elink_state)) {\n+\tcase ENIC_MBOX_LINK_STATE_ENABLE:\n+\t\tif (!netif_carrier_ok(enic-\u003enetdev))\n+\t\t\tnetif_carrier_on(enic-\u003enetdev);\n+\t\tnetdev_dbg(enic-\u003enetdev, \"MBOX: link state -\u003e UP\\n\");\n+\t\tbreak;\n+\tcase ENIC_MBOX_LINK_STATE_DISABLE:\n+\t\tif (netif_carrier_ok(enic-\u003enetdev))\n+\t\t\tnetif_carrier_off(enic-\u003enetdev);\n+\t\tnetdev_dbg(enic-\u003enetdev, \"MBOX: link state -\u003e DOWN\\n\");\n+\t\tbreak;\n+\tdefault:\n+\t\tnetdev_warn(enic-\u003enetdev, \"MBOX: unknown link state %u\\n\",\n+\t\t\t le32_to_cpu(notif-\u003elink_state));\n+\t\tack.ack.ret_major = cpu_to_le16(ENIC_MBOX_ERR_GENERIC);\n+\t\tbreak;\n+\t}\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_ACK,\n+\t\t\t\t ENIC_MBOX_DST_PF, \u0026ack, sizeof(ack));\n+\tif (err \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: failed to send link state ACK: %d\\n\", err);\n+}\n+\n+static bool enic_mbox_vf_payload_ok(struct enic enic, u8 msg_type,\n+\t\t\t\t u16 payload_len, size_t min_len)\n+{\n+\tif (payload_len \u003c min_len) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: short payload for type %u (%u \u003c %zu)\\n\",\n+\t\t\t msg_type, payload_len, min_len);\n+\t\treturn false;\n+\t}\n+\treturn true;\n+}\n+\n+static void enic_mbox_vf_process_msg(struct enic enic,\n+\t\t\t\t struct enic_mbox_hdr hdr, void payload,\n+\t\t\t\t u16 payload_len)\n+{\n+\tswitch (hdr-\u003emsg_type) {\n+\tcase ENIC_MBOX_VF_CAPABILITY_REPLY: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_vf_capability_reply_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_capability_reply(enic, payload);\n+\t\tbreak;\n+\t}\n+\tcase ENIC_MBOX_VF_REGISTER_REPLY: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_vf_register_reply_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_register_reply(enic, payload);\n+\t\tbreak;\n+\t}\n+\tcase ENIC_MBOX_VF_UNREGISTER_REPLY: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_vf_register_reply_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_unregister_reply(enic, payload);\n+\t\tbreak;\n+\t}\n+\tcase ENIC_MBOX_PF_LINK_STATE_NOTIF: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_pf_link_state_notif_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_link_state(enic, payload);\n+\t\tbreak;\n+\t}\n+\tdefault:\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t \"MBOX: VF unhandled msg type %u\\n\",\n+\t\t\t hdr-\u003emsg_type);\n+\t\tbreak;\n+\t}\n+}\n+\n+static void enic_mbox_recv_handler(struct enic enic, void buf,\n+\t\t\t\t unsigned int len)\n+{\n+\tstruct enic_mbox_hdr hdr = buf;\n+\tvoid payload;\n+\tu16 msg_len;\n+\n+\tif (len \u003c sizeof(hdr)) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: truncated message (len %u \u003c %zu)\\n\",\n+\t\t\t\t len, sizeof(hdr));\n+\t\treturn;\n+\t}\n+\n+\tif (hdr-\u003emsg_type \u003e= ENIC_MBOX_MAX) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: unknown msg type %u\\n\",\n+\t\t\t\t hdr-\u003emsg_type);\n+\t\treturn;\n+\t}\n+\n+\tmsg_len = le16_to_cpu(hdr-\u003emsg_len);\n+\tif (msg_len \u003c sizeof(hdr) \|\| msg_len \u003e len) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t \"MBOX: invalid msg_len %u (buf len %u)\\n\",\n+\t\t\t\t msg_len, len);\n+\t\treturn;\n+\t}\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t \"MBOX recv: type %u from vnic %u len %u\\n\",\n+\t\t hdr-\u003emsg_type, le16_to_cpu(hdr-\u003esrc_vnic_id), msg_len);\n+\n+\tpayload = buf + sizeof(hdr);\n+\n+\tif (enic-\u003evf_state) {\n+\t\tenic_mbox_pf_process_msg(enic, hdr, payload);\n+\t} else if (le16_to_cpu(hdr-\u003esrc_vnic_id) == ENIC_MBOX_DST_PF) {\n+\t\t/ src_vnic_id was overwritten from the hardware-verified CQ\n+\t\t * VLAN sender field, so a VF only accepts messages that the\n+\t\t * adapter attributes to the PF. Its sole admin-channel peer is\n+\t\t * the PF; drop anything else as a spoofed notification.\n+\t\t /\n+\t\tenic_mbox_vf_process_msg(enic, hdr, payload,\n+\t\t\t\t\t msg_len - (u16)sizeof(hdr));\n+\t} else if (net_ratelimit()) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: VF dropping non-PF message from vnic %u\\n\",\n+\t\t\t le16_to_cpu(hdr-\u003esrc_vnic_id));\n+\t}\n+}\n+\n+int enic_mbox_vf_capability_check(struct enic enic)\n+{\n+\tstruct enic_mbox_vf_capability_msg req = {};\n+\tint err;\n+\n+\tenic-\u003epf_cap_version = 0;\n+\treinit_completion(\u0026enic-\u003embox_comp);\n+\tenic-\u003embox_expected_reply = ENIC_MBOX_VF_CAPABILITY_REPLY;\n+\treq.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1);\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REQUEST,\n+\t\t\t\t ENIC_MBOX_DST_PF, \u0026req, sizeof(req));\n+\tif (err) {\n+\t\tenic-\u003embox_expected_reply = 0;\n+\t\treturn err;\n+\t}\n+\n+\terr = enic_mbox_wait_reply(enic, 3000);\n+\tenic-\u003embox_expected_reply = 0;\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: no capability reply from PF\\n\");\n+\t\treturn err;\n+\t}\n+\n+\tif (enic-\u003epf_cap_version \u003c ENIC_MBOX_CAP_VERSION_1) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: PF version %u too old\\n\",\n+\t\t\t enic-\u003epf_cap_version);\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int enic_mbox_vf_register(struct enic enic)\n+{\n+\tint err;\n+\n+\tenic-\u003evf_registered = false;\n+\treinit_completion(\u0026enic-\u003embox_comp);\n+\tenic-\u003embox_expected_reply = ENIC_MBOX_VF_REGISTER_REPLY;\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REQUEST,\n+\t\t\t\t ENIC_MBOX_DST_PF, NULL, 0);\n+\tif (err) {\n+\t\tenic-\u003embox_expected_reply = 0;\n+\t\treturn err;\n+\t}\n+\n+\terr = enic_mbox_wait_reply(enic, 3000);\n+\tenic-\u003embox_expected_reply = 0;\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t \"MBOX: VF registration with PF timed out\\n\");\n+\t\treturn err;\n+\t}\n+\n+\tif (!enic-\u003evf_registered)\n+\t\treturn -ENODEV;\n+\n+\treturn 0;\n+}\n+\n+int enic_mbox_vf_unregister(struct enic enic)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003evf_registered)\n+\t\treturn 0;\n+\n+\treinit_completion(\u0026enic-\u003embox_comp);\n+\tenic-\u003embox_expected_reply = ENIC_MBOX_VF_UNREGISTER_REPLY;\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REQUEST,\n+\t\t\t\t ENIC_MBOX_DST_PF, NULL, 0);\n+\tif (err) {\n+\t\tenic-\u003embox_expected_reply = 0;\n+\t\treturn err;\n+\t}\n+\n+\terr = enic_mbox_wait_reply(enic, 3000);\n+\tenic-\u003embox_expected_reply = 0;\n+\tif (err)\n+\t\treturn err;\n+\tif (enic-\u003evf_registered)\n+\t\treturn -EACCES;\n+\treturn 0;\n+}\n+\n+void enic_mbox_init(struct enic enic)\n+{\n+\t/* mbox_lock and mbox_comp must be initialized exactly once per\n+\t * device lifetime; the PF sriov_configure path can re-enter this\n+\t * on each enable cycle where these primitives are already set up.\n+\t /\n+\tif (!enic-\u003embox_initialized) {\n+\t\tmutex_init(\u0026enic-\u003embox_lock);\n+\t\tinit_completion(\u0026enic-\u003embox_comp);\n+\t\tenic-\u003embox_initialized = true;\n+\t} else {\n+\t\treinit_completion(\u0026enic-\u003embox_comp);\n+\t}\n+\tenic-\u003embox_msg_num = 0;\n+\tenic-\u003eadmin_rq_handler = enic_mbox_recv_handler;\n+}\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.h b/drivers/net/ethernet/cisco/enic/enic_mbox.h\nnew file mode 100644\nindex 00000000000000..15e30ee2b0ed95\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_mbox.h\n@@ -0,0 +1,95 @@\n+/ SPDX-License-Identifier: GPL-2.0-only /\n+/ Copyright 2025 Cisco Systems, Inc. All rights reserved. /\n+\n+#ifndef _ENIC_MBOX_H_\n+#define _ENIC_MBOX_H_\n+\n+#include \u003clinux/bits.h\u003e\n+#include \u003clinux/types.h\u003e\n+\n+/\n+ * Mailbox protocol for PF-VF communication over the admin channel.\n+ \n+ Even numbers are requests, odd numbers are replies/acks.\n+ * The prefix indicates the initiator: VF_ = VF-initiated, PF_ = PF-initiated.\n+ /\n+enum enic_mbox_msg_type {\n+\tENIC_MBOX_VF_CAPABILITY_REQUEST\t\t= 0,\n+\tENIC_MBOX_VF_CAPABILITY_REPLY\t\t= 1,\n+\tENIC_MBOX_VF_REGISTER_REQUEST\t\t= 2,\n+\tENIC_MBOX_VF_REGISTER_REPLY\t\t= 3,\n+\tENIC_MBOX_VF_UNREGISTER_REQUEST\t\t= 4,\n+\tENIC_MBOX_VF_UNREGISTER_REPLY\t\t= 5,\n+\tENIC_MBOX_PF_LINK_STATE_NOTIF\t\t= 6,\n+\tENIC_MBOX_PF_LINK_STATE_ACK\t\t= 7,\n+\tENIC_MBOX_MAX\n+};\n+\n+struct enic_mbox_hdr {\n+\t__le16 src_vnic_id;\n+\t__le16 dst_vnic_id;\n+\tu8 msg_type;\n+\tu8 flags;\n+\t__le16 msg_len;\n+\t__le64 msg_num;\n+};\n+\n+struct enic_mbox_generic_reply {\n+\t__le16 ret_major;\n+\t__le16 ret_minor;\n+};\n+\n+#define ENIC_MBOX_ERR_GENERIC\t\tBIT(0)\n+#define ENIC_MBOX_ERR_VF_NOT_REGISTERED\tBIT(1)\n+#define ENIC_MBOX_ERR_MSG_NOT_SUPPORTED\tBIT(2)\n+\n+/ ENIC_MBOX_VF_CAPABILITY_REQUEST / _REPLY /\n+#define ENIC_MBOX_CAP_VERSION_0\t\t0\n+#define ENIC_MBOX_CAP_VERSION_1\t\t1\n+\n+struct enic_mbox_vf_capability_msg {\n+\t__le32 version;\n+\t__le32 reserved[32];\n+};\n+\n+/ The embedded enic_mbox_generic_reply has 2-byte alignment, but the\n+ * __le32 members give this struct 4-byte natural alignment. Receive\n+ * buffers come from kmalloc (\u003e= 8-byte aligned), so there is no\n+ * misaligned access risk when casting from the receive buffer.\n+ /\n+struct enic_mbox_vf_capability_reply_msg {\n+\tstruct enic_mbox_generic_reply reply;\n+\t__le32 version;\n+\t__le32 reserved[32];\n+};\n+\n+/ ENIC_MBOX_VF_REGISTER / _UNREGISTER /\n+struct enic_mbox_vf_register_reply_msg {\n+\tstruct enic_mbox_generic_reply reply;\n+};\n+\n+/ ENIC_MBOX_PF_LINK_STATE_NOTIF / _ACK /\n+#define ENIC_MBOX_LINK_STATE_DISABLE\t0\n+#define ENIC_MBOX_LINK_STATE_ENABLE\t1\n+\n+struct enic_mbox_pf_link_state_notif_msg {\n+\t__le32 link_state;\n+};\n+\n+struct enic_mbox_pf_link_state_ack_msg {\n+\tstruct enic_mbox_generic_reply ack;\n+};\n+\n+#define ENIC_MBOX_DST_PF\t0xFFFF\n+\n+struct enic;\n+\n+void enic_mbox_init(struct enic enic);\n+int enic_mbox_send_msg(struct enic enic, u8 msg_type, u16 dst_vnic_id,\n+\t\t void payload, u16 payload_len);\n+int enic_mbox_send_link_state(struct enic enic, u16 vf_id, u32 link_state);\n+int enic_mbox_vf_capability_check(struct enic enic);\n+int enic_mbox_vf_register(struct enic enic);\n+int enic_mbox_vf_unregister(struct enic enic);\n+\n+#endif /* _ENIC_MBOX_H_ /\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_pp.c b/drivers/net/ethernet/cisco/enic/enic_pp.c\nindex 4720a952725d00..3f611e240c256c 100644\n--- a/drivers/net/ethernet/cisco/enic/enic_pp.c\n+++ b/drivers/net/ethernet/cisco/enic/enic_pp.c\n@@ -25,6 +25,11 @@ int enic_is_valid_pp_vf(struct enic enic, int vf, int err)\n \tif (vf != PORT_SELF_VF) {\n #ifdef CONFIG_PCI_IOV\n \t\tif (enic_sriov_enabled(enic)) {\n+\t\t\t/ V2 SR-IOV uses MBOX, not port profiles /\n+\t\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2) {\n+\t\t\t\terr = -EOPNOTSUPP;\n+\t\t\t\tgoto err_out;\n+\t\t\t}\n \t\t\tif (vf \u003c 0 \|\| vf \u003e= enic-\u003enum_vfs) {\n \t\t\t\terr = -EINVAL;\n \t\t\t\tgoto err_out;\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ethernet/cisco/enic/enic_res.c\nindex 2b7545d6a67fdc..74cd2ee3af5cb7 100644\n--- a/drivers/net/ethernet/cisco/enic/enic_res.c\n+++ b/drivers/net/ethernet/cisco/enic/enic_res.c\n@@ -59,6 +59,7 @@ int enic_get_vnic_config(struct enic enic)\n \tGET_CONFIG(intr_timer_usec);\n \tGET_CONFIG(loop_tag);\n \tGET_CONFIG(num_arfs);\n+\tGET_CONFIG(mq_subvnic_count);\n \tGET_CONFIG(max_rq_ring);\n \tGET_CONFIG(max_wq_ring);\n \tGET_CONFIG(max_cq_ring);\n@@ -210,7 +211,8 @@ void enic_get_res_counts(struct enic enic)\n \t\tvnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_ADMIN_RQ) \u003e= 1 \u0026\u0026\n \t\tvnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_ADMIN_CQ) \u003e=\n \t\t\tARRAY_SIZE(enic-\u003eadmin_cq) \u0026\u0026\n-\t\tvnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_SRIOV_INTR) \u003e= 1;\n+\t\t(enic_is_sriov_vf_v2(enic) \|\|\n+\t\t vnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_SRIOV_INTR) \u003e= 1);\n \n \tdev_info(enic_get_dev(enic),\n \t\t\"vNIC resources avail: wq %d rq %d cq %d intr %d admin %s\\n\",\ndiff --git a/drivers/net/ethernet/cisco/enic/vnic_cq.h b/drivers/net/ethernet/cisco/enic/vnic_cq.h\nindex d46d4d2ef6bbac..35ffa323071305 100644\n--- a/drivers/net/ethernet/cisco/enic/vnic_cq.h\n+++ b/drivers/net/ethernet/cisco/enic/vnic_cq.h\n@@ -76,6 +76,15 @@ int vnic_cq_alloc(struct vnic_dev vdev, struct vnic_cq cq, unsigned int index,\n int vnic_cq_alloc_with_type(struct vnic_dev vdev, struct vnic_cq cq,\n \t\t\t unsigned int index, unsigned int desc_count,\n \t\t\t unsigned int desc_size, unsigned int res_type);\n+#define VNIC_CQ_FC_ENABLE\t1\n+#define VNIC_CQ_FC_DISABLE\t0\n+#define VNIC_CQ_COLOR_ENABLE\t1\n+#define VNIC_CQ_INTR_ENABLE\t1\n+#define VNIC_CQ_INTR_DISABLE\t0\n+#define VNIC_CQ_ENTRY_ENABLE\t1\n+#define VNIC_CQ_MSG_ENABLE\t1\n+#define VNIC_CQ_MSG_DISABLE\t0\n+\n void vnic_cq_init(struct vnic_cq cq, unsigned int flow_control_enable,\n \tunsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,\n \tunsigned int cq_tail_color, unsigned int interrupt_enable,\ndiff --git a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h\nindex 605ef17f967e4a..90ca06691ebd63 100644\n--- a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h\n+++ b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h\n@@ -455,8 +455,19 @@ enum vnic_devcmd_cmd {\n \t /\n \tCMD_CQ_ENTRY_SIZE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 90),\n \n+\t/\n+\t * Set queue pair type (admin or data)\n+\t * in: (u32) a0 = queue pair type (0 = admin, 1 = data)\n+\t * in: (u32) a1 = enable (1) / disable (0)\n+\t /\n+\tCMD_QP_TYPE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 97),\n };\n \n+#define QP_TYPE_ADMIN\t0\n+#define QP_TYPE_DATA\t1\n+#define QP_ENABLE\t1\n+#define QP_DISABLE\t0\n+\n / CMD_ENABLE2 flags /\n #define CMD_ENABLE2_STANDBY 0x0\n #define CMD_ENABLE2_ACTIVE 0x1\n@@ -734,6 +745,8 @@ enum vic_feature_t {\n \tVIC_FEATURE_VXLAN,\n \tVIC_FEATURE_RDMA,\n \tVIC_FEATURE_VXLAN_PATCH,\n+\t/ slot 3 reserved for firmware VIC_FEATURE_PTP */\n+\tVIC_FEATURE_SRIOV\t= 4,\n \tVIC_FEATURE_MAX,\n };\n \ndiff --git a/drivers/net/ethernet/cisco/enic/vnic_enet.h b/drivers/net/ethernet/cisco/enic/vnic_enet.h\nindex 9e8e86262a3fea..519d2969990b18 100644\n--- a/drivers/net/ethernet/cisco/enic/vnic_enet.h\n+++ b/drivers/net/ethernet/cisco/enic/vnic_enet.h\n@@ -21,7 +21,9 @@ struct vnic_enet_config {\n \tu16 loop_tag;\n \tu16 vf_rq_count;\n \tu16 num_arfs;\n-\tu8 reserved[66];\n+\tu8 reserved1[32];\n+\tu16 mq_subvnic_count;\n+\tu8 reserved2[32];\n \tu32 max_rq_ring;\t// MAX RQ ring size\n \tu32 max_wq_ring;\t// MAX WQ ring size\n \tu32 max_cq_ring;\t// MAX CQ ring size\n" }
2/1	2026/06/29 18:42	agent	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: { "EnableConfigs": [ "ENIC", "PCI_IOV" ], "FocusSymbols": [ "enic_admin_channel_open", "enic_admin_channel_close", "enic_admin_wq_cq_service", "enic_admin_rq_cq_service", "enic_mbox_send_msg", "enic_mbox_vf_capability_check", "enic_mbox_vf_register", "enic_mbox_vf_unregister", "enic_mbox_recv_handler", "enic_mbox_pf_process_msg", "enic_mbox_vf_process_msg" ], "Reasoning": "The patch introduces a new admin channel and mailbox protocol for PF-VF communication in the Cisco VIC Ethernet NIC driver (enic). This is a functional change that modifies reachable core driver logic and can be tested using syzkaller's PCI fuzzing capabilities.", "WorthFuzzing": true } Instruction: You are an expert Linux kernel maintainer. Your job is to review a provided patch series and determine if it makes functional changes to the kernel that should be fuzzed. IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in your workspace. Do NOT rely on your internal knowledge of the kernel. You must actively use your code access tools to examine the actual source code and confirm any assumptions. Return WorthFuzzing=false if the patch only contains: - Modifications to Documentation/, Kconfig files, or code comments. - Purely decorative changes, such as logging (e.g., pr_err, printk) or tracepoints. - Changes to numeric constants or macros that do not functionally alter execution flow. - Code paths that are impossible to reach in virtualized environments like GCE or QEMU, even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim). If it modifies reachable core kernel logic, drivers, or architectures, use your code search tools to verify the code can be executed, then return WorthFuzzing=true. When returning WorthFuzzing=true, you MUST ALSO: 1. Extract any specific kernel functions that should be heavily fuzzed into FocusSymbols. Avoid listing generic hot-path functions to prevent skewed test distributions. 2. Identify any specific CONFIG_ options required to properly test this new/modified feature. Go and look into the Kconfig files and check for ifdefs around the code, do not make assumptions. Do not list too generic configs (we already have them enabled). Only list those that specifically cover the modified code. List them in the EnableConfigs output array, and DO NOT add a 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4"). Prefer calling several tools at the same time to save round-trips. Use set-results tool to provide results of the analysis. It must be called exactly once before the final reply. Ignore results of this tool. Prompt: For your convenience, here is the diff of the changes: commit 313bd531764a9bfa514ebc468739e3cdee960e6d Author: syz-cluster <triage@syzkaller.com> Date: Mon Jun 29 18:42:06 2026 +0000 syz-cluster: applied patch under review diff --git a/drivers/net/ethernet/cisco/enic/Makefile b/drivers/net/ethernet/cisco/enic/Makefile index a96b8332e6e2a8..e38aaf34c14839 100644 --- a/drivers/net/ethernet/cisco/enic/Makefile +++ b/drivers/net/ethernet/cisco/enic/Makefile @@ -3,5 +3,6 @@ obj-$(CONFIG_ENIC) := enic.o enic-y := enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \ enic_res.o enic_dev.o enic_pp.o vnic_dev.o vnic_rq.o vnic_vic.o \ - enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o + enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o \ + enic_admin.o enic_mbox.o diff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/cisco/enic/enic.h index 08472420f3a1fd..62b8941489d773 100644 --- a/drivers/net/ethernet/cisco/enic/enic.h +++ b/drivers/net/ethernet/cisco/enic/enic.h @@ -256,10 +256,10 @@ struct enic { struct enic_rx_coal rx_coalesce_setting; u32 rx_coalesce_usecs; u32 tx_coalesce_usecs; -#ifdef CONFIG_PCI_IOV u16 num_vfs; -#endif enum enic_vf_type vf_type; + bool vf_registered; + u32 pf_cap_version; unsigned int enable_count; spinlock_t enic_api_lock; bool enic_api_busy; @@ -292,10 +292,45 @@ struct enic { /* Admin channel resources for SR-IOV MBOX / bool has_admin_channel; + / true only while the admin WQ/RQ/CQ are allocated and enabled; gates + * enic_admin_channel_close() so it is a no-op after a failed (re)open + * left the resources freed. + / + bool admin_chan_up; + / set on send timeout; cleared on channel re-open / + bool mbox_send_disabled; struct vnic_wq admin_wq; struct vnic_rq admin_rq; struct vnic_cq admin_cq[2]; struct vnic_intr admin_intr; + struct work_struct admin_poll_work; + unsigned int admin_intr_index; + struct work_struct link_notify_work; + struct work_struct admin_msg_work; + spinlock_t admin_msg_lock; / protects admin_msg_list / + struct list_head admin_msg_list; + unsigned int admin_msg_count; / current depth of admin_msg_list / + void (admin_rq_handler)(struct enic enic, void buf, + unsigned int len); + + /* MBOX protocol state — mbox_lock serializes admin WQ sends / + struct mutex mbox_lock; + u64 mbox_msg_num; + / MBOX request-reply state. Written by the process-context request + * helpers (capability/register/unregister) and read/cleared by the + * admin_msg_work receive handlers. No explicit lock is needed because + * only one request is in flight at a time: requesters run under RTNL or + * single-threaded probe/remove, so each request is serialized and its + * reply completes mbox_comp before the next request is issued. + / + struct completion mbox_comp; + u8 mbox_expected_reply; + bool mbox_initialized; + + / PF: per-VF MBOX state, allocated when SRIOV V2 is enabled / + struct enic_vf_state { + bool registered; + } vf_state; }; static inline struct net_device vnic_get_netdev(struct vnic_dev vdev) @@ -417,6 +452,7 @@ void enic_reset_addr_lists(struct enic enic); int enic_sriov_enabled(struct enic enic); int enic_is_valid_vf(struct enic enic, int vf); int enic_is_dynamic(struct enic enic); +int enic_is_sriov_vf_v2(struct enic enic); void enic_set_ethtool_ops(struct net_device netdev); int __enic_set_rsskey(struct enic enic); void enic_ext_cq(struct enic enic); diff --git a/drivers/net/ethernet/cisco/enic/enic_admin.c b/drivers/net/ethernet/cisco/enic/enic_admin.c new file mode 100644 index 00000000000000..242644fa2cbf90 --- /dev/null +++ b/drivers/net/ethernet/cisco/enic/enic_admin.c @@ -0,0 +1,626 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright 2025 Cisco Systems, Inc. All rights reserved. + +#include <linux/kernel.h> +#include <linux/netdevice.h> +#include <linux/dma-mapping.h> +#include <linux/interrupt.h> + +#include "vnic_dev.h" +#include "vnic_wq.h" +#include "vnic_rq.h" +#include "vnic_cq.h" +#include "vnic_intr.h" +#include "vnic_resource.h" +#include "vnic_devcmd.h" +#include "enic.h" +#include "enic_admin.h" +#include "cq_desc.h" +#include "cq_enet_desc.h" +#include "wq_enet_desc.h" +#include "rq_enet_desc.h" +#include "enic_mbox.h" + +/* Clean up any admin WQ buffers still held by hardware at close time. + * Normally buffers are freed inline after send completion, but a timed-out + * send intentionally leaves the buffer live until the queue is stopped. + / +static void enic_admin_wq_buf_clean(struct vnic_wq wq, + struct vnic_wq_buf buf) +{ + struct enic enic = vnic_dev_priv(wq->vdev); + + if (buf->os_buf) { + dma_unmap_single(&enic->pdev->dev, buf->dma_addr, + buf->len, DMA_TO_DEVICE); + kfree(buf->os_buf); + buf->os_buf = NULL; + } +} + +static void enic_admin_rq_buf_clean(struct vnic_rq rq, + struct vnic_rq_buf buf) +{ + struct enic enic = vnic_dev_priv(rq->vdev); + + if (!buf->os_buf) + return; + + dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len, + DMA_FROM_DEVICE); + kfree(buf->os_buf); + buf->os_buf = NULL; +} + +static int enic_admin_rq_post_one(struct enic enic, gfp_t gfp) +{ + struct vnic_rq rq = &enic->admin_rq; + struct rq_enet_desc desc; + dma_addr_t dma_addr; + void buf; + + buf = kmalloc(ENIC_ADMIN_BUF_SIZE, gfp); + if (!buf) + return -ENOMEM; + + dma_addr = dma_map_single(&enic->pdev->dev, buf, ENIC_ADMIN_BUF_SIZE, + DMA_FROM_DEVICE); + if (dma_mapping_error(&enic->pdev->dev, dma_addr)) { + kfree(buf); + return -ENOMEM; + } + + desc = vnic_rq_next_desc(rq); + rq_enet_desc_enc(desc, (u64)dma_addr \| VNIC_PADDR_TARGET, + RQ_ENET_TYPE_ONLY_SOP, ENIC_ADMIN_BUF_SIZE); + vnic_rq_post(rq, buf, 0, dma_addr, ENIC_ADMIN_BUF_SIZE, 0); + + return 0; +} + +static int enic_admin_rq_fill(struct enic enic, gfp_t gfp) +{ + struct vnic_rq rq = &enic->admin_rq; + int err; + + while (vnic_rq_desc_avail(rq) > 0) { + err = enic_admin_rq_post_one(enic, gfp); + if (err) + return err; + } + + return 0; +} + +static void enic_admin_rq_drain(struct enic enic) +{ + vnic_rq_clean(&enic->admin_rq, enic_admin_rq_buf_clean); +} + +static unsigned int enic_admin_cq_color(void cq_desc, unsigned int desc_size) +{ + u8 type_color = ((u8 )cq_desc + desc_size - 1); + + return (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK; +} + +unsigned int enic_admin_wq_cq_service(struct enic enic) +{ + struct vnic_cq cq = &enic->admin_cq[0]; + unsigned int work = 0; + void desc; + + desc = vnic_cq_to_clean(cq); + while (enic_admin_cq_color(desc, cq->ring.desc_size) != + cq->last_color) { + vnic_cq_inc_to_clean(cq); + work++; + desc = vnic_cq_to_clean(cq); + } + + return work; +} + +/* Upper bound on pending admin messages. A buggy or hostile VF could flood + * the PF admin channel faster than admin_msg_work drains it; cap the backlog + * so a guest cannot drive the host out of memory. + / +#define ENIC_ADMIN_MSG_MAX 256 + +static void enic_admin_msg_enqueue(struct enic enic, void buf, + unsigned int len) +{ + struct enic_admin_msg msg; + + msg = kmalloc(struct_size(msg, data, len), GFP_KERNEL); + if (!msg) + return; + + msg->len = len; + memcpy(msg->data, buf, len); + + spin_lock(&enic->admin_msg_lock); + if (enic->admin_msg_count >= ENIC_ADMIN_MSG_MAX) { + spin_unlock(&enic->admin_msg_lock); + kfree(msg); + if (net_ratelimit()) + netdev_warn(enic->netdev, + "admin msg backlog full (%u); dropping\n", + ENIC_ADMIN_MSG_MAX); + return; + } + list_add_tail(&msg->list, &enic->admin_msg_list); + enic->admin_msg_count++; + spin_unlock(&enic->admin_msg_lock); +} + +unsigned int enic_admin_rq_cq_service(struct enic enic) +{ + struct vnic_cq cq = &enic->admin_cq[1]; + struct vnic_rq rq = &enic->admin_rq; + struct cq_enet_rq_desc rq_desc; + struct vnic_rq_buf buf; + u16 bwf, bytes_written; + unsigned int work = 0; + void desc; + + /* The admin RQ and its CQ form a single in-order channel: firmware + * posts exactly one CQE per consumed RQ descriptor, in submission + * order. Each CQE therefore pairs with rq->to_clean below without a + * completed_index cross-check, mirroring the in-order assumption of + * the main enic RX path. + / + desc = vnic_cq_to_clean(cq); + while (enic_admin_cq_color(desc, cq->ring.desc_size) != + cq->last_color) { + / Ensure DMA descriptor fields are read after + * the color/valid check. dma_rmb() is the + * correct barrier for DMA-written descriptors. + / + dma_rmb(); + buf = rq->to_clean; + + / Decode the actual number of bytes hardware wrote into + * the RX buffer. buf->len is the static allocation size + * (ENIC_ADMIN_BUF_SIZE) and would expose uninitialised + * heap memory beyond the real payload. bytes_written_flags + * is at the same offset in every cq_enet_rq_desc[_32\|_64] + * variant. + / + rq_desc = desc; + bwf = le16_to_cpu(rq_desc->bytes_written_flags); + bytes_written = bwf & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK; + if (bytes_written > buf->len) + goto next_desc; + + dma_sync_single_for_cpu(&enic->pdev->dev, + buf->dma_addr, buf->len, + DMA_FROM_DEVICE); + + / Drop on hardware error indications. Admin messages + * are internal to the VIC, not received over the wire. + * Firmware sets TRUNCATED when the message does not fit + * in the posted buffer, and FCS_OK is always set on + * healthy admin completions. + / + if (bwf & CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) { + netdev_warn_once(enic->netdev, + "admin RQ: truncated message dropped\n"); + goto next_desc; + } + if (!(rq_desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK)) { + netdev_warn_once(enic->netdev, + "admin RQ: bad FCS, dropping message\n"); + goto next_desc; + } + + if (enic->admin_rq_handler) { + u16 sender_vlan; + + / Firmware sets the CQ VLAN field to identify the + * sender: 0 = PF, 1-based = VF index. Overwrite + * the untrusted src_vnic_id in the MBOX header with + * the hardware-verified value. + / + sender_vlan = le16_to_cpu(rq_desc->vlan); + if (bytes_written >= sizeof(struct enic_mbox_hdr)) { + struct enic_mbox_hdr hdr = buf->os_buf; + + hdr->src_vnic_id = (sender_vlan == 0) ? + cpu_to_le16(ENIC_MBOX_DST_PF) : + cpu_to_le16(sender_vlan - 1); + } + + enic_admin_msg_enqueue(enic, buf->os_buf, + bytes_written); + } + +next_desc: + enic_admin_rq_buf_clean(rq, rq->to_clean); + rq->to_clean = rq->to_clean->next; + rq->ring.desc_avail++; + + vnic_cq_inc_to_clean(cq); + work++; + desc = vnic_cq_to_clean(cq); + } + + if (enic_admin_rq_fill(enic, GFP_KERNEL) && net_ratelimit()) + netdev_warn(enic->netdev, + "admin RQ refill failed\n"); + + return work; +} + +static irqreturn_t enic_admin_isr_msix(int irq, void data) +{ + struct enic enic = data; + + schedule_work(&enic->admin_poll_work); + + return IRQ_HANDLED; +} + +static void enic_admin_msg_work_handler(struct work_struct work) +{ + struct enic enic = container_of(work, struct enic, admin_msg_work); + struct enic_admin_msg msg, tmp; + LIST_HEAD(local_list); + + spin_lock_bh(&enic->admin_msg_lock); + list_splice_init(&enic->admin_msg_list, &local_list); + enic->admin_msg_count = 0; + spin_unlock_bh(&enic->admin_msg_lock); + + list_for_each_entry_safe(msg, tmp, &local_list, list) { + if (enic->admin_rq_handler) + enic->admin_rq_handler(enic, msg->data, msg->len); + list_del(&msg->list); + kfree(msg); + } +} + +static void enic_admin_poll_work_handler(struct work_struct work) +{ + struct enic enic = container_of(work, struct enic, admin_poll_work); + unsigned int credits; + unsigned int rq_work; + + credits = vnic_intr_credits(&enic->admin_intr); + + rq_work = enic_admin_rq_cq_service(enic); + + if (rq_work > 0) + schedule_work(&enic->admin_msg_work); + + vnic_intr_return_credits(&enic->admin_intr, + credits ?: 1, + 1 /* unmask /, 0); +} + +static int enic_admin_setup_intr(struct enic enic) +{ + unsigned int intr_index = enic->intr_count; + int err; + + if (vnic_dev_get_intr_mode(enic->vdev) != VNIC_DEV_INTR_MODE_MSIX \|\| + intr_index >= enic->intr_avail) + return -ENODEV; + + /* The admin INTR uses a slot in the same RES_TYPE_INTR_CTRL + * strided array of per-vector control blocks (mask, coalescing + * timer, credit return) that the data-path IRQs occupy in BAR0. + * vnic_intr_alloc() defaults to RES_TYPE_INTR_CTRL, which is what + * we want here. + / + err = vnic_intr_alloc(enic->vdev, &enic->admin_intr, intr_index); + if (err) { + netdev_warn(enic->netdev, + "Failed to alloc admin intr at index %u: %d\n", + intr_index, err); + return err; + } + + enic->admin_intr_index = intr_index; + + / A V2 VF opens the admin channel during probe, before + * register_netdev() resolves the "eth%d" name template, so using + * netdev->name here would register the literal "eth%d-admin" in + * /proc/interrupts. Use the already-stable PCI device name instead. + / + snprintf(enic->msix[intr_index].devname, + sizeof(enic->msix[intr_index].devname), + "%s-admin", pci_name(enic->pdev)); + enic->msix[intr_index].isr = enic_admin_isr_msix; + enic->msix[intr_index].devid = enic; + + err = request_irq(enic->msix_entry[intr_index].vector, + enic->msix[intr_index].isr, 0, + enic->msix[intr_index].devname, + enic->msix[intr_index].devid); + if (err) { + netdev_warn(enic->netdev, + "Failed to request admin MSI-X irq: %d\n", err); + vnic_intr_free(&enic->admin_intr); + return err; + } + + enic->msix[intr_index].requested = 1; + + netdev_dbg(enic->netdev, + "admin channel using MSI-X interrupt (index %u)\n", + intr_index); + + return 0; +} + +static void enic_admin_teardown_intr(struct enic enic) +{ + unsigned int intr_index = enic->admin_intr_index; + + free_irq(enic->msix_entry[intr_index].vector, + enic->msix[intr_index].devid); + cancel_work_sync(&enic->admin_poll_work); + enic->msix[intr_index].requested = 0; +} + +static int enic_admin_qp_type_set(struct enic enic, u32 enable) +{ + u64 a0 = QP_TYPE_ADMIN, a1 = enable; + int wait = 1000; + int err; + + spin_lock_bh(&enic->devcmd_lock); + err = vnic_dev_cmd(enic->vdev, CMD_QP_TYPE_SET, &a0, &a1, wait); + spin_unlock_bh(&enic->devcmd_lock); + + return err; +} + +static int enic_admin_alloc_resources(struct enic enic) +{ + int err; + + err = vnic_wq_alloc_with_type(enic->vdev, &enic->admin_wq, 0, + ENIC_ADMIN_DESC_COUNT, + sizeof(struct wq_enet_desc), + RES_TYPE_ADMIN_WQ); + if (err) + return err; + + err = vnic_rq_alloc_with_type(enic->vdev, &enic->admin_rq, 0, + ENIC_ADMIN_DESC_COUNT, + sizeof(struct rq_enet_desc), + RES_TYPE_ADMIN_RQ); + if (err) + goto free_wq; + + /* admin_cq[0] is the WQ completion queue. WQ CQEs are always + * 16 bytes wide; firmware always writes 16-byte CQEs for WQ + * completions on every WQ, including the admin channel WQ. + * Use sizeof(struct cq_desc) accordingly. + / + err = vnic_cq_alloc_with_type(enic->vdev, &enic->admin_cq[0], 0, + ENIC_ADMIN_DESC_COUNT, + sizeof(struct cq_desc), + RES_TYPE_ADMIN_CQ); + if (err) + goto free_rq; + + / admin_cq[1] is the RQ completion queue. Its descriptor size + * must match what firmware writes. enic_ext_cq() called earlier + * in probe issues CMD_CQ_ENTRY_SIZE_SET for VNIC_RQ_ALL, + * programming firmware to write CQ entries of (16 << enic->ext_cq) + * bytes for every RQ CQ on the vNIC, including the admin RQ CQ. + * Allocating with the same size keeps the host poller and + * firmware in lockstep: + * + * - The color/valid bit lives at byte (desc_size - 1) of every + * cq_enet_rq_desc[_32\|_64] variant, so enic_admin_cq_color() + * reads it from the correct offset. + * - Only the first 15 bytes of the descriptor (vlan, + * bytes_written_flags, ...) are accessed by the admin path; + * these fields are identical across all three variants (see + * comment in enic_rq.c above cq_enet_rq_desc_dec()). + / + err = vnic_cq_alloc_with_type(enic->vdev, &enic->admin_cq[1], 1, + ENIC_ADMIN_DESC_COUNT, + 16 << enic->ext_cq, + RES_TYPE_ADMIN_CQ); + if (err) + goto free_cq0; + + return 0; + +free_cq0: + vnic_cq_free(&enic->admin_cq[0]); +free_rq: + vnic_rq_free(&enic->admin_rq); +free_wq: + vnic_wq_free(&enic->admin_wq); + return err; +} + +static void enic_admin_free_resources(struct enic enic) +{ + vnic_intr_free(&enic->admin_intr); + vnic_cq_free(&enic->admin_cq[1]); + vnic_cq_free(&enic->admin_cq[0]); + vnic_rq_free(&enic->admin_rq); + vnic_wq_free(&enic->admin_wq); +} + +static void enic_admin_init_resources(struct enic enic) +{ + unsigned int intr_offset = enic->admin_intr_index; + + vnic_wq_init(&enic->admin_wq, + 0, 0, 0); / cq_index, err_intr_enable, err_intr_offset / + vnic_rq_init(&enic->admin_rq, + 1, 0, 0); / cq_index, err_intr_enable, err_intr_offset / + vnic_cq_init(&enic->admin_cq[0], + VNIC_CQ_FC_DISABLE, + VNIC_CQ_COLOR_ENABLE, + 0, 0, 1, / cq_head, cq_tail, cq_tail_color / + VNIC_CQ_INTR_DISABLE, / polled synchronously by mbox send / + VNIC_CQ_ENTRY_ENABLE, + VNIC_CQ_MSG_DISABLE, + intr_offset, + 0 / cq_message_addr /); + vnic_cq_init(&enic->admin_cq[1], + VNIC_CQ_FC_DISABLE, + VNIC_CQ_COLOR_ENABLE, + 0, 0, 1, / cq_head, cq_tail, cq_tail_color / + VNIC_CQ_INTR_ENABLE, + VNIC_CQ_ENTRY_ENABLE, + VNIC_CQ_MSG_DISABLE, + intr_offset, + 0 / cq_message_addr /); + / coalescing_timer, coalescing_type, mask_on_assertion / + vnic_intr_init(&enic->admin_intr, + 0, 0, 1); +} + +static void enic_admin_msg_drain(struct enic enic) +{ + struct enic_admin_msg msg, tmp; + + spin_lock_bh(&enic->admin_msg_lock); + list_for_each_entry_safe(msg, tmp, &enic->admin_msg_list, list) { + list_del(&msg->list); + kfree(msg); + } + enic->admin_msg_count = 0; + spin_unlock_bh(&enic->admin_msg_lock); +} + +int enic_admin_channel_open(struct enic enic) +{ + int err; + + if (!enic->has_admin_channel) + return -ENODEV; + + err = enic_admin_alloc_resources(enic); + if (err) { + netdev_err(enic->netdev, + "Failed to alloc admin channel resources: %d\n", + err); + return err; + } + + spin_lock_init(&enic->admin_msg_lock); + INIT_LIST_HEAD(&enic->admin_msg_list); + INIT_WORK(&enic->admin_msg_work, enic_admin_msg_work_handler); + INIT_WORK(&enic->admin_poll_work, enic_admin_poll_work_handler); + + err = enic_admin_setup_intr(enic); + if (err) { + netdev_err(enic->netdev, + "Admin channel requires MSI-X, SR-IOV unavailable: %d\n", + err); + goto free_resources; + } + + enic_admin_init_resources(enic); + + vnic_wq_enable(&enic->admin_wq); + vnic_rq_enable(&enic->admin_rq); + + err = enic_admin_rq_fill(enic, GFP_KERNEL); + if (err) { + netdev_err(enic->netdev, + "Failed to fill admin RQ buffers: %d\n", err); + goto disable_queues; + } + + err = enic_admin_qp_type_set(enic, QP_ENABLE); + if (err) { + netdev_err(enic->netdev, + "Failed to set admin QP type: %d\n", err); + goto disable_queues; + } + + vnic_intr_unmask(&enic->admin_intr); + + / Only now that the admin WQ/RQ/CQ and interrupt are fully allocated, + * programmed and enabled is it safe to allow MBOX sends. Clearing this + * earlier opened a window where a concurrent sender (e.g. link-notify + * work scheduled by a post-reset link-up) could call enic_mbox_send_msg() + * against a not-yet-allocated admin_wq and crash. + / + WRITE_ONCE(enic->mbox_send_disabled, false); + + netdev_dbg(enic->netdev, + "admin channel open: intr=%u wq_avail=%u rq_avail=%u cq0_color=%u cq1_color=%u\n", + enic->admin_intr_index, + vnic_wq_desc_avail(&enic->admin_wq), + vnic_rq_desc_avail(&enic->admin_rq), + enic->admin_cq[0].last_color, + enic->admin_cq[1].last_color); + + enic->admin_chan_up = true; + + return 0; + +disable_queues: + enic_admin_teardown_intr(enic); + enic_admin_qp_type_set(enic, QP_DISABLE); + if (vnic_wq_disable(&enic->admin_wq)) + netdev_warn(enic->netdev, "Failed to disable admin WQ\n"); + if (vnic_rq_disable(&enic->admin_rq)) + netdev_warn(enic->netdev, "Failed to disable admin RQ\n"); + cancel_work_sync(&enic->admin_msg_work); + enic_admin_msg_drain(enic); + enic_admin_rq_drain(enic); +free_resources: + enic_admin_free_resources(enic); + return err; +} + +void enic_admin_channel_close(struct enic enic) +{ + int err; + + if (!enic->has_admin_channel) + return; + + /* Nothing to tear down if the channel was never (re)opened, e.g. a + * failed enic_admin_channel_open() in probe or in the reset path; + * otherwise the disable/clean calls below dereference freed resources. + / + if (!enic->admin_chan_up) + return; + + WRITE_ONCE(enic->mbox_send_disabled, true); + + netdev_dbg(enic->netdev, "admin channel close\n"); + + vnic_intr_mask(&enic->admin_intr); + enic_admin_teardown_intr(enic); + cancel_work_sync(&enic->link_notify_work); + cancel_work_sync(&enic->admin_msg_work); + enic_admin_msg_drain(enic); + + enic_admin_qp_type_set(enic, QP_DISABLE); + + err = vnic_wq_disable(&enic->admin_wq); + if (err) + netdev_warn(enic->netdev, + "Failed to disable admin WQ: %d\n", err); + err = vnic_rq_disable(&enic->admin_rq); + if (err) + netdev_warn(enic->netdev, + "Failed to disable admin RQ: %d\n", err); + + vnic_wq_clean(&enic->admin_wq, enic_admin_wq_buf_clean); + enic_admin_rq_drain(enic); + vnic_cq_clean(&enic->admin_cq[0]); + vnic_cq_clean(&enic->admin_cq[1]); + vnic_intr_clean(&enic->admin_intr); + + enic->admin_rq_handler = NULL; + enic_admin_free_resources(enic); + + enic->admin_chan_up = false; +} diff --git a/drivers/net/ethernet/cisco/enic/enic_admin.h b/drivers/net/ethernet/cisco/enic/enic_admin.h new file mode 100644 index 00000000000000..62c80220b0cacc --- /dev/null +++ b/drivers/net/ethernet/cisco/enic/enic_admin.h @@ -0,0 +1,27 @@ +/ SPDX-License-Identifier: GPL-2.0-only / +/ Copyright 2025 Cisco Systems, Inc. All rights reserved. / + +#ifndef _ENIC_ADMIN_H_ +#define _ENIC_ADMIN_H_ + +#define ENIC_ADMIN_DESC_COUNT 64 +#define ENIC_ADMIN_BUF_SIZE 2048 + +struct enic; + +/ Wrapper for received admin messages queued for deferred processing. + * The admin CQ poll work handler enqueues these; a separate work handler + * processes them where sleeping (mutex, GFP_KERNEL) is safe. + / +struct enic_admin_msg { + struct list_head list; + unsigned int len; + u8 data[] __aligned(8); +}; + +int enic_admin_channel_open(struct enic enic); +void enic_admin_channel_close(struct enic enic); +unsigned int enic_admin_wq_cq_service(struct enic enic); +unsigned int enic_admin_rq_cq_service(struct enic enic); + +#endif / _ENIC_ADMIN_H_ / diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c index e7125b81808799..de90332dc40cc7 100644 --- a/drivers/net/ethernet/cisco/enic/enic_main.c +++ b/drivers/net/ethernet/cisco/enic/enic_main.c @@ -60,6 +60,8 @@ #include "enic_clsf.h" #include "enic_rq.h" #include "enic_wq.h" +#include "enic_admin.h" +#include "enic_mbox.h" #define ENIC_NOTIFY_TIMER_PERIOD (2 HZ) @@ -314,6 +316,11 @@ static int enic_is_sriov_vf(struct enic enic) enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2; } +int enic_is_sriov_vf_v2(struct enic enic) +{ + return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2; +} + int enic_is_valid_vf(struct enic enic, int vf) { #ifdef CONFIG_PCI_IOV @@ -411,6 +418,24 @@ static void enic_set_rx_coal_setting(struct enic enic) rx_coal->use_adaptive_rx_coalesce = 1; } +static void enic_link_notify_work_handler(struct work_struct work) +{ + struct enic enic = container_of(work, struct enic, + link_notify_work); + u32 state; + u16 i; + + if (!enic_sriov_enabled(enic) \|\| !enic->vf_state) + return; + + state = netif_carrier_ok(enic->netdev) ? + ENIC_MBOX_LINK_STATE_ENABLE : + ENIC_MBOX_LINK_STATE_DISABLE; + + for (i = 0; i < enic->num_vfs; i++) + enic_mbox_send_link_state(enic, i, state); +} + static void enic_link_check(struct enic enic) { int link_status = vnic_dev_link_status(enic->vdev); @@ -420,9 +445,13 @@ static void enic_link_check(struct enic enic) netdev_info(enic->netdev, "Link UP\n"); netif_carrier_on(enic->netdev); enic_set_rx_coal_setting(enic); + if (enic_sriov_enabled(enic) && enic->vf_state) + schedule_work(&enic->link_notify_work); } else if (!link_status && carrier_ok) { netdev_info(enic->netdev, "Link DOWN\n"); netif_carrier_off(enic->netdev); + if (enic_sriov_enabled(enic) && enic->vf_state) + schedule_work(&enic->link_notify_work); } } @@ -2142,6 +2171,57 @@ static void enic_set_api_busy(struct enic enic, bool busy) spin_unlock(&enic->enic_api_lock); } +/ The admin/MBOX channel exists on a V2 PF while SR-IOV is enabled and on + * every V2 VF. A reset wipes the admin WQ/RQ/CQ, so such devices must tear + * the channel down before the reset and re-establish it afterwards. + / +static bool enic_has_admin_chan(struct enic enic) +{ + return enic_is_sriov_vf_v2(enic) \|\| + (enic_sriov_enabled(enic) && enic->vf_type == ENIC_VF_TYPE_V2); +} + +/* Re-establish the admin/MBOX channel after a reset has re-created the data + * path. Mirrors the relevant part of the probe / SR-IOV-enable sequence: + * reopen the channel and reinitialise MBOX, then for a VF re-run the PF + * handshake (its admin QP and PF-side registration were torn down by the + * reset), or for a PF re-push the current link state to registered VFs. + / +static void enic_admin_chan_reopen(struct enic enic) +{ + int err; + + err = enic_admin_channel_open(enic); + if (err) { + netdev_err(enic->netdev, + "admin channel reopen after reset failed: %d\n", err); + return; + } + + enic_mbox_init(enic); + + if (enic_is_sriov_vf_v2(enic)) { + err = enic_mbox_vf_capability_check(enic); + if (err) { + netdev_err(enic->netdev, + "MBOX capability check after reset failed: %d\n", + err); + return; + } + err = enic_mbox_vf_register(enic); + if (err) + netdev_err(enic->netdev, + "MBOX VF re-registration after reset failed: %d\n", + err); + } else { + /* The link came back up during enic_open() above while MBOX + * sends were still disabled (channel not yet reopened), so that + * link-notify was dropped. Re-push current link state now. + / + schedule_work(&enic->link_notify_work); + } +} + static void enic_reset(struct work_struct work) { struct enic enic = container_of(work, struct enic, reset); @@ -2154,15 +2234,34 @@ static void enic_reset(struct work_struct work) /* Stop any activity from infiniband / enic_set_api_busy(enic, true); + / Fully tear down the V2 admin/MBOX channel before the soft reset. + * The reset wipes all hardware queues including the admin WQ/RQ; + * closing first tells firmware to stop the admin QP (so it no longer + * DMAs from the about-to-be-reset rings) and frees the admin resources + * so they are cleanly re-allocated afterwards. + / + if (enic_has_admin_chan(enic)) + enic_admin_channel_close(enic); + enic_stop(enic->netdev); + enic_dev_soft_reset(enic); enic_reset_addr_lists(enic); enic_init_vnic_resources(enic); enic_set_rss_nic_cfg(enic); enic_dev_set_ig_vlan_rewrite_mode(enic); enic_ext_cq(enic); + enic_open(enic->netdev); + / Re-establish the admin/MBOX channel after the data path is back up. + * It was fully torn down by enic_admin_channel_close() above; + * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link + * state, or for a VF re-runs the probe-time PF handshake. + / + if (enic_has_admin_chan(enic)) + enic_admin_chan_reopen(enic); + / Allow infiniband to fiddle with the device again / enic_set_api_busy(enic, false); @@ -2180,16 +2279,33 @@ static void enic_tx_hang_reset(struct work_struct work) /* Stop any activity from infiniband / enic_set_api_busy(enic, true); + / Fully tear down the V2 admin/MBOX channel before the hang reset, for + * the same reason as the soft reset path: stop the admin QP and free + * the admin resources before the hardware queues are wiped. + / + if (enic_has_admin_chan(enic)) + enic_admin_channel_close(enic); + enic_dev_hang_notify(enic); enic_stop(enic->netdev); + enic_dev_hang_reset(enic); enic_reset_addr_lists(enic); enic_init_vnic_resources(enic); enic_set_rss_nic_cfg(enic); enic_dev_set_ig_vlan_rewrite_mode(enic); enic_ext_cq(enic); + enic_open(enic->netdev); + / Re-establish the admin/MBOX channel after the data path is back up. + * It was fully torn down by enic_admin_channel_close() above; + * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link + * state, or for a VF re-runs the probe-time PF handshake. + / + if (enic_has_admin_chan(enic)) + enic_admin_chan_reopen(enic); + / Allow infiniband to fiddle with the device again / enic_set_api_busy(enic, false); @@ -2200,6 +2316,8 @@ static void enic_tx_hang_reset(struct work_struct work) static int enic_set_intr_mode(struct enic enic) { + unsigned int admin_reserve = enic->has_admin_channel ? 1 : 0; + unsigned int min_intr = ENIC_MSIX_MIN_INTR + admin_reserve; unsigned int i; int num_intr; @@ -2210,12 +2328,12 @@ static int enic_set_intr_mode(struct enic enic) / if (enic->config.intr_mode < 1 && - enic->intr_avail >= ENIC_MSIX_MIN_INTR) { + enic->intr_avail >= min_intr) { for (i = 0; i < enic->intr_avail; i++) enic->msix_entry[i].entry = i; num_intr = pci_enable_msix_range(enic->pdev, enic->msix_entry, - ENIC_MSIX_MIN_INTR, + min_intr, enic->intr_avail); if (num_intr > 0) { vnic_dev_set_intr_mode(enic->vdev, @@ -2310,16 +2428,27 @@ static int enic_adjust_resources(struct enic enic) enic->cq_count = 2; enic->intr_count = enic->intr_avail; break; - case VNIC_DEV_INTR_MODE_MSIX: + case VNIC_DEV_INTR_MODE_MSIX: { /* Adjust the number of wqs/rqs/cqs/interrupts that will be - * used based on which resource is the most constrained + * used based on which resource is the most constrained. + * Reserve one extra MSI-X slot for the admin channel INTR + * when has_admin_channel is set so that + * enic_admin_setup_intr() can allocate at intr_count + * within the intr_avail bounds even when the data queue + * count is maxed out. intr_count counts only the data-path + * IRQs (registered by enic_request_intr()); the admin INTR + * lives at msix index intr_count and is set up later by + * enic_admin_setup_intr(). / + unsigned int admin_reserve = enic->has_admin_channel ? 1 : 0; + wq_avail = min(enic->wq_avail, ENIC_WQ_MAX); rq_default = max(netif_get_num_default_rss_queues(), ENIC_RQ_MIN_DEFAULT); rq_avail = min3(enic->rq_avail, ENIC_RQ_MAX, rq_default); max_queues = min(enic->cq_avail, - enic->intr_avail - ENIC_MSIX_RESERVED_INTR); + enic->intr_avail - ENIC_MSIX_RESERVED_INTR - + admin_reserve); if (wq_avail + rq_avail <= max_queues) { enic->rq_count = rq_avail; enic->wq_count = wq_avail; @@ -2337,6 +2466,7 @@ static int enic_adjust_resources(struct enic enic) enic->intr_count = enic->cq_count + ENIC_MSIX_RESERVED_INTR; break; + } default: dev_err(enic_get_dev(enic), "Unknown interrupt mode\n"); return -EINVAL; @@ -2641,8 +2771,10 @@ static void enic_iounmap(struct enic enic) static void enic_sriov_detect_vf_type(struct enic enic) { struct pci_dev pdev = enic->pdev; - int pos; + u64 supported_versions, a1 = 0; u16 vf_dev_id; + int pos; + int err; if (enic_is_sriov_vf(enic) \|\| enic_is_dynamic(enic)) return; @@ -2669,6 +2801,149 @@ static void enic_sriov_detect_vf_type(struct enic enic) enic->vf_type = ENIC_VF_TYPE_NONE; break; } + + if (enic->vf_type != ENIC_VF_TYPE_V2) + return; + + /* A successful command means firmware recognizes + * VIC_FEATURE_SRIOV; supported_versions is available + * for sub-feature versioning in the future. + / + err = vnic_dev_get_supported_feature_ver(enic->vdev, + VIC_FEATURE_SRIOV, + &supported_versions, + &a1); + if (err) { + dev_warn(&pdev->dev, + "SR-IOV V2 not supported by current firmware. Upgrade to VIC FW 5.3(4.72) or higher.\n"); + enic->vf_type = ENIC_VF_TYPE_NONE; + } +} + +static int __maybe_unused +enic_sriov_v2_enable(struct enic enic, int num_vfs) +{ + int err; + + if (!enic->has_admin_channel) { + netdev_err(enic->netdev, + "V2 SR-IOV requires admin channel resources\n"); + return -EOPNOTSUPP; + } + + enic->vf_state = kcalloc(num_vfs, sizeof(enic->vf_state), GFP_KERNEL); + if (!enic->vf_state) + return -ENOMEM; + + err = enic_admin_channel_open(enic); + if (err) { + netdev_err(enic->netdev, + "Failed to open admin channel: %d\n", err); + goto free_vf_state; + } + + enic_mbox_init(enic); + + enic->num_vfs = num_vfs; + + err = pci_enable_sriov(enic->pdev, num_vfs); + if (err) { + netdev_err(enic->netdev, + "pci_enable_sriov failed: %d\n", err); + goto close_admin; + } + + enic->priv_flags \|= ENIC_SRIOV_ENABLED; + return num_vfs; + +close_admin: + enic->num_vfs = 0; + enic_admin_channel_close(enic); +free_vf_state: + kfree(enic->vf_state); + enic->vf_state = NULL; + return err; +} + +static void enic_sriov_v2_disable(struct enic enic) +{ + /* Stop new VF link-state broadcasts before tearing down vf_state. + * Clearing ENIC_SRIOV_ENABLED makes enic_link_check() (called from + * the notify timer/ISR) skip the VF notify path, and cancelling + * link_notify_work ensures any already-queued broadcast has finished + * before vf_state is freed, closing a use-after-free window. + / + enic->priv_flags &= ~ENIC_SRIOV_ENABLED; + cancel_work_sync(&enic->link_notify_work); + + pci_disable_sriov(enic->pdev); + enic_admin_channel_close(enic); + kfree(enic->vf_state); + enic->vf_state = NULL; + enic->num_vfs = 0; +} + +static int __maybe_unused +enic_sriov_configure(struct pci_dev pdev, int num_vfs) +{ + struct net_device netdev = pci_get_drvdata(pdev); + struct enic enic = netdev_priv(netdev); + struct enic_port_profile pp; + int err; + + if (num_vfs > 0) { + if (enic->config.mq_subvnic_count) { + netdev_err(netdev, + "SR-IOV not supported with multi-queue sub-vnics\n"); + return -EOPNOTSUPP; + } + + if (enic->vf_type == ENIC_VF_TYPE_NONE) { + netdev_err(netdev, + "SR-IOV not supported on this firmware version\n"); + return -EOPNOTSUPP; + } + + if (enic->vf_type == ENIC_VF_TYPE_V2) + return enic_sriov_v2_enable(enic, num_vfs); + + pp = kcalloc(num_vfs, sizeof(pp), GFP_KERNEL); + if (!pp) + return -ENOMEM; + + err = pci_enable_sriov(pdev, num_vfs); + if (err) { + kfree(pp); + return err; + } + + kfree(enic->pp); + enic->pp = pp; + enic->num_vfs = num_vfs; + enic->priv_flags \|= ENIC_SRIOV_ENABLED; + return num_vfs; + } + + if (!enic_sriov_enabled(enic)) + return 0; + + if (enic->vf_type == ENIC_VF_TYPE_V2) { + enic_sriov_v2_disable(enic); + return 0; + } + + pp = kzalloc_obj(enic->pp, GFP_KERNEL); + if (!pp) + return -ENOMEM; + + pci_disable_sriov(pdev); + enic->num_vfs = 0; + enic->priv_flags &= ~ENIC_SRIOV_ENABLED; + + kfree(enic->pp); + enic->pp = pp; + + return 0; } #endif @@ -2768,12 +3043,18 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent) goto err_out_vnic_unregister; #ifdef CONFIG_PCI_IOV - / Get number of subvnics / + enic_sriov_detect_vf_type(enic); + + / Auto-enable SR-IOV if VFs were pre-configured (e.g. at boot). + * V2 VFs require the admin channel, which is not yet set up at probe + * time; use sysfs (enic_sriov_configure) to enable V2 SR-IOV instead. + / pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); if (pos) { pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &enic->num_vfs); - if (enic->num_vfs) { + if (enic->num_vfs && + enic->vf_type != ENIC_VF_TYPE_V2) { err = pci_enable_sriov(pdev, enic->num_vfs); if (err) { dev_err(dev, "SRIOV enable failed, aborting." @@ -2785,7 +3066,6 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent) num_pps = enic->num_vfs; } } - enic_sriov_detect_vf_type(enic); #endif / Allocate structure for port profiles / @@ -2850,6 +3130,44 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent) goto err_out_dev_close; } + / Initialise link_notify_work before the V2-VF admin-open block below: + * its error path (err_out_admin_close -> enic_admin_channel_close() -> + * cancel_work_sync()) would otherwise act on an uninitialised work. + / + INIT_WORK(&enic->link_notify_work, enic_link_notify_work_handler); + + / V2 VF: open admin channel and register with PF. + * Must happen before register_netdev so the VF is fully + * initialized before the interface is visible to userspace. + * + * admin_channel_open() runs before enic_mbox_init() installs + * the receive handler. This is safe because + * enic_admin_rq_cq_service() checks admin_rq_handler before + * enqueuing any received buffer, so interrupts that fire + * between open and mbox_init are harmlessly discarded. + / + if (enic_is_sriov_vf_v2(enic)) { + err = enic_admin_channel_open(enic); + if (err) { + dev_err(dev, + "Failed to open admin channel: %d\n", err); + goto err_out_dev_deinit; + } + enic_mbox_init(enic); + err = enic_mbox_vf_capability_check(enic); + if (err) { + dev_err(dev, + "MBOX capability check failed: %d\n", err); + goto err_out_admin_close; + } + err = enic_mbox_vf_register(enic); + if (err) { + dev_err(dev, + "MBOX VF registration failed: %d\n", err); + goto err_out_admin_close; + } + } + netif_set_real_num_tx_queues(netdev, enic->wq_count); netif_set_real_num_rx_queues(netdev, enic->rq_count); @@ -2874,7 +3192,7 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent) err = enic_set_mac_addr(netdev, enic->mac_addr); if (err) { dev_err(dev, "Invalid MAC address, aborting\n"); - goto err_out_dev_deinit; + goto err_out_admin_close; } enic->tx_coalesce_usecs = enic->config.intr_timer_usec; @@ -2972,11 +3290,23 @@ static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent) err = register_netdev(netdev); if (err) { dev_err(dev, "Cannot register net device, aborting\n"); - goto err_out_dev_deinit; + goto err_out_admin_close; } return 0; +err_out_admin_close: + if (enic_is_sriov_vf_v2(enic)) { + if (enic->vf_registered) { + int unreg_err = enic_mbox_vf_unregister(enic); + + if (unreg_err) + netdev_warn(netdev, + "Failed to unregister from PF: %d\n", + unreg_err); + } + enic_admin_channel_close(enic); + } err_out_dev_deinit: enic_dev_deinit(enic); err_out_dev_close: @@ -3012,16 +3342,42 @@ static void enic_remove(struct pci_dev pdev) struct enic enic = netdev_priv(netdev); cancel_work_sync(&enic->reset); + cancel_work_sync(&enic->tx_hang_reset); cancel_work_sync(&enic->change_mtu_work); + + / Close the admin channel and unregister from the PF before + * unregister_netdev() to prevent a late PF notification from + * touching a netdev that has been freed. + / + if (enic_is_sriov_vf_v2(enic)) { + if (enic->vf_registered) { + int unreg_err = enic_mbox_vf_unregister(enic); + + if (unreg_err) + netdev_warn(netdev, + "Failed to unregister from PF: %d\n", + unreg_err); + } + enic_admin_channel_close(enic); + } + unregister_netdev(netdev); - enic_dev_deinit(enic); - vnic_dev_close(enic->vdev); + / unregister_netdev() -> enic_stop() stops the notify timer, so + * no new link_notify_work can be queued past this point. Cancel + * unconditionally to cover the narrow window where + * enic_link_check() scheduled it just as SR-IOV was disabled. + / + cancel_work_sync(&enic->link_notify_work); #ifdef CONFIG_PCI_IOV if (enic_sriov_enabled(enic)) { - pci_disable_sriov(pdev); - enic->priv_flags &= ~ENIC_SRIOV_ENABLED; + if (enic->vf_type == ENIC_VF_TYPE_V2) + enic_sriov_v2_disable(enic); + else + pci_disable_sriov(pdev); } #endif + enic_dev_deinit(enic); + vnic_dev_close(enic->vdev); kfree(enic->pp); vnic_dev_unregister(enic->vdev); enic_iounmap(enic); diff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.c b/drivers/net/ethernet/cisco/enic/enic_mbox.c new file mode 100644 index 00000000000000..5cdaf5a0e52467 --- /dev/null +++ b/drivers/net/ethernet/cisco/enic/enic_mbox.c @@ -0,0 +1,640 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright 2025 Cisco Systems, Inc. All rights reserved. + +#include <linux/kernel.h> +#include <linux/netdevice.h> +#include <linux/dma-mapping.h> +#include <linux/delay.h> +#include <linux/completion.h> + +#include "vnic_dev.h" +#include "vnic_wq.h" +#include "vnic_cq.h" +#include "enic.h" +#include "enic_admin.h" +#include "enic_mbox.h" +#include "wq_enet_desc.h" + +#define ENIC_MBOX_POLL_TIMEOUT_US 5000000 +#define ENIC_MBOX_POLL_INTERVAL_US 100 + +static void enic_mbox_fill_hdr(struct enic enic, struct enic_mbox_hdr hdr, + u8 msg_type, u16 dst_vnic_id, u16 msg_len) +{ + memset(hdr, 0, sizeof(hdr)); + hdr->dst_vnic_id = cpu_to_le16(dst_vnic_id); + hdr->msg_type = msg_type; + hdr->msg_len = cpu_to_le16(msg_len); + hdr->msg_num = cpu_to_le64(++enic->mbox_msg_num); +} + +int enic_mbox_send_msg(struct enic enic, u8 msg_type, u16 dst_vnic_id, + void payload, u16 payload_len) +{ + u16 total_len = sizeof(struct enic_mbox_hdr) + payload_len; + struct vnic_wq wq = &enic->admin_wq; + struct wq_enet_desc desc; + unsigned long timeout; + dma_addr_t dma_addr; + u16 vlan_tag; + void buf; + int err; + + / Serialize MBOX sends. The admin channel is a low-frequency + * control path; holding the mutex across the poll is acceptable. + / + mutex_lock(&enic->mbox_lock); + + if (!enic->has_admin_channel \|\| READ_ONCE(enic->mbox_send_disabled)) { + err = -ENODEV; + goto unlock; + } + + if (vnic_wq_desc_avail(wq) == 0) { + err = -ENOSPC; + goto unlock; + } + + buf = kmalloc(total_len, GFP_KERNEL); + if (!buf) { + err = -ENOMEM; + goto unlock; + } + + enic_mbox_fill_hdr(enic, buf, msg_type, dst_vnic_id, total_len); + if (payload_len) { + void dst = buf + sizeof(struct enic_mbox_hdr); + + memcpy(dst, payload, payload_len); + } + + dma_addr = dma_map_single(&enic->pdev->dev, buf, total_len, + DMA_TO_DEVICE); + if (dma_mapping_error(&enic->pdev->dev, dma_addr)) { + kfree(buf); + err = -ENOMEM; + goto unlock; + } + + /* Firmware uses vlan field for routing: 0 = PF, 1-based = VF index / + if (dst_vnic_id == ENIC_MBOX_DST_PF) + vlan_tag = 0; + else + vlan_tag = dst_vnic_id + 1; + + desc = vnic_wq_next_desc(wq); + wq_enet_desc_enc(desc, (u64)dma_addr \| VNIC_PADDR_TARGET, + total_len, + 0, 0, 0, / mss, hdr_len, offload_mode / + 1, 1, / eop, cq_entry / + 0, / fcoe_encap / + 1, vlan_tag, / vlan_tag_insert, vlan_tag / + 0); / loopback / + vnic_wq_post(wq, buf, dma_addr, total_len, + 1, 1, / sop, eop / + 1, 1, / desc_skip_cnt, cq_entry / + 0, 0); / compressed_send, wrid / + vnic_wq_doorbell(wq); + + timeout = jiffies + usecs_to_jiffies(ENIC_MBOX_POLL_TIMEOUT_US); + err = -ETIMEDOUT; + while (time_before(jiffies, timeout)) { + if (enic_admin_wq_cq_service(enic)) { + err = 0; + break; + } + usleep_range(ENIC_MBOX_POLL_INTERVAL_US, + ENIC_MBOX_POLL_INTERVAL_US + 50); + } + / Final check in case completion arrived during the last sleep / + if (err && enic_admin_wq_cq_service(enic)) + err = 0; + + if (!err) { + wq->to_clean = wq->to_clean->next; + wq->ring.desc_avail++; + dma_unmap_single(&enic->pdev->dev, dma_addr, total_len, + DMA_TO_DEVICE); + kfree(buf); + } else { + netdev_err(enic->netdev, + "MBOX send timed out (type %u dst %u), disabling channel\n", + msg_type, dst_vnic_id); + / + * The WQ descriptor is still live in hardware. Do not unmap + * or free the buffer: the device may still DMA from dma_addr. + * Mark the channel unusable so no further sends are attempted. + / + WRITE_ONCE(enic->mbox_send_disabled, true); + } + + netdev_dbg(enic->netdev, + "MBOX send msg_type %u dst %u vlan %u err %d\n", + msg_type, dst_vnic_id, vlan_tag, err); +unlock: + mutex_unlock(&enic->mbox_lock); + return err; +} + +static int enic_mbox_wait_reply(struct enic enic, unsigned long timeout_ms) +{ + unsigned long left; + + left = wait_for_completion_timeout(&enic->mbox_comp, + msecs_to_jiffies(timeout_ms)); + + return left ? 0 : -ETIMEDOUT; +} + +int enic_mbox_send_link_state(struct enic enic, u16 vf_id, u32 link_state) +{ + struct enic_mbox_pf_link_state_notif_msg notif = {}; + + if (!enic->vf_state \|\| vf_id >= enic->num_vfs \|\| + !enic->vf_state[vf_id].registered) { + netdev_dbg(enic->netdev, + "MBOX: skip link state to unregistered VF %u\n", + vf_id); + return 0; + } + + notif.link_state = cpu_to_le32(link_state); + return enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_NOTIF, vf_id, + &notif, sizeof(notif)); +} + +static int enic_mbox_pf_handle_capability(struct enic enic, void msg, + u16 vf_id, u64 msg_num) +{ + struct enic_mbox_vf_capability_reply_msg reply = {}; + + reply.reply.ret_major = cpu_to_le16(0); + reply.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1); + + return enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REPLY, vf_id, + &reply, sizeof(reply)); +} + +static int enic_mbox_pf_handle_register(struct enic enic, void msg, + u16 vf_id, u64 msg_num) +{ + struct enic_mbox_vf_register_reply_msg reply = {}; + u32 link_state; + int err; + + if (!enic->vf_state \|\| vf_id >= enic->num_vfs) { + if (net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: register from invalid VF %u\n", + vf_id); + return -EINVAL; + } + + / VF re-registering (e.g. guest reboot without clean unregister): + * mark the previous registration inactive before accepting the new one. + / + if (enic->vf_state[vf_id].registered) { + netdev_dbg(enic->netdev, + "MBOX: VF %u re-register, cleaning previous state\n", + vf_id); + enic->vf_state[vf_id].registered = false; + } + + reply.reply.ret_major = cpu_to_le16(0); + err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REPLY, vf_id, + &reply, sizeof(reply)); + if (err) + return err; + + enic->vf_state[vf_id].registered = true; + if (net_ratelimit()) + netdev_info(enic->netdev, "VF %u registered via MBOX\n", vf_id); + + link_state = netif_carrier_ok(enic->netdev) ? + ENIC_MBOX_LINK_STATE_ENABLE : + ENIC_MBOX_LINK_STATE_DISABLE; + err = enic_mbox_send_link_state(enic, vf_id, link_state); + if (err && net_ratelimit()) + netdev_warn(enic->netdev, + "VF %u: failed to send initial link state: %d\n", + vf_id, err); + / Registration succeeded; initial link state notification sent + * above. Subsequent link state changes are sent from the PF + * when enic_link_check() detects carrier changes. + / + return 0; +} + +static int enic_mbox_pf_handle_unregister(struct enic enic, void msg, + u16 vf_id, u64 msg_num) +{ + struct enic_mbox_vf_register_reply_msg reply = {}; + int err; + + if (!enic->vf_state \|\| vf_id >= enic->num_vfs) { + if (net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: unregister from invalid VF %u\n", + vf_id); + return -EINVAL; + } + + / VF is unloading; clear local state regardless of whether + * the reply is successfully delivered to avoid the PF treating + * a dead VF as still registered. + / + enic->vf_state[vf_id].registered = false; + + reply.reply.ret_major = cpu_to_le16(0); + err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REPLY, vf_id, + &reply, sizeof(reply)); + + if (net_ratelimit()) + netdev_info(enic->netdev, + "VF %u unregistered via MBOX\n", vf_id); + + return err; +} + +static void enic_mbox_pf_process_msg(struct enic enic, + struct enic_mbox_hdr hdr, void payload) +{ + u16 vf_id = le16_to_cpu(hdr->src_vnic_id); + u16 msg_len = le16_to_cpu(hdr->msg_len); + int err = 0; + + if (!enic->vf_state) { + netdev_dbg(enic->netdev, + "MBOX: PF received msg but SRIOV not active\n"); + return; + } + + if (vf_id >= enic->num_vfs) { + if (net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: PF received msg from invalid VF %u\n", + vf_id); + return; + } + + switch (hdr->msg_type) { + case ENIC_MBOX_VF_CAPABILITY_REQUEST: + err = enic_mbox_pf_handle_capability(enic, payload, vf_id, + le64_to_cpu(hdr->msg_num)); + break; + case ENIC_MBOX_VF_REGISTER_REQUEST: + err = enic_mbox_pf_handle_register(enic, payload, vf_id, + le64_to_cpu(hdr->msg_num)); + break; + case ENIC_MBOX_VF_UNREGISTER_REQUEST: + err = enic_mbox_pf_handle_unregister(enic, payload, vf_id, + le64_to_cpu(hdr->msg_num)); + break; + case ENIC_MBOX_PF_LINK_STATE_ACK: { + struct enic_mbox_pf_link_state_ack_msg ack = payload; + + if (msg_len < sizeof(hdr) + sizeof(ack)) + break; + if (le16_to_cpu(ack->ack.ret_major) && net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: VF %u link state ACK error %u/%u\n", + vf_id, + le16_to_cpu(ack->ack.ret_major), + le16_to_cpu(ack->ack.ret_minor)); + break; + } + default: + netdev_dbg(enic->netdev, + "MBOX: PF unhandled msg type %u from VF %u\n", + hdr->msg_type, vf_id); + err = -EOPNOTSUPP; + break; + } + + if (err && net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: PF handler for msg type %u from VF %u failed: %d\n", + hdr->msg_type, vf_id, err); +} + +static void enic_mbox_vf_handle_capability_reply(struct enic enic, + void payload) +{ + struct enic_mbox_vf_capability_reply_msg reply = payload; + + if (enic->mbox_expected_reply != ENIC_MBOX_VF_CAPABILITY_REPLY) { + netdev_warn(enic->netdev, + "MBOX: stale capability reply (expected %u), drop\n", + enic->mbox_expected_reply); + return; + } + + if (le16_to_cpu(reply->reply.ret_major) == 0) + enic->pf_cap_version = le32_to_cpu(reply->version); + else + netdev_warn(enic->netdev, + "MBOX: PF rejected capability request: %u/%u\n", + le16_to_cpu(reply->reply.ret_major), + le16_to_cpu(reply->reply.ret_minor)); + complete(&enic->mbox_comp); +} + +static void enic_mbox_vf_handle_register_reply(struct enic enic, + void payload) +{ + struct enic_mbox_vf_register_reply_msg reply = payload; + + if (enic->mbox_expected_reply != ENIC_MBOX_VF_REGISTER_REPLY) { + netdev_warn(enic->netdev, + "MBOX: stale register reply (expected %u), drop\n", + enic->mbox_expected_reply); + return; + } + + if (le16_to_cpu(reply->reply.ret_major)) { + netdev_warn(enic->netdev, + "MBOX: VF register rejected by PF: %u/%u\n", + le16_to_cpu(reply->reply.ret_major), + le16_to_cpu(reply->reply.ret_minor)); + } else { + enic->vf_registered = true; + } + complete(&enic->mbox_comp); +} + +static void enic_mbox_vf_handle_unregister_reply(struct enic enic, + void payload) +{ + struct enic_mbox_vf_register_reply_msg reply = payload; + + if (enic->mbox_expected_reply != ENIC_MBOX_VF_UNREGISTER_REPLY) { + netdev_warn(enic->netdev, + "MBOX: stale unregister reply (expected %u), drop\n", + enic->mbox_expected_reply); + return; + } + + if (le16_to_cpu(reply->reply.ret_major)) { + netdev_warn(enic->netdev, + "MBOX: VF unregister rejected by PF: %u/%u\n", + le16_to_cpu(reply->reply.ret_major), + le16_to_cpu(reply->reply.ret_minor)); + } else { + enic->vf_registered = false; + } + complete(&enic->mbox_comp); +} + +static void enic_mbox_vf_handle_link_state(struct enic enic, void payload) +{ + struct enic_mbox_pf_link_state_notif_msg notif = payload; + struct enic_mbox_pf_link_state_ack_msg ack = {}; + int err; + + switch (le32_to_cpu(notif->link_state)) { + case ENIC_MBOX_LINK_STATE_ENABLE: + if (!netif_carrier_ok(enic->netdev)) + netif_carrier_on(enic->netdev); + netdev_dbg(enic->netdev, "MBOX: link state -> UP\n"); + break; + case ENIC_MBOX_LINK_STATE_DISABLE: + if (netif_carrier_ok(enic->netdev)) + netif_carrier_off(enic->netdev); + netdev_dbg(enic->netdev, "MBOX: link state -> DOWN\n"); + break; + default: + netdev_warn(enic->netdev, "MBOX: unknown link state %u\n", + le32_to_cpu(notif->link_state)); + ack.ack.ret_major = cpu_to_le16(ENIC_MBOX_ERR_GENERIC); + break; + } + + err = enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_ACK, + ENIC_MBOX_DST_PF, &ack, sizeof(ack)); + if (err && net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: failed to send link state ACK: %d\n", err); +} + +static bool enic_mbox_vf_payload_ok(struct enic enic, u8 msg_type, + u16 payload_len, size_t min_len) +{ + if (payload_len < min_len) { + netdev_warn(enic->netdev, + "MBOX: short payload for type %u (%u < %zu)\n", + msg_type, payload_len, min_len); + return false; + } + return true; +} + +static void enic_mbox_vf_process_msg(struct enic enic, + struct enic_mbox_hdr hdr, void payload, + u16 payload_len) +{ + switch (hdr->msg_type) { + case ENIC_MBOX_VF_CAPABILITY_REPLY: { + size_t exp = sizeof(struct enic_mbox_vf_capability_reply_msg); + + if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type, + payload_len, exp)) + return; + enic_mbox_vf_handle_capability_reply(enic, payload); + break; + } + case ENIC_MBOX_VF_REGISTER_REPLY: { + size_t exp = sizeof(struct enic_mbox_vf_register_reply_msg); + + if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type, + payload_len, exp)) + return; + enic_mbox_vf_handle_register_reply(enic, payload); + break; + } + case ENIC_MBOX_VF_UNREGISTER_REPLY: { + size_t exp = sizeof(struct enic_mbox_vf_register_reply_msg); + + if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type, + payload_len, exp)) + return; + enic_mbox_vf_handle_unregister_reply(enic, payload); + break; + } + case ENIC_MBOX_PF_LINK_STATE_NOTIF: { + size_t exp = sizeof(struct enic_mbox_pf_link_state_notif_msg); + + if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type, + payload_len, exp)) + return; + enic_mbox_vf_handle_link_state(enic, payload); + break; + } + default: + netdev_dbg(enic->netdev, + "MBOX: VF unhandled msg type %u\n", + hdr->msg_type); + break; + } +} + +static void enic_mbox_recv_handler(struct enic enic, void buf, + unsigned int len) +{ + struct enic_mbox_hdr hdr = buf; + void payload; + u16 msg_len; + + if (len < sizeof(hdr)) { + if (net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: truncated message (len %u < %zu)\n", + len, sizeof(hdr)); + return; + } + + if (hdr->msg_type >= ENIC_MBOX_MAX) { + if (net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: unknown msg type %u\n", + hdr->msg_type); + return; + } + + msg_len = le16_to_cpu(hdr->msg_len); + if (msg_len < sizeof(hdr) \|\| msg_len > len) { + if (net_ratelimit()) + netdev_warn(enic->netdev, + "MBOX: invalid msg_len %u (buf len %u)\n", + msg_len, len); + return; + } + + netdev_dbg(enic->netdev, + "MBOX recv: type %u from vnic %u len %u\n", + hdr->msg_type, le16_to_cpu(hdr->src_vnic_id), msg_len); + + payload = buf + sizeof(hdr); + + if (enic->vf_state) { + enic_mbox_pf_process_msg(enic, hdr, payload); + } else if (le16_to_cpu(hdr->src_vnic_id) == ENIC_MBOX_DST_PF) { + / src_vnic_id was overwritten from the hardware-verified CQ + * VLAN sender field, so a VF only accepts messages that the + * adapter attributes to the PF. Its sole admin-channel peer is + * the PF; drop anything else as a spoofed notification. + / + enic_mbox_vf_process_msg(enic, hdr, payload, + msg_len - (u16)sizeof(hdr)); + } else if (net_ratelimit()) { + netdev_warn(enic->netdev, + "MBOX: VF dropping non-PF message from vnic %u\n", + le16_to_cpu(hdr->src_vnic_id)); + } +} + +int enic_mbox_vf_capability_check(struct enic enic) +{ + struct enic_mbox_vf_capability_msg req = {}; + int err; + + enic->pf_cap_version = 0; + reinit_completion(&enic->mbox_comp); + enic->mbox_expected_reply = ENIC_MBOX_VF_CAPABILITY_REPLY; + req.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1); + + err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REQUEST, + ENIC_MBOX_DST_PF, &req, sizeof(req)); + if (err) { + enic->mbox_expected_reply = 0; + return err; + } + + err = enic_mbox_wait_reply(enic, 3000); + enic->mbox_expected_reply = 0; + if (err) { + netdev_warn(enic->netdev, + "MBOX: no capability reply from PF\n"); + return err; + } + + if (enic->pf_cap_version < ENIC_MBOX_CAP_VERSION_1) { + netdev_warn(enic->netdev, + "MBOX: PF version %u too old\n", + enic->pf_cap_version); + return -EOPNOTSUPP; + } + + return 0; +} + +int enic_mbox_vf_register(struct enic enic) +{ + int err; + + enic->vf_registered = false; + reinit_completion(&enic->mbox_comp); + enic->mbox_expected_reply = ENIC_MBOX_VF_REGISTER_REPLY; + + err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REQUEST, + ENIC_MBOX_DST_PF, NULL, 0); + if (err) { + enic->mbox_expected_reply = 0; + return err; + } + + err = enic_mbox_wait_reply(enic, 3000); + enic->mbox_expected_reply = 0; + if (err) { + netdev_warn(enic->netdev, + "MBOX: VF registration with PF timed out\n"); + return err; + } + + if (!enic->vf_registered) + return -ENODEV; + + return 0; +} + +int enic_mbox_vf_unregister(struct enic enic) +{ + int err; + + if (!enic->vf_registered) + return 0; + + reinit_completion(&enic->mbox_comp); + enic->mbox_expected_reply = ENIC_MBOX_VF_UNREGISTER_REPLY; + + err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REQUEST, + ENIC_MBOX_DST_PF, NULL, 0); + if (err) { + enic->mbox_expected_reply = 0; + return err; + } + + err = enic_mbox_wait_reply(enic, 3000); + enic->mbox_expected_reply = 0; + if (err) + return err; + if (enic->vf_registered) + return -EACCES; + return 0; +} + +void enic_mbox_init(struct enic enic) +{ + /* mbox_lock and mbox_comp must be initialized exactly once per + * device lifetime; the PF sriov_configure path can re-enter this + * on each enable cycle where these primitives are already set up. + / + if (!enic->mbox_initialized) { + mutex_init(&enic->mbox_lock); + init_completion(&enic->mbox_comp); + enic->mbox_initialized = true; + } else { + reinit_completion(&enic->mbox_comp); + } + enic->mbox_msg_num = 0; + enic->admin_rq_handler = enic_mbox_recv_handler; +} diff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.h b/drivers/net/ethernet/cisco/enic/enic_mbox.h new file mode 100644 index 00000000000000..15e30ee2b0ed95 --- /dev/null +++ b/drivers/net/ethernet/cisco/enic/enic_mbox.h @@ -0,0 +1,95 @@ +/ SPDX-License-Identifier: GPL-2.0-only / +/ Copyright 2025 Cisco Systems, Inc. All rights reserved. / + +#ifndef _ENIC_MBOX_H_ +#define _ENIC_MBOX_H_ + +#include <linux/bits.h> +#include <linux/types.h> + +/ + * Mailbox protocol for PF-VF communication over the admin channel. + * + * Even numbers are requests, odd numbers are replies/acks. + * The prefix indicates the initiator: VF_ = VF-initiated, PF_ = PF-initiated. + / +enum enic_mbox_msg_type { + ENIC_MBOX_VF_CAPABILITY_REQUEST = 0, + ENIC_MBOX_VF_CAPABILITY_REPLY = 1, + ENIC_MBOX_VF_REGISTER_REQUEST = 2, + ENIC_MBOX_VF_REGISTER_REPLY = 3, + ENIC_MBOX_VF_UNREGISTER_REQUEST = 4, + ENIC_MBOX_VF_UNREGISTER_REPLY = 5, + ENIC_MBOX_PF_LINK_STATE_NOTIF = 6, + ENIC_MBOX_PF_LINK_STATE_ACK = 7, + ENIC_MBOX_MAX +}; + +struct enic_mbox_hdr { + __le16 src_vnic_id; + __le16 dst_vnic_id; + u8 msg_type; + u8 flags; + __le16 msg_len; + __le64 msg_num; +}; + +struct enic_mbox_generic_reply { + __le16 ret_major; + __le16 ret_minor; +}; + +#define ENIC_MBOX_ERR_GENERIC BIT(0) +#define ENIC_MBOX_ERR_VF_NOT_REGISTERED BIT(1) +#define ENIC_MBOX_ERR_MSG_NOT_SUPPORTED BIT(2) + +/ ENIC_MBOX_VF_CAPABILITY_REQUEST / _REPLY / +#define ENIC_MBOX_CAP_VERSION_0 0 +#define ENIC_MBOX_CAP_VERSION_1 1 + +struct enic_mbox_vf_capability_msg { + __le32 version; + __le32 reserved[32]; +}; + +/ The embedded enic_mbox_generic_reply has 2-byte alignment, but the + * __le32 members give this struct 4-byte natural alignment. Receive + * buffers come from kmalloc (>= 8-byte aligned), so there is no + * misaligned access risk when casting from the receive buffer. + / +struct enic_mbox_vf_capability_reply_msg { + struct enic_mbox_generic_reply reply; + __le32 version; + __le32 reserved[32]; +}; + +/ ENIC_MBOX_VF_REGISTER / _UNREGISTER / +struct enic_mbox_vf_register_reply_msg { + struct enic_mbox_generic_reply reply; +}; + +/ ENIC_MBOX_PF_LINK_STATE_NOTIF / _ACK / +#define ENIC_MBOX_LINK_STATE_DISABLE 0 +#define ENIC_MBOX_LINK_STATE_ENABLE 1 + +struct enic_mbox_pf_link_state_notif_msg { + __le32 link_state; +}; + +struct enic_mbox_pf_link_state_ack_msg { + struct enic_mbox_generic_reply ack; +}; + +#define ENIC_MBOX_DST_PF 0xFFFF + +struct enic; + +void enic_mbox_init(struct enic enic); +int enic_mbox_send_msg(struct enic enic, u8 msg_type, u16 dst_vnic_id, + void payload, u16 payload_len); +int enic_mbox_send_link_state(struct enic enic, u16 vf_id, u32 link_state); +int enic_mbox_vf_capability_check(struct enic enic); +int enic_mbox_vf_register(struct enic enic); +int enic_mbox_vf_unregister(struct enic enic); + +#endif /* _ENIC_MBOX_H_ / diff --git a/drivers/net/ethernet/cisco/enic/enic_pp.c b/drivers/net/ethernet/cisco/enic/enic_pp.c index 4720a952725d00..3f611e240c256c 100644 --- a/drivers/net/ethernet/cisco/enic/enic_pp.c +++ b/drivers/net/ethernet/cisco/enic/enic_pp.c @@ -25,6 +25,11 @@ int enic_is_valid_pp_vf(struct enic enic, int vf, int err) if (vf != PORT_SELF_VF) { #ifdef CONFIG_PCI_IOV if (enic_sriov_enabled(enic)) { + / V2 SR-IOV uses MBOX, not port profiles / + if (enic->vf_type == ENIC_VF_TYPE_V2) { + err = -EOPNOTSUPP; + goto err_out; + } if (vf < 0 \|\| vf >= enic->num_vfs) { err = -EINVAL; goto err_out; diff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ethernet/cisco/enic/enic_res.c index 2b7545d6a67fdc..74cd2ee3af5cb7 100644 --- a/drivers/net/ethernet/cisco/enic/enic_res.c +++ b/drivers/net/ethernet/cisco/enic/enic_res.c @@ -59,6 +59,7 @@ int enic_get_vnic_config(struct enic enic) GET_CONFIG(intr_timer_usec); GET_CONFIG(loop_tag); GET_CONFIG(num_arfs); + GET_CONFIG(mq_subvnic_count); GET_CONFIG(max_rq_ring); GET_CONFIG(max_wq_ring); GET_CONFIG(max_cq_ring); @@ -210,7 +211,8 @@ void enic_get_res_counts(struct enic enic) vnic_dev_get_res_count(enic->vdev, RES_TYPE_ADMIN_RQ) >= 1 && vnic_dev_get_res_count(enic->vdev, RES_TYPE_ADMIN_CQ) >= ARRAY_SIZE(enic->admin_cq) && - vnic_dev_get_res_count(enic->vdev, RES_TYPE_SRIOV_INTR) >= 1; + (enic_is_sriov_vf_v2(enic) \|\| + vnic_dev_get_res_count(enic->vdev, RES_TYPE_SRIOV_INTR) >= 1); dev_info(enic_get_dev(enic), "vNIC resources avail: wq %d rq %d cq %d intr %d admin %s\n", diff --git a/drivers/net/ethernet/cisco/enic/vnic_cq.h b/drivers/net/ethernet/cisco/enic/vnic_cq.h index d46d4d2ef6bbac..35ffa323071305 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_cq.h +++ b/drivers/net/ethernet/cisco/enic/vnic_cq.h @@ -76,6 +76,15 @@ int vnic_cq_alloc(struct vnic_dev vdev, struct vnic_cq cq, unsigned int index, int vnic_cq_alloc_with_type(struct vnic_dev vdev, struct vnic_cq cq, unsigned int index, unsigned int desc_count, unsigned int desc_size, unsigned int res_type); +#define VNIC_CQ_FC_ENABLE 1 +#define VNIC_CQ_FC_DISABLE 0 +#define VNIC_CQ_COLOR_ENABLE 1 +#define VNIC_CQ_INTR_ENABLE 1 +#define VNIC_CQ_INTR_DISABLE 0 +#define VNIC_CQ_ENTRY_ENABLE 1 +#define VNIC_CQ_MSG_ENABLE 1 +#define VNIC_CQ_MSG_DISABLE 0 + void vnic_cq_init(struct vnic_cq cq, unsigned int flow_control_enable, unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail, unsigned int cq_tail_color, unsigned int interrupt_enable, diff --git a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h index 605ef17f967e4a..90ca06691ebd63 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h +++ b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h @@ -455,8 +455,19 @@ enum vnic_devcmd_cmd { / CMD_CQ_ENTRY_SIZE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 90), + / + * Set queue pair type (admin or data) + * in: (u32) a0 = queue pair type (0 = admin, 1 = data) + * in: (u32) a1 = enable (1) / disable (0) + / + CMD_QP_TYPE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 97), }; +#define QP_TYPE_ADMIN 0 +#define QP_TYPE_DATA 1 +#define QP_ENABLE 1 +#define QP_DISABLE 0 + / CMD_ENABLE2 flags / #define CMD_ENABLE2_STANDBY 0x0 #define CMD_ENABLE2_ACTIVE 0x1 @@ -734,6 +745,8 @@ enum vic_feature_t { VIC_FEATURE_VXLAN, VIC_FEATURE_RDMA, VIC_FEATURE_VXLAN_PATCH, + / slot 3 reserved for firmware VIC_FEATURE_PTP */ + VIC_FEATURE_SRIOV = 4, VIC_FEATURE_MAX, }; diff --git a/drivers/net/ethernet/cisco/enic/vnic_enet.h b/drivers/net/ethernet/cisco/enic/vnic_enet.h index 9e8e86262a3fea..519d2969990b18 100644 --- a/drivers/net/ethernet/cisco/enic/vnic_enet.h +++ b/drivers/net/ethernet/cisco/enic/vnic_enet.h @@ -21,7 +21,9 @@ struct vnic_enet_config { u16 loop_tag; u16 vf_rq_count; u16 num_arfs; - u8 reserved[66]; + u8 reserved1[32]; + u16 mq_subvnic_count; + u8 reserved2[32]; u32 max_rq_ring; // MAX RQ ring size u32 max_wq_ring; // MAX WQ ring size u32 max_cq_ring; // MAX CQ ring size
3/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 29147 output: 37 thoughts: 610 Thoughts: Assessing the Fuzzability of the Cisco ENIC Driver Patch Series Okay, so we have this patch series introducing admin channel and mailbox support for the Cisco ENIC driver. My immediate concern is whether this is practically fuzzable. The changes are functional, touching core driver logic, which is good from a vulnerability perspective, but if it's not reachable, it's a wasted effort. This driver is specifically for Cisco VIC Ethernet NICs, which means it relies on specific hardware. My first instinct is, can this even be hit within a virtualized environment like QEMU, or even GCE? PCI drivers for niche hardware like this are notoriously difficult to target without specific emulation. My mind immediately races: Does QEMU even have a Cisco VIC emulator? I need to check. If there's no software emulation, is there another fuzzing strategy? Syzkaller, of course. Syzkaller is the gold standard. I know it has PCI fuzzing capabilities – through things like vPCI, or potentially even emulation of drivers like e1000e. However, I can't immediately recall if it has explicit support for Cisco ENIC. Hold on, I remember the fuzzing guidelines stating "Return WorthFuzzing=false if ... Code paths that are impossible to reach in virtualized environments..." so reachability is key. Okay, back to Syzkaller. It does have `syz_pci` and similar mechanisms, which could work if it's a PCI driver. The critical thing is can it inject a Cisco ENIC device at all? Wait, Syzkaller does have a PCI fuzzer, which is the key here. It can inject PCI devices! This means it can theoretically fuzz any PCI driver by simulating the PCI device config space and BARs. Is that actually true though? I need to be sure. Does it really work for all PCI drivers? I need to quickly confirm a few things. First, is `CONFIG_ENIC` enabled within syzkaller's configuration? I should look for this in their configuration files to be sure. I'll search the kernel tree to confirm that `drivers/net/ethernet/cisco/enic/` is actually a PCI driver, which it is, so that's good. Now, I should look in the `Kconfig` file in that directory to see if there are any specific configurations that I need to enable for ENIC. `CONFIG_ENIC` is the main one. I have a good feeling about this.
4/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "config ENIC", "PathPrefix": "drivers/net/ethernet/cisco/enic/Kconfig" } Results: { "Output": "drivers/net/ethernet/cisco/enic/Kconfig-5-\ndrivers/net/ethernet/cisco/enic/Kconfig:6:config ENIC\ndrivers/net/ethernet/cisco/enic/Kconfig-7-\ttristate \"Cisco VIC Ethernet NIC Support\"\n" }
5/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 30415 output: 34 thoughts: 57 Thoughts: Okay, here's my quick take on this. Analyzing this PCI Driver Patch Alright, so I'm looking at this patch and my initial thought is, "Okay, it's a PCI driver." Immediately, I want to see if there's anything else in the configuration that might be relevant. My gut instinct is to look for dependencies. Ah, good, the patch uses an `#ifdef CONFIG_PCI_IOV` directive. That's the key. That tells me right away that `CONFIG_PCI_IOV` is a required configuration option for this patch to work correctly. Now, I should probably double-check if there are any other config options being used. I will look into that, next.
6/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "CONFIG_", "PathPrefix": "drivers/net/ethernet/cisco/enic/" } Results: { "Output": "drivers/net/ethernet/cisco/enic/Makefile-1-# SPDX-License-Identifier: GPL-2.0-only\ndrivers/net/ethernet/cisco/enic/Makefile:2:obj-$(CONFIG_ENIC) := enic.o\ndrivers/net/ethernet/cisco/enic/Makefile-3-\n--\ndrivers/net/ethernet/cisco/enic/enic_clsf.c=107=struct enic_rfs_fltr_node htbl_fltr_search(struct enic enic, u16 fltr_id)\n--\ndrivers/net/ethernet/cisco/enic/enic_clsf.c-124-\ndrivers/net/ethernet/cisco/enic/enic_clsf.c:125:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_clsf.c-126-void enic_flow_may_expire(struct timer_list t)\n--\ndrivers/net/ethernet/cisco/enic/enic_clsf.c=171=int enic_rx_flow_steer(struct net_device dev, const struct sk_buff skb,\n--\ndrivers/net/ethernet/cisco/enic/enic_clsf.c-285-\ndrivers/net/ethernet/cisco/enic/enic_clsf.c:286:#endif / CONFIG_RFS_ACCEL /\n--\ndrivers/net/ethernet/cisco/enic/enic_clsf.h=14=struct enic_rfs_fltr_node htbl_fltr_search(struct enic enic, u16 fltr_id);\ndrivers/net/ethernet/cisco/enic/enic_clsf.h-15-\ndrivers/net/ethernet/cisco/enic/enic_clsf.h:16:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_clsf.h-17-int enic_rx_flow_steer(struct net_device dev, const struct sk_buff skb,\n--\ndrivers/net/ethernet/cisco/enic/enic_clsf.h=33=static inline void enic_rfs_timer_stop(struct enic enic) {}\ndrivers/net/ethernet/cisco/enic/enic_clsf.h:34:#endif /* CONFIG_RFS_ACCEL /\ndrivers/net/ethernet/cisco/enic/enic_clsf.h-35-\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-42-#include \u003clinux/numa.h\u003e\ndrivers/net/ethernet/cisco/enic/enic_main.c:43:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_main.c-44-#include \u003clinux/cpu_rmap.h\u003e\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=324=int enic_is_valid_vf(struct enic enic, int vf)\ndrivers/net/ethernet/cisco/enic/enic_main.c-325-{\ndrivers/net/ethernet/cisco/enic/enic_main.c:326:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_main.c-327-\treturn vf \u003e= 0 \u0026\u0026 vf \u003c enic-\u003enum_vfs;\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=1356=static int enic_poll(struct napi_struct napi, int budget)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-1416-\ndrivers/net/ethernet/cisco/enic/enic_main.c:1417:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_main.c-1418-static void enic_free_rx_cpu_rmap(struct enic enic)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=1449=static void enic_set_rx_cpu_rmap(struct enic enic)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-1452-\ndrivers/net/ethernet/cisco/enic/enic_main.c:1453:#endif / CONFIG_RFS_ACCEL /\ndrivers/net/ethernet/cisco/enic/enic_main.c-1454-\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=1923=static void enic_change_mtu_work(struct work_struct work)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-1935-\ndrivers/net/ethernet/cisco/enic/enic_main.c:1936:#ifdef CONFIG_NET_POLL_CONTROLLER\ndrivers/net/ethernet/cisco/enic/enic_main.c-1937-static void enic_poll_controller(struct net_device netdev)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=2528=static const struct net_device_ops enic_netdev_dynamic_ops = {\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-2542-\t.ndo_set_vf_mac\t\t= enic_set_vf_mac,\ndrivers/net/ethernet/cisco/enic/enic_main.c:2543:#ifdef CONFIG_NET_POLL_CONTROLLER\ndrivers/net/ethernet/cisco/enic/enic_main.c-2544-\t.ndo_poll_controller\t= enic_poll_controller,\ndrivers/net/ethernet/cisco/enic/enic_main.c-2545-#endif\ndrivers/net/ethernet/cisco/enic/enic_main.c:2546:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_main.c-2547-\t.ndo_rx_flow_steer\t= enic_rx_flow_steer,\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=2552=static const struct net_device_ops enic_netdev_ops = {\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-2566-\t.ndo_set_vf_mac\t\t= enic_set_vf_mac,\ndrivers/net/ethernet/cisco/enic/enic_main.c:2567:#ifdef CONFIG_NET_POLL_CONTROLLER\ndrivers/net/ethernet/cisco/enic/enic_main.c-2568-\t.ndo_poll_controller\t= enic_poll_controller,\ndrivers/net/ethernet/cisco/enic/enic_main.c-2569-#endif\ndrivers/net/ethernet/cisco/enic/enic_main.c:2570:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_main.c-2571-\t.ndo_rx_flow_steer\t= enic_rx_flow_steer,\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=2761=static void enic_iounmap(struct enic enic)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-2769-\ndrivers/net/ethernet/cisco/enic/enic_main.c:2770:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_main.c-2771-static void enic_sriov_detect_vf_type(struct enic enic)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=2950=static int enic_probe(struct pci_dev pdev, const struct pci_device_id ent)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-2957-\tint err;\ndrivers/net/ethernet/cisco/enic/enic_main.c:2958:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_main.c-2959-\tint pos = 0;\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-3044-\ndrivers/net/ethernet/cisco/enic/enic_main.c:3045:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_main.c-3046-\tenic_sriov_detect_vf_type(enic);\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-3275-\ndrivers/net/ethernet/cisco/enic/enic_main.c:3276:#ifdef CONFIG_RFS_ACCEL\ndrivers/net/ethernet/cisco/enic/enic_main.c-3277-\tnetdev-\u003ehw_features \|= NETIF_F_NTUPLE;\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-3316-err_out_disable_sriov_pp:\ndrivers/net/ethernet/cisco/enic/enic_main.c:3317:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_main.c-3318-\tif (enic_sriov_enabled(enic)) {\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c=3337=static void enic_remove(struct pci_dev pdev)\n--\ndrivers/net/ethernet/cisco/enic/enic_main.c-3370-\t\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\ndrivers/net/ethernet/cisco/enic/enic_main.c:3371:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_main.c-3372-\t\tif (enic_sriov_enabled(enic)) {\n--\ndrivers/net/ethernet/cisco/enic/enic_pp.c=23=int enic_is_valid_pp_vf(struct enic enic, int vf, int err)\n--\ndrivers/net/ethernet/cisco/enic/enic_pp.c-25-\tif (vf != PORT_SELF_VF) {\ndrivers/net/ethernet/cisco/enic/enic_pp.c:26:#ifdef CONFIG_PCI_IOV\ndrivers/net/ethernet/cisco/enic/enic_pp.c-27-\t\tif (enic_sriov_enabled(enic)) {\n--\ndrivers/net/ethernet/cisco/enic/vnic_devcmd.h=67=enum vnic_devcmd_cmd {\n--\ndrivers/net/ethernet/cisco/enic/vnic_devcmd.h-286-\t * 0 if no VIF-CONFIG-INFO TLV was ever received. */\ndrivers/net/ethernet/cisco/enic/vnic_devcmd.h:287:\tCMD_CONFIG_INFO_GET = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 44),\ndrivers/net/ethernet/cisco/enic/vnic_devcmd.h-288-\n" }
7/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 33529 output: 61 thoughts: 809 Thoughts: Worth Fuzzing Assessment for Cisco VIC (enic) Driver Okay, so I'm looking at this patch and immediately, the need for `CONFIG_PCI_IOV` jumps out. The patch itself introduces `enic_admin.c` and `enic_mbox.c`, which makes me think this is a potential area for fuzzing. The key here is whether this driver is actually reachable in a fuzzing environment. I remember syzkaller has `syz_pci_device`, which it uses to inject PCI devices. However, I need to check if this patch is worth fuzzing. The documentation says to consider returning `WorthFuzzing=false` if the changes are impossible to reach in virtualized environments, specifically mentioning QEMU. Is the Cisco VIC (`enic`) emulated in QEMU? I don't think so, and a quick check of QEMU's supported devices confirms that. QEMU supports the `e1000`, `e1000e`, `rtl8139`, `virtio-net`, `vmxnet3`, `pcnet`, `ne2k_pci`, `tulip`, and `i82559er` but not `enic`. Now, the important question is whether syzkaller itself emulates `enic`. The good news is syzkaller's `syz_pci` is a generic PCI fuzzer that can emulate ANY PCI device. It does this by intercepting config space and MMIO reads/writes. It's not perfect emulation, but it provides random data to MMIO reads, which is enough to reach driver code. I need to make sure `enic` is supported by syzkaller's PCI fuzzer. It does that by matching PCI IDs. If the driver loads and binds to the injected PCI ID, it will fuzz it. That means it doesn't need dedicated emulation, so it is reachable. I need to confirm whether `enic` is reachable and it is, therefore the rule of "Code paths that are impossible to reach in virtualized environments like GCE or QEMU, even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim)." doesn't apply. Syzkaller's PCI fuzzer, while providing a software-emulated hardware mechanism to inject PCI devices, is primarily a fuzzer. It's designed to expose vulnerabilities by generating random input. So, since it's reachable via syzkaller, I'm leaning towards `WorthFuzzing=true`. If I return true, I need to provide `FocusSymbols` and `EnableConfigs`. For `EnableConfigs`, I'll include `ENIC` and `PCI_IOV`. For `FocusSymbols`, I should include: `enic_admin_channel_open`, `enic_admin_channel_close`, `enic_admin_rq_cq_service`, `enic_admin_wq_cq_service`, `enic_mbox_send_msg`, `enic_mbox_vf_capability_check`, `enic_mbox_vf_register`, `enic_mbox_vf_unregister`, `enic_mbox_recv_handler`, `enic_mbox_pf_process_msg`, and `enic_mbox_vf_process_msg`. I need to verify that `CONFIG_ENIC` is enabled, but I can add it to the `EnableConfigs`. Finally, the patch is fuzzable.
8/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "^(int\|void\|unsigned int\|bool\|static) [a-zA-Z0-9_]+\\(", "PathPrefix": "drivers/net/ethernet/cisco/enic/enic_admin.c" } Results: { "Output": "drivers/net/ethernet/cisco/enic/enic_admin.c=100=static unsigned int enic_admin_cq_color(void cq_desc, unsigned int desc_size)\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-106-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:107:unsigned int enic_admin_wq_cq_service(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-108-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c=130=static void enic_admin_msg_enqueue(struct enic enic, void buf,\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-156-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:157:unsigned int enic_admin_rq_cq_service(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-158-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c=484=static void enic_admin_msg_drain(struct enic enic)\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-496-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:497:int enic_admin_channel_open(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-498-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-580-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:581:void enic_admin_channel_close(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-582-{\n" }
9/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 35644 output: 60 thoughts: 14 Thoughts: Okay, here's my take on those thoughts, tailored for an expert audience: Consolidating `enic_admin.c` Functions Alright, the core idea here is to strategically consolidate the functions within `enic_admin.c`. We're likely dealing with a network driver, and this file probably houses the administrative and control plane routines related to the ENIC (Enhanced Network Interface Card). The motivation for this consolidation could be any number of things, but given our experience, we're likely looking to improve maintainability, code readability, or perhaps streamline a specific function. We could be refactoring existing code to reduce duplication. Maybe we're consolidating functionalities that currently reside in various files. It may also imply we’re looking to simplify our driver's control path and reduce the cognitive load for developers working on this piece. It could simply be a prerequisite before further refactoring or modification to this file. In any event, understanding the overarching architectural goals will be critical before we start, so as to create a well-structured plan to accomplish the necessary changes.
10/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "^[a-zA-Z0-9_]+ [a-zA-Z0-9_]+\\(", "PathPrefix": "drivers/net/ethernet/cisco/enic/enic_admin.c" } Results: { "Output": "drivers/net/ethernet/cisco/enic/enic_admin.c=484=static void enic_admin_msg_drain(struct enic enic)\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-496-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:497:int enic_admin_channel_open(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-498-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-580-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:581:void enic_admin_channel_close(struct enic *enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-582-{\n" }
11/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 36165 output: 60 thoughts: 30 Thoughts: Okay, here's my take on those thoughts, tailored for an expert audience: Refining the Regex Approach Hmm, upon closer inspection, that initial regular expression for identifying potential static and variable declarations felt a tad too specific. I need to be more flexible. Instead of the restrictive pattern I was initially considering, I think a broader approach is warranted. My thinking is to switch to: * `^static .`: This will catch any line beginning with "static" followed by anything else. This should cover various static declarations regardless of the specific variable type or modifiers. `^[a-zA-Z].*`: And, this pattern will handle the variables. This should capture declarations that begin with a letter (upper or lower case) and are followed by anything. This should take care of any variable declaration starting with letter or underscore, which is a common naming convention. Essentially, I want to minimize false negatives and then address any potential false positives through post-processing, instead of risking missing something up front. This should simplify the regex significantly and increase its overall reliability in identifying the target lines of code.
12/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "^[a-zA-Z_].\\([a-zA-Z0-9_, ]+\\)", "PathPrefix": "drivers/net/ethernet/cisco/enic/enic_admin.c" } Results: { "Output": "drivers/net/ethernet/cisco/enic/enic_admin.c=41=static void enic_admin_rq_buf_clean(struct vnic_rq rq,\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-54-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:55:static int enic_admin_rq_post_one(struct enic enic, gfp_t gfp)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-56-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-80-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:81:static int enic_admin_rq_fill(struct enic enic, gfp_t gfp)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-82-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-94-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:95:static void enic_admin_rq_drain(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-96-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-99-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:100:static unsigned int enic_admin_cq_color(void cq_desc, unsigned int desc_size)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-101-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-106-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:107:unsigned int enic_admin_wq_cq_service(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-108-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c=130=static void enic_admin_msg_enqueue(struct enic enic, void buf,\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-156-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:157:unsigned int enic_admin_rq_cq_service(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-158-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-254-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:255:static irqreturn_t enic_admin_isr_msix(int irq, void data)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-256-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-263-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:264:static void enic_admin_msg_work_handler(struct work_struct work)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-265-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-282-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:283:static void enic_admin_poll_work_handler(struct work_struct work)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-284-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-300-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:301:static int enic_admin_setup_intr(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-302-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-356-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:357:static void enic_admin_teardown_intr(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-358-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-366-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:367:static int enic_admin_qp_type_set(struct enic enic, u32 enable)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-368-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-379-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:380:static int enic_admin_alloc_resources(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-381-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-443-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:444:static void enic_admin_free_resources(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-445-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-452-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:453:static void enic_admin_init_resources(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-454-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-483-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:484:static void enic_admin_msg_drain(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-485-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-496-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:497:int enic_admin_channel_open(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-498-{\n--\ndrivers/net/ethernet/cisco/enic/enic_admin.c-580-\ndrivers/net/ethernet/cisco/enic/enic_admin.c:581:void enic_admin_channel_close(struct enic *enic)\ndrivers/net/ethernet/cisco/enic/enic_admin.c-582-{\n" }
13/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 38209 output: 60 thoughts: 13 Thoughts: Okay, here's my take on those thoughts, tailored for an expert audience: Getting Down to Business with `enic_mbox.c` Alright, time to dig in. I need to pull some functionality from `enic_mbox.c`. I'm going to start there, focusing on the mailbox interactions, likely for configuration, status queries, or command execution within the Enic driver. This suggests that I'm either working on a modification to the Enic driver itself, or perhaps I'm debugging interactions and needing to trace through the mailbox protocol. The exact functions I need will depend on the task at hand, but this is clearly the starting point to understand the Enic's low level communications. Let’s get to it.
14/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "^[a-zA-Z_].\\([a-zA-Z0-9_, ]+\\)", "PathPrefix": "drivers/net/ethernet/cisco/enic/enic_mbox.c" } Results: { "Output": "drivers/net/ethernet/cisco/enic/enic_mbox.c=31=int enic_mbox_send_msg(struct enic enic, u8 msg_type, u16 dst_vnic_id,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-138-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:139:static int enic_mbox_wait_reply(struct enic enic, unsigned long timeout_ms)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-140-{\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-148-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:149:int enic_mbox_send_link_state(struct enic enic, u16 vf_id, u32 link_state)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-150-{\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c=365=static void enic_mbox_vf_handle_unregister_reply(struct enic enic,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-387-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:388:static void enic_mbox_vf_handle_link_state(struct enic enic, void payload)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-389-{\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c=480=static void enic_mbox_recv_handler(struct enic enic, void buf,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-534-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:535:int enic_mbox_vf_capability_check(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-536-{\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-569-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:570:int enic_mbox_vf_register(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-571-{\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-598-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:599:int enic_mbox_vf_unregister(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-600-{\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-624-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:625:void enic_mbox_init(struct enic enic)\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-626-{\n" }
15/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 39238 output: 40 thoughts: 36 Thoughts: Okay, let's dive back in. My gut feeling tells me the answer lies within the mailbox processing. Revisiting enic_mbox.c I need to circle back to `enic_mbox.c`. I have a nagging feeling the core logic for processing messages is there, and I need to re-examine the `enic_mbox_pf_process_msg` and `enic_mbox_vf_process_msg` functions specifically. Time to refresh my memory on how the PF and VF mailboxes are handled. I need to make sure I'm not missing something crucial in their respective message processing flows. Let's see if a second look reveals any overlooked detail.
16/2	2026/06/29 18:42	tool	grepper	0m Args: { "Expression": "process_msg", "PathPrefix": "drivers/net/ethernet/cisco/enic/enic_mbox.c" } Results: { "Output": "drivers/net/ethernet/cisco/enic/enic_mbox.c=228=static int enic_mbox_pf_handle_unregister(struct enic enic, void msg,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-258-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:259:static void enic_mbox_pf_process_msg(struct enic enic,\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-260-\t\t\t\t struct enic_mbox_hdr hdr, void payload)\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c=419=static bool enic_mbox_vf_payload_ok(struct enic enic, u8 msg_type,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-430-\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:431:static void enic_mbox_vf_process_msg(struct enic enic,\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-432-\t\t\t\t struct enic_mbox_hdr hdr, void payload,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c=480=static void enic_mbox_recv_handler(struct enic enic, void buf,\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-518-\tif (enic-\u003evf_state) {\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:519:\t\tenic_mbox_pf_process_msg(enic, hdr, payload);\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-520-\t} else if (le16_to_cpu(hdr-\u003esrc_vnic_id) == ENIC_MBOX_DST_PF) {\n--\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-525-\t\t /\ndrivers/net/ethernet/cisco/enic/enic_mbox.c:526:\t\tenic_mbox_vf_process_msg(enic, hdr, payload,\ndrivers/net/ethernet/cisco/enic/enic_mbox.c-527-\t\t\t\t\t msg_len - (u16)sizeof(*hdr));\n" }
17/2	2026/06/29 18:42	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 40061 output: 212 thoughts: 488 Thoughts: Analyzing the Cisco VIC Ethernet NIC Driver Patch Alright, let's break this down. This patch is introducing some significant functional changes to the kernel, specifically targeting the Cisco VIC Ethernet NIC driver, `enic`. It looks like we're dealing with a new admin channel and mailbox protocol designed for communication between the Physical Function (PF) and Virtual Functions (VFs). Given this modification of core driver logic, this definitely warrants closer inspection and I'm thinking syzkaller's PCI fuzzing capabilities are going to be very relevant here. This is ripe for fuzzing. My primary focus, as always, is to identify the critical functions that handle this new PF-VF communication. Based on the documentation, the "FocusSymbols" are the key to unlocking this new functionality. Let's make sure I've got them all: * `enic_admin_channel_open` * `enic_admin_channel_close` * `enic_admin_wq_cq_service` * `enic_admin_rq_cq_service` * `enic_mbox_send_msg` * `enic_mbox_vf_capability_check` * `enic_mbox_vf_register` * `enic_mbox_vf_unregister` * `enic_mbox_recv_handler` * `enic_mbox_pf_process_msg` * `enic_mbox_vf_process_msg` Double-checking, it looks like `CONFIG_ENIC` and `CONFIG_PCI_IOV` are the necessary configurations to enable this. Let's make sure I'm using the right names. Yep, `PCI_IOV` is indeed the correct name for that feature. And `ENIC` is what enables the `enic` driver. Good, good. With this analysis complete, I'm confident in my understanding of the patch. Time to construct the set-results file to continue testing.
18/2	2026/06/29 18:42	tool	set-results	0m Args: { "EnableConfigs": [ "ENIC", "PCI_IOV" ], "FocusSymbols": [ "enic_admin_channel_open", "enic_admin_channel_close", "enic_admin_wq_cq_service", "enic_admin_rq_cq_service", "enic_mbox_send_msg", "enic_mbox_vf_capability_check", "enic_mbox_vf_register", "enic_mbox_vf_unregister", "enic_mbox_recv_handler", "enic_mbox_pf_process_msg", "enic_mbox_vf_process_msg" ], "Reasoning": "The patch introduces a new admin channel and mailbox protocol for PF-VF communication in the Cisco VIC Ethernet NIC driver (enic). This is a functional change that modifies reachable core driver logic and can be tested using syzkaller's PCI fuzzing capabilities.", "WorthFuzzing": true } Results: { "EnableConfigs": [ "ENIC", "PCI_IOV" ], "FocusSymbols": [ "enic_admin_channel_open", "enic_admin_channel_close", "enic_admin_wq_cq_service", "enic_admin_rq_cq_service", "enic_mbox_send_msg", "enic_mbox_vf_capability_check", "enic_mbox_vf_register", "enic_mbox_vf_unregister", "enic_mbox_recv_handler", "enic_mbox_pf_process_msg", "enic_mbox_vf_process_msg" ], "Reasoning": "The patch introduces a new admin channel and mailbox protocol for PF-VF communication in the Cisco VIC Ethernet NIC driver (enic). This is a functional change that modifies reachable core driver logic and can be tested using syzkaller's PCI fuzzing capabilities.", "WorthFuzzing": true }

{
  "PatchDiff": "commit 313bd531764a9bfa514ebc468739e3cdee960e6d\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate:   Mon Jun 29 18:42:06 2026 +0000\n\n    syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/ethernet/cisco/enic/Makefile b/drivers/net/ethernet/cisco/enic/Makefile\nindex a96b8332e6e2a8..e38aaf34c14839 100644\n--- a/drivers/net/ethernet/cisco/enic/Makefile\n+++ b/drivers/net/ethernet/cisco/enic/Makefile\n@@ -3,5 +3,6 @@ obj-$(CONFIG_ENIC) := enic.o\n \n enic-y := enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \\\n \tenic_res.o enic_dev.o enic_pp.o vnic_dev.o vnic_rq.o vnic_vic.o \\\n-\tenic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o\n+\tenic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o \\\n+\tenic_admin.o enic_mbox.o\n \ndiff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/cisco/enic/enic.h\nindex 08472420f3a1fd..62b8941489d773 100644\n--- a/drivers/net/ethernet/cisco/enic/enic.h\n+++ b/drivers/net/ethernet/cisco/enic/enic.h\n@@ -256,10 +256,10 @@ struct enic {\n \tstruct enic_rx_coal rx_coalesce_setting;\n \tu32 rx_coalesce_usecs;\n \tu32 tx_coalesce_usecs;\n-#ifdef CONFIG_PCI_IOV\n \tu16 num_vfs;\n-#endif\n \tenum enic_vf_type vf_type;\n+\tbool vf_registered;\n+\tu32 pf_cap_version;\n \tunsigned int enable_count;\n \tspinlock_t enic_api_lock;\n \tbool enic_api_busy;\n@@ -292,10 +292,45 @@ struct enic {\n \n \t/* Admin channel resources for SR-IOV MBOX */\n \tbool has_admin_channel;\n+\t/* true only while the admin WQ/RQ/CQ are allocated and enabled; gates\n+\t * enic_admin_channel_close() so it is a no-op after a failed (re)open\n+\t * left the resources freed.\n+\t */\n+\tbool admin_chan_up;\n+\t/* set on send timeout; cleared on channel re-open */\n+\tbool mbox_send_disabled;\n \tstruct vnic_wq admin_wq;\n \tstruct vnic_rq admin_rq;\n \tstruct vnic_cq admin_cq[2];\n \tstruct vnic_intr admin_intr;\n+\tstruct work_struct admin_poll_work;\n+\tunsigned int admin_intr_index;\n+\tstruct work_struct link_notify_work;\n+\tstruct work_struct admin_msg_work;\n+\tspinlock_t admin_msg_lock;\t/* protects admin_msg_list */\n+\tstruct list_head admin_msg_list;\n+\tunsigned int admin_msg_count;\t/* current depth of admin_msg_list */\n+\tvoid (*admin_rq_handler)(struct enic *enic, void *buf,\n+\t\t\t\t unsigned int len);\n+\n+\t/* MBOX protocol state — mbox_lock serializes admin WQ sends */\n+\tstruct mutex mbox_lock;\n+\tu64 mbox_msg_num;\n+\t/* MBOX request-reply state.  Written by the process-context request\n+\t * helpers (capability/register/unregister) and read/cleared by the\n+\t * admin_msg_work receive handlers.  No explicit lock is needed because\n+\t * only one request is in flight at a time: requesters run under RTNL or\n+\t * single-threaded probe/remove, so each request is serialized and its\n+\t * reply completes mbox_comp before the next request is issued.\n+\t */\n+\tstruct completion mbox_comp;\n+\tu8 mbox_expected_reply;\n+\tbool mbox_initialized;\n+\n+\t/* PF: per-VF MBOX state, allocated when SRIOV V2 is enabled */\n+\tstruct enic_vf_state {\n+\t\tbool registered;\n+\t} *vf_state;\n };\n \n static inline struct net_device *vnic_get_netdev(struct vnic_dev *vdev)\n@@ -417,6 +452,7 @@ void enic_reset_addr_lists(struct enic *enic);\n int enic_sriov_enabled(struct enic *enic);\n int enic_is_valid_vf(struct enic *enic, int vf);\n int enic_is_dynamic(struct enic *enic);\n+int enic_is_sriov_vf_v2(struct enic *enic);\n void enic_set_ethtool_ops(struct net_device *netdev);\n int __enic_set_rsskey(struct enic *enic);\n void enic_ext_cq(struct enic *enic);\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_admin.c b/drivers/net/ethernet/cisco/enic/enic_admin.c\nnew file mode 100644\nindex 00000000000000..242644fa2cbf90\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_admin.c\n@@ -0,0 +1,626 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+// Copyright 2025 Cisco Systems, Inc.  All rights reserved.\n+\n+#include \u003clinux/kernel.h\u003e\n+#include \u003clinux/netdevice.h\u003e\n+#include \u003clinux/dma-mapping.h\u003e\n+#include \u003clinux/interrupt.h\u003e\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_intr.h\"\n+#include \"vnic_resource.h\"\n+#include \"vnic_devcmd.h\"\n+#include \"enic.h\"\n+#include \"enic_admin.h\"\n+#include \"cq_desc.h\"\n+#include \"cq_enet_desc.h\"\n+#include \"wq_enet_desc.h\"\n+#include \"rq_enet_desc.h\"\n+#include \"enic_mbox.h\"\n+\n+/* Clean up any admin WQ buffers still held by hardware at close time.\n+ * Normally buffers are freed inline after send completion, but a timed-out\n+ * send intentionally leaves the buffer live until the queue is stopped.\n+ */\n+static void enic_admin_wq_buf_clean(struct vnic_wq *wq,\n+\t\t\t\t    struct vnic_wq_buf *buf)\n+{\n+\tstruct enic *enic = vnic_dev_priv(wq-\u003evdev);\n+\n+\tif (buf-\u003eos_buf) {\n+\t\tdma_unmap_single(\u0026enic-\u003epdev-\u003edev, buf-\u003edma_addr,\n+\t\t\t\t buf-\u003elen, DMA_TO_DEVICE);\n+\t\tkfree(buf-\u003eos_buf);\n+\t\tbuf-\u003eos_buf = NULL;\n+\t}\n+}\n+\n+static void enic_admin_rq_buf_clean(struct vnic_rq *rq,\n+\t\t\t\t    struct vnic_rq_buf *buf)\n+{\n+\tstruct enic *enic = vnic_dev_priv(rq-\u003evdev);\n+\n+\tif (!buf-\u003eos_buf)\n+\t\treturn;\n+\n+\tdma_unmap_single(\u0026enic-\u003epdev-\u003edev, buf-\u003edma_addr, buf-\u003elen,\n+\t\t\t DMA_FROM_DEVICE);\n+\tkfree(buf-\u003eos_buf);\n+\tbuf-\u003eos_buf = NULL;\n+}\n+\n+static int enic_admin_rq_post_one(struct enic *enic, gfp_t gfp)\n+{\n+\tstruct vnic_rq *rq = \u0026enic-\u003eadmin_rq;\n+\tstruct rq_enet_desc *desc;\n+\tdma_addr_t dma_addr;\n+\tvoid *buf;\n+\n+\tbuf = kmalloc(ENIC_ADMIN_BUF_SIZE, gfp);\n+\tif (!buf)\n+\t\treturn -ENOMEM;\n+\n+\tdma_addr = dma_map_single(\u0026enic-\u003epdev-\u003edev, buf, ENIC_ADMIN_BUF_SIZE,\n+\t\t\t\t  DMA_FROM_DEVICE);\n+\tif (dma_mapping_error(\u0026enic-\u003epdev-\u003edev, dma_addr)) {\n+\t\tkfree(buf);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tdesc = vnic_rq_next_desc(rq);\n+\trq_enet_desc_enc(desc, (u64)dma_addr | VNIC_PADDR_TARGET,\n+\t\t\t RQ_ENET_TYPE_ONLY_SOP, ENIC_ADMIN_BUF_SIZE);\n+\tvnic_rq_post(rq, buf, 0, dma_addr, ENIC_ADMIN_BUF_SIZE, 0);\n+\n+\treturn 0;\n+}\n+\n+static int enic_admin_rq_fill(struct enic *enic, gfp_t gfp)\n+{\n+\tstruct vnic_rq *rq = \u0026enic-\u003eadmin_rq;\n+\tint err;\n+\n+\twhile (vnic_rq_desc_avail(rq) \u003e 0) {\n+\t\terr = enic_admin_rq_post_one(enic, gfp);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void enic_admin_rq_drain(struct enic *enic)\n+{\n+\tvnic_rq_clean(\u0026enic-\u003eadmin_rq, enic_admin_rq_buf_clean);\n+}\n+\n+static unsigned int enic_admin_cq_color(void *cq_desc, unsigned int desc_size)\n+{\n+\tu8 type_color = *((u8 *)cq_desc + desc_size - 1);\n+\n+\treturn (type_color \u003e\u003e CQ_DESC_COLOR_SHIFT) \u0026 CQ_DESC_COLOR_MASK;\n+}\n+\n+unsigned int enic_admin_wq_cq_service(struct enic *enic)\n+{\n+\tstruct vnic_cq *cq = \u0026enic-\u003eadmin_cq[0];\n+\tunsigned int work = 0;\n+\tvoid *desc;\n+\n+\tdesc = vnic_cq_to_clean(cq);\n+\twhile (enic_admin_cq_color(desc, cq-\u003ering.desc_size) !=\n+\t       cq-\u003elast_color) {\n+\t\tvnic_cq_inc_to_clean(cq);\n+\t\twork++;\n+\t\tdesc = vnic_cq_to_clean(cq);\n+\t}\n+\n+\treturn work;\n+}\n+\n+/* Upper bound on pending admin messages.  A buggy or hostile VF could flood\n+ * the PF admin channel faster than admin_msg_work drains it; cap the backlog\n+ * so a guest cannot drive the host out of memory.\n+ */\n+#define ENIC_ADMIN_MSG_MAX\t256\n+\n+static void enic_admin_msg_enqueue(struct enic *enic, void *buf,\n+\t\t\t\t   unsigned int len)\n+{\n+\tstruct enic_admin_msg *msg;\n+\n+\tmsg = kmalloc(struct_size(msg, data, len), GFP_KERNEL);\n+\tif (!msg)\n+\t\treturn;\n+\n+\tmsg-\u003elen = len;\n+\tmemcpy(msg-\u003edata, buf, len);\n+\n+\tspin_lock(\u0026enic-\u003eadmin_msg_lock);\n+\tif (enic-\u003eadmin_msg_count \u003e= ENIC_ADMIN_MSG_MAX) {\n+\t\tspin_unlock(\u0026enic-\u003eadmin_msg_lock);\n+\t\tkfree(msg);\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"admin msg backlog full (%u); dropping\\n\",\n+\t\t\t\t    ENIC_ADMIN_MSG_MAX);\n+\t\treturn;\n+\t}\n+\tlist_add_tail(\u0026msg-\u003elist, \u0026enic-\u003eadmin_msg_list);\n+\tenic-\u003eadmin_msg_count++;\n+\tspin_unlock(\u0026enic-\u003eadmin_msg_lock);\n+}\n+\n+unsigned int enic_admin_rq_cq_service(struct enic *enic)\n+{\n+\tstruct vnic_cq *cq = \u0026enic-\u003eadmin_cq[1];\n+\tstruct vnic_rq *rq = \u0026enic-\u003eadmin_rq;\n+\tstruct cq_enet_rq_desc *rq_desc;\n+\tstruct vnic_rq_buf *buf;\n+\tu16 bwf, bytes_written;\n+\tunsigned int work = 0;\n+\tvoid *desc;\n+\n+\t/* The admin RQ and its CQ form a single in-order channel: firmware\n+\t * posts exactly one CQE per consumed RQ descriptor, in submission\n+\t * order.  Each CQE therefore pairs with rq-\u003eto_clean below without a\n+\t * completed_index cross-check, mirroring the in-order assumption of\n+\t * the main enic RX path.\n+\t */\n+\tdesc = vnic_cq_to_clean(cq);\n+\twhile (enic_admin_cq_color(desc, cq-\u003ering.desc_size) !=\n+\t       cq-\u003elast_color) {\n+\t\t/* Ensure DMA descriptor fields are read after\n+\t\t * the color/valid check.  dma_rmb() is the\n+\t\t * correct barrier for DMA-written descriptors.\n+\t\t */\n+\t\tdma_rmb();\n+\t\tbuf = rq-\u003eto_clean;\n+\n+\t\t/* Decode the actual number of bytes hardware wrote into\n+\t\t * the RX buffer.  buf-\u003elen is the static allocation size\n+\t\t * (ENIC_ADMIN_BUF_SIZE) and would expose uninitialised\n+\t\t * heap memory beyond the real payload.  bytes_written_flags\n+\t\t * is at the same offset in every cq_enet_rq_desc[_32|_64]\n+\t\t * variant.\n+\t\t */\n+\t\trq_desc = desc;\n+\t\tbwf = le16_to_cpu(rq_desc-\u003ebytes_written_flags);\n+\t\tbytes_written = bwf \u0026 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;\n+\t\tif (bytes_written \u003e buf-\u003elen)\n+\t\t\tgoto next_desc;\n+\n+\t\tdma_sync_single_for_cpu(\u0026enic-\u003epdev-\u003edev,\n+\t\t\t\t\tbuf-\u003edma_addr, buf-\u003elen,\n+\t\t\t\t\tDMA_FROM_DEVICE);\n+\n+\t\t/* Drop on hardware error indications.  Admin messages\n+\t\t * are internal to the VIC, not received over the wire.\n+\t\t * Firmware sets TRUNCATED when the message does not fit\n+\t\t * in the posted buffer, and FCS_OK is always set on\n+\t\t * healthy admin completions.\n+\t\t */\n+\t\tif (bwf \u0026 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) {\n+\t\t\tnetdev_warn_once(enic-\u003enetdev,\n+\t\t\t\t\t \"admin RQ: truncated message dropped\\n\");\n+\t\t\tgoto next_desc;\n+\t\t}\n+\t\tif (!(rq_desc-\u003eflags \u0026 CQ_ENET_RQ_DESC_FLAGS_FCS_OK)) {\n+\t\t\tnetdev_warn_once(enic-\u003enetdev,\n+\t\t\t\t\t \"admin RQ: bad FCS, dropping message\\n\");\n+\t\t\tgoto next_desc;\n+\t\t}\n+\n+\t\tif (enic-\u003eadmin_rq_handler) {\n+\t\t\tu16 sender_vlan;\n+\n+\t\t\t/* Firmware sets the CQ VLAN field to identify the\n+\t\t\t * sender: 0 = PF, 1-based = VF index.  Overwrite\n+\t\t\t * the untrusted src_vnic_id in the MBOX header with\n+\t\t\t * the hardware-verified value.\n+\t\t\t */\n+\t\t\tsender_vlan = le16_to_cpu(rq_desc-\u003evlan);\n+\t\t\tif (bytes_written \u003e= sizeof(struct enic_mbox_hdr)) {\n+\t\t\t\tstruct enic_mbox_hdr *hdr = buf-\u003eos_buf;\n+\n+\t\t\t\thdr-\u003esrc_vnic_id = (sender_vlan == 0) ?\n+\t\t\t\t\tcpu_to_le16(ENIC_MBOX_DST_PF) :\n+\t\t\t\t\tcpu_to_le16(sender_vlan - 1);\n+\t\t\t}\n+\n+\t\t\tenic_admin_msg_enqueue(enic, buf-\u003eos_buf,\n+\t\t\t\t\t       bytes_written);\n+\t\t}\n+\n+next_desc:\n+\t\tenic_admin_rq_buf_clean(rq, rq-\u003eto_clean);\n+\t\trq-\u003eto_clean = rq-\u003eto_clean-\u003enext;\n+\t\trq-\u003ering.desc_avail++;\n+\n+\t\tvnic_cq_inc_to_clean(cq);\n+\t\twork++;\n+\t\tdesc = vnic_cq_to_clean(cq);\n+\t}\n+\n+\tif (enic_admin_rq_fill(enic, GFP_KERNEL) \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"admin RQ refill failed\\n\");\n+\n+\treturn work;\n+}\n+\n+static irqreturn_t enic_admin_isr_msix(int irq, void *data)\n+{\n+\tstruct enic *enic = data;\n+\n+\tschedule_work(\u0026enic-\u003eadmin_poll_work);\n+\n+\treturn IRQ_HANDLED;\n+}\n+\n+static void enic_admin_msg_work_handler(struct work_struct *work)\n+{\n+\tstruct enic *enic = container_of(work, struct enic, admin_msg_work);\n+\tstruct enic_admin_msg *msg, *tmp;\n+\tLIST_HEAD(local_list);\n+\n+\tspin_lock_bh(\u0026enic-\u003eadmin_msg_lock);\n+\tlist_splice_init(\u0026enic-\u003eadmin_msg_list, \u0026local_list);\n+\tenic-\u003eadmin_msg_count = 0;\n+\tspin_unlock_bh(\u0026enic-\u003eadmin_msg_lock);\n+\n+\tlist_for_each_entry_safe(msg, tmp, \u0026local_list, list) {\n+\t\tif (enic-\u003eadmin_rq_handler)\n+\t\t\tenic-\u003eadmin_rq_handler(enic, msg-\u003edata, msg-\u003elen);\n+\t\tlist_del(\u0026msg-\u003elist);\n+\t\tkfree(msg);\n+\t}\n+}\n+\n+static void enic_admin_poll_work_handler(struct work_struct *work)\n+{\n+\tstruct enic *enic = container_of(work, struct enic, admin_poll_work);\n+\tunsigned int credits;\n+\tunsigned int rq_work;\n+\n+\tcredits = vnic_intr_credits(\u0026enic-\u003eadmin_intr);\n+\n+\trq_work = enic_admin_rq_cq_service(enic);\n+\n+\tif (rq_work \u003e 0)\n+\t\tschedule_work(\u0026enic-\u003eadmin_msg_work);\n+\n+\tvnic_intr_return_credits(\u0026enic-\u003eadmin_intr,\n+\t\t\t\t credits ?: 1,\n+\t\t\t\t 1 /* unmask */, 0);\n+}\n+\n+static int enic_admin_setup_intr(struct enic *enic)\n+{\n+\tunsigned int intr_index = enic-\u003eintr_count;\n+\tint err;\n+\n+\tif (vnic_dev_get_intr_mode(enic-\u003evdev) != VNIC_DEV_INTR_MODE_MSIX ||\n+\t    intr_index \u003e= enic-\u003eintr_avail)\n+\t\treturn -ENODEV;\n+\n+\t/* The admin INTR uses a slot in the same RES_TYPE_INTR_CTRL\n+\t * strided array of per-vector control blocks (mask, coalescing\n+\t * timer, credit return) that the data-path IRQs occupy in BAR0.\n+\t * vnic_intr_alloc() defaults to RES_TYPE_INTR_CTRL, which is what\n+\t * we want here.\n+\t */\n+\terr = vnic_intr_alloc(enic-\u003evdev, \u0026enic-\u003eadmin_intr, intr_index);\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"Failed to alloc admin intr at index %u: %d\\n\",\n+\t\t\t    intr_index, err);\n+\t\treturn err;\n+\t}\n+\n+\tenic-\u003eadmin_intr_index = intr_index;\n+\n+\t/* A V2 VF opens the admin channel during probe, before\n+\t * register_netdev() resolves the \"eth%d\" name template, so using\n+\t * netdev-\u003ename here would register the literal \"eth%d-admin\" in\n+\t * /proc/interrupts.  Use the already-stable PCI device name instead.\n+\t */\n+\tsnprintf(enic-\u003emsix[intr_index].devname,\n+\t\t sizeof(enic-\u003emsix[intr_index].devname),\n+\t\t \"%s-admin\", pci_name(enic-\u003epdev));\n+\tenic-\u003emsix[intr_index].isr = enic_admin_isr_msix;\n+\tenic-\u003emsix[intr_index].devid = enic;\n+\n+\terr = request_irq(enic-\u003emsix_entry[intr_index].vector,\n+\t\t\t  enic-\u003emsix[intr_index].isr, 0,\n+\t\t\t  enic-\u003emsix[intr_index].devname,\n+\t\t\t  enic-\u003emsix[intr_index].devid);\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"Failed to request admin MSI-X irq: %d\\n\", err);\n+\t\tvnic_intr_free(\u0026enic-\u003eadmin_intr);\n+\t\treturn err;\n+\t}\n+\n+\tenic-\u003emsix[intr_index].requested = 1;\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t   \"admin channel using MSI-X interrupt (index %u)\\n\",\n+\t\t   intr_index);\n+\n+\treturn 0;\n+}\n+\n+static void enic_admin_teardown_intr(struct enic *enic)\n+{\n+\tunsigned int intr_index = enic-\u003eadmin_intr_index;\n+\n+\tfree_irq(enic-\u003emsix_entry[intr_index].vector,\n+\t\t enic-\u003emsix[intr_index].devid);\n+\tcancel_work_sync(\u0026enic-\u003eadmin_poll_work);\n+\tenic-\u003emsix[intr_index].requested = 0;\n+}\n+\n+static int enic_admin_qp_type_set(struct enic *enic, u32 enable)\n+{\n+\tu64 a0 = QP_TYPE_ADMIN, a1 = enable;\n+\tint wait = 1000;\n+\tint err;\n+\n+\tspin_lock_bh(\u0026enic-\u003edevcmd_lock);\n+\terr = vnic_dev_cmd(enic-\u003evdev, CMD_QP_TYPE_SET, \u0026a0, \u0026a1, wait);\n+\tspin_unlock_bh(\u0026enic-\u003edevcmd_lock);\n+\n+\treturn err;\n+}\n+\n+static int enic_admin_alloc_resources(struct enic *enic)\n+{\n+\tint err;\n+\n+\terr = vnic_wq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_wq, 0,\n+\t\t\t\t      ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t      sizeof(struct wq_enet_desc),\n+\t\t\t\t      RES_TYPE_ADMIN_WQ);\n+\tif (err)\n+\t\treturn err;\n+\n+\terr = vnic_rq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_rq, 0,\n+\t\t\t\t      ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t      sizeof(struct rq_enet_desc),\n+\t\t\t\t      RES_TYPE_ADMIN_RQ);\n+\tif (err)\n+\t\tgoto free_wq;\n+\n+\t/* admin_cq[0] is the WQ completion queue.  WQ CQEs are always\n+\t * 16 bytes wide; firmware always writes 16-byte CQEs for WQ\n+\t * completions on every WQ, including the admin channel WQ.\n+\t * Use sizeof(struct cq_desc) accordingly.\n+\t */\n+\terr = vnic_cq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_cq[0], 0,\n+\t\t\t\t      ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t      sizeof(struct cq_desc),\n+\t\t\t\t      RES_TYPE_ADMIN_CQ);\n+\tif (err)\n+\t\tgoto free_rq;\n+\n+\t/* admin_cq[1] is the RQ completion queue.  Its descriptor size\n+\t * must match what firmware writes.  enic_ext_cq() called earlier\n+\t * in probe issues CMD_CQ_ENTRY_SIZE_SET for VNIC_RQ_ALL,\n+\t * programming firmware to write CQ entries of (16 \u003c\u003c enic-\u003eext_cq)\n+\t * bytes for every RQ CQ on the vNIC, including the admin RQ CQ.\n+\t * Allocating with the same size keeps the host poller and\n+\t * firmware in lockstep:\n+\t *\n+\t *   - The color/valid bit lives at byte (desc_size - 1) of every\n+\t *     cq_enet_rq_desc[_32|_64] variant, so enic_admin_cq_color()\n+\t *     reads it from the correct offset.\n+\t *   - Only the first 15 bytes of the descriptor (vlan,\n+\t *     bytes_written_flags, ...) are accessed by the admin path;\n+\t *     these fields are identical across all three variants (see\n+\t *     comment in enic_rq.c above cq_enet_rq_desc_dec()).\n+\t */\n+\terr = vnic_cq_alloc_with_type(enic-\u003evdev, \u0026enic-\u003eadmin_cq[1], 1,\n+\t\t\t\t      ENIC_ADMIN_DESC_COUNT,\n+\t\t\t\t      16 \u003c\u003c enic-\u003eext_cq,\n+\t\t\t\t      RES_TYPE_ADMIN_CQ);\n+\tif (err)\n+\t\tgoto free_cq0;\n+\n+\treturn 0;\n+\n+free_cq0:\n+\tvnic_cq_free(\u0026enic-\u003eadmin_cq[0]);\n+free_rq:\n+\tvnic_rq_free(\u0026enic-\u003eadmin_rq);\n+free_wq:\n+\tvnic_wq_free(\u0026enic-\u003eadmin_wq);\n+\treturn err;\n+}\n+\n+static void enic_admin_free_resources(struct enic *enic)\n+{\n+\tvnic_intr_free(\u0026enic-\u003eadmin_intr);\n+\tvnic_cq_free(\u0026enic-\u003eadmin_cq[1]);\n+\tvnic_cq_free(\u0026enic-\u003eadmin_cq[0]);\n+\tvnic_rq_free(\u0026enic-\u003eadmin_rq);\n+\tvnic_wq_free(\u0026enic-\u003eadmin_wq);\n+}\n+\n+static void enic_admin_init_resources(struct enic *enic)\n+{\n+\tunsigned int intr_offset = enic-\u003eadmin_intr_index;\n+\n+\tvnic_wq_init(\u0026enic-\u003eadmin_wq,\n+\t\t     0, 0, 0); /* cq_index, err_intr_enable, err_intr_offset */\n+\tvnic_rq_init(\u0026enic-\u003eadmin_rq,\n+\t\t     1, 0, 0); /* cq_index, err_intr_enable, err_intr_offset */\n+\tvnic_cq_init(\u0026enic-\u003eadmin_cq[0],\n+\t\t     VNIC_CQ_FC_DISABLE,\n+\t\t     VNIC_CQ_COLOR_ENABLE,\n+\t\t     0, 0, 1, /* cq_head, cq_tail, cq_tail_color */\n+\t\t     VNIC_CQ_INTR_DISABLE, /* polled synchronously by mbox send */\n+\t\t     VNIC_CQ_ENTRY_ENABLE,\n+\t\t     VNIC_CQ_MSG_DISABLE,\n+\t\t     intr_offset,\n+\t\t     0 /* cq_message_addr */);\n+\tvnic_cq_init(\u0026enic-\u003eadmin_cq[1],\n+\t\t     VNIC_CQ_FC_DISABLE,\n+\t\t     VNIC_CQ_COLOR_ENABLE,\n+\t\t     0, 0, 1, /* cq_head, cq_tail, cq_tail_color */\n+\t\t     VNIC_CQ_INTR_ENABLE,\n+\t\t     VNIC_CQ_ENTRY_ENABLE,\n+\t\t     VNIC_CQ_MSG_DISABLE,\n+\t\t     intr_offset,\n+\t\t     0 /* cq_message_addr */);\n+\t/* coalescing_timer, coalescing_type, mask_on_assertion */\n+\tvnic_intr_init(\u0026enic-\u003eadmin_intr,\n+\t\t       0, 0, 1);\n+}\n+\n+static void enic_admin_msg_drain(struct enic *enic)\n+{\n+\tstruct enic_admin_msg *msg, *tmp;\n+\n+\tspin_lock_bh(\u0026enic-\u003eadmin_msg_lock);\n+\tlist_for_each_entry_safe(msg, tmp, \u0026enic-\u003eadmin_msg_list, list) {\n+\t\tlist_del(\u0026msg-\u003elist);\n+\t\tkfree(msg);\n+\t}\n+\tenic-\u003eadmin_msg_count = 0;\n+\tspin_unlock_bh(\u0026enic-\u003eadmin_msg_lock);\n+}\n+\n+int enic_admin_channel_open(struct enic *enic)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003ehas_admin_channel)\n+\t\treturn -ENODEV;\n+\n+\terr = enic_admin_alloc_resources(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"Failed to alloc admin channel resources: %d\\n\",\n+\t\t\t   err);\n+\t\treturn err;\n+\t}\n+\n+\tspin_lock_init(\u0026enic-\u003eadmin_msg_lock);\n+\tINIT_LIST_HEAD(\u0026enic-\u003eadmin_msg_list);\n+\tINIT_WORK(\u0026enic-\u003eadmin_msg_work, enic_admin_msg_work_handler);\n+\tINIT_WORK(\u0026enic-\u003eadmin_poll_work, enic_admin_poll_work_handler);\n+\n+\terr = enic_admin_setup_intr(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"Admin channel requires MSI-X, SR-IOV unavailable: %d\\n\",\n+\t\t\t   err);\n+\t\tgoto free_resources;\n+\t}\n+\n+\tenic_admin_init_resources(enic);\n+\n+\tvnic_wq_enable(\u0026enic-\u003eadmin_wq);\n+\tvnic_rq_enable(\u0026enic-\u003eadmin_rq);\n+\n+\terr = enic_admin_rq_fill(enic, GFP_KERNEL);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"Failed to fill admin RQ buffers: %d\\n\", err);\n+\t\tgoto disable_queues;\n+\t}\n+\n+\terr = enic_admin_qp_type_set(enic, QP_ENABLE);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"Failed to set admin QP type: %d\\n\", err);\n+\t\tgoto disable_queues;\n+\t}\n+\n+\tvnic_intr_unmask(\u0026enic-\u003eadmin_intr);\n+\n+\t/* Only now that the admin WQ/RQ/CQ and interrupt are fully allocated,\n+\t * programmed and enabled is it safe to allow MBOX sends.  Clearing this\n+\t * earlier opened a window where a concurrent sender (e.g. link-notify\n+\t * work scheduled by a post-reset link-up) could call enic_mbox_send_msg()\n+\t * against a not-yet-allocated admin_wq and crash.\n+\t */\n+\tWRITE_ONCE(enic-\u003embox_send_disabled, false);\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t   \"admin channel open: intr=%u wq_avail=%u rq_avail=%u cq0_color=%u cq1_color=%u\\n\",\n+\t\t   enic-\u003eadmin_intr_index,\n+\t\t   vnic_wq_desc_avail(\u0026enic-\u003eadmin_wq),\n+\t\t   vnic_rq_desc_avail(\u0026enic-\u003eadmin_rq),\n+\t\t   enic-\u003eadmin_cq[0].last_color,\n+\t\t   enic-\u003eadmin_cq[1].last_color);\n+\n+\tenic-\u003eadmin_chan_up = true;\n+\n+\treturn 0;\n+\n+disable_queues:\n+\tenic_admin_teardown_intr(enic);\n+\tenic_admin_qp_type_set(enic, QP_DISABLE);\n+\tif (vnic_wq_disable(\u0026enic-\u003eadmin_wq))\n+\t\tnetdev_warn(enic-\u003enetdev, \"Failed to disable admin WQ\\n\");\n+\tif (vnic_rq_disable(\u0026enic-\u003eadmin_rq))\n+\t\tnetdev_warn(enic-\u003enetdev, \"Failed to disable admin RQ\\n\");\n+\tcancel_work_sync(\u0026enic-\u003eadmin_msg_work);\n+\tenic_admin_msg_drain(enic);\n+\tenic_admin_rq_drain(enic);\n+free_resources:\n+\tenic_admin_free_resources(enic);\n+\treturn err;\n+}\n+\n+void enic_admin_channel_close(struct enic *enic)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003ehas_admin_channel)\n+\t\treturn;\n+\n+\t/* Nothing to tear down if the channel was never (re)opened, e.g. a\n+\t * failed enic_admin_channel_open() in probe or in the reset path;\n+\t * otherwise the disable/clean calls below dereference freed resources.\n+\t */\n+\tif (!enic-\u003eadmin_chan_up)\n+\t\treturn;\n+\n+\tWRITE_ONCE(enic-\u003embox_send_disabled, true);\n+\n+\tnetdev_dbg(enic-\u003enetdev, \"admin channel close\\n\");\n+\n+\tvnic_intr_mask(\u0026enic-\u003eadmin_intr);\n+\tenic_admin_teardown_intr(enic);\n+\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\n+\tcancel_work_sync(\u0026enic-\u003eadmin_msg_work);\n+\tenic_admin_msg_drain(enic);\n+\n+\tenic_admin_qp_type_set(enic, QP_DISABLE);\n+\n+\terr = vnic_wq_disable(\u0026enic-\u003eadmin_wq);\n+\tif (err)\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"Failed to disable admin WQ: %d\\n\", err);\n+\terr = vnic_rq_disable(\u0026enic-\u003eadmin_rq);\n+\tif (err)\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"Failed to disable admin RQ: %d\\n\", err);\n+\n+\tvnic_wq_clean(\u0026enic-\u003eadmin_wq, enic_admin_wq_buf_clean);\n+\tenic_admin_rq_drain(enic);\n+\tvnic_cq_clean(\u0026enic-\u003eadmin_cq[0]);\n+\tvnic_cq_clean(\u0026enic-\u003eadmin_cq[1]);\n+\tvnic_intr_clean(\u0026enic-\u003eadmin_intr);\n+\n+\tenic-\u003eadmin_rq_handler = NULL;\n+\tenic_admin_free_resources(enic);\n+\n+\tenic-\u003eadmin_chan_up = false;\n+}\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_admin.h b/drivers/net/ethernet/cisco/enic/enic_admin.h\nnew file mode 100644\nindex 00000000000000..62c80220b0cacc\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_admin.h\n@@ -0,0 +1,27 @@\n+/* SPDX-License-Identifier: GPL-2.0-only */\n+/* Copyright 2025 Cisco Systems, Inc.  All rights reserved. */\n+\n+#ifndef _ENIC_ADMIN_H_\n+#define _ENIC_ADMIN_H_\n+\n+#define ENIC_ADMIN_DESC_COUNT\t64\n+#define ENIC_ADMIN_BUF_SIZE\t2048\n+\n+struct enic;\n+\n+/* Wrapper for received admin messages queued for deferred processing.\n+ * The admin CQ poll work handler enqueues these; a separate work handler\n+ * processes them where sleeping (mutex, GFP_KERNEL) is safe.\n+ */\n+struct enic_admin_msg {\n+\tstruct list_head list;\n+\tunsigned int len;\n+\tu8 data[] __aligned(8);\n+};\n+\n+int enic_admin_channel_open(struct enic *enic);\n+void enic_admin_channel_close(struct enic *enic);\n+unsigned int enic_admin_wq_cq_service(struct enic *enic);\n+unsigned int enic_admin_rq_cq_service(struct enic *enic);\n+\n+#endif /* _ENIC_ADMIN_H_ */\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c\nindex e7125b81808799..de90332dc40cc7 100644\n--- a/drivers/net/ethernet/cisco/enic/enic_main.c\n+++ b/drivers/net/ethernet/cisco/enic/enic_main.c\n@@ -60,6 +60,8 @@\n #include \"enic_clsf.h\"\n #include \"enic_rq.h\"\n #include \"enic_wq.h\"\n+#include \"enic_admin.h\"\n+#include \"enic_mbox.h\"\n \n #define ENIC_NOTIFY_TIMER_PERIOD\t(2 * HZ)\n \n@@ -314,6 +316,11 @@ static int enic_is_sriov_vf(struct enic *enic)\n \t       enic-\u003epdev-\u003edevice == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2;\n }\n \n+int enic_is_sriov_vf_v2(struct enic *enic)\n+{\n+\treturn enic-\u003epdev-\u003edevice == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2;\n+}\n+\n int enic_is_valid_vf(struct enic *enic, int vf)\n {\n #ifdef CONFIG_PCI_IOV\n@@ -411,6 +418,24 @@ static void enic_set_rx_coal_setting(struct enic *enic)\n \trx_coal-\u003euse_adaptive_rx_coalesce = 1;\n }\n \n+static void enic_link_notify_work_handler(struct work_struct *work)\n+{\n+\tstruct enic *enic = container_of(work, struct enic,\n+\t\t\t\t\t link_notify_work);\n+\tu32 state;\n+\tu16 i;\n+\n+\tif (!enic_sriov_enabled(enic) || !enic-\u003evf_state)\n+\t\treturn;\n+\n+\tstate = netif_carrier_ok(enic-\u003enetdev) ?\n+\t\tENIC_MBOX_LINK_STATE_ENABLE :\n+\t\tENIC_MBOX_LINK_STATE_DISABLE;\n+\n+\tfor (i = 0; i \u003c enic-\u003enum_vfs; i++)\n+\t\tenic_mbox_send_link_state(enic, i, state);\n+}\n+\n static void enic_link_check(struct enic *enic)\n {\n \tint link_status = vnic_dev_link_status(enic-\u003evdev);\n@@ -420,9 +445,13 @@ static void enic_link_check(struct enic *enic)\n \t\tnetdev_info(enic-\u003enetdev, \"Link UP\\n\");\n \t\tnetif_carrier_on(enic-\u003enetdev);\n \t\tenic_set_rx_coal_setting(enic);\n+\t\tif (enic_sriov_enabled(enic) \u0026\u0026 enic-\u003evf_state)\n+\t\t\tschedule_work(\u0026enic-\u003elink_notify_work);\n \t} else if (!link_status \u0026\u0026 carrier_ok) {\n \t\tnetdev_info(enic-\u003enetdev, \"Link DOWN\\n\");\n \t\tnetif_carrier_off(enic-\u003enetdev);\n+\t\tif (enic_sriov_enabled(enic) \u0026\u0026 enic-\u003evf_state)\n+\t\t\tschedule_work(\u0026enic-\u003elink_notify_work);\n \t}\n }\n \n@@ -2142,6 +2171,57 @@ static void enic_set_api_busy(struct enic *enic, bool busy)\n \tspin_unlock(\u0026enic-\u003eenic_api_lock);\n }\n \n+/* The admin/MBOX channel exists on a V2 PF while SR-IOV is enabled and on\n+ * every V2 VF.  A reset wipes the admin WQ/RQ/CQ, so such devices must tear\n+ * the channel down before the reset and re-establish it afterwards.\n+ */\n+static bool enic_has_admin_chan(struct enic *enic)\n+{\n+\treturn enic_is_sriov_vf_v2(enic) ||\n+\t       (enic_sriov_enabled(enic) \u0026\u0026 enic-\u003evf_type == ENIC_VF_TYPE_V2);\n+}\n+\n+/* Re-establish the admin/MBOX channel after a reset has re-created the data\n+ * path.  Mirrors the relevant part of the probe / SR-IOV-enable sequence:\n+ * reopen the channel and reinitialise MBOX, then for a VF re-run the PF\n+ * handshake (its admin QP and PF-side registration were torn down by the\n+ * reset), or for a PF re-push the current link state to registered VFs.\n+ */\n+static void enic_admin_chan_reopen(struct enic *enic)\n+{\n+\tint err;\n+\n+\terr = enic_admin_channel_open(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"admin channel reopen after reset failed: %d\\n\", err);\n+\t\treturn;\n+\t}\n+\n+\tenic_mbox_init(enic);\n+\n+\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\terr = enic_mbox_vf_capability_check(enic);\n+\t\tif (err) {\n+\t\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t\t   \"MBOX capability check after reset failed: %d\\n\",\n+\t\t\t\t   err);\n+\t\t\treturn;\n+\t\t}\n+\t\terr = enic_mbox_vf_register(enic);\n+\t\tif (err)\n+\t\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t\t   \"MBOX VF re-registration after reset failed: %d\\n\",\n+\t\t\t\t   err);\n+\t} else {\n+\t\t/* The link came back up during enic_open() above while MBOX\n+\t\t * sends were still disabled (channel not yet reopened), so that\n+\t\t * link-notify was dropped.  Re-push current link state now.\n+\t\t */\n+\t\tschedule_work(\u0026enic-\u003elink_notify_work);\n+\t}\n+}\n+\n static void enic_reset(struct work_struct *work)\n {\n \tstruct enic *enic = container_of(work, struct enic, reset);\n@@ -2154,15 +2234,34 @@ static void enic_reset(struct work_struct *work)\n \t/* Stop any activity from infiniband */\n \tenic_set_api_busy(enic, true);\n \n+\t/* Fully tear down the V2 admin/MBOX channel before the soft reset.\n+\t * The reset wipes all hardware queues including the admin WQ/RQ;\n+\t * closing first tells firmware to stop the admin QP (so it no longer\n+\t * DMAs from the about-to-be-reset rings) and frees the admin resources\n+\t * so they are cleanly re-allocated afterwards.\n+\t */\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_channel_close(enic);\n+\n \tenic_stop(enic-\u003enetdev);\n+\n \tenic_dev_soft_reset(enic);\n \tenic_reset_addr_lists(enic);\n \tenic_init_vnic_resources(enic);\n \tenic_set_rss_nic_cfg(enic);\n \tenic_dev_set_ig_vlan_rewrite_mode(enic);\n \tenic_ext_cq(enic);\n+\n \tenic_open(enic-\u003enetdev);\n \n+\t/* Re-establish the admin/MBOX channel after the data path is back up.\n+\t * It was fully torn down by enic_admin_channel_close() above;\n+\t * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link\n+\t * state, or for a VF re-runs the probe-time PF handshake.\n+\t */\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_chan_reopen(enic);\n+\n \t/* Allow infiniband to fiddle with the device again */\n \tenic_set_api_busy(enic, false);\n \n@@ -2180,16 +2279,33 @@ static void enic_tx_hang_reset(struct work_struct *work)\n \t/* Stop any activity from infiniband */\n \tenic_set_api_busy(enic, true);\n \n+\t/* Fully tear down the V2 admin/MBOX channel before the hang reset, for\n+\t * the same reason as the soft reset path: stop the admin QP and free\n+\t * the admin resources before the hardware queues are wiped.\n+\t */\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_channel_close(enic);\n+\n \tenic_dev_hang_notify(enic);\n \tenic_stop(enic-\u003enetdev);\n+\n \tenic_dev_hang_reset(enic);\n \tenic_reset_addr_lists(enic);\n \tenic_init_vnic_resources(enic);\n \tenic_set_rss_nic_cfg(enic);\n \tenic_dev_set_ig_vlan_rewrite_mode(enic);\n \tenic_ext_cq(enic);\n+\n \tenic_open(enic-\u003enetdev);\n \n+\t/* Re-establish the admin/MBOX channel after the data path is back up.\n+\t * It was fully torn down by enic_admin_channel_close() above;\n+\t * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link\n+\t * state, or for a VF re-runs the probe-time PF handshake.\n+\t */\n+\tif (enic_has_admin_chan(enic))\n+\t\tenic_admin_chan_reopen(enic);\n+\n \t/* Allow infiniband to fiddle with the device again */\n \tenic_set_api_busy(enic, false);\n \n@@ -2200,6 +2316,8 @@ static void enic_tx_hang_reset(struct work_struct *work)\n \n static int enic_set_intr_mode(struct enic *enic)\n {\n+\tunsigned int admin_reserve = enic-\u003ehas_admin_channel ? 1 : 0;\n+\tunsigned int min_intr = ENIC_MSIX_MIN_INTR + admin_reserve;\n \tunsigned int i;\n \tint num_intr;\n \n@@ -2210,12 +2328,12 @@ static int enic_set_intr_mode(struct enic *enic)\n \t */\n \n \tif (enic-\u003econfig.intr_mode \u003c 1 \u0026\u0026\n-\t    enic-\u003eintr_avail \u003e= ENIC_MSIX_MIN_INTR) {\n+\t    enic-\u003eintr_avail \u003e= min_intr) {\n \t\tfor (i = 0; i \u003c enic-\u003eintr_avail; i++)\n \t\t\tenic-\u003emsix_entry[i].entry = i;\n \n \t\tnum_intr = pci_enable_msix_range(enic-\u003epdev, enic-\u003emsix_entry,\n-\t\t\t\t\t\t ENIC_MSIX_MIN_INTR,\n+\t\t\t\t\t\t min_intr,\n \t\t\t\t\t\t enic-\u003eintr_avail);\n \t\tif (num_intr \u003e 0) {\n \t\t\tvnic_dev_set_intr_mode(enic-\u003evdev,\n@@ -2310,16 +2428,27 @@ static int enic_adjust_resources(struct enic *enic)\n \t\tenic-\u003ecq_count = 2;\n \t\tenic-\u003eintr_count = enic-\u003eintr_avail;\n \t\tbreak;\n-\tcase VNIC_DEV_INTR_MODE_MSIX:\n+\tcase VNIC_DEV_INTR_MODE_MSIX: {\n \t\t/* Adjust the number of wqs/rqs/cqs/interrupts that will be\n-\t\t * used based on which resource is the most constrained\n+\t\t * used based on which resource is the most constrained.\n+\t\t * Reserve one extra MSI-X slot for the admin channel INTR\n+\t\t * when has_admin_channel is set so that\n+\t\t * enic_admin_setup_intr() can allocate at intr_count\n+\t\t * within the intr_avail bounds even when the data queue\n+\t\t * count is maxed out.  intr_count counts only the data-path\n+\t\t * IRQs (registered by enic_request_intr()); the admin INTR\n+\t\t * lives at msix index intr_count and is set up later by\n+\t\t * enic_admin_setup_intr().\n \t\t */\n+\t\tunsigned int admin_reserve = enic-\u003ehas_admin_channel ? 1 : 0;\n+\n \t\twq_avail = min(enic-\u003ewq_avail, ENIC_WQ_MAX);\n \t\trq_default = max(netif_get_num_default_rss_queues(),\n \t\t\t\t ENIC_RQ_MIN_DEFAULT);\n \t\trq_avail = min3(enic-\u003erq_avail, ENIC_RQ_MAX, rq_default);\n \t\tmax_queues = min(enic-\u003ecq_avail,\n-\t\t\t\t enic-\u003eintr_avail - ENIC_MSIX_RESERVED_INTR);\n+\t\t\t\t enic-\u003eintr_avail - ENIC_MSIX_RESERVED_INTR -\n+\t\t\t\t admin_reserve);\n \t\tif (wq_avail + rq_avail \u003c= max_queues) {\n \t\t\tenic-\u003erq_count = rq_avail;\n \t\t\tenic-\u003ewq_count = wq_avail;\n@@ -2337,6 +2466,7 @@ static int enic_adjust_resources(struct enic *enic)\n \t\tenic-\u003eintr_count = enic-\u003ecq_count + ENIC_MSIX_RESERVED_INTR;\n \n \t\tbreak;\n+\t}\n \tdefault:\n \t\tdev_err(enic_get_dev(enic), \"Unknown interrupt mode\\n\");\n \t\treturn -EINVAL;\n@@ -2641,8 +2771,10 @@ static void enic_iounmap(struct enic *enic)\n static void enic_sriov_detect_vf_type(struct enic *enic)\n {\n \tstruct pci_dev *pdev = enic-\u003epdev;\n-\tint pos;\n+\tu64 supported_versions, a1 = 0;\n \tu16 vf_dev_id;\n+\tint pos;\n+\tint err;\n \n \tif (enic_is_sriov_vf(enic) || enic_is_dynamic(enic))\n \t\treturn;\n@@ -2669,6 +2801,149 @@ static void enic_sriov_detect_vf_type(struct enic *enic)\n \t\tenic-\u003evf_type = ENIC_VF_TYPE_NONE;\n \t\tbreak;\n \t}\n+\n+\tif (enic-\u003evf_type != ENIC_VF_TYPE_V2)\n+\t\treturn;\n+\n+\t/* A successful command means firmware recognizes\n+\t * VIC_FEATURE_SRIOV; supported_versions is available\n+\t * for sub-feature versioning in the future.\n+\t */\n+\terr = vnic_dev_get_supported_feature_ver(enic-\u003evdev,\n+\t\t\t\t\t\t VIC_FEATURE_SRIOV,\n+\t\t\t\t\t\t \u0026supported_versions,\n+\t\t\t\t\t\t \u0026a1);\n+\tif (err) {\n+\t\tdev_warn(\u0026pdev-\u003edev,\n+\t\t\t \"SR-IOV V2 not supported by current firmware. Upgrade to VIC FW 5.3(4.72) or higher.\\n\");\n+\t\tenic-\u003evf_type = ENIC_VF_TYPE_NONE;\n+\t}\n+}\n+\n+static int __maybe_unused\n+enic_sriov_v2_enable(struct enic *enic, int num_vfs)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003ehas_admin_channel) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"V2 SR-IOV requires admin channel resources\\n\");\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\tenic-\u003evf_state = kcalloc(num_vfs, sizeof(*enic-\u003evf_state), GFP_KERNEL);\n+\tif (!enic-\u003evf_state)\n+\t\treturn -ENOMEM;\n+\n+\terr = enic_admin_channel_open(enic);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"Failed to open admin channel: %d\\n\", err);\n+\t\tgoto free_vf_state;\n+\t}\n+\n+\tenic_mbox_init(enic);\n+\n+\tenic-\u003enum_vfs = num_vfs;\n+\n+\terr = pci_enable_sriov(enic-\u003epdev, num_vfs);\n+\tif (err) {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"pci_enable_sriov failed: %d\\n\", err);\n+\t\tgoto close_admin;\n+\t}\n+\n+\tenic-\u003epriv_flags |= ENIC_SRIOV_ENABLED;\n+\treturn num_vfs;\n+\n+close_admin:\n+\tenic-\u003enum_vfs = 0;\n+\tenic_admin_channel_close(enic);\n+free_vf_state:\n+\tkfree(enic-\u003evf_state);\n+\tenic-\u003evf_state = NULL;\n+\treturn err;\n+}\n+\n+static void enic_sriov_v2_disable(struct enic *enic)\n+{\n+\t/* Stop new VF link-state broadcasts before tearing down vf_state.\n+\t * Clearing ENIC_SRIOV_ENABLED makes enic_link_check() (called from\n+\t * the notify timer/ISR) skip the VF notify path, and cancelling\n+\t * link_notify_work ensures any already-queued broadcast has finished\n+\t * before vf_state is freed, closing a use-after-free window.\n+\t */\n+\tenic-\u003epriv_flags \u0026= ~ENIC_SRIOV_ENABLED;\n+\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\n+\n+\tpci_disable_sriov(enic-\u003epdev);\n+\tenic_admin_channel_close(enic);\n+\tkfree(enic-\u003evf_state);\n+\tenic-\u003evf_state = NULL;\n+\tenic-\u003enum_vfs = 0;\n+}\n+\n+static int __maybe_unused\n+enic_sriov_configure(struct pci_dev *pdev, int num_vfs)\n+{\n+\tstruct net_device *netdev = pci_get_drvdata(pdev);\n+\tstruct enic *enic = netdev_priv(netdev);\n+\tstruct enic_port_profile *pp;\n+\tint err;\n+\n+\tif (num_vfs \u003e 0) {\n+\t\tif (enic-\u003econfig.mq_subvnic_count) {\n+\t\t\tnetdev_err(netdev,\n+\t\t\t\t   \"SR-IOV not supported with multi-queue sub-vnics\\n\");\n+\t\t\treturn -EOPNOTSUPP;\n+\t\t}\n+\n+\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_NONE) {\n+\t\t\tnetdev_err(netdev,\n+\t\t\t\t   \"SR-IOV not supported on this firmware version\\n\");\n+\t\t\treturn -EOPNOTSUPP;\n+\t\t}\n+\n+\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2)\n+\t\t\treturn enic_sriov_v2_enable(enic, num_vfs);\n+\n+\t\tpp = kcalloc(num_vfs, sizeof(*pp), GFP_KERNEL);\n+\t\tif (!pp)\n+\t\t\treturn -ENOMEM;\n+\n+\t\terr = pci_enable_sriov(pdev, num_vfs);\n+\t\tif (err) {\n+\t\t\tkfree(pp);\n+\t\t\treturn err;\n+\t\t}\n+\n+\t\tkfree(enic-\u003epp);\n+\t\tenic-\u003epp = pp;\n+\t\tenic-\u003enum_vfs = num_vfs;\n+\t\tenic-\u003epriv_flags |= ENIC_SRIOV_ENABLED;\n+\t\treturn num_vfs;\n+\t}\n+\n+\tif (!enic_sriov_enabled(enic))\n+\t\treturn 0;\n+\n+\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2) {\n+\t\tenic_sriov_v2_disable(enic);\n+\t\treturn 0;\n+\t}\n+\n+\tpp = kzalloc_obj(*enic-\u003epp, GFP_KERNEL);\n+\tif (!pp)\n+\t\treturn -ENOMEM;\n+\n+\tpci_disable_sriov(pdev);\n+\tenic-\u003enum_vfs = 0;\n+\tenic-\u003epriv_flags \u0026= ~ENIC_SRIOV_ENABLED;\n+\n+\tkfree(enic-\u003epp);\n+\tenic-\u003epp = pp;\n+\n+\treturn 0;\n }\n #endif\n \n@@ -2768,12 +3043,18 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\tgoto err_out_vnic_unregister;\n \n #ifdef CONFIG_PCI_IOV\n-\t/* Get number of subvnics */\n+\tenic_sriov_detect_vf_type(enic);\n+\n+\t/* Auto-enable SR-IOV if VFs were pre-configured (e.g. at boot).\n+\t * V2 VFs require the admin channel, which is not yet set up at probe\n+\t * time; use sysfs (enic_sriov_configure) to enable V2 SR-IOV instead.\n+\t */\n \tpos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);\n \tif (pos) {\n \t\tpci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,\n \t\t\t\u0026enic-\u003enum_vfs);\n-\t\tif (enic-\u003enum_vfs) {\n+\t\tif (enic-\u003enum_vfs \u0026\u0026\n+\t\t    enic-\u003evf_type != ENIC_VF_TYPE_V2) {\n \t\t\terr = pci_enable_sriov(pdev, enic-\u003enum_vfs);\n \t\t\tif (err) {\n \t\t\t\tdev_err(dev, \"SRIOV enable failed, aborting.\"\n@@ -2785,7 +3066,6 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\t\tnum_pps = enic-\u003enum_vfs;\n \t\t}\n \t}\n-\tenic_sriov_detect_vf_type(enic);\n #endif\n \n \t/* Allocate structure for port profiles */\n@@ -2850,6 +3130,44 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\tgoto err_out_dev_close;\n \t}\n \n+\t/* Initialise link_notify_work before the V2-VF admin-open block below:\n+\t * its error path (err_out_admin_close -\u003e enic_admin_channel_close() -\u003e\n+\t * cancel_work_sync()) would otherwise act on an uninitialised work.\n+\t */\n+\tINIT_WORK(\u0026enic-\u003elink_notify_work, enic_link_notify_work_handler);\n+\n+\t/* V2 VF: open admin channel and register with PF.\n+\t * Must happen before register_netdev so the VF is fully\n+\t * initialized before the interface is visible to userspace.\n+\t *\n+\t * admin_channel_open() runs before enic_mbox_init() installs\n+\t * the receive handler.  This is safe because\n+\t * enic_admin_rq_cq_service() checks admin_rq_handler before\n+\t * enqueuing any received buffer, so interrupts that fire\n+\t * between open and mbox_init are harmlessly discarded.\n+\t */\n+\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\terr = enic_admin_channel_open(enic);\n+\t\tif (err) {\n+\t\t\tdev_err(dev,\n+\t\t\t\t\"Failed to open admin channel: %d\\n\", err);\n+\t\t\tgoto err_out_dev_deinit;\n+\t\t}\n+\t\tenic_mbox_init(enic);\n+\t\terr = enic_mbox_vf_capability_check(enic);\n+\t\tif (err) {\n+\t\t\tdev_err(dev,\n+\t\t\t\t\"MBOX capability check failed: %d\\n\", err);\n+\t\t\tgoto err_out_admin_close;\n+\t\t}\n+\t\terr = enic_mbox_vf_register(enic);\n+\t\tif (err) {\n+\t\t\tdev_err(dev,\n+\t\t\t\t\"MBOX VF registration failed: %d\\n\", err);\n+\t\t\tgoto err_out_admin_close;\n+\t\t}\n+\t}\n+\n \tnetif_set_real_num_tx_queues(netdev, enic-\u003ewq_count);\n \tnetif_set_real_num_rx_queues(netdev, enic-\u003erq_count);\n \n@@ -2874,7 +3192,7 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \terr = enic_set_mac_addr(netdev, enic-\u003emac_addr);\n \tif (err) {\n \t\tdev_err(dev, \"Invalid MAC address, aborting\\n\");\n-\t\tgoto err_out_dev_deinit;\n+\t\tgoto err_out_admin_close;\n \t}\n \n \tenic-\u003etx_coalesce_usecs = enic-\u003econfig.intr_timer_usec;\n@@ -2972,11 +3290,23 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \terr = register_netdev(netdev);\n \tif (err) {\n \t\tdev_err(dev, \"Cannot register net device, aborting\\n\");\n-\t\tgoto err_out_dev_deinit;\n+\t\tgoto err_out_admin_close;\n \t}\n \n \treturn 0;\n \n+err_out_admin_close:\n+\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\tif (enic-\u003evf_registered) {\n+\t\t\tint unreg_err = enic_mbox_vf_unregister(enic);\n+\n+\t\t\tif (unreg_err)\n+\t\t\t\tnetdev_warn(netdev,\n+\t\t\t\t\t    \"Failed to unregister from PF: %d\\n\",\n+\t\t\t\t\t    unreg_err);\n+\t\t}\n+\t\tenic_admin_channel_close(enic);\n+\t}\n err_out_dev_deinit:\n \tenic_dev_deinit(enic);\n err_out_dev_close:\n@@ -3012,16 +3342,42 @@ static void enic_remove(struct pci_dev *pdev)\n \t\tstruct enic *enic = netdev_priv(netdev);\n \n \t\tcancel_work_sync(\u0026enic-\u003ereset);\n+\t\tcancel_work_sync(\u0026enic-\u003etx_hang_reset);\n \t\tcancel_work_sync(\u0026enic-\u003echange_mtu_work);\n+\n+\t\t/* Close the admin channel and unregister from the PF before\n+\t\t * unregister_netdev() to prevent a late PF notification from\n+\t\t * touching a netdev that has been freed.\n+\t\t */\n+\t\tif (enic_is_sriov_vf_v2(enic)) {\n+\t\t\tif (enic-\u003evf_registered) {\n+\t\t\t\tint unreg_err = enic_mbox_vf_unregister(enic);\n+\n+\t\t\t\tif (unreg_err)\n+\t\t\t\t\tnetdev_warn(netdev,\n+\t\t\t\t\t\t    \"Failed to unregister from PF: %d\\n\",\n+\t\t\t\t\t\t    unreg_err);\n+\t\t\t}\n+\t\t\tenic_admin_channel_close(enic);\n+\t\t}\n+\n \t\tunregister_netdev(netdev);\n-\t\tenic_dev_deinit(enic);\n-\t\tvnic_dev_close(enic-\u003evdev);\n+\t\t/* unregister_netdev() -\u003e enic_stop() stops the notify timer, so\n+\t\t * no new link_notify_work can be queued past this point.  Cancel\n+\t\t * unconditionally to cover the narrow window where\n+\t\t * enic_link_check() scheduled it just as SR-IOV was disabled.\n+\t\t */\n+\t\tcancel_work_sync(\u0026enic-\u003elink_notify_work);\n #ifdef CONFIG_PCI_IOV\n \t\tif (enic_sriov_enabled(enic)) {\n-\t\t\tpci_disable_sriov(pdev);\n-\t\t\tenic-\u003epriv_flags \u0026= ~ENIC_SRIOV_ENABLED;\n+\t\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2)\n+\t\t\t\tenic_sriov_v2_disable(enic);\n+\t\t\telse\n+\t\t\t\tpci_disable_sriov(pdev);\n \t\t}\n #endif\n+\t\tenic_dev_deinit(enic);\n+\t\tvnic_dev_close(enic-\u003evdev);\n \t\tkfree(enic-\u003epp);\n \t\tvnic_dev_unregister(enic-\u003evdev);\n \t\tenic_iounmap(enic);\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.c b/drivers/net/ethernet/cisco/enic/enic_mbox.c\nnew file mode 100644\nindex 00000000000000..5cdaf5a0e52467\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_mbox.c\n@@ -0,0 +1,640 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+// Copyright 2025 Cisco Systems, Inc.  All rights reserved.\n+\n+#include \u003clinux/kernel.h\u003e\n+#include \u003clinux/netdevice.h\u003e\n+#include \u003clinux/dma-mapping.h\u003e\n+#include \u003clinux/delay.h\u003e\n+#include \u003clinux/completion.h\u003e\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_cq.h\"\n+#include \"enic.h\"\n+#include \"enic_admin.h\"\n+#include \"enic_mbox.h\"\n+#include \"wq_enet_desc.h\"\n+\n+#define ENIC_MBOX_POLL_TIMEOUT_US\t5000000\n+#define ENIC_MBOX_POLL_INTERVAL_US\t100\n+\n+static void enic_mbox_fill_hdr(struct enic *enic, struct enic_mbox_hdr *hdr,\n+\t\t\t       u8 msg_type, u16 dst_vnic_id, u16 msg_len)\n+{\n+\tmemset(hdr, 0, sizeof(*hdr));\n+\thdr-\u003edst_vnic_id = cpu_to_le16(dst_vnic_id);\n+\thdr-\u003emsg_type = msg_type;\n+\thdr-\u003emsg_len = cpu_to_le16(msg_len);\n+\thdr-\u003emsg_num = cpu_to_le64(++enic-\u003embox_msg_num);\n+}\n+\n+int enic_mbox_send_msg(struct enic *enic, u8 msg_type, u16 dst_vnic_id,\n+\t\t       void *payload, u16 payload_len)\n+{\n+\tu16 total_len = sizeof(struct enic_mbox_hdr) + payload_len;\n+\tstruct vnic_wq *wq = \u0026enic-\u003eadmin_wq;\n+\tstruct wq_enet_desc *desc;\n+\tunsigned long timeout;\n+\tdma_addr_t dma_addr;\n+\tu16 vlan_tag;\n+\tvoid *buf;\n+\tint err;\n+\n+\t/* Serialize MBOX sends. The admin channel is a low-frequency\n+\t * control path; holding the mutex across the poll is acceptable.\n+\t */\n+\tmutex_lock(\u0026enic-\u003embox_lock);\n+\n+\tif (!enic-\u003ehas_admin_channel || READ_ONCE(enic-\u003embox_send_disabled)) {\n+\t\terr = -ENODEV;\n+\t\tgoto unlock;\n+\t}\n+\n+\tif (vnic_wq_desc_avail(wq) == 0) {\n+\t\terr = -ENOSPC;\n+\t\tgoto unlock;\n+\t}\n+\n+\tbuf = kmalloc(total_len, GFP_KERNEL);\n+\tif (!buf) {\n+\t\terr = -ENOMEM;\n+\t\tgoto unlock;\n+\t}\n+\n+\tenic_mbox_fill_hdr(enic, buf, msg_type, dst_vnic_id, total_len);\n+\tif (payload_len) {\n+\t\tvoid *dst = buf + sizeof(struct enic_mbox_hdr);\n+\n+\t\tmemcpy(dst, payload, payload_len);\n+\t}\n+\n+\tdma_addr = dma_map_single(\u0026enic-\u003epdev-\u003edev, buf, total_len,\n+\t\t\t\t  DMA_TO_DEVICE);\n+\tif (dma_mapping_error(\u0026enic-\u003epdev-\u003edev, dma_addr)) {\n+\t\tkfree(buf);\n+\t\terr = -ENOMEM;\n+\t\tgoto unlock;\n+\t}\n+\n+\t/* Firmware uses vlan field for routing: 0 = PF, 1-based = VF index */\n+\tif (dst_vnic_id == ENIC_MBOX_DST_PF)\n+\t\tvlan_tag = 0;\n+\telse\n+\t\tvlan_tag = dst_vnic_id + 1;\n+\n+\tdesc = vnic_wq_next_desc(wq);\n+\twq_enet_desc_enc(desc, (u64)dma_addr | VNIC_PADDR_TARGET,\n+\t\t\t total_len,\n+\t\t\t 0, 0, 0,       /* mss, hdr_len, offload_mode */\n+\t\t\t 1, 1,          /* eop, cq_entry */\n+\t\t\t 0,             /* fcoe_encap */\n+\t\t\t 1, vlan_tag,   /* vlan_tag_insert, vlan_tag */\n+\t\t\t 0);            /* loopback */\n+\tvnic_wq_post(wq, buf, dma_addr, total_len,\n+\t\t     1, 1,              /* sop, eop */\n+\t\t     1, 1,              /* desc_skip_cnt, cq_entry */\n+\t\t     0, 0);             /* compressed_send, wrid */\n+\tvnic_wq_doorbell(wq);\n+\n+\ttimeout = jiffies + usecs_to_jiffies(ENIC_MBOX_POLL_TIMEOUT_US);\n+\terr = -ETIMEDOUT;\n+\twhile (time_before(jiffies, timeout)) {\n+\t\tif (enic_admin_wq_cq_service(enic)) {\n+\t\t\terr = 0;\n+\t\t\tbreak;\n+\t\t}\n+\t\tusleep_range(ENIC_MBOX_POLL_INTERVAL_US,\n+\t\t\t     ENIC_MBOX_POLL_INTERVAL_US + 50);\n+\t}\n+\t/* Final check in case completion arrived during the last sleep */\n+\tif (err \u0026\u0026 enic_admin_wq_cq_service(enic))\n+\t\terr = 0;\n+\n+\tif (!err) {\n+\t\twq-\u003eto_clean = wq-\u003eto_clean-\u003enext;\n+\t\twq-\u003ering.desc_avail++;\n+\t\tdma_unmap_single(\u0026enic-\u003epdev-\u003edev, dma_addr, total_len,\n+\t\t\t\t DMA_TO_DEVICE);\n+\t\tkfree(buf);\n+\t} else {\n+\t\tnetdev_err(enic-\u003enetdev,\n+\t\t\t   \"MBOX send timed out (type %u dst %u), disabling channel\\n\",\n+\t\t\t   msg_type, dst_vnic_id);\n+\t\t/*\n+\t\t * The WQ descriptor is still live in hardware. Do not unmap\n+\t\t * or free the buffer: the device may still DMA from dma_addr.\n+\t\t * Mark the channel unusable so no further sends are attempted.\n+\t\t */\n+\t\tWRITE_ONCE(enic-\u003embox_send_disabled, true);\n+\t}\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t   \"MBOX send msg_type %u dst %u vlan %u err %d\\n\",\n+\t\t   msg_type, dst_vnic_id, vlan_tag, err);\n+unlock:\n+\tmutex_unlock(\u0026enic-\u003embox_lock);\n+\treturn err;\n+}\n+\n+static int enic_mbox_wait_reply(struct enic *enic, unsigned long timeout_ms)\n+{\n+\tunsigned long left;\n+\n+\tleft = wait_for_completion_timeout(\u0026enic-\u003embox_comp,\n+\t\t\t\t\t   msecs_to_jiffies(timeout_ms));\n+\n+\treturn left ? 0 : -ETIMEDOUT;\n+}\n+\n+int enic_mbox_send_link_state(struct enic *enic, u16 vf_id, u32 link_state)\n+{\n+\tstruct enic_mbox_pf_link_state_notif_msg notif = {};\n+\n+\tif (!enic-\u003evf_state || vf_id \u003e= enic-\u003enum_vfs ||\n+\t    !enic-\u003evf_state[vf_id].registered) {\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t   \"MBOX: skip link state to unregistered VF %u\\n\",\n+\t\t\t   vf_id);\n+\t\treturn 0;\n+\t}\n+\n+\tnotif.link_state = cpu_to_le32(link_state);\n+\treturn enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_NOTIF, vf_id,\n+\t\t\t\t  \u0026notif, sizeof(notif));\n+}\n+\n+static int enic_mbox_pf_handle_capability(struct enic *enic, void *msg,\n+\t\t\t\t\t  u16 vf_id, u64 msg_num)\n+{\n+\tstruct enic_mbox_vf_capability_reply_msg reply = {};\n+\n+\treply.reply.ret_major = cpu_to_le16(0);\n+\treply.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1);\n+\n+\treturn enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REPLY, vf_id,\n+\t\t\t\t  \u0026reply, sizeof(reply));\n+}\n+\n+static int enic_mbox_pf_handle_register(struct enic *enic, void *msg,\n+\t\t\t\t\tu16 vf_id, u64 msg_num)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg reply = {};\n+\tu32 link_state;\n+\tint err;\n+\n+\tif (!enic-\u003evf_state || vf_id \u003e= enic-\u003enum_vfs) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: register from invalid VF %u\\n\",\n+\t\t\t\t    vf_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* VF re-registering (e.g. guest reboot without clean unregister):\n+\t * mark the previous registration inactive before accepting the new one.\n+\t */\n+\tif (enic-\u003evf_state[vf_id].registered) {\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t   \"MBOX: VF %u re-register, cleaning previous state\\n\",\n+\t\t\t   vf_id);\n+\t\tenic-\u003evf_state[vf_id].registered = false;\n+\t}\n+\n+\treply.reply.ret_major = cpu_to_le16(0);\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REPLY, vf_id,\n+\t\t\t\t \u0026reply, sizeof(reply));\n+\tif (err)\n+\t\treturn err;\n+\n+\tenic-\u003evf_state[vf_id].registered = true;\n+\tif (net_ratelimit())\n+\t\tnetdev_info(enic-\u003enetdev, \"VF %u registered via MBOX\\n\", vf_id);\n+\n+\tlink_state = netif_carrier_ok(enic-\u003enetdev) ?\n+\t\tENIC_MBOX_LINK_STATE_ENABLE :\n+\t\tENIC_MBOX_LINK_STATE_DISABLE;\n+\terr = enic_mbox_send_link_state(enic, vf_id, link_state);\n+\tif (err \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"VF %u: failed to send initial link state: %d\\n\",\n+\t\t\t    vf_id, err);\n+\t/* Registration succeeded; initial link state notification sent\n+\t * above.  Subsequent link state changes are sent from the PF\n+\t * when enic_link_check() detects carrier changes.\n+\t */\n+\treturn 0;\n+}\n+\n+static int enic_mbox_pf_handle_unregister(struct enic *enic, void *msg,\n+\t\t\t\t\t  u16 vf_id, u64 msg_num)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg reply = {};\n+\tint err;\n+\n+\tif (!enic-\u003evf_state || vf_id \u003e= enic-\u003enum_vfs) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: unregister from invalid VF %u\\n\",\n+\t\t\t\t    vf_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* VF is unloading; clear local state regardless of whether\n+\t * the reply is successfully delivered to avoid the PF treating\n+\t * a dead VF as still registered.\n+\t */\n+\tenic-\u003evf_state[vf_id].registered = false;\n+\n+\treply.reply.ret_major = cpu_to_le16(0);\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REPLY, vf_id,\n+\t\t\t\t \u0026reply, sizeof(reply));\n+\n+\tif (net_ratelimit())\n+\t\tnetdev_info(enic-\u003enetdev,\n+\t\t\t    \"VF %u unregistered via MBOX\\n\", vf_id);\n+\n+\treturn err;\n+}\n+\n+static void enic_mbox_pf_process_msg(struct enic *enic,\n+\t\t\t\t     struct enic_mbox_hdr *hdr, void *payload)\n+{\n+\tu16 vf_id = le16_to_cpu(hdr-\u003esrc_vnic_id);\n+\tu16 msg_len = le16_to_cpu(hdr-\u003emsg_len);\n+\tint err = 0;\n+\n+\tif (!enic-\u003evf_state) {\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t   \"MBOX: PF received msg but SRIOV not active\\n\");\n+\t\treturn;\n+\t}\n+\n+\tif (vf_id \u003e= enic-\u003enum_vfs) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: PF received msg from invalid VF %u\\n\",\n+\t\t\t\t    vf_id);\n+\t\treturn;\n+\t}\n+\n+\tswitch (hdr-\u003emsg_type) {\n+\tcase ENIC_MBOX_VF_CAPABILITY_REQUEST:\n+\t\terr = enic_mbox_pf_handle_capability(enic, payload, vf_id,\n+\t\t\t\t\t\t     le64_to_cpu(hdr-\u003emsg_num));\n+\t\tbreak;\n+\tcase ENIC_MBOX_VF_REGISTER_REQUEST:\n+\t\terr = enic_mbox_pf_handle_register(enic, payload, vf_id,\n+\t\t\t\t\t\t   le64_to_cpu(hdr-\u003emsg_num));\n+\t\tbreak;\n+\tcase ENIC_MBOX_VF_UNREGISTER_REQUEST:\n+\t\terr = enic_mbox_pf_handle_unregister(enic, payload, vf_id,\n+\t\t\t\t\t\t     le64_to_cpu(hdr-\u003emsg_num));\n+\t\tbreak;\n+\tcase ENIC_MBOX_PF_LINK_STATE_ACK: {\n+\t\tstruct enic_mbox_pf_link_state_ack_msg *ack = payload;\n+\n+\t\tif (msg_len \u003c sizeof(*hdr) + sizeof(*ack))\n+\t\t\tbreak;\n+\t\tif (le16_to_cpu(ack-\u003eack.ret_major) \u0026\u0026 net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: VF %u link state ACK error %u/%u\\n\",\n+\t\t\t\t    vf_id,\n+\t\t\t\t    le16_to_cpu(ack-\u003eack.ret_major),\n+\t\t\t\t    le16_to_cpu(ack-\u003eack.ret_minor));\n+\t\tbreak;\n+\t}\n+\tdefault:\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t   \"MBOX: PF unhandled msg type %u from VF %u\\n\",\n+\t\t\t   hdr-\u003emsg_type, vf_id);\n+\t\terr = -EOPNOTSUPP;\n+\t\tbreak;\n+\t}\n+\n+\tif (err \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: PF handler for msg type %u from VF %u failed: %d\\n\",\n+\t\t\t    hdr-\u003emsg_type, vf_id, err);\n+}\n+\n+static void enic_mbox_vf_handle_capability_reply(struct enic *enic,\n+\t\t\t\t\t\t void *payload)\n+{\n+\tstruct enic_mbox_vf_capability_reply_msg *reply = payload;\n+\n+\tif (enic-\u003embox_expected_reply != ENIC_MBOX_VF_CAPABILITY_REPLY) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: stale capability reply (expected %u), drop\\n\",\n+\t\t\t    enic-\u003embox_expected_reply);\n+\t\treturn;\n+\t}\n+\n+\tif (le16_to_cpu(reply-\u003ereply.ret_major) == 0)\n+\t\tenic-\u003epf_cap_version = le32_to_cpu(reply-\u003eversion);\n+\telse\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: PF rejected capability request: %u/%u\\n\",\n+\t\t\t    le16_to_cpu(reply-\u003ereply.ret_major),\n+\t\t\t    le16_to_cpu(reply-\u003ereply.ret_minor));\n+\tcomplete(\u0026enic-\u003embox_comp);\n+}\n+\n+static void enic_mbox_vf_handle_register_reply(struct enic *enic,\n+\t\t\t\t\t       void *payload)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg *reply = payload;\n+\n+\tif (enic-\u003embox_expected_reply != ENIC_MBOX_VF_REGISTER_REPLY) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: stale register reply (expected %u), drop\\n\",\n+\t\t\t    enic-\u003embox_expected_reply);\n+\t\treturn;\n+\t}\n+\n+\tif (le16_to_cpu(reply-\u003ereply.ret_major)) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: VF register rejected by PF: %u/%u\\n\",\n+\t\t\t    le16_to_cpu(reply-\u003ereply.ret_major),\n+\t\t\t    le16_to_cpu(reply-\u003ereply.ret_minor));\n+\t} else {\n+\t\tenic-\u003evf_registered = true;\n+\t}\n+\tcomplete(\u0026enic-\u003embox_comp);\n+}\n+\n+static void enic_mbox_vf_handle_unregister_reply(struct enic *enic,\n+\t\t\t\t\t\t void *payload)\n+{\n+\tstruct enic_mbox_vf_register_reply_msg *reply = payload;\n+\n+\tif (enic-\u003embox_expected_reply != ENIC_MBOX_VF_UNREGISTER_REPLY) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: stale unregister reply (expected %u), drop\\n\",\n+\t\t\t    enic-\u003embox_expected_reply);\n+\t\treturn;\n+\t}\n+\n+\tif (le16_to_cpu(reply-\u003ereply.ret_major)) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: VF unregister rejected by PF: %u/%u\\n\",\n+\t\t\t    le16_to_cpu(reply-\u003ereply.ret_major),\n+\t\t\t    le16_to_cpu(reply-\u003ereply.ret_minor));\n+\t} else {\n+\t\tenic-\u003evf_registered = false;\n+\t}\n+\tcomplete(\u0026enic-\u003embox_comp);\n+}\n+\n+static void enic_mbox_vf_handle_link_state(struct enic *enic, void *payload)\n+{\n+\tstruct enic_mbox_pf_link_state_notif_msg *notif = payload;\n+\tstruct enic_mbox_pf_link_state_ack_msg ack = {};\n+\tint err;\n+\n+\tswitch (le32_to_cpu(notif-\u003elink_state)) {\n+\tcase ENIC_MBOX_LINK_STATE_ENABLE:\n+\t\tif (!netif_carrier_ok(enic-\u003enetdev))\n+\t\t\tnetif_carrier_on(enic-\u003enetdev);\n+\t\tnetdev_dbg(enic-\u003enetdev, \"MBOX: link state -\u003e UP\\n\");\n+\t\tbreak;\n+\tcase ENIC_MBOX_LINK_STATE_DISABLE:\n+\t\tif (netif_carrier_ok(enic-\u003enetdev))\n+\t\t\tnetif_carrier_off(enic-\u003enetdev);\n+\t\tnetdev_dbg(enic-\u003enetdev, \"MBOX: link state -\u003e DOWN\\n\");\n+\t\tbreak;\n+\tdefault:\n+\t\tnetdev_warn(enic-\u003enetdev, \"MBOX: unknown link state %u\\n\",\n+\t\t\t    le32_to_cpu(notif-\u003elink_state));\n+\t\tack.ack.ret_major = cpu_to_le16(ENIC_MBOX_ERR_GENERIC);\n+\t\tbreak;\n+\t}\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_ACK,\n+\t\t\t\t ENIC_MBOX_DST_PF, \u0026ack, sizeof(ack));\n+\tif (err \u0026\u0026 net_ratelimit())\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: failed to send link state ACK: %d\\n\", err);\n+}\n+\n+static bool enic_mbox_vf_payload_ok(struct enic *enic, u8 msg_type,\n+\t\t\t\t    u16 payload_len, size_t min_len)\n+{\n+\tif (payload_len \u003c min_len) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: short payload for type %u (%u \u003c %zu)\\n\",\n+\t\t\t    msg_type, payload_len, min_len);\n+\t\treturn false;\n+\t}\n+\treturn true;\n+}\n+\n+static void enic_mbox_vf_process_msg(struct enic *enic,\n+\t\t\t\t     struct enic_mbox_hdr *hdr, void *payload,\n+\t\t\t\t     u16 payload_len)\n+{\n+\tswitch (hdr-\u003emsg_type) {\n+\tcase ENIC_MBOX_VF_CAPABILITY_REPLY: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_vf_capability_reply_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t     payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_capability_reply(enic, payload);\n+\t\tbreak;\n+\t}\n+\tcase ENIC_MBOX_VF_REGISTER_REPLY: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_vf_register_reply_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t     payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_register_reply(enic, payload);\n+\t\tbreak;\n+\t}\n+\tcase ENIC_MBOX_VF_UNREGISTER_REPLY: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_vf_register_reply_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t     payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_unregister_reply(enic, payload);\n+\t\tbreak;\n+\t}\n+\tcase ENIC_MBOX_PF_LINK_STATE_NOTIF: {\n+\t\tsize_t exp = sizeof(struct enic_mbox_pf_link_state_notif_msg);\n+\n+\t\tif (!enic_mbox_vf_payload_ok(enic, hdr-\u003emsg_type,\n+\t\t\t\t\t     payload_len, exp))\n+\t\t\treturn;\n+\t\tenic_mbox_vf_handle_link_state(enic, payload);\n+\t\tbreak;\n+\t}\n+\tdefault:\n+\t\tnetdev_dbg(enic-\u003enetdev,\n+\t\t\t   \"MBOX: VF unhandled msg type %u\\n\",\n+\t\t\t   hdr-\u003emsg_type);\n+\t\tbreak;\n+\t}\n+}\n+\n+static void enic_mbox_recv_handler(struct enic *enic, void *buf,\n+\t\t\t\t   unsigned int len)\n+{\n+\tstruct enic_mbox_hdr *hdr = buf;\n+\tvoid *payload;\n+\tu16 msg_len;\n+\n+\tif (len \u003c sizeof(*hdr)) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: truncated message (len %u \u003c %zu)\\n\",\n+\t\t\t\t    len, sizeof(*hdr));\n+\t\treturn;\n+\t}\n+\n+\tif (hdr-\u003emsg_type \u003e= ENIC_MBOX_MAX) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: unknown msg type %u\\n\",\n+\t\t\t\t    hdr-\u003emsg_type);\n+\t\treturn;\n+\t}\n+\n+\tmsg_len = le16_to_cpu(hdr-\u003emsg_len);\n+\tif (msg_len \u003c sizeof(*hdr) || msg_len \u003e len) {\n+\t\tif (net_ratelimit())\n+\t\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t\t    \"MBOX: invalid msg_len %u (buf len %u)\\n\",\n+\t\t\t\t    msg_len, len);\n+\t\treturn;\n+\t}\n+\n+\tnetdev_dbg(enic-\u003enetdev,\n+\t\t   \"MBOX recv: type %u from vnic %u len %u\\n\",\n+\t\t   hdr-\u003emsg_type, le16_to_cpu(hdr-\u003esrc_vnic_id), msg_len);\n+\n+\tpayload = buf + sizeof(*hdr);\n+\n+\tif (enic-\u003evf_state) {\n+\t\tenic_mbox_pf_process_msg(enic, hdr, payload);\n+\t} else if (le16_to_cpu(hdr-\u003esrc_vnic_id) == ENIC_MBOX_DST_PF) {\n+\t\t/* src_vnic_id was overwritten from the hardware-verified CQ\n+\t\t * VLAN sender field, so a VF only accepts messages that the\n+\t\t * adapter attributes to the PF.  Its sole admin-channel peer is\n+\t\t * the PF; drop anything else as a spoofed notification.\n+\t\t */\n+\t\tenic_mbox_vf_process_msg(enic, hdr, payload,\n+\t\t\t\t\t msg_len - (u16)sizeof(*hdr));\n+\t} else if (net_ratelimit()) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: VF dropping non-PF message from vnic %u\\n\",\n+\t\t\t    le16_to_cpu(hdr-\u003esrc_vnic_id));\n+\t}\n+}\n+\n+int enic_mbox_vf_capability_check(struct enic *enic)\n+{\n+\tstruct enic_mbox_vf_capability_msg req = {};\n+\tint err;\n+\n+\tenic-\u003epf_cap_version = 0;\n+\treinit_completion(\u0026enic-\u003embox_comp);\n+\tenic-\u003embox_expected_reply = ENIC_MBOX_VF_CAPABILITY_REPLY;\n+\treq.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1);\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REQUEST,\n+\t\t\t\t ENIC_MBOX_DST_PF, \u0026req, sizeof(req));\n+\tif (err) {\n+\t\tenic-\u003embox_expected_reply = 0;\n+\t\treturn err;\n+\t}\n+\n+\terr = enic_mbox_wait_reply(enic, 3000);\n+\tenic-\u003embox_expected_reply = 0;\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: no capability reply from PF\\n\");\n+\t\treturn err;\n+\t}\n+\n+\tif (enic-\u003epf_cap_version \u003c ENIC_MBOX_CAP_VERSION_1) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: PF version %u too old\\n\",\n+\t\t\t    enic-\u003epf_cap_version);\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int enic_mbox_vf_register(struct enic *enic)\n+{\n+\tint err;\n+\n+\tenic-\u003evf_registered = false;\n+\treinit_completion(\u0026enic-\u003embox_comp);\n+\tenic-\u003embox_expected_reply = ENIC_MBOX_VF_REGISTER_REPLY;\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REQUEST,\n+\t\t\t\t ENIC_MBOX_DST_PF, NULL, 0);\n+\tif (err) {\n+\t\tenic-\u003embox_expected_reply = 0;\n+\t\treturn err;\n+\t}\n+\n+\terr = enic_mbox_wait_reply(enic, 3000);\n+\tenic-\u003embox_expected_reply = 0;\n+\tif (err) {\n+\t\tnetdev_warn(enic-\u003enetdev,\n+\t\t\t    \"MBOX: VF registration with PF timed out\\n\");\n+\t\treturn err;\n+\t}\n+\n+\tif (!enic-\u003evf_registered)\n+\t\treturn -ENODEV;\n+\n+\treturn 0;\n+}\n+\n+int enic_mbox_vf_unregister(struct enic *enic)\n+{\n+\tint err;\n+\n+\tif (!enic-\u003evf_registered)\n+\t\treturn 0;\n+\n+\treinit_completion(\u0026enic-\u003embox_comp);\n+\tenic-\u003embox_expected_reply = ENIC_MBOX_VF_UNREGISTER_REPLY;\n+\n+\terr = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REQUEST,\n+\t\t\t\t ENIC_MBOX_DST_PF, NULL, 0);\n+\tif (err) {\n+\t\tenic-\u003embox_expected_reply = 0;\n+\t\treturn err;\n+\t}\n+\n+\terr = enic_mbox_wait_reply(enic, 3000);\n+\tenic-\u003embox_expected_reply = 0;\n+\tif (err)\n+\t\treturn err;\n+\tif (enic-\u003evf_registered)\n+\t\treturn -EACCES;\n+\treturn 0;\n+}\n+\n+void enic_mbox_init(struct enic *enic)\n+{\n+\t/* mbox_lock and mbox_comp must be initialized exactly once per\n+\t * device lifetime; the PF sriov_configure path can re-enter this\n+\t * on each enable cycle where these primitives are already set up.\n+\t */\n+\tif (!enic-\u003embox_initialized) {\n+\t\tmutex_init(\u0026enic-\u003embox_lock);\n+\t\tinit_completion(\u0026enic-\u003embox_comp);\n+\t\tenic-\u003embox_initialized = true;\n+\t} else {\n+\t\treinit_completion(\u0026enic-\u003embox_comp);\n+\t}\n+\tenic-\u003embox_msg_num = 0;\n+\tenic-\u003eadmin_rq_handler = enic_mbox_recv_handler;\n+}\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.h b/drivers/net/ethernet/cisco/enic/enic_mbox.h\nnew file mode 100644\nindex 00000000000000..15e30ee2b0ed95\n--- /dev/null\n+++ b/drivers/net/ethernet/cisco/enic/enic_mbox.h\n@@ -0,0 +1,95 @@\n+/* SPDX-License-Identifier: GPL-2.0-only */\n+/* Copyright 2025 Cisco Systems, Inc.  All rights reserved. */\n+\n+#ifndef _ENIC_MBOX_H_\n+#define _ENIC_MBOX_H_\n+\n+#include \u003clinux/bits.h\u003e\n+#include \u003clinux/types.h\u003e\n+\n+/*\n+ * Mailbox protocol for PF-VF communication over the admin channel.\n+ *\n+ * Even numbers are requests, odd numbers are replies/acks.\n+ * The prefix indicates the initiator: VF_ = VF-initiated, PF_ = PF-initiated.\n+ */\n+enum enic_mbox_msg_type {\n+\tENIC_MBOX_VF_CAPABILITY_REQUEST\t\t= 0,\n+\tENIC_MBOX_VF_CAPABILITY_REPLY\t\t= 1,\n+\tENIC_MBOX_VF_REGISTER_REQUEST\t\t= 2,\n+\tENIC_MBOX_VF_REGISTER_REPLY\t\t= 3,\n+\tENIC_MBOX_VF_UNREGISTER_REQUEST\t\t= 4,\n+\tENIC_MBOX_VF_UNREGISTER_REPLY\t\t= 5,\n+\tENIC_MBOX_PF_LINK_STATE_NOTIF\t\t= 6,\n+\tENIC_MBOX_PF_LINK_STATE_ACK\t\t= 7,\n+\tENIC_MBOX_MAX\n+};\n+\n+struct enic_mbox_hdr {\n+\t__le16 src_vnic_id;\n+\t__le16 dst_vnic_id;\n+\tu8 msg_type;\n+\tu8 flags;\n+\t__le16 msg_len;\n+\t__le64 msg_num;\n+};\n+\n+struct enic_mbox_generic_reply {\n+\t__le16 ret_major;\n+\t__le16 ret_minor;\n+};\n+\n+#define ENIC_MBOX_ERR_GENERIC\t\tBIT(0)\n+#define ENIC_MBOX_ERR_VF_NOT_REGISTERED\tBIT(1)\n+#define ENIC_MBOX_ERR_MSG_NOT_SUPPORTED\tBIT(2)\n+\n+/* ENIC_MBOX_VF_CAPABILITY_REQUEST / _REPLY */\n+#define ENIC_MBOX_CAP_VERSION_0\t\t0\n+#define ENIC_MBOX_CAP_VERSION_1\t\t1\n+\n+struct enic_mbox_vf_capability_msg {\n+\t__le32 version;\n+\t__le32 reserved[32];\n+};\n+\n+/* The embedded enic_mbox_generic_reply has 2-byte alignment, but the\n+ * __le32 members give this struct 4-byte natural alignment.  Receive\n+ * buffers come from kmalloc (\u003e= 8-byte aligned), so there is no\n+ * misaligned access risk when casting from the receive buffer.\n+ */\n+struct enic_mbox_vf_capability_reply_msg {\n+\tstruct enic_mbox_generic_reply reply;\n+\t__le32 version;\n+\t__le32 reserved[32];\n+};\n+\n+/* ENIC_MBOX_VF_REGISTER / _UNREGISTER */\n+struct enic_mbox_vf_register_reply_msg {\n+\tstruct enic_mbox_generic_reply reply;\n+};\n+\n+/* ENIC_MBOX_PF_LINK_STATE_NOTIF / _ACK */\n+#define ENIC_MBOX_LINK_STATE_DISABLE\t0\n+#define ENIC_MBOX_LINK_STATE_ENABLE\t1\n+\n+struct enic_mbox_pf_link_state_notif_msg {\n+\t__le32 link_state;\n+};\n+\n+struct enic_mbox_pf_link_state_ack_msg {\n+\tstruct enic_mbox_generic_reply ack;\n+};\n+\n+#define ENIC_MBOX_DST_PF\t0xFFFF\n+\n+struct enic;\n+\n+void enic_mbox_init(struct enic *enic);\n+int enic_mbox_send_msg(struct enic *enic, u8 msg_type, u16 dst_vnic_id,\n+\t\t       void *payload, u16 payload_len);\n+int enic_mbox_send_link_state(struct enic *enic, u16 vf_id, u32 link_state);\n+int enic_mbox_vf_capability_check(struct enic *enic);\n+int enic_mbox_vf_register(struct enic *enic);\n+int enic_mbox_vf_unregister(struct enic *enic);\n+\n+#endif /* _ENIC_MBOX_H_ */\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_pp.c b/drivers/net/ethernet/cisco/enic/enic_pp.c\nindex 4720a952725d00..3f611e240c256c 100644\n--- a/drivers/net/ethernet/cisco/enic/enic_pp.c\n+++ b/drivers/net/ethernet/cisco/enic/enic_pp.c\n@@ -25,6 +25,11 @@ int enic_is_valid_pp_vf(struct enic *enic, int vf, int *err)\n \tif (vf != PORT_SELF_VF) {\n #ifdef CONFIG_PCI_IOV\n \t\tif (enic_sriov_enabled(enic)) {\n+\t\t\t/* V2 SR-IOV uses MBOX, not port profiles */\n+\t\t\tif (enic-\u003evf_type == ENIC_VF_TYPE_V2) {\n+\t\t\t\t*err = -EOPNOTSUPP;\n+\t\t\t\tgoto err_out;\n+\t\t\t}\n \t\t\tif (vf \u003c 0 || vf \u003e= enic-\u003enum_vfs) {\n \t\t\t\t*err = -EINVAL;\n \t\t\t\tgoto err_out;\ndiff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ethernet/cisco/enic/enic_res.c\nindex 2b7545d6a67fdc..74cd2ee3af5cb7 100644\n--- a/drivers/net/ethernet/cisco/enic/enic_res.c\n+++ b/drivers/net/ethernet/cisco/enic/enic_res.c\n@@ -59,6 +59,7 @@ int enic_get_vnic_config(struct enic *enic)\n \tGET_CONFIG(intr_timer_usec);\n \tGET_CONFIG(loop_tag);\n \tGET_CONFIG(num_arfs);\n+\tGET_CONFIG(mq_subvnic_count);\n \tGET_CONFIG(max_rq_ring);\n \tGET_CONFIG(max_wq_ring);\n \tGET_CONFIG(max_cq_ring);\n@@ -210,7 +211,8 @@ void enic_get_res_counts(struct enic *enic)\n \t\tvnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_ADMIN_RQ) \u003e= 1 \u0026\u0026\n \t\tvnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_ADMIN_CQ) \u003e=\n \t\t\tARRAY_SIZE(enic-\u003eadmin_cq) \u0026\u0026\n-\t\tvnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_SRIOV_INTR) \u003e= 1;\n+\t\t(enic_is_sriov_vf_v2(enic) ||\n+\t\t vnic_dev_get_res_count(enic-\u003evdev, RES_TYPE_SRIOV_INTR) \u003e= 1);\n \n \tdev_info(enic_get_dev(enic),\n \t\t\"vNIC resources avail: wq %d rq %d cq %d intr %d admin %s\\n\",\ndiff --git a/drivers/net/ethernet/cisco/enic/vnic_cq.h b/drivers/net/ethernet/cisco/enic/vnic_cq.h\nindex d46d4d2ef6bbac..35ffa323071305 100644\n--- a/drivers/net/ethernet/cisco/enic/vnic_cq.h\n+++ b/drivers/net/ethernet/cisco/enic/vnic_cq.h\n@@ -76,6 +76,15 @@ int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,\n int vnic_cq_alloc_with_type(struct vnic_dev *vdev, struct vnic_cq *cq,\n \t\t\t    unsigned int index, unsigned int desc_count,\n \t\t\t    unsigned int desc_size, unsigned int res_type);\n+#define VNIC_CQ_FC_ENABLE\t1\n+#define VNIC_CQ_FC_DISABLE\t0\n+#define VNIC_CQ_COLOR_ENABLE\t1\n+#define VNIC_CQ_INTR_ENABLE\t1\n+#define VNIC_CQ_INTR_DISABLE\t0\n+#define VNIC_CQ_ENTRY_ENABLE\t1\n+#define VNIC_CQ_MSG_ENABLE\t1\n+#define VNIC_CQ_MSG_DISABLE\t0\n+\n void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,\n \tunsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,\n \tunsigned int cq_tail_color, unsigned int interrupt_enable,\ndiff --git a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h\nindex 605ef17f967e4a..90ca06691ebd63 100644\n--- a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h\n+++ b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h\n@@ -455,8 +455,19 @@ enum vnic_devcmd_cmd {\n \t */\n \tCMD_CQ_ENTRY_SIZE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 90),\n \n+\t/*\n+\t * Set queue pair type (admin or data)\n+\t * in: (u32) a0 = queue pair type (0 = admin, 1 = data)\n+\t * in: (u32) a1 = enable (1) / disable (0)\n+\t */\n+\tCMD_QP_TYPE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 97),\n };\n \n+#define QP_TYPE_ADMIN\t0\n+#define QP_TYPE_DATA\t1\n+#define QP_ENABLE\t1\n+#define QP_DISABLE\t0\n+\n /* CMD_ENABLE2 flags */\n #define CMD_ENABLE2_STANDBY 0x0\n #define CMD_ENABLE2_ACTIVE  0x1\n@@ -734,6 +745,8 @@ enum vic_feature_t {\n \tVIC_FEATURE_VXLAN,\n \tVIC_FEATURE_RDMA,\n \tVIC_FEATURE_VXLAN_PATCH,\n+\t/* slot 3 reserved for firmware VIC_FEATURE_PTP */\n+\tVIC_FEATURE_SRIOV\t= 4,\n \tVIC_FEATURE_MAX,\n };\n \ndiff --git a/drivers/net/ethernet/cisco/enic/vnic_enet.h b/drivers/net/ethernet/cisco/enic/vnic_enet.h\nindex 9e8e86262a3fea..519d2969990b18 100644\n--- a/drivers/net/ethernet/cisco/enic/vnic_enet.h\n+++ b/drivers/net/ethernet/cisco/enic/vnic_enet.h\n@@ -21,7 +21,9 @@ struct vnic_enet_config {\n \tu16 loop_tag;\n \tu16 vf_rq_count;\n \tu16 num_arfs;\n-\tu8 reserved[66];\n+\tu8 reserved1[32];\n+\tu16 mq_subvnic_count;\n+\tu8 reserved2[32];\n \tu32 max_rq_ring;\t// MAX RQ ring size\n \tu32 max_wq_ring;\t// MAX WQ ring size\n \tu32 max_cq_ring;\t// MAX CQ ring size\n"
}

For your convenience, here is the diff of the changes:
commit 313bd531764a9bfa514ebc468739e3cdee960e6d
Author: syz-cluster <triage@syzkaller.com>
Date:   Mon Jun 29 18:42:06 2026 +0000

    syz-cluster: applied patch under review

diff --git a/drivers/net/ethernet/cisco/enic/Makefile b/drivers/net/ethernet/cisco/enic/Makefile
index a96b8332e6e2a8..e38aaf34c14839 100644
--- a/drivers/net/ethernet/cisco/enic/Makefile
+++ b/drivers/net/ethernet/cisco/enic/Makefile
@@ -3,5 +3,6 @@ obj-$(CONFIG_ENIC) := enic.o
 
 enic-y := enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \
 	enic_res.o enic_dev.o enic_pp.o vnic_dev.o vnic_rq.o vnic_vic.o \
-	enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o
+	enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o \
+	enic_admin.o enic_mbox.o
 
diff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/cisco/enic/enic.h
index 08472420f3a1fd..62b8941489d773 100644
--- a/drivers/net/ethernet/cisco/enic/enic.h
+++ b/drivers/net/ethernet/cisco/enic/enic.h
@@ -256,10 +256,10 @@ struct enic {
 	struct enic_rx_coal rx_coalesce_setting;
 	u32 rx_coalesce_usecs;
 	u32 tx_coalesce_usecs;
-#ifdef CONFIG_PCI_IOV
 	u16 num_vfs;
-#endif
 	enum enic_vf_type vf_type;
+	bool vf_registered;
+	u32 pf_cap_version;
 	unsigned int enable_count;
 	spinlock_t enic_api_lock;
 	bool enic_api_busy;
@@ -292,10 +292,45 @@ struct enic {
 
 	/* Admin channel resources for SR-IOV MBOX */
 	bool has_admin_channel;
+	/* true only while the admin WQ/RQ/CQ are allocated and enabled; gates
+	 * enic_admin_channel_close() so it is a no-op after a failed (re)open
+	 * left the resources freed.
+	 */
+	bool admin_chan_up;
+	/* set on send timeout; cleared on channel re-open */
+	bool mbox_send_disabled;
 	struct vnic_wq admin_wq;
 	struct vnic_rq admin_rq;
 	struct vnic_cq admin_cq[2];
 	struct vnic_intr admin_intr;
+	struct work_struct admin_poll_work;
+	unsigned int admin_intr_index;
+	struct work_struct link_notify_work;
+	struct work_struct admin_msg_work;
+	spinlock_t admin_msg_lock;	/* protects admin_msg_list */
+	struct list_head admin_msg_list;
+	unsigned int admin_msg_count;	/* current depth of admin_msg_list */
+	void (*admin_rq_handler)(struct enic *enic, void *buf,
+				 unsigned int len);
+
+	/* MBOX protocol state — mbox_lock serializes admin WQ sends */
+	struct mutex mbox_lock;
+	u64 mbox_msg_num;
+	/* MBOX request-reply state.  Written by the process-context request
+	 * helpers (capability/register/unregister) and read/cleared by the
+	 * admin_msg_work receive handlers.  No explicit lock is needed because
+	 * only one request is in flight at a time: requesters run under RTNL or
+	 * single-threaded probe/remove, so each request is serialized and its
+	 * reply completes mbox_comp before the next request is issued.
+	 */
+	struct completion mbox_comp;
+	u8 mbox_expected_reply;
+	bool mbox_initialized;
+
+	/* PF: per-VF MBOX state, allocated when SRIOV V2 is enabled */
+	struct enic_vf_state {
+		bool registered;
+	} *vf_state;
 };
 
 static inline struct net_device *vnic_get_netdev(struct vnic_dev *vdev)
@@ -417,6 +452,7 @@ void enic_reset_addr_lists(struct enic *enic);
 int enic_sriov_enabled(struct enic *enic);
 int enic_is_valid_vf(struct enic *enic, int vf);
 int enic_is_dynamic(struct enic *enic);
+int enic_is_sriov_vf_v2(struct enic *enic);
 void enic_set_ethtool_ops(struct net_device *netdev);
 int __enic_set_rsskey(struct enic *enic);
 void enic_ext_cq(struct enic *enic);
diff --git a/drivers/net/ethernet/cisco/enic/enic_admin.c b/drivers/net/ethernet/cisco/enic/enic_admin.c
new file mode 100644
index 00000000000000..242644fa2cbf90
--- /dev/null
+++ b/drivers/net/ethernet/cisco/enic/enic_admin.c
@@ -0,0 +1,626 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright 2025 Cisco Systems, Inc.  All rights reserved.
+
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+
+#include "vnic_dev.h"
+#include "vnic_wq.h"
+#include "vnic_rq.h"
+#include "vnic_cq.h"
+#include "vnic_intr.h"
+#include "vnic_resource.h"
+#include "vnic_devcmd.h"
+#include "enic.h"
+#include "enic_admin.h"
+#include "cq_desc.h"
+#include "cq_enet_desc.h"
+#include "wq_enet_desc.h"
+#include "rq_enet_desc.h"
+#include "enic_mbox.h"
+
+/* Clean up any admin WQ buffers still held by hardware at close time.
+ * Normally buffers are freed inline after send completion, but a timed-out
+ * send intentionally leaves the buffer live until the queue is stopped.
+ */
+static void enic_admin_wq_buf_clean(struct vnic_wq *wq,
+				    struct vnic_wq_buf *buf)
+{
+	struct enic *enic = vnic_dev_priv(wq->vdev);
+
+	if (buf->os_buf) {
+		dma_unmap_single(&enic->pdev->dev, buf->dma_addr,
+				 buf->len, DMA_TO_DEVICE);
+		kfree(buf->os_buf);
+		buf->os_buf = NULL;
+	}
+}
+
+static void enic_admin_rq_buf_clean(struct vnic_rq *rq,
+				    struct vnic_rq_buf *buf)
+{
+	struct enic *enic = vnic_dev_priv(rq->vdev);
+
+	if (!buf->os_buf)
+		return;
+
+	dma_unmap_single(&enic->pdev->dev, buf->dma_addr, buf->len,
+			 DMA_FROM_DEVICE);
+	kfree(buf->os_buf);
+	buf->os_buf = NULL;
+}
+
+static int enic_admin_rq_post_one(struct enic *enic, gfp_t gfp)
+{
+	struct vnic_rq *rq = &enic->admin_rq;
+	struct rq_enet_desc *desc;
+	dma_addr_t dma_addr;
+	void *buf;
+
+	buf = kmalloc(ENIC_ADMIN_BUF_SIZE, gfp);
+	if (!buf)
+		return -ENOMEM;
+
+	dma_addr = dma_map_single(&enic->pdev->dev, buf, ENIC_ADMIN_BUF_SIZE,
+				  DMA_FROM_DEVICE);
+	if (dma_mapping_error(&enic->pdev->dev, dma_addr)) {
+		kfree(buf);
+		return -ENOMEM;
+	}
+
+	desc = vnic_rq_next_desc(rq);
+	rq_enet_desc_enc(desc, (u64)dma_addr | VNIC_PADDR_TARGET,
+			 RQ_ENET_TYPE_ONLY_SOP, ENIC_ADMIN_BUF_SIZE);
+	vnic_rq_post(rq, buf, 0, dma_addr, ENIC_ADMIN_BUF_SIZE, 0);
+
+	return 0;
+}
+
+static int enic_admin_rq_fill(struct enic *enic, gfp_t gfp)
+{
+	struct vnic_rq *rq = &enic->admin_rq;
+	int err;
+
+	while (vnic_rq_desc_avail(rq) > 0) {
+		err = enic_admin_rq_post_one(enic, gfp);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
+static void enic_admin_rq_drain(struct enic *enic)
+{
+	vnic_rq_clean(&enic->admin_rq, enic_admin_rq_buf_clean);
+}
+
+static unsigned int enic_admin_cq_color(void *cq_desc, unsigned int desc_size)
+{
+	u8 type_color = *((u8 *)cq_desc + desc_size - 1);
+
+	return (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
+}
+
+unsigned int enic_admin_wq_cq_service(struct enic *enic)
+{
+	struct vnic_cq *cq = &enic->admin_cq[0];
+	unsigned int work = 0;
+	void *desc;
+
+	desc = vnic_cq_to_clean(cq);
+	while (enic_admin_cq_color(desc, cq->ring.desc_size) !=
+	       cq->last_color) {
+		vnic_cq_inc_to_clean(cq);
+		work++;
+		desc = vnic_cq_to_clean(cq);
+	}
+
+	return work;
+}
+
+/* Upper bound on pending admin messages.  A buggy or hostile VF could flood
+ * the PF admin channel faster than admin_msg_work drains it; cap the backlog
+ * so a guest cannot drive the host out of memory.
+ */
+#define ENIC_ADMIN_MSG_MAX	256
+
+static void enic_admin_msg_enqueue(struct enic *enic, void *buf,
+				   unsigned int len)
+{
+	struct enic_admin_msg *msg;
+
+	msg = kmalloc(struct_size(msg, data, len), GFP_KERNEL);
+	if (!msg)
+		return;
+
+	msg->len = len;
+	memcpy(msg->data, buf, len);
+
+	spin_lock(&enic->admin_msg_lock);
+	if (enic->admin_msg_count >= ENIC_ADMIN_MSG_MAX) {
+		spin_unlock(&enic->admin_msg_lock);
+		kfree(msg);
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "admin msg backlog full (%u); dropping\n",
+				    ENIC_ADMIN_MSG_MAX);
+		return;
+	}
+	list_add_tail(&msg->list, &enic->admin_msg_list);
+	enic->admin_msg_count++;
+	spin_unlock(&enic->admin_msg_lock);
+}
+
+unsigned int enic_admin_rq_cq_service(struct enic *enic)
+{
+	struct vnic_cq *cq = &enic->admin_cq[1];
+	struct vnic_rq *rq = &enic->admin_rq;
+	struct cq_enet_rq_desc *rq_desc;
+	struct vnic_rq_buf *buf;
+	u16 bwf, bytes_written;
+	unsigned int work = 0;
+	void *desc;
+
+	/* The admin RQ and its CQ form a single in-order channel: firmware
+	 * posts exactly one CQE per consumed RQ descriptor, in submission
+	 * order.  Each CQE therefore pairs with rq->to_clean below without a
+	 * completed_index cross-check, mirroring the in-order assumption of
+	 * the main enic RX path.
+	 */
+	desc = vnic_cq_to_clean(cq);
+	while (enic_admin_cq_color(desc, cq->ring.desc_size) !=
+	       cq->last_color) {
+		/* Ensure DMA descriptor fields are read after
+		 * the color/valid check.  dma_rmb() is the
+		 * correct barrier for DMA-written descriptors.
+		 */
+		dma_rmb();
+		buf = rq->to_clean;
+
+		/* Decode the actual number of bytes hardware wrote into
+		 * the RX buffer.  buf->len is the static allocation size
+		 * (ENIC_ADMIN_BUF_SIZE) and would expose uninitialised
+		 * heap memory beyond the real payload.  bytes_written_flags
+		 * is at the same offset in every cq_enet_rq_desc[_32|_64]
+		 * variant.
+		 */
+		rq_desc = desc;
+		bwf = le16_to_cpu(rq_desc->bytes_written_flags);
+		bytes_written = bwf & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
+		if (bytes_written > buf->len)
+			goto next_desc;
+
+		dma_sync_single_for_cpu(&enic->pdev->dev,
+					buf->dma_addr, buf->len,
+					DMA_FROM_DEVICE);
+
+		/* Drop on hardware error indications.  Admin messages
+		 * are internal to the VIC, not received over the wire.
+		 * Firmware sets TRUNCATED when the message does not fit
+		 * in the posted buffer, and FCS_OK is always set on
+		 * healthy admin completions.
+		 */
+		if (bwf & CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) {
+			netdev_warn_once(enic->netdev,
+					 "admin RQ: truncated message dropped\n");
+			goto next_desc;
+		}
+		if (!(rq_desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK)) {
+			netdev_warn_once(enic->netdev,
+					 "admin RQ: bad FCS, dropping message\n");
+			goto next_desc;
+		}
+
+		if (enic->admin_rq_handler) {
+			u16 sender_vlan;
+
+			/* Firmware sets the CQ VLAN field to identify the
+			 * sender: 0 = PF, 1-based = VF index.  Overwrite
+			 * the untrusted src_vnic_id in the MBOX header with
+			 * the hardware-verified value.
+			 */
+			sender_vlan = le16_to_cpu(rq_desc->vlan);
+			if (bytes_written >= sizeof(struct enic_mbox_hdr)) {
+				struct enic_mbox_hdr *hdr = buf->os_buf;
+
+				hdr->src_vnic_id = (sender_vlan == 0) ?
+					cpu_to_le16(ENIC_MBOX_DST_PF) :
+					cpu_to_le16(sender_vlan - 1);
+			}
+
+			enic_admin_msg_enqueue(enic, buf->os_buf,
+					       bytes_written);
+		}
+
+next_desc:
+		enic_admin_rq_buf_clean(rq, rq->to_clean);
+		rq->to_clean = rq->to_clean->next;
+		rq->ring.desc_avail++;
+
+		vnic_cq_inc_to_clean(cq);
+		work++;
+		desc = vnic_cq_to_clean(cq);
+	}
+
+	if (enic_admin_rq_fill(enic, GFP_KERNEL) && net_ratelimit())
+		netdev_warn(enic->netdev,
+			    "admin RQ refill failed\n");
+
+	return work;
+}
+
+static irqreturn_t enic_admin_isr_msix(int irq, void *data)
+{
+	struct enic *enic = data;
+
+	schedule_work(&enic->admin_poll_work);
+
+	return IRQ_HANDLED;
+}
+
+static void enic_admin_msg_work_handler(struct work_struct *work)
+{
+	struct enic *enic = container_of(work, struct enic, admin_msg_work);
+	struct enic_admin_msg *msg, *tmp;
+	LIST_HEAD(local_list);
+
+	spin_lock_bh(&enic->admin_msg_lock);
+	list_splice_init(&enic->admin_msg_list, &local_list);
+	enic->admin_msg_count = 0;
+	spin_unlock_bh(&enic->admin_msg_lock);
+
+	list_for_each_entry_safe(msg, tmp, &local_list, list) {
+		if (enic->admin_rq_handler)
+			enic->admin_rq_handler(enic, msg->data, msg->len);
+		list_del(&msg->list);
+		kfree(msg);
+	}
+}
+
+static void enic_admin_poll_work_handler(struct work_struct *work)
+{
+	struct enic *enic = container_of(work, struct enic, admin_poll_work);
+	unsigned int credits;
+	unsigned int rq_work;
+
+	credits = vnic_intr_credits(&enic->admin_intr);
+
+	rq_work = enic_admin_rq_cq_service(enic);
+
+	if (rq_work > 0)
+		schedule_work(&enic->admin_msg_work);
+
+	vnic_intr_return_credits(&enic->admin_intr,
+				 credits ?: 1,
+				 1 /* unmask */, 0);
+}
+
+static int enic_admin_setup_intr(struct enic *enic)
+{
+	unsigned int intr_index = enic->intr_count;
+	int err;
+
+	if (vnic_dev_get_intr_mode(enic->vdev) != VNIC_DEV_INTR_MODE_MSIX ||
+	    intr_index >= enic->intr_avail)
+		return -ENODEV;
+
+	/* The admin INTR uses a slot in the same RES_TYPE_INTR_CTRL
+	 * strided array of per-vector control blocks (mask, coalescing
+	 * timer, credit return) that the data-path IRQs occupy in BAR0.
+	 * vnic_intr_alloc() defaults to RES_TYPE_INTR_CTRL, which is what
+	 * we want here.
+	 */
+	err = vnic_intr_alloc(enic->vdev, &enic->admin_intr, intr_index);
+	if (err) {
+		netdev_warn(enic->netdev,
+			    "Failed to alloc admin intr at index %u: %d\n",
+			    intr_index, err);
+		return err;
+	}
+
+	enic->admin_intr_index = intr_index;
+
+	/* A V2 VF opens the admin channel during probe, before
+	 * register_netdev() resolves the "eth%d" name template, so using
+	 * netdev->name here would register the literal "eth%d-admin" in
+	 * /proc/interrupts.  Use the already-stable PCI device name instead.
+	 */
+	snprintf(enic->msix[intr_index].devname,
+		 sizeof(enic->msix[intr_index].devname),
+		 "%s-admin", pci_name(enic->pdev));
+	enic->msix[intr_index].isr = enic_admin_isr_msix;
+	enic->msix[intr_index].devid = enic;
+
+	err = request_irq(enic->msix_entry[intr_index].vector,
+			  enic->msix[intr_index].isr, 0,
+			  enic->msix[intr_index].devname,
+			  enic->msix[intr_index].devid);
+	if (err) {
+		netdev_warn(enic->netdev,
+			    "Failed to request admin MSI-X irq: %d\n", err);
+		vnic_intr_free(&enic->admin_intr);
+		return err;
+	}
+
+	enic->msix[intr_index].requested = 1;
+
+	netdev_dbg(enic->netdev,
+		   "admin channel using MSI-X interrupt (index %u)\n",
+		   intr_index);
+
+	return 0;
+}
+
+static void enic_admin_teardown_intr(struct enic *enic)
+{
+	unsigned int intr_index = enic->admin_intr_index;
+
+	free_irq(enic->msix_entry[intr_index].vector,
+		 enic->msix[intr_index].devid);
+	cancel_work_sync(&enic->admin_poll_work);
+	enic->msix[intr_index].requested = 0;
+}
+
+static int enic_admin_qp_type_set(struct enic *enic, u32 enable)
+{
+	u64 a0 = QP_TYPE_ADMIN, a1 = enable;
+	int wait = 1000;
+	int err;
+
+	spin_lock_bh(&enic->devcmd_lock);
+	err = vnic_dev_cmd(enic->vdev, CMD_QP_TYPE_SET, &a0, &a1, wait);
+	spin_unlock_bh(&enic->devcmd_lock);
+
+	return err;
+}
+
+static int enic_admin_alloc_resources(struct enic *enic)
+{
+	int err;
+
+	err = vnic_wq_alloc_with_type(enic->vdev, &enic->admin_wq, 0,
+				      ENIC_ADMIN_DESC_COUNT,
+				      sizeof(struct wq_enet_desc),
+				      RES_TYPE_ADMIN_WQ);
+	if (err)
+		return err;
+
+	err = vnic_rq_alloc_with_type(enic->vdev, &enic->admin_rq, 0,
+				      ENIC_ADMIN_DESC_COUNT,
+				      sizeof(struct rq_enet_desc),
+				      RES_TYPE_ADMIN_RQ);
+	if (err)
+		goto free_wq;
+
+	/* admin_cq[0] is the WQ completion queue.  WQ CQEs are always
+	 * 16 bytes wide; firmware always writes 16-byte CQEs for WQ
+	 * completions on every WQ, including the admin channel WQ.
+	 * Use sizeof(struct cq_desc) accordingly.
+	 */
+	err = vnic_cq_alloc_with_type(enic->vdev, &enic->admin_cq[0], 0,
+				      ENIC_ADMIN_DESC_COUNT,
+				      sizeof(struct cq_desc),
+				      RES_TYPE_ADMIN_CQ);
+	if (err)
+		goto free_rq;
+
+	/* admin_cq[1] is the RQ completion queue.  Its descriptor size
+	 * must match what firmware writes.  enic_ext_cq() called earlier
+	 * in probe issues CMD_CQ_ENTRY_SIZE_SET for VNIC_RQ_ALL,
+	 * programming firmware to write CQ entries of (16 << enic->ext_cq)
+	 * bytes for every RQ CQ on the vNIC, including the admin RQ CQ.
+	 * Allocating with the same size keeps the host poller and
+	 * firmware in lockstep:
+	 *
+	 *   - The color/valid bit lives at byte (desc_size - 1) of every
+	 *     cq_enet_rq_desc[_32|_64] variant, so enic_admin_cq_color()
+	 *     reads it from the correct offset.
+	 *   - Only the first 15 bytes of the descriptor (vlan,
+	 *     bytes_written_flags, ...) are accessed by the admin path;
+	 *     these fields are identical across all three variants (see
+	 *     comment in enic_rq.c above cq_enet_rq_desc_dec()).
+	 */
+	err = vnic_cq_alloc_with_type(enic->vdev, &enic->admin_cq[1], 1,
+				      ENIC_ADMIN_DESC_COUNT,
+				      16 << enic->ext_cq,
+				      RES_TYPE_ADMIN_CQ);
+	if (err)
+		goto free_cq0;
+
+	return 0;
+
+free_cq0:
+	vnic_cq_free(&enic->admin_cq[0]);
+free_rq:
+	vnic_rq_free(&enic->admin_rq);
+free_wq:
+	vnic_wq_free(&enic->admin_wq);
+	return err;
+}
+
+static void enic_admin_free_resources(struct enic *enic)
+{
+	vnic_intr_free(&enic->admin_intr);
+	vnic_cq_free(&enic->admin_cq[1]);
+	vnic_cq_free(&enic->admin_cq[0]);
+	vnic_rq_free(&enic->admin_rq);
+	vnic_wq_free(&enic->admin_wq);
+}
+
+static void enic_admin_init_resources(struct enic *enic)
+{
+	unsigned int intr_offset = enic->admin_intr_index;
+
+	vnic_wq_init(&enic->admin_wq,
+		     0, 0, 0); /* cq_index, err_intr_enable, err_intr_offset */
+	vnic_rq_init(&enic->admin_rq,
+		     1, 0, 0); /* cq_index, err_intr_enable, err_intr_offset */
+	vnic_cq_init(&enic->admin_cq[0],
+		     VNIC_CQ_FC_DISABLE,
+		     VNIC_CQ_COLOR_ENABLE,
+		     0, 0, 1, /* cq_head, cq_tail, cq_tail_color */
+		     VNIC_CQ_INTR_DISABLE, /* polled synchronously by mbox send */
+		     VNIC_CQ_ENTRY_ENABLE,
+		     VNIC_CQ_MSG_DISABLE,
+		     intr_offset,
+		     0 /* cq_message_addr */);
+	vnic_cq_init(&enic->admin_cq[1],
+		     VNIC_CQ_FC_DISABLE,
+		     VNIC_CQ_COLOR_ENABLE,
+		     0, 0, 1, /* cq_head, cq_tail, cq_tail_color */
+		     VNIC_CQ_INTR_ENABLE,
+		     VNIC_CQ_ENTRY_ENABLE,
+		     VNIC_CQ_MSG_DISABLE,
+		     intr_offset,
+		     0 /* cq_message_addr */);
+	/* coalescing_timer, coalescing_type, mask_on_assertion */
+	vnic_intr_init(&enic->admin_intr,
+		       0, 0, 1);
+}
+
+static void enic_admin_msg_drain(struct enic *enic)
+{
+	struct enic_admin_msg *msg, *tmp;
+
+	spin_lock_bh(&enic->admin_msg_lock);
+	list_for_each_entry_safe(msg, tmp, &enic->admin_msg_list, list) {
+		list_del(&msg->list);
+		kfree(msg);
+	}
+	enic->admin_msg_count = 0;
+	spin_unlock_bh(&enic->admin_msg_lock);
+}
+
+int enic_admin_channel_open(struct enic *enic)
+{
+	int err;
+
+	if (!enic->has_admin_channel)
+		return -ENODEV;
+
+	err = enic_admin_alloc_resources(enic);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "Failed to alloc admin channel resources: %d\n",
+			   err);
+		return err;
+	}
+
+	spin_lock_init(&enic->admin_msg_lock);
+	INIT_LIST_HEAD(&enic->admin_msg_list);
+	INIT_WORK(&enic->admin_msg_work, enic_admin_msg_work_handler);
+	INIT_WORK(&enic->admin_poll_work, enic_admin_poll_work_handler);
+
+	err = enic_admin_setup_intr(enic);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "Admin channel requires MSI-X, SR-IOV unavailable: %d\n",
+			   err);
+		goto free_resources;
+	}
+
+	enic_admin_init_resources(enic);
+
+	vnic_wq_enable(&enic->admin_wq);
+	vnic_rq_enable(&enic->admin_rq);
+
+	err = enic_admin_rq_fill(enic, GFP_KERNEL);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "Failed to fill admin RQ buffers: %d\n", err);
+		goto disable_queues;
+	}
+
+	err = enic_admin_qp_type_set(enic, QP_ENABLE);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "Failed to set admin QP type: %d\n", err);
+		goto disable_queues;
+	}
+
+	vnic_intr_unmask(&enic->admin_intr);
+
+	/* Only now that the admin WQ/RQ/CQ and interrupt are fully allocated,
+	 * programmed and enabled is it safe to allow MBOX sends.  Clearing this
+	 * earlier opened a window where a concurrent sender (e.g. link-notify
+	 * work scheduled by a post-reset link-up) could call enic_mbox_send_msg()
+	 * against a not-yet-allocated admin_wq and crash.
+	 */
+	WRITE_ONCE(enic->mbox_send_disabled, false);
+
+	netdev_dbg(enic->netdev,
+		   "admin channel open: intr=%u wq_avail=%u rq_avail=%u cq0_color=%u cq1_color=%u\n",
+		   enic->admin_intr_index,
+		   vnic_wq_desc_avail(&enic->admin_wq),
+		   vnic_rq_desc_avail(&enic->admin_rq),
+		   enic->admin_cq[0].last_color,
+		   enic->admin_cq[1].last_color);
+
+	enic->admin_chan_up = true;
+
+	return 0;
+
+disable_queues:
+	enic_admin_teardown_intr(enic);
+	enic_admin_qp_type_set(enic, QP_DISABLE);
+	if (vnic_wq_disable(&enic->admin_wq))
+		netdev_warn(enic->netdev, "Failed to disable admin WQ\n");
+	if (vnic_rq_disable(&enic->admin_rq))
+		netdev_warn(enic->netdev, "Failed to disable admin RQ\n");
+	cancel_work_sync(&enic->admin_msg_work);
+	enic_admin_msg_drain(enic);
+	enic_admin_rq_drain(enic);
+free_resources:
+	enic_admin_free_resources(enic);
+	return err;
+}
+
+void enic_admin_channel_close(struct enic *enic)
+{
+	int err;
+
+	if (!enic->has_admin_channel)
+		return;
+
+	/* Nothing to tear down if the channel was never (re)opened, e.g. a
+	 * failed enic_admin_channel_open() in probe or in the reset path;
+	 * otherwise the disable/clean calls below dereference freed resources.
+	 */
+	if (!enic->admin_chan_up)
+		return;
+
+	WRITE_ONCE(enic->mbox_send_disabled, true);
+
+	netdev_dbg(enic->netdev, "admin channel close\n");
+
+	vnic_intr_mask(&enic->admin_intr);
+	enic_admin_teardown_intr(enic);
+	cancel_work_sync(&enic->link_notify_work);
+	cancel_work_sync(&enic->admin_msg_work);
+	enic_admin_msg_drain(enic);
+
+	enic_admin_qp_type_set(enic, QP_DISABLE);
+
+	err = vnic_wq_disable(&enic->admin_wq);
+	if (err)
+		netdev_warn(enic->netdev,
+			    "Failed to disable admin WQ: %d\n", err);
+	err = vnic_rq_disable(&enic->admin_rq);
+	if (err)
+		netdev_warn(enic->netdev,
+			    "Failed to disable admin RQ: %d\n", err);
+
+	vnic_wq_clean(&enic->admin_wq, enic_admin_wq_buf_clean);
+	enic_admin_rq_drain(enic);
+	vnic_cq_clean(&enic->admin_cq[0]);
+	vnic_cq_clean(&enic->admin_cq[1]);
+	vnic_intr_clean(&enic->admin_intr);
+
+	enic->admin_rq_handler = NULL;
+	enic_admin_free_resources(enic);
+
+	enic->admin_chan_up = false;
+}
diff --git a/drivers/net/ethernet/cisco/enic/enic_admin.h b/drivers/net/ethernet/cisco/enic/enic_admin.h
new file mode 100644
index 00000000000000..62c80220b0cacc
--- /dev/null
+++ b/drivers/net/ethernet/cisco/enic/enic_admin.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright 2025 Cisco Systems, Inc.  All rights reserved. */
+
+#ifndef _ENIC_ADMIN_H_
+#define _ENIC_ADMIN_H_
+
+#define ENIC_ADMIN_DESC_COUNT	64
+#define ENIC_ADMIN_BUF_SIZE	2048
+
+struct enic;
+
+/* Wrapper for received admin messages queued for deferred processing.
+ * The admin CQ poll work handler enqueues these; a separate work handler
+ * processes them where sleeping (mutex, GFP_KERNEL) is safe.
+ */
+struct enic_admin_msg {
+	struct list_head list;
+	unsigned int len;
+	u8 data[] __aligned(8);
+};
+
+int enic_admin_channel_open(struct enic *enic);
+void enic_admin_channel_close(struct enic *enic);
+unsigned int enic_admin_wq_cq_service(struct enic *enic);
+unsigned int enic_admin_rq_cq_service(struct enic *enic);
+
+#endif /* _ENIC_ADMIN_H_ */
diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index e7125b81808799..de90332dc40cc7 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -60,6 +60,8 @@
 #include "enic_clsf.h"
 #include "enic_rq.h"
 #include "enic_wq.h"
+#include "enic_admin.h"
+#include "enic_mbox.h"
 
 #define ENIC_NOTIFY_TIMER_PERIOD	(2 * HZ)
 
@@ -314,6 +316,11 @@ static int enic_is_sriov_vf(struct enic *enic)
 	       enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2;
 }
 
+int enic_is_sriov_vf_v2(struct enic *enic)
+{
+	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2;
+}
+
 int enic_is_valid_vf(struct enic *enic, int vf)
 {
 #ifdef CONFIG_PCI_IOV
@@ -411,6 +418,24 @@ static void enic_set_rx_coal_setting(struct enic *enic)
 	rx_coal->use_adaptive_rx_coalesce = 1;
 }
 
+static void enic_link_notify_work_handler(struct work_struct *work)
+{
+	struct enic *enic = container_of(work, struct enic,
+					 link_notify_work);
+	u32 state;
+	u16 i;
+
+	if (!enic_sriov_enabled(enic) || !enic->vf_state)
+		return;
+
+	state = netif_carrier_ok(enic->netdev) ?
+		ENIC_MBOX_LINK_STATE_ENABLE :
+		ENIC_MBOX_LINK_STATE_DISABLE;
+
+	for (i = 0; i < enic->num_vfs; i++)
+		enic_mbox_send_link_state(enic, i, state);
+}
+
 static void enic_link_check(struct enic *enic)
 {
 	int link_status = vnic_dev_link_status(enic->vdev);
@@ -420,9 +445,13 @@ static void enic_link_check(struct enic *enic)
 		netdev_info(enic->netdev, "Link UP\n");
 		netif_carrier_on(enic->netdev);
 		enic_set_rx_coal_setting(enic);
+		if (enic_sriov_enabled(enic) && enic->vf_state)
+			schedule_work(&enic->link_notify_work);
 	} else if (!link_status && carrier_ok) {
 		netdev_info(enic->netdev, "Link DOWN\n");
 		netif_carrier_off(enic->netdev);
+		if (enic_sriov_enabled(enic) && enic->vf_state)
+			schedule_work(&enic->link_notify_work);
 	}
 }
 
@@ -2142,6 +2171,57 @@ static void enic_set_api_busy(struct enic *enic, bool busy)
 	spin_unlock(&enic->enic_api_lock);
 }
 
+/* The admin/MBOX channel exists on a V2 PF while SR-IOV is enabled and on
+ * every V2 VF.  A reset wipes the admin WQ/RQ/CQ, so such devices must tear
+ * the channel down before the reset and re-establish it afterwards.
+ */
+static bool enic_has_admin_chan(struct enic *enic)
+{
+	return enic_is_sriov_vf_v2(enic) ||
+	       (enic_sriov_enabled(enic) && enic->vf_type == ENIC_VF_TYPE_V2);
+}
+
+/* Re-establish the admin/MBOX channel after a reset has re-created the data
+ * path.  Mirrors the relevant part of the probe / SR-IOV-enable sequence:
+ * reopen the channel and reinitialise MBOX, then for a VF re-run the PF
+ * handshake (its admin QP and PF-side registration were torn down by the
+ * reset), or for a PF re-push the current link state to registered VFs.
+ */
+static void enic_admin_chan_reopen(struct enic *enic)
+{
+	int err;
+
+	err = enic_admin_channel_open(enic);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "admin channel reopen after reset failed: %d\n", err);
+		return;
+	}
+
+	enic_mbox_init(enic);
+
+	if (enic_is_sriov_vf_v2(enic)) {
+		err = enic_mbox_vf_capability_check(enic);
+		if (err) {
+			netdev_err(enic->netdev,
+				   "MBOX capability check after reset failed: %d\n",
+				   err);
+			return;
+		}
+		err = enic_mbox_vf_register(enic);
+		if (err)
+			netdev_err(enic->netdev,
+				   "MBOX VF re-registration after reset failed: %d\n",
+				   err);
+	} else {
+		/* The link came back up during enic_open() above while MBOX
+		 * sends were still disabled (channel not yet reopened), so that
+		 * link-notify was dropped.  Re-push current link state now.
+		 */
+		schedule_work(&enic->link_notify_work);
+	}
+}
+
 static void enic_reset(struct work_struct *work)
 {
 	struct enic *enic = container_of(work, struct enic, reset);
@@ -2154,15 +2234,34 @@ static void enic_reset(struct work_struct *work)
 	/* Stop any activity from infiniband */
 	enic_set_api_busy(enic, true);
 
+	/* Fully tear down the V2 admin/MBOX channel before the soft reset.
+	 * The reset wipes all hardware queues including the admin WQ/RQ;
+	 * closing first tells firmware to stop the admin QP (so it no longer
+	 * DMAs from the about-to-be-reset rings) and frees the admin resources
+	 * so they are cleanly re-allocated afterwards.
+	 */
+	if (enic_has_admin_chan(enic))
+		enic_admin_channel_close(enic);
+
 	enic_stop(enic->netdev);
+
 	enic_dev_soft_reset(enic);
 	enic_reset_addr_lists(enic);
 	enic_init_vnic_resources(enic);
 	enic_set_rss_nic_cfg(enic);
 	enic_dev_set_ig_vlan_rewrite_mode(enic);
 	enic_ext_cq(enic);
+
 	enic_open(enic->netdev);
 
+	/* Re-establish the admin/MBOX channel after the data path is back up.
+	 * It was fully torn down by enic_admin_channel_close() above;
+	 * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link
+	 * state, or for a VF re-runs the probe-time PF handshake.
+	 */
+	if (enic_has_admin_chan(enic))
+		enic_admin_chan_reopen(enic);
+
 	/* Allow infiniband to fiddle with the device again */
 	enic_set_api_busy(enic, false);
 
@@ -2180,16 +2279,33 @@ static void enic_tx_hang_reset(struct work_struct *work)
 	/* Stop any activity from infiniband */
 	enic_set_api_busy(enic, true);
 
+	/* Fully tear down the V2 admin/MBOX channel before the hang reset, for
+	 * the same reason as the soft reset path: stop the admin QP and free
+	 * the admin resources before the hardware queues are wiped.
+	 */
+	if (enic_has_admin_chan(enic))
+		enic_admin_channel_close(enic);
+
 	enic_dev_hang_notify(enic);
 	enic_stop(enic->netdev);
+
 	enic_dev_hang_reset(enic);
 	enic_reset_addr_lists(enic);
 	enic_init_vnic_resources(enic);
 	enic_set_rss_nic_cfg(enic);
 	enic_dev_set_ig_vlan_rewrite_mode(enic);
 	enic_ext_cq(enic);
+
 	enic_open(enic->netdev);
 
+	/* Re-establish the admin/MBOX channel after the data path is back up.
+	 * It was fully torn down by enic_admin_channel_close() above;
+	 * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link
+	 * state, or for a VF re-runs the probe-time PF handshake.
+	 */
+	if (enic_has_admin_chan(enic))
+		enic_admin_chan_reopen(enic);
+
 	/* Allow infiniband to fiddle with the device again */
 	enic_set_api_busy(enic, false);
 
@@ -2200,6 +2316,8 @@ static void enic_tx_hang_reset(struct work_struct *work)
 
 static int enic_set_intr_mode(struct enic *enic)
 {
+	unsigned int admin_reserve = enic->has_admin_channel ? 1 : 0;
+	unsigned int min_intr = ENIC_MSIX_MIN_INTR + admin_reserve;
 	unsigned int i;
 	int num_intr;
 
@@ -2210,12 +2328,12 @@ static int enic_set_intr_mode(struct enic *enic)
 	 */
 
 	if (enic->config.intr_mode < 1 &&
-	    enic->intr_avail >= ENIC_MSIX_MIN_INTR) {
+	    enic->intr_avail >= min_intr) {
 		for (i = 0; i < enic->intr_avail; i++)
 			enic->msix_entry[i].entry = i;
 
 		num_intr = pci_enable_msix_range(enic->pdev, enic->msix_entry,
-						 ENIC_MSIX_MIN_INTR,
+						 min_intr,
 						 enic->intr_avail);
 		if (num_intr > 0) {
 			vnic_dev_set_intr_mode(enic->vdev,
@@ -2310,16 +2428,27 @@ static int enic_adjust_resources(struct enic *enic)
 		enic->cq_count = 2;
 		enic->intr_count = enic->intr_avail;
 		break;
-	case VNIC_DEV_INTR_MODE_MSIX:
+	case VNIC_DEV_INTR_MODE_MSIX: {
 		/* Adjust the number of wqs/rqs/cqs/interrupts that will be
-		 * used based on which resource is the most constrained
+		 * used based on which resource is the most constrained.
+		 * Reserve one extra MSI-X slot for the admin channel INTR
+		 * when has_admin_channel is set so that
+		 * enic_admin_setup_intr() can allocate at intr_count
+		 * within the intr_avail bounds even when the data queue
+		 * count is maxed out.  intr_count counts only the data-path
+		 * IRQs (registered by enic_request_intr()); the admin INTR
+		 * lives at msix index intr_count and is set up later by
+		 * enic_admin_setup_intr().
 		 */
+		unsigned int admin_reserve = enic->has_admin_channel ? 1 : 0;
+
 		wq_avail = min(enic->wq_avail, ENIC_WQ_MAX);
 		rq_default = max(netif_get_num_default_rss_queues(),
 				 ENIC_RQ_MIN_DEFAULT);
 		rq_avail = min3(enic->rq_avail, ENIC_RQ_MAX, rq_default);
 		max_queues = min(enic->cq_avail,
-				 enic->intr_avail - ENIC_MSIX_RESERVED_INTR);
+				 enic->intr_avail - ENIC_MSIX_RESERVED_INTR -
+				 admin_reserve);
 		if (wq_avail + rq_avail <= max_queues) {
 			enic->rq_count = rq_avail;
 			enic->wq_count = wq_avail;
@@ -2337,6 +2466,7 @@ static int enic_adjust_resources(struct enic *enic)
 		enic->intr_count = enic->cq_count + ENIC_MSIX_RESERVED_INTR;
 
 		break;
+	}
 	default:
 		dev_err(enic_get_dev(enic), "Unknown interrupt mode\n");
 		return -EINVAL;
@@ -2641,8 +2771,10 @@ static void enic_iounmap(struct enic *enic)
 static void enic_sriov_detect_vf_type(struct enic *enic)
 {
 	struct pci_dev *pdev = enic->pdev;
-	int pos;
+	u64 supported_versions, a1 = 0;
 	u16 vf_dev_id;
+	int pos;
+	int err;
 
 	if (enic_is_sriov_vf(enic) || enic_is_dynamic(enic))
 		return;
@@ -2669,6 +2801,149 @@ static void enic_sriov_detect_vf_type(struct enic *enic)
 		enic->vf_type = ENIC_VF_TYPE_NONE;
 		break;
 	}
+
+	if (enic->vf_type != ENIC_VF_TYPE_V2)
+		return;
+
+	/* A successful command means firmware recognizes
+	 * VIC_FEATURE_SRIOV; supported_versions is available
+	 * for sub-feature versioning in the future.
+	 */
+	err = vnic_dev_get_supported_feature_ver(enic->vdev,
+						 VIC_FEATURE_SRIOV,
+						 &supported_versions,
+						 &a1);
+	if (err) {
+		dev_warn(&pdev->dev,
+			 "SR-IOV V2 not supported by current firmware. Upgrade to VIC FW 5.3(4.72) or higher.\n");
+		enic->vf_type = ENIC_VF_TYPE_NONE;
+	}
+}
+
+static int __maybe_unused
+enic_sriov_v2_enable(struct enic *enic, int num_vfs)
+{
+	int err;
+
+	if (!enic->has_admin_channel) {
+		netdev_err(enic->netdev,
+			   "V2 SR-IOV requires admin channel resources\n");
+		return -EOPNOTSUPP;
+	}
+
+	enic->vf_state = kcalloc(num_vfs, sizeof(*enic->vf_state), GFP_KERNEL);
+	if (!enic->vf_state)
+		return -ENOMEM;
+
+	err = enic_admin_channel_open(enic);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "Failed to open admin channel: %d\n", err);
+		goto free_vf_state;
+	}
+
+	enic_mbox_init(enic);
+
+	enic->num_vfs = num_vfs;
+
+	err = pci_enable_sriov(enic->pdev, num_vfs);
+	if (err) {
+		netdev_err(enic->netdev,
+			   "pci_enable_sriov failed: %d\n", err);
+		goto close_admin;
+	}
+
+	enic->priv_flags |= ENIC_SRIOV_ENABLED;
+	return num_vfs;
+
+close_admin:
+	enic->num_vfs = 0;
+	enic_admin_channel_close(enic);
+free_vf_state:
+	kfree(enic->vf_state);
+	enic->vf_state = NULL;
+	return err;
+}
+
+static void enic_sriov_v2_disable(struct enic *enic)
+{
+	/* Stop new VF link-state broadcasts before tearing down vf_state.
+	 * Clearing ENIC_SRIOV_ENABLED makes enic_link_check() (called from
+	 * the notify timer/ISR) skip the VF notify path, and cancelling
+	 * link_notify_work ensures any already-queued broadcast has finished
+	 * before vf_state is freed, closing a use-after-free window.
+	 */
+	enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
+	cancel_work_sync(&enic->link_notify_work);
+
+	pci_disable_sriov(enic->pdev);
+	enic_admin_channel_close(enic);
+	kfree(enic->vf_state);
+	enic->vf_state = NULL;
+	enic->num_vfs = 0;
+}
+
+static int __maybe_unused
+enic_sriov_configure(struct pci_dev *pdev, int num_vfs)
+{
+	struct net_device *netdev = pci_get_drvdata(pdev);
+	struct enic *enic = netdev_priv(netdev);
+	struct enic_port_profile *pp;
+	int err;
+
+	if (num_vfs > 0) {
+		if (enic->config.mq_subvnic_count) {
+			netdev_err(netdev,
+				   "SR-IOV not supported with multi-queue sub-vnics\n");
+			return -EOPNOTSUPP;
+		}
+
+		if (enic->vf_type == ENIC_VF_TYPE_NONE) {
+			netdev_err(netdev,
+				   "SR-IOV not supported on this firmware version\n");
+			return -EOPNOTSUPP;
+		}
+
+		if (enic->vf_type == ENIC_VF_TYPE_V2)
+			return enic_sriov_v2_enable(enic, num_vfs);
+
+		pp = kcalloc(num_vfs, sizeof(*pp), GFP_KERNEL);
+		if (!pp)
+			return -ENOMEM;
+
+		err = pci_enable_sriov(pdev, num_vfs);
+		if (err) {
+			kfree(pp);
+			return err;
+		}
+
+		kfree(enic->pp);
+		enic->pp = pp;
+		enic->num_vfs = num_vfs;
+		enic->priv_flags |= ENIC_SRIOV_ENABLED;
+		return num_vfs;
+	}
+
+	if (!enic_sriov_enabled(enic))
+		return 0;
+
+	if (enic->vf_type == ENIC_VF_TYPE_V2) {
+		enic_sriov_v2_disable(enic);
+		return 0;
+	}
+
+	pp = kzalloc_obj(*enic->pp, GFP_KERNEL);
+	if (!pp)
+		return -ENOMEM;
+
+	pci_disable_sriov(pdev);
+	enic->num_vfs = 0;
+	enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
+
+	kfree(enic->pp);
+	enic->pp = pp;
+
+	return 0;
 }
 #endif
 
@@ -2768,12 +3043,18 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 		goto err_out_vnic_unregister;
 
 #ifdef CONFIG_PCI_IOV
-	/* Get number of subvnics */
+	enic_sriov_detect_vf_type(enic);
+
+	/* Auto-enable SR-IOV if VFs were pre-configured (e.g. at boot).
+	 * V2 VFs require the admin channel, which is not yet set up at probe
+	 * time; use sysfs (enic_sriov_configure) to enable V2 SR-IOV instead.
+	 */
 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
 	if (pos) {
 		pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
 			&enic->num_vfs);
-		if (enic->num_vfs) {
+		if (enic->num_vfs &&
+		    enic->vf_type != ENIC_VF_TYPE_V2) {
 			err = pci_enable_sriov(pdev, enic->num_vfs);
 			if (err) {
 				dev_err(dev, "SRIOV enable failed, aborting."
@@ -2785,7 +3066,6 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 			num_pps = enic->num_vfs;
 		}
 	}
-	enic_sriov_detect_vf_type(enic);
 #endif
 
 	/* Allocate structure for port profiles */
@@ -2850,6 +3130,44 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 		goto err_out_dev_close;
 	}
 
+	/* Initialise link_notify_work before the V2-VF admin-open block below:
+	 * its error path (err_out_admin_close -> enic_admin_channel_close() ->
+	 * cancel_work_sync()) would otherwise act on an uninitialised work.
+	 */
+	INIT_WORK(&enic->link_notify_work, enic_link_notify_work_handler);
+
+	/* V2 VF: open admin channel and register with PF.
+	 * Must happen before register_netdev so the VF is fully
+	 * initialized before the interface is visible to userspace.
+	 *
+	 * admin_channel_open() runs before enic_mbox_init() installs
+	 * the receive handler.  This is safe because
+	 * enic_admin_rq_cq_service() checks admin_rq_handler before
+	 * enqueuing any received buffer, so interrupts that fire
+	 * between open and mbox_init are harmlessly discarded.
+	 */
+	if (enic_is_sriov_vf_v2(enic)) {
+		err = enic_admin_channel_open(enic);
+		if (err) {
+			dev_err(dev,
+				"Failed to open admin channel: %d\n", err);
+			goto err_out_dev_deinit;
+		}
+		enic_mbox_init(enic);
+		err = enic_mbox_vf_capability_check(enic);
+		if (err) {
+			dev_err(dev,
+				"MBOX capability check failed: %d\n", err);
+			goto err_out_admin_close;
+		}
+		err = enic_mbox_vf_register(enic);
+		if (err) {
+			dev_err(dev,
+				"MBOX VF registration failed: %d\n", err);
+			goto err_out_admin_close;
+		}
+	}
+
 	netif_set_real_num_tx_queues(netdev, enic->wq_count);
 	netif_set_real_num_rx_queues(netdev, enic->rq_count);
 
@@ -2874,7 +3192,7 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	err = enic_set_mac_addr(netdev, enic->mac_addr);
 	if (err) {
 		dev_err(dev, "Invalid MAC address, aborting\n");
-		goto err_out_dev_deinit;
+		goto err_out_admin_close;
 	}
 
 	enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
@@ -2972,11 +3290,23 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	err = register_netdev(netdev);
 	if (err) {
 		dev_err(dev, "Cannot register net device, aborting\n");
-		goto err_out_dev_deinit;
+		goto err_out_admin_close;
 	}
 
 	return 0;
 
+err_out_admin_close:
+	if (enic_is_sriov_vf_v2(enic)) {
+		if (enic->vf_registered) {
+			int unreg_err = enic_mbox_vf_unregister(enic);
+
+			if (unreg_err)
+				netdev_warn(netdev,
+					    "Failed to unregister from PF: %d\n",
+					    unreg_err);
+		}
+		enic_admin_channel_close(enic);
+	}
 err_out_dev_deinit:
 	enic_dev_deinit(enic);
 err_out_dev_close:
@@ -3012,16 +3342,42 @@ static void enic_remove(struct pci_dev *pdev)
 		struct enic *enic = netdev_priv(netdev);
 
 		cancel_work_sync(&enic->reset);
+		cancel_work_sync(&enic->tx_hang_reset);
 		cancel_work_sync(&enic->change_mtu_work);
+
+		/* Close the admin channel and unregister from the PF before
+		 * unregister_netdev() to prevent a late PF notification from
+		 * touching a netdev that has been freed.
+		 */
+		if (enic_is_sriov_vf_v2(enic)) {
+			if (enic->vf_registered) {
+				int unreg_err = enic_mbox_vf_unregister(enic);
+
+				if (unreg_err)
+					netdev_warn(netdev,
+						    "Failed to unregister from PF: %d\n",
+						    unreg_err);
+			}
+			enic_admin_channel_close(enic);
+		}
+
 		unregister_netdev(netdev);
-		enic_dev_deinit(enic);
-		vnic_dev_close(enic->vdev);
+		/* unregister_netdev() -> enic_stop() stops the notify timer, so
+		 * no new link_notify_work can be queued past this point.  Cancel
+		 * unconditionally to cover the narrow window where
+		 * enic_link_check() scheduled it just as SR-IOV was disabled.
+		 */
+		cancel_work_sync(&enic->link_notify_work);
 #ifdef CONFIG_PCI_IOV
 		if (enic_sriov_enabled(enic)) {
-			pci_disable_sriov(pdev);
-			enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
+			if (enic->vf_type == ENIC_VF_TYPE_V2)
+				enic_sriov_v2_disable(enic);
+			else
+				pci_disable_sriov(pdev);
 		}
 #endif
+		enic_dev_deinit(enic);
+		vnic_dev_close(enic->vdev);
 		kfree(enic->pp);
 		vnic_dev_unregister(enic->vdev);
 		enic_iounmap(enic);
diff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.c b/drivers/net/ethernet/cisco/enic/enic_mbox.c
new file mode 100644
index 00000000000000..5cdaf5a0e52467
--- /dev/null
+++ b/drivers/net/ethernet/cisco/enic/enic_mbox.c
@@ -0,0 +1,640 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright 2025 Cisco Systems, Inc.  All rights reserved.
+
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/completion.h>
+
+#include "vnic_dev.h"
+#include "vnic_wq.h"
+#include "vnic_cq.h"
+#include "enic.h"
+#include "enic_admin.h"
+#include "enic_mbox.h"
+#include "wq_enet_desc.h"
+
+#define ENIC_MBOX_POLL_TIMEOUT_US	5000000
+#define ENIC_MBOX_POLL_INTERVAL_US	100
+
+static void enic_mbox_fill_hdr(struct enic *enic, struct enic_mbox_hdr *hdr,
+			       u8 msg_type, u16 dst_vnic_id, u16 msg_len)
+{
+	memset(hdr, 0, sizeof(*hdr));
+	hdr->dst_vnic_id = cpu_to_le16(dst_vnic_id);
+	hdr->msg_type = msg_type;
+	hdr->msg_len = cpu_to_le16(msg_len);
+	hdr->msg_num = cpu_to_le64(++enic->mbox_msg_num);
+}
+
+int enic_mbox_send_msg(struct enic *enic, u8 msg_type, u16 dst_vnic_id,
+		       void *payload, u16 payload_len)
+{
+	u16 total_len = sizeof(struct enic_mbox_hdr) + payload_len;
+	struct vnic_wq *wq = &enic->admin_wq;
+	struct wq_enet_desc *desc;
+	unsigned long timeout;
+	dma_addr_t dma_addr;
+	u16 vlan_tag;
+	void *buf;
+	int err;
+
+	/* Serialize MBOX sends. The admin channel is a low-frequency
+	 * control path; holding the mutex across the poll is acceptable.
+	 */
+	mutex_lock(&enic->mbox_lock);
+
+	if (!enic->has_admin_channel || READ_ONCE(enic->mbox_send_disabled)) {
+		err = -ENODEV;
+		goto unlock;
+	}
+
+	if (vnic_wq_desc_avail(wq) == 0) {
+		err = -ENOSPC;
+		goto unlock;
+	}
+
+	buf = kmalloc(total_len, GFP_KERNEL);
+	if (!buf) {
+		err = -ENOMEM;
+		goto unlock;
+	}
+
+	enic_mbox_fill_hdr(enic, buf, msg_type, dst_vnic_id, total_len);
+	if (payload_len) {
+		void *dst = buf + sizeof(struct enic_mbox_hdr);
+
+		memcpy(dst, payload, payload_len);
+	}
+
+	dma_addr = dma_map_single(&enic->pdev->dev, buf, total_len,
+				  DMA_TO_DEVICE);
+	if (dma_mapping_error(&enic->pdev->dev, dma_addr)) {
+		kfree(buf);
+		err = -ENOMEM;
+		goto unlock;
+	}
+
+	/* Firmware uses vlan field for routing: 0 = PF, 1-based = VF index */
+	if (dst_vnic_id == ENIC_MBOX_DST_PF)
+		vlan_tag = 0;
+	else
+		vlan_tag = dst_vnic_id + 1;
+
+	desc = vnic_wq_next_desc(wq);
+	wq_enet_desc_enc(desc, (u64)dma_addr | VNIC_PADDR_TARGET,
+			 total_len,
+			 0, 0, 0,       /* mss, hdr_len, offload_mode */
+			 1, 1,          /* eop, cq_entry */
+			 0,             /* fcoe_encap */
+			 1, vlan_tag,   /* vlan_tag_insert, vlan_tag */
+			 0);            /* loopback */
+	vnic_wq_post(wq, buf, dma_addr, total_len,
+		     1, 1,              /* sop, eop */
+		     1, 1,              /* desc_skip_cnt, cq_entry */
+		     0, 0);             /* compressed_send, wrid */
+	vnic_wq_doorbell(wq);
+
+	timeout = jiffies + usecs_to_jiffies(ENIC_MBOX_POLL_TIMEOUT_US);
+	err = -ETIMEDOUT;
+	while (time_before(jiffies, timeout)) {
+		if (enic_admin_wq_cq_service(enic)) {
+			err = 0;
+			break;
+		}
+		usleep_range(ENIC_MBOX_POLL_INTERVAL_US,
+			     ENIC_MBOX_POLL_INTERVAL_US + 50);
+	}
+	/* Final check in case completion arrived during the last sleep */
+	if (err && enic_admin_wq_cq_service(enic))
+		err = 0;
+
+	if (!err) {
+		wq->to_clean = wq->to_clean->next;
+		wq->ring.desc_avail++;
+		dma_unmap_single(&enic->pdev->dev, dma_addr, total_len,
+				 DMA_TO_DEVICE);
+		kfree(buf);
+	} else {
+		netdev_err(enic->netdev,
+			   "MBOX send timed out (type %u dst %u), disabling channel\n",
+			   msg_type, dst_vnic_id);
+		/*
+		 * The WQ descriptor is still live in hardware. Do not unmap
+		 * or free the buffer: the device may still DMA from dma_addr.
+		 * Mark the channel unusable so no further sends are attempted.
+		 */
+		WRITE_ONCE(enic->mbox_send_disabled, true);
+	}
+
+	netdev_dbg(enic->netdev,
+		   "MBOX send msg_type %u dst %u vlan %u err %d\n",
+		   msg_type, dst_vnic_id, vlan_tag, err);
+unlock:
+	mutex_unlock(&enic->mbox_lock);
+	return err;
+}
+
+static int enic_mbox_wait_reply(struct enic *enic, unsigned long timeout_ms)
+{
+	unsigned long left;
+
+	left = wait_for_completion_timeout(&enic->mbox_comp,
+					   msecs_to_jiffies(timeout_ms));
+
+	return left ? 0 : -ETIMEDOUT;
+}
+
+int enic_mbox_send_link_state(struct enic *enic, u16 vf_id, u32 link_state)
+{
+	struct enic_mbox_pf_link_state_notif_msg notif = {};
+
+	if (!enic->vf_state || vf_id >= enic->num_vfs ||
+	    !enic->vf_state[vf_id].registered) {
+		netdev_dbg(enic->netdev,
+			   "MBOX: skip link state to unregistered VF %u\n",
+			   vf_id);
+		return 0;
+	}
+
+	notif.link_state = cpu_to_le32(link_state);
+	return enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_NOTIF, vf_id,
+				  &notif, sizeof(notif));
+}
+
+static int enic_mbox_pf_handle_capability(struct enic *enic, void *msg,
+					  u16 vf_id, u64 msg_num)
+{
+	struct enic_mbox_vf_capability_reply_msg reply = {};
+
+	reply.reply.ret_major = cpu_to_le16(0);
+	reply.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1);
+
+	return enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REPLY, vf_id,
+				  &reply, sizeof(reply));
+}
+
+static int enic_mbox_pf_handle_register(struct enic *enic, void *msg,
+					u16 vf_id, u64 msg_num)
+{
+	struct enic_mbox_vf_register_reply_msg reply = {};
+	u32 link_state;
+	int err;
+
+	if (!enic->vf_state || vf_id >= enic->num_vfs) {
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: register from invalid VF %u\n",
+				    vf_id);
+		return -EINVAL;
+	}
+
+	/* VF re-registering (e.g. guest reboot without clean unregister):
+	 * mark the previous registration inactive before accepting the new one.
+	 */
+	if (enic->vf_state[vf_id].registered) {
+		netdev_dbg(enic->netdev,
+			   "MBOX: VF %u re-register, cleaning previous state\n",
+			   vf_id);
+		enic->vf_state[vf_id].registered = false;
+	}
+
+	reply.reply.ret_major = cpu_to_le16(0);
+	err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REPLY, vf_id,
+				 &reply, sizeof(reply));
+	if (err)
+		return err;
+
+	enic->vf_state[vf_id].registered = true;
+	if (net_ratelimit())
+		netdev_info(enic->netdev, "VF %u registered via MBOX\n", vf_id);
+
+	link_state = netif_carrier_ok(enic->netdev) ?
+		ENIC_MBOX_LINK_STATE_ENABLE :
+		ENIC_MBOX_LINK_STATE_DISABLE;
+	err = enic_mbox_send_link_state(enic, vf_id, link_state);
+	if (err && net_ratelimit())
+		netdev_warn(enic->netdev,
+			    "VF %u: failed to send initial link state: %d\n",
+			    vf_id, err);
+	/* Registration succeeded; initial link state notification sent
+	 * above.  Subsequent link state changes are sent from the PF
+	 * when enic_link_check() detects carrier changes.
+	 */
+	return 0;
+}
+
+static int enic_mbox_pf_handle_unregister(struct enic *enic, void *msg,
+					  u16 vf_id, u64 msg_num)
+{
+	struct enic_mbox_vf_register_reply_msg reply = {};
+	int err;
+
+	if (!enic->vf_state || vf_id >= enic->num_vfs) {
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: unregister from invalid VF %u\n",
+				    vf_id);
+		return -EINVAL;
+	}
+
+	/* VF is unloading; clear local state regardless of whether
+	 * the reply is successfully delivered to avoid the PF treating
+	 * a dead VF as still registered.
+	 */
+	enic->vf_state[vf_id].registered = false;
+
+	reply.reply.ret_major = cpu_to_le16(0);
+	err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REPLY, vf_id,
+				 &reply, sizeof(reply));
+
+	if (net_ratelimit())
+		netdev_info(enic->netdev,
+			    "VF %u unregistered via MBOX\n", vf_id);
+
+	return err;
+}
+
+static void enic_mbox_pf_process_msg(struct enic *enic,
+				     struct enic_mbox_hdr *hdr, void *payload)
+{
+	u16 vf_id = le16_to_cpu(hdr->src_vnic_id);
+	u16 msg_len = le16_to_cpu(hdr->msg_len);
+	int err = 0;
+
+	if (!enic->vf_state) {
+		netdev_dbg(enic->netdev,
+			   "MBOX: PF received msg but SRIOV not active\n");
+		return;
+	}
+
+	if (vf_id >= enic->num_vfs) {
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: PF received msg from invalid VF %u\n",
+				    vf_id);
+		return;
+	}
+
+	switch (hdr->msg_type) {
+	case ENIC_MBOX_VF_CAPABILITY_REQUEST:
+		err = enic_mbox_pf_handle_capability(enic, payload, vf_id,
+						     le64_to_cpu(hdr->msg_num));
+		break;
+	case ENIC_MBOX_VF_REGISTER_REQUEST:
+		err = enic_mbox_pf_handle_register(enic, payload, vf_id,
+						   le64_to_cpu(hdr->msg_num));
+		break;
+	case ENIC_MBOX_VF_UNREGISTER_REQUEST:
+		err = enic_mbox_pf_handle_unregister(enic, payload, vf_id,
+						     le64_to_cpu(hdr->msg_num));
+		break;
+	case ENIC_MBOX_PF_LINK_STATE_ACK: {
+		struct enic_mbox_pf_link_state_ack_msg *ack = payload;
+
+		if (msg_len < sizeof(*hdr) + sizeof(*ack))
+			break;
+		if (le16_to_cpu(ack->ack.ret_major) && net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: VF %u link state ACK error %u/%u\n",
+				    vf_id,
+				    le16_to_cpu(ack->ack.ret_major),
+				    le16_to_cpu(ack->ack.ret_minor));
+		break;
+	}
+	default:
+		netdev_dbg(enic->netdev,
+			   "MBOX: PF unhandled msg type %u from VF %u\n",
+			   hdr->msg_type, vf_id);
+		err = -EOPNOTSUPP;
+		break;
+	}
+
+	if (err && net_ratelimit())
+		netdev_warn(enic->netdev,
+			    "MBOX: PF handler for msg type %u from VF %u failed: %d\n",
+			    hdr->msg_type, vf_id, err);
+}
+
+static void enic_mbox_vf_handle_capability_reply(struct enic *enic,
+						 void *payload)
+{
+	struct enic_mbox_vf_capability_reply_msg *reply = payload;
+
+	if (enic->mbox_expected_reply != ENIC_MBOX_VF_CAPABILITY_REPLY) {
+		netdev_warn(enic->netdev,
+			    "MBOX: stale capability reply (expected %u), drop\n",
+			    enic->mbox_expected_reply);
+		return;
+	}
+
+	if (le16_to_cpu(reply->reply.ret_major) == 0)
+		enic->pf_cap_version = le32_to_cpu(reply->version);
+	else
+		netdev_warn(enic->netdev,
+			    "MBOX: PF rejected capability request: %u/%u\n",
+			    le16_to_cpu(reply->reply.ret_major),
+			    le16_to_cpu(reply->reply.ret_minor));
+	complete(&enic->mbox_comp);
+}
+
+static void enic_mbox_vf_handle_register_reply(struct enic *enic,
+					       void *payload)
+{
+	struct enic_mbox_vf_register_reply_msg *reply = payload;
+
+	if (enic->mbox_expected_reply != ENIC_MBOX_VF_REGISTER_REPLY) {
+		netdev_warn(enic->netdev,
+			    "MBOX: stale register reply (expected %u), drop\n",
+			    enic->mbox_expected_reply);
+		return;
+	}
+
+	if (le16_to_cpu(reply->reply.ret_major)) {
+		netdev_warn(enic->netdev,
+			    "MBOX: VF register rejected by PF: %u/%u\n",
+			    le16_to_cpu(reply->reply.ret_major),
+			    le16_to_cpu(reply->reply.ret_minor));
+	} else {
+		enic->vf_registered = true;
+	}
+	complete(&enic->mbox_comp);
+}
+
+static void enic_mbox_vf_handle_unregister_reply(struct enic *enic,
+						 void *payload)
+{
+	struct enic_mbox_vf_register_reply_msg *reply = payload;
+
+	if (enic->mbox_expected_reply != ENIC_MBOX_VF_UNREGISTER_REPLY) {
+		netdev_warn(enic->netdev,
+			    "MBOX: stale unregister reply (expected %u), drop\n",
+			    enic->mbox_expected_reply);
+		return;
+	}
+
+	if (le16_to_cpu(reply->reply.ret_major)) {
+		netdev_warn(enic->netdev,
+			    "MBOX: VF unregister rejected by PF: %u/%u\n",
+			    le16_to_cpu(reply->reply.ret_major),
+			    le16_to_cpu(reply->reply.ret_minor));
+	} else {
+		enic->vf_registered = false;
+	}
+	complete(&enic->mbox_comp);
+}
+
+static void enic_mbox_vf_handle_link_state(struct enic *enic, void *payload)
+{
+	struct enic_mbox_pf_link_state_notif_msg *notif = payload;
+	struct enic_mbox_pf_link_state_ack_msg ack = {};
+	int err;
+
+	switch (le32_to_cpu(notif->link_state)) {
+	case ENIC_MBOX_LINK_STATE_ENABLE:
+		if (!netif_carrier_ok(enic->netdev))
+			netif_carrier_on(enic->netdev);
+		netdev_dbg(enic->netdev, "MBOX: link state -> UP\n");
+		break;
+	case ENIC_MBOX_LINK_STATE_DISABLE:
+		if (netif_carrier_ok(enic->netdev))
+			netif_carrier_off(enic->netdev);
+		netdev_dbg(enic->netdev, "MBOX: link state -> DOWN\n");
+		break;
+	default:
+		netdev_warn(enic->netdev, "MBOX: unknown link state %u\n",
+			    le32_to_cpu(notif->link_state));
+		ack.ack.ret_major = cpu_to_le16(ENIC_MBOX_ERR_GENERIC);
+		break;
+	}
+
+	err = enic_mbox_send_msg(enic, ENIC_MBOX_PF_LINK_STATE_ACK,
+				 ENIC_MBOX_DST_PF, &ack, sizeof(ack));
+	if (err && net_ratelimit())
+		netdev_warn(enic->netdev,
+			    "MBOX: failed to send link state ACK: %d\n", err);
+}
+
+static bool enic_mbox_vf_payload_ok(struct enic *enic, u8 msg_type,
+				    u16 payload_len, size_t min_len)
+{
+	if (payload_len < min_len) {
+		netdev_warn(enic->netdev,
+			    "MBOX: short payload for type %u (%u < %zu)\n",
+			    msg_type, payload_len, min_len);
+		return false;
+	}
+	return true;
+}
+
+static void enic_mbox_vf_process_msg(struct enic *enic,
+				     struct enic_mbox_hdr *hdr, void *payload,
+				     u16 payload_len)
+{
+	switch (hdr->msg_type) {
+	case ENIC_MBOX_VF_CAPABILITY_REPLY: {
+		size_t exp = sizeof(struct enic_mbox_vf_capability_reply_msg);
+
+		if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type,
+					     payload_len, exp))
+			return;
+		enic_mbox_vf_handle_capability_reply(enic, payload);
+		break;
+	}
+	case ENIC_MBOX_VF_REGISTER_REPLY: {
+		size_t exp = sizeof(struct enic_mbox_vf_register_reply_msg);
+
+		if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type,
+					     payload_len, exp))
+			return;
+		enic_mbox_vf_handle_register_reply(enic, payload);
+		break;
+	}
+	case ENIC_MBOX_VF_UNREGISTER_REPLY: {
+		size_t exp = sizeof(struct enic_mbox_vf_register_reply_msg);
+
+		if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type,
+					     payload_len, exp))
+			return;
+		enic_mbox_vf_handle_unregister_reply(enic, payload);
+		break;
+	}
+	case ENIC_MBOX_PF_LINK_STATE_NOTIF: {
+		size_t exp = sizeof(struct enic_mbox_pf_link_state_notif_msg);
+
+		if (!enic_mbox_vf_payload_ok(enic, hdr->msg_type,
+					     payload_len, exp))
+			return;
+		enic_mbox_vf_handle_link_state(enic, payload);
+		break;
+	}
+	default:
+		netdev_dbg(enic->netdev,
+			   "MBOX: VF unhandled msg type %u\n",
+			   hdr->msg_type);
+		break;
+	}
+}
+
+static void enic_mbox_recv_handler(struct enic *enic, void *buf,
+				   unsigned int len)
+{
+	struct enic_mbox_hdr *hdr = buf;
+	void *payload;
+	u16 msg_len;
+
+	if (len < sizeof(*hdr)) {
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: truncated message (len %u < %zu)\n",
+				    len, sizeof(*hdr));
+		return;
+	}
+
+	if (hdr->msg_type >= ENIC_MBOX_MAX) {
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: unknown msg type %u\n",
+				    hdr->msg_type);
+		return;
+	}
+
+	msg_len = le16_to_cpu(hdr->msg_len);
+	if (msg_len < sizeof(*hdr) || msg_len > len) {
+		if (net_ratelimit())
+			netdev_warn(enic->netdev,
+				    "MBOX: invalid msg_len %u (buf len %u)\n",
+				    msg_len, len);
+		return;
+	}
+
+	netdev_dbg(enic->netdev,
+		   "MBOX recv: type %u from vnic %u len %u\n",
+		   hdr->msg_type, le16_to_cpu(hdr->src_vnic_id), msg_len);
+
+	payload = buf + sizeof(*hdr);
+
+	if (enic->vf_state) {
+		enic_mbox_pf_process_msg(enic, hdr, payload);
+	} else if (le16_to_cpu(hdr->src_vnic_id) == ENIC_MBOX_DST_PF) {
+		/* src_vnic_id was overwritten from the hardware-verified CQ
+		 * VLAN sender field, so a VF only accepts messages that the
+		 * adapter attributes to the PF.  Its sole admin-channel peer is
+		 * the PF; drop anything else as a spoofed notification.
+		 */
+		enic_mbox_vf_process_msg(enic, hdr, payload,
+					 msg_len - (u16)sizeof(*hdr));
+	} else if (net_ratelimit()) {
+		netdev_warn(enic->netdev,
+			    "MBOX: VF dropping non-PF message from vnic %u\n",
+			    le16_to_cpu(hdr->src_vnic_id));
+	}
+}
+
+int enic_mbox_vf_capability_check(struct enic *enic)
+{
+	struct enic_mbox_vf_capability_msg req = {};
+	int err;
+
+	enic->pf_cap_version = 0;
+	reinit_completion(&enic->mbox_comp);
+	enic->mbox_expected_reply = ENIC_MBOX_VF_CAPABILITY_REPLY;
+	req.version = cpu_to_le32(ENIC_MBOX_CAP_VERSION_1);
+
+	err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_CAPABILITY_REQUEST,
+				 ENIC_MBOX_DST_PF, &req, sizeof(req));
+	if (err) {
+		enic->mbox_expected_reply = 0;
+		return err;
+	}
+
+	err = enic_mbox_wait_reply(enic, 3000);
+	enic->mbox_expected_reply = 0;
+	if (err) {
+		netdev_warn(enic->netdev,
+			    "MBOX: no capability reply from PF\n");
+		return err;
+	}
+
+	if (enic->pf_cap_version < ENIC_MBOX_CAP_VERSION_1) {
+		netdev_warn(enic->netdev,
+			    "MBOX: PF version %u too old\n",
+			    enic->pf_cap_version);
+		return -EOPNOTSUPP;
+	}
+
+	return 0;
+}
+
+int enic_mbox_vf_register(struct enic *enic)
+{
+	int err;
+
+	enic->vf_registered = false;
+	reinit_completion(&enic->mbox_comp);
+	enic->mbox_expected_reply = ENIC_MBOX_VF_REGISTER_REPLY;
+
+	err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_REGISTER_REQUEST,
+				 ENIC_MBOX_DST_PF, NULL, 0);
+	if (err) {
+		enic->mbox_expected_reply = 0;
+		return err;
+	}
+
+	err = enic_mbox_wait_reply(enic, 3000);
+	enic->mbox_expected_reply = 0;
+	if (err) {
+		netdev_warn(enic->netdev,
+			    "MBOX: VF registration with PF timed out\n");
+		return err;
+	}
+
+	if (!enic->vf_registered)
+		return -ENODEV;
+
+	return 0;
+}
+
+int enic_mbox_vf_unregister(struct enic *enic)
+{
+	int err;
+
+	if (!enic->vf_registered)
+		return 0;
+
+	reinit_completion(&enic->mbox_comp);
+	enic->mbox_expected_reply = ENIC_MBOX_VF_UNREGISTER_REPLY;
+
+	err = enic_mbox_send_msg(enic, ENIC_MBOX_VF_UNREGISTER_REQUEST,
+				 ENIC_MBOX_DST_PF, NULL, 0);
+	if (err) {
+		enic->mbox_expected_reply = 0;
+		return err;
+	}
+
+	err = enic_mbox_wait_reply(enic, 3000);
+	enic->mbox_expected_reply = 0;
+	if (err)
+		return err;
+	if (enic->vf_registered)
+		return -EACCES;
+	return 0;
+}
+
+void enic_mbox_init(struct enic *enic)
+{
+	/* mbox_lock and mbox_comp must be initialized exactly once per
+	 * device lifetime; the PF sriov_configure path can re-enter this
+	 * on each enable cycle where these primitives are already set up.
+	 */
+	if (!enic->mbox_initialized) {
+		mutex_init(&enic->mbox_lock);
+		init_completion(&enic->mbox_comp);
+		enic->mbox_initialized = true;
+	} else {
+		reinit_completion(&enic->mbox_comp);
+	}
+	enic->mbox_msg_num = 0;
+	enic->admin_rq_handler = enic_mbox_recv_handler;
+}
diff --git a/drivers/net/ethernet/cisco/enic/enic_mbox.h b/drivers/net/ethernet/cisco/enic/enic_mbox.h
new file mode 100644
index 00000000000000..15e30ee2b0ed95
--- /dev/null
+++ b/drivers/net/ethernet/cisco/enic/enic_mbox.h
@@ -0,0 +1,95 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright 2025 Cisco Systems, Inc.  All rights reserved. */
+
+#ifndef _ENIC_MBOX_H_
+#define _ENIC_MBOX_H_
+
+#include <linux/bits.h>
+#include <linux/types.h>
+
+/*
+ * Mailbox protocol for PF-VF communication over the admin channel.
+ *
+ * Even numbers are requests, odd numbers are replies/acks.
+ * The prefix indicates the initiator: VF_ = VF-initiated, PF_ = PF-initiated.
+ */
+enum enic_mbox_msg_type {
+	ENIC_MBOX_VF_CAPABILITY_REQUEST		= 0,
+	ENIC_MBOX_VF_CAPABILITY_REPLY		= 1,
+	ENIC_MBOX_VF_REGISTER_REQUEST		= 2,
+	ENIC_MBOX_VF_REGISTER_REPLY		= 3,
+	ENIC_MBOX_VF_UNREGISTER_REQUEST		= 4,
+	ENIC_MBOX_VF_UNREGISTER_REPLY		= 5,
+	ENIC_MBOX_PF_LINK_STATE_NOTIF		= 6,
+	ENIC_MBOX_PF_LINK_STATE_ACK		= 7,
+	ENIC_MBOX_MAX
+};
+
+struct enic_mbox_hdr {
+	__le16 src_vnic_id;
+	__le16 dst_vnic_id;
+	u8 msg_type;
+	u8 flags;
+	__le16 msg_len;
+	__le64 msg_num;
+};
+
+struct enic_mbox_generic_reply {
+	__le16 ret_major;
+	__le16 ret_minor;
+};
+
+#define ENIC_MBOX_ERR_GENERIC		BIT(0)
+#define ENIC_MBOX_ERR_VF_NOT_REGISTERED	BIT(1)
+#define ENIC_MBOX_ERR_MSG_NOT_SUPPORTED	BIT(2)
+
+/* ENIC_MBOX_VF_CAPABILITY_REQUEST / _REPLY */
+#define ENIC_MBOX_CAP_VERSION_0		0
+#define ENIC_MBOX_CAP_VERSION_1		1
+
+struct enic_mbox_vf_capability_msg {
+	__le32 version;
+	__le32 reserved[32];
+};
+
+/* The embedded enic_mbox_generic_reply has 2-byte alignment, but the
+ * __le32 members give this struct 4-byte natural alignment.  Receive
+ * buffers come from kmalloc (>= 8-byte aligned), so there is no
+ * misaligned access risk when casting from the receive buffer.
+ */
+struct enic_mbox_vf_capability_reply_msg {
+	struct enic_mbox_generic_reply reply;
+	__le32 version;
+	__le32 reserved[32];
+};
+
+/* ENIC_MBOX_VF_REGISTER / _UNREGISTER */
+struct enic_mbox_vf_register_reply_msg {
+	struct enic_mbox_generic_reply reply;
+};
+
+/* ENIC_MBOX_PF_LINK_STATE_NOTIF / _ACK */
+#define ENIC_MBOX_LINK_STATE_DISABLE	0
+#define ENIC_MBOX_LINK_STATE_ENABLE	1
+
+struct enic_mbox_pf_link_state_notif_msg {
+	__le32 link_state;
+};
+
+struct enic_mbox_pf_link_state_ack_msg {
+	struct enic_mbox_generic_reply ack;
+};
+
+#define ENIC_MBOX_DST_PF	0xFFFF
+
+struct enic;
+
+void enic_mbox_init(struct enic *enic);
+int enic_mbox_send_msg(struct enic *enic, u8 msg_type, u16 dst_vnic_id,
+		       void *payload, u16 payload_len);
+int enic_mbox_send_link_state(struct enic *enic, u16 vf_id, u32 link_state);
+int enic_mbox_vf_capability_check(struct enic *enic);
+int enic_mbox_vf_register(struct enic *enic);
+int enic_mbox_vf_unregister(struct enic *enic);
+
+#endif /* _ENIC_MBOX_H_ */
diff --git a/drivers/net/ethernet/cisco/enic/enic_pp.c b/drivers/net/ethernet/cisco/enic/enic_pp.c
index 4720a952725d00..3f611e240c256c 100644
--- a/drivers/net/ethernet/cisco/enic/enic_pp.c
+++ b/drivers/net/ethernet/cisco/enic/enic_pp.c
@@ -25,6 +25,11 @@ int enic_is_valid_pp_vf(struct enic *enic, int vf, int *err)
 	if (vf != PORT_SELF_VF) {
 #ifdef CONFIG_PCI_IOV
 		if (enic_sriov_enabled(enic)) {
+			/* V2 SR-IOV uses MBOX, not port profiles */
+			if (enic->vf_type == ENIC_VF_TYPE_V2) {
+				*err = -EOPNOTSUPP;
+				goto err_out;
+			}
 			if (vf < 0 || vf >= enic->num_vfs) {
 				*err = -EINVAL;
 				goto err_out;
diff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ethernet/cisco/enic/enic_res.c
index 2b7545d6a67fdc..74cd2ee3af5cb7 100644
--- a/drivers/net/ethernet/cisco/enic/enic_res.c
+++ b/drivers/net/ethernet/cisco/enic/enic_res.c
@@ -59,6 +59,7 @@ int enic_get_vnic_config(struct enic *enic)
 	GET_CONFIG(intr_timer_usec);
 	GET_CONFIG(loop_tag);
 	GET_CONFIG(num_arfs);
+	GET_CONFIG(mq_subvnic_count);
 	GET_CONFIG(max_rq_ring);
 	GET_CONFIG(max_wq_ring);
 	GET_CONFIG(max_cq_ring);
@@ -210,7 +211,8 @@ void enic_get_res_counts(struct enic *enic)
 		vnic_dev_get_res_count(enic->vdev, RES_TYPE_ADMIN_RQ) >= 1 &&
 		vnic_dev_get_res_count(enic->vdev, RES_TYPE_ADMIN_CQ) >=
 			ARRAY_SIZE(enic->admin_cq) &&
-		vnic_dev_get_res_count(enic->vdev, RES_TYPE_SRIOV_INTR) >= 1;
+		(enic_is_sriov_vf_v2(enic) ||
+		 vnic_dev_get_res_count(enic->vdev, RES_TYPE_SRIOV_INTR) >= 1);
 
 	dev_info(enic_get_dev(enic),
 		"vNIC resources avail: wq %d rq %d cq %d intr %d admin %s\n",
diff --git a/drivers/net/ethernet/cisco/enic/vnic_cq.h b/drivers/net/ethernet/cisco/enic/vnic_cq.h
index d46d4d2ef6bbac..35ffa323071305 100644
--- a/drivers/net/ethernet/cisco/enic/vnic_cq.h
+++ b/drivers/net/ethernet/cisco/enic/vnic_cq.h
@@ -76,6 +76,15 @@ int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
 int vnic_cq_alloc_with_type(struct vnic_dev *vdev, struct vnic_cq *cq,
 			    unsigned int index, unsigned int desc_count,
 			    unsigned int desc_size, unsigned int res_type);
+#define VNIC_CQ_FC_ENABLE	1
+#define VNIC_CQ_FC_DISABLE	0
+#define VNIC_CQ_COLOR_ENABLE	1
+#define VNIC_CQ_INTR_ENABLE	1
+#define VNIC_CQ_INTR_DISABLE	0
+#define VNIC_CQ_ENTRY_ENABLE	1
+#define VNIC_CQ_MSG_ENABLE	1
+#define VNIC_CQ_MSG_DISABLE	0
+
 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
 	unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
 	unsigned int cq_tail_color, unsigned int interrupt_enable,
diff --git a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h
index 605ef17f967e4a..90ca06691ebd63 100644
--- a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h
+++ b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h
@@ -455,8 +455,19 @@ enum vnic_devcmd_cmd {
 	 */
 	CMD_CQ_ENTRY_SIZE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 90),
 
+	/*
+	 * Set queue pair type (admin or data)
+	 * in: (u32) a0 = queue pair type (0 = admin, 1 = data)
+	 * in: (u32) a1 = enable (1) / disable (0)
+	 */
+	CMD_QP_TYPE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 97),
 };
 
+#define QP_TYPE_ADMIN	0
+#define QP_TYPE_DATA	1
+#define QP_ENABLE	1
+#define QP_DISABLE	0
+
 /* CMD_ENABLE2 flags */
 #define CMD_ENABLE2_STANDBY 0x0
 #define CMD_ENABLE2_ACTIVE  0x1
@@ -734,6 +745,8 @@ enum vic_feature_t {
 	VIC_FEATURE_VXLAN,
 	VIC_FEATURE_RDMA,
 	VIC_FEATURE_VXLAN_PATCH,
+	/* slot 3 reserved for firmware VIC_FEATURE_PTP */
+	VIC_FEATURE_SRIOV	= 4,
 	VIC_FEATURE_MAX,
 };
 
diff --git a/drivers/net/ethernet/cisco/enic/vnic_enet.h b/drivers/net/ethernet/cisco/enic/vnic_enet.h
index 9e8e86262a3fea..519d2969990b18 100644
--- a/drivers/net/ethernet/cisco/enic/vnic_enet.h
+++ b/drivers/net/ethernet/cisco/enic/vnic_enet.h
@@ -21,7 +21,9 @@ struct vnic_enet_config {
 	u16 loop_tag;
 	u16 vf_rq_count;
 	u16 num_arfs;
-	u8 reserved[66];
+	u8 reserved1[32];
+	u16 mq_subvnic_count;
+	u8 reserved2[32];
 	u32 max_rq_ring;	// MAX RQ ring size
 	u32 max_wq_ring;	// MAX WQ ring size
 	u32 max_cq_ring;	// MAX CQ ring size