AI Trajectory

Trajectory: (Expand/Collapse All)
Seq	Timestamp	Type	Name	Duration
0/0	2026/07/01 11:01	flow	patch-triage	1m Args: null Results: { "EnableConfigs": [ "USB_NET_AX88179_178A" ], "FocusSymbols": [ "ax88179a_bind", "ax88179a_unbind", "ax88179a_link_reset", "ax88179a_rx_fixup", "ax88179a_tx_fixup", "ax179a_vlan_rx_add_vid", "ax179a_vlan_rx_kill_vid", "ax88179a_get_pauseparam", "ax88179a_set_pauseparam", "ax88179a_rx_checksum", "ax88179a_bulkin_config" ], "Reasoning": "The patch adds support for new ASIX USB Ethernet chips (AX88179A, AX88772D, AX88279) to the ax88179_178a driver. It introduces new initialization, link reset, and packet parsing (rx/tx fixup) logic specific to these chips. Fuzzing should focus on the new USB device binding and packet processing paths.", "WorthFuzzing": true }
1/1	2026/07/01 11:01	action	read-patch-diff	0m Args: null Results: { "PatchDiff": "commit 9c37795baab5de68feebe32b4e2cf8b37f5af5a4\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate: Wed Jul 1 11:01:23 2026 +0000\n\n syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/usb/ax88179_178a.c b/drivers/net/usb/ax88179_178a.c\nindex 98f899ea2e9462..12fc20e5f76e69 100644\n--- a/drivers/net/usb/ax88179_178a.c\n+++ b/drivers/net/usb/ax88179_178a.c\n@@ -13,9 +13,12 @@\n #include \u003clinux/usb/usbnet.h\u003e\n #include \u003cuapi/linux/mdio.h\u003e\n #include \u003clinux/mdio.h\u003e\n+#include \u003clinux/if_vlan.h\u003e\n \n #define AX88179_PHY_ID\t\t\t\t0x03\n #define AX_EEPROM_LEN\t\t\t\t0x100\n+#define AX88279_EEPROM_LEN\t\t\t0x4000\n+#define AX88179A_EEPROM_LEN\t\t\t(32 * 20)\n #define AX88179_EEPROM_MAGIC\t\t\t0x17900b95\n #define AX_MCAST_FLTSIZE\t\t\t8\n #define AX_MAX_MCAST\t\t\t\t64\n@@ -32,17 +35,33 @@\n #define AX_ACCESS_EEPROM\t\t\t0x04\n #define AX_ACCESS_EFUS\t\t\t\t0x05\n #define AX_RELOAD_EEPROM_EFUSE\t\t\t0x06\n-#define AX_PAUSE_WATERLVL_HIGH\t\t\t0x54\n-#define AX_PAUSE_WATERLVL_LOW\t\t\t0x55\n-\n+#define AX88179A_WAKEUP_SETTING\t\t\t0x07\n+#define AX_FW_MODE\t\t\t\t0x08\n+#define AX_GPHY_CTL\t\t\t\t0x0F\n+#define AX88179A_FLASH_READ\t\t\t0x21\n+#define AX88179A_FLASH_WEN\t\t\t0x22\n+#define AX88179A_FLASH_WDIS\t\t\t0x23\n+#define AX88179A_FLASH_WRITE\t\t\t0x24\n+#define AX88179A_PHY_CLAUSE45\t\t\t0x27\n+#define AX88179A_FLASH_ERASE_SECTION\t\t0x28\n+#define AX88179A_ACCESS_BL\t\t\t0x2A\n+#define AX88179A_PHY_POWER\t\t\t0x31\n+#define AX88179A_AUTODETACH\t\t\t0xC0\n+#define AX_PAUSE_WATERLVL_LOW\t\t\t0x54\n+#define AX_PAUSE_WATERLVL_HIGH\t\t\t0x55\n+\n+#define AX_FW_MODE_179A\t\t\t\t0x01\n #define PHYSICAL_LINK_STATUS\t\t\t0x02\n \t#define\tAX_USB_SS\t\t0x04\n \t#define\tAX_USB_HS\t\t0x02\n+\t#define AX_USB_FS\t\t0x01\n \n #define GENERAL_STATUS\t\t\t\t0x03\n /* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 /\n \t#define\tAX_SECLD\t\t0x04\n \n+#define AX_CHIP_STATUS\t\t\t\t0x05\n+\n #define AX_SROM_ADDR\t\t\t\t0x07\n #define AX_SROM_CMD\t\t\t\t0x0a\n \t#define EEP_RD\t\t\t0x04\n@@ -62,6 +81,15 @@\n \t#define AX_RX_CTL_PRO\t\t0x0001\n \t#define AX_RX_CTL_STOP\t\t0x0000\n \n+#define AX88179A_ETH_TX_GAP\t\t\t0x0D\n+\n+#define AX88179A_BFM_DATA\t\t\t0x0E\n+\t#define AX_TX_QUEUE_CFG\t\t0x02\n+\t#define AX_TX_QUEUE_SET\t\t0x08\n+\t#define AX_TX_Q1_AHB_FC_EN\t0x10\n+\t#define AX_TX_Q2_AHB_FC_EN\t0x20\n+\t#define AX_XGMII_EN\t\t0x80\n+\n #define AX_NODE_ID\t\t\t\t0x10\n #define AX_MULFLTARY\t\t\t\t0x16\n \n@@ -91,7 +119,21 @@\n \t#define AX_PHYPWR_RSTCTL_IPRL\t0x0020\n \t#define AX_PHYPWR_RSTCTL_AT\t0x1000\n \n+#define AX88179A_VLAN_ID_ADDRESS\t\t0x2A\n+\n+#define AX88179A_VLAN_ID_CONTROL\t\t0x2B\n+\t#define AX_VLAN_CONTROL_WE\t0x0001\n+\t#define AX_VLAN_CONTROL_RD\t0x0002\n+\t#define AX_VLAN_CONTROL_VSO\t0x0010\n+\t#define AX_VLAN_CONTROL_VFE\t0x0020\n+\n+#define AX88179A_VLAN_ID_DATA0\t\t\t0x2C\n+#define AX88179A_VLAN_ID_DATA1\t\t\t0x2D\n+\n #define AX_RX_BULKIN_QCTRL\t\t\t0x2e\n+\n+#define AX_GPHY_EEE_CTRL\t\t\t0x01\n+\n #define AX_CLK_SELECT\t\t\t\t0x33\n \t#define AX_CLK_SELECT_BCS\t0x01\n \t#define AX_CLK_SELECT_ACS\t0x02\n@@ -111,7 +153,51 @@\n \t#define AX_TXCOE_TCPV6\t\t0x20\n \t#define AX_TXCOE_UDPV6\t\t0x40\n \n+#define AX88179A_MAC_BM_INT_MASK\t\t0x41\n+#define AX88179A_MAC_BM_RX_DMA_CTL\t\t0x43\n+#define AX88179A_MAC_BM_TX_DMA_CTL\t\t0x46\n+\n+#define AX88179A_MAC_RX_STATUS_CDC\t\t0x6D\n+\t#define AX_LSOFC_WCNT_7_ACCESS\t0x03\n+\t#define AX_GMII_CRC_APPEND\t0x10\n+\n #define AX_LEDCTRL\t\t\t\t0x73\n+#define AX88179A_MAC_ARC_CTRL\t\t\t0x9E\n+#define AX88179A_MAC_SWP_CTRL\t\t\t0xB1\n+\n+#define AX88179A_MAC_TX_PAUSE\t\t\t0xB2\n+\n+#define AX88179A_MAC_CDC_DELAY_TX\t\t0xB5\n+\n+#define AX88179A_MAC_PATH\t\t\t0xB7\n+\t#define AX_MAC_RX_PATH_READY\t0x01\n+\t#define AX_MAC_TX_PATH_READY\t0x02\n+\n+#define AX88179A_NEW_PAUSE_CTRL\t\t\t0xB8\n+\t#define AX_NEW_PAUSE_EN\t\t0x01\n+\n+#define AX88179A_MAC_BULK_OUT_CTRL\t\t0xB9\n+\t#define AX_MAC_EFF_EN\t\t0x02\n+\n+#define AX88179A_MAC_RX_DATA_CDC_CNT\t\t0xC0\n+\t#define AX_MAC_LSO_ERR_EN\t0x04\n+\t#define AX_MAC_MIQFFCTRL_FORMAT\t0x10\n+\t#define AX_MAC_MIQFFCTRL_DROP_CRC 0x20\n+\n+#define AX88179A_AUTODETACH_DELAY\t(5UL \u003c\u003c 8)\n+#define AX88179A_AUTODETACH_EN\t\t1\n+\n+#define AX88179A_MAC_LSO_ENHANCE_CTRL\t\t0xC3\n+\t#define AX_LSO_ENHANCE_EN\t0x01\n+\n+#define AX88179A_MAC_TX_HDR_CKSUM\t\t0xCC\n+#define AX88179A_EP5_EHR\t\t\t0xF9\n+\n+#define AX_PHY_POWER\t\t\t\t0x02\n+\n+#define EPHY_LOW_POWER_EN\t\t\t0x01\n+#define S5_WOL_EN\t\t\t\t0x04\n+#define S5_WOL_LOW_POWER\t\t\t0x20\n \n #define GMII_PHY_PHYSR\t\t\t\t0x11\n \t#define GMII_PHY_PHYSR_SMASK\t0xc000\n@@ -164,8 +250,56 @@\n \t#define GMII_PHY_PGSEL_PAGE3\t0x0003\n \t#define GMII_PHY_PGSEL_PAGE5\t0x0005\n \n+/ TX Descriptor /\n+#define AX179A_TX_DESC_LEN_MASK\t\t0x1FFFFF\n+#define AX179A_TX_DESC_DROP_PADD\tBIT(28)\n+#define AX179A_TX_DESC_VLAN\t\tBIT(29)\n+#define AX179A_TX_DESC_MSS_MASK\t\t0x7FFF\n+#define AX179A_TX_DESC_MSS_SHIFT\t0x20\n+#define AX179A_TX_DESC_VLAN_MASK\t0xFFFF\n+#define AX179A_TX_DESC_VLAN_SHIFT\t0x30\n+\n+/ RX Packet Descriptor /\n+#define AX179A_RX_PD_L4_ERR\t\tBIT(0)\n+#define AX179A_RX_PD_L3_ERR\t\tBIT(1)\n+#define AX179A_RX_PD_L4_TYPE_MASK\t0x1C\n+#define AX179A_RX_PD_L4_UDP\t\t0x04\n+#define AX179A_RX_PD_L4_TCP\t\t0x10\n+#define AX179A_RX_PD_L3_TYPE_MASK\t0x60\n+#define AX179A_RX_PD_L3_IP\t\t0x20\n+#define AX179A_RX_PD_L3_IP6\t\t0x40\n+\n+#define AX179A_RX_PD_VLAN\t\tBIT(10)\n+#define AX179A_RX_PD_RX_OK\t\tBIT(11)\n+#define AX179A_RX_PD_DROP\t\tBIT(31)\n+#define AX179A_RX_PD_LEN_MASK\t0x7FFF0000\n+#define AX179A_RX_PD_LEN_SHIFT\t0x10\n+#define AX179A_RX_PD_VLAN_SHIFT\t0x20\n+\n+/ RX Descriptor header /\n+#define AX179A_RX_DH_PKT_CNT_MASK\t\t0x1FFF\n+#define AX179A_RX_DH_DESC_OFFSET_MASK\t0xFFFFE000\n+#define AX179A_RX_DH_DESC_OFFSET_SHIFT\t0x0D\n+\n+#define AX179A_RX_HW_PAD\t\t\t0x02\n+\n static int ax88179_reset(struct usbnet dev);\n \n+enum ax_ether_link_speed {\n+\tETHER_LINK_NONE = 0,\n+\tETHER_LINK_10 = 1,\n+\tETHER_LINK_100 = 2,\n+\tETHER_LINK_1000 = 3,\n+\tETHER_LINK_2500 = 4,\n+};\n+\n+enum ax_chip_version {\n+\tAX_VERSION_INVALID\t\t= 0x0,\n+\tAX_VERSION_AX88179\t\t= 0x4,\n+\tAX_VERSION_AX88179A\t\t= 0x6,\t/* Also AX88772D /\n+\tAX_VERSION_AX88279\t\t= 0x7,\n+};\n+\n struct ax88179_data {\n \tu8 eee_enabled;\n \tu8 eee_active;\n@@ -174,6 +308,16 @@ struct ax88179_data {\n \tu32 wol_supported;\n \tu32 wolopts;\n \tu8 disconnecting;\n+\tu8 chip_version;\n+\tu8 fw_version[4];\n+\tu8 is_ax88772d;\n+\tu8 ip_align;\n+\tu8 link;\n+\tu8 speed;\n+\tu8 full_duplex;\n+\tu8 rx_checksum;\n+\tu8 eeprom_read_cmd;\n+\tu16 eeprom_block;\n };\n \n struct ax88179_int_data {\n@@ -181,15 +325,48 @@ struct ax88179_int_data {\n \t__le32 intdata2;\n };\n \n-static const struct {\n+struct ax_bulkin_settings {\n \tunsigned char ctrl, timer_l, timer_h, size, ifg;\n-} AX88179_BULKIN_SIZE[] =\t{\n+};\n+\n+static const struct ax_bulkin_settings AX88179_BULKIN_SIZE[] =\t{\n \t{7, 0x4f, 0,\t0x12, 0xff},\n \t{7, 0x20, 3,\t0x16, 0xff},\n \t{7, 0xae, 7,\t0x18, 0xff},\n \t{7, 0xcc, 0x4c, 0x18, 8},\n };\n \n+static const struct ax_bulkin_settings AX88179A_BULKIN_SIZE[] = {\n+\t{5, 0x7B, 0x00,\t0x17, 0x0F},\t/ 1G, SS /\n+\t{5, 0xC0, 0x02,\t0x06, 0x0F},\t/ 1G, HS /\n+\t{7, 0xF0, 0x00,\t0x0C, 0x0F},\t/ 100M, Full, SS /\n+\t{6, 0x00, 0x00,\t0x06, 0x0F},\t/ 100M, Half, SS /\n+\t{5, 0xC0, 0x04,\t0x06, 0x0F},\t/ 100M, Full, HS /\n+\t{7, 0xC0, 0x04,\t0x06, 0x0F},\t/ 100M, Half, HS /\n+\t{7, 0x00, 0x00,\t0x03, 0x3F},\t/ FS /\n+};\n+\n+static const struct ax_bulkin_settings AX88772D_BULKIN_SIZE[] = {\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/ 1G, SS (unused) /\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/ 1G, HS (unused) /\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/ 100M, Full, SS (unused) /\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/ 100M, Half, SS (unused) /\n+\t{5, 0xC0, 0x04,\t0x06, 0x0F},\t/ 100M, Full, HS /\n+\t{7, 0xC0, 0x04,\t0x06, 0x0F},\t/ 100M, Half, HS /\n+\t{7, 0x00, 0x00,\t0x03, 0x3F},\t/ FS /\n+};\n+\n+static const struct ax_bulkin_settings AX88279_BULKIN_SIZE[] = {\n+\t{5, 0x10, 0x01,\t0x11, 0x0F},\t/ 2.5G /\n+\t{7, 0xB3, 0x01,\t0x11, 0x0F},\t/ 1G, SS /\n+\t{7, 0xC0, 0x02,\t0x06, 0x0F},\t/ 1G, HS /\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/ 100M, Full, SS /\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/ 100M, Half, SS /\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/ 100M, Full, HS /\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/ 100M, Half, HS /\n+\t{7, 0x00, 0x00,\t0x03, 0x3F},\t/ FS /\n+};\n+\n static void ax88179_set_pm_mode(struct usbnet dev, bool pm_mode)\n {\n \tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n@@ -313,6 +490,7 @@ static int ax88179_write_cmd(struct usbnet dev, u8 cmd, u16 value, u16 index,\n \n static void ax88179_status(struct usbnet dev, struct urb urb)\n {\n+\tstruct ax88179_data data = dev-\u003edriver_priv;\n \tstruct ax88179_int_data event;\n \tu32 link;\n \n@@ -323,6 +501,9 @@ static void ax88179_status(struct usbnet dev, struct urb urb)\n \tle32_to_cpus((void )\u0026event-\u003eintdata1);\n \n \tlink = (((__force u32)event-\u003eintdata1) \u0026 AX_INT_PPLS_LINK) \u003e\u003e 16;\n+\tdata-\u003espeed = (((__force u32)event-\u003eintdata1) \u003e\u003e 8) \u0026 0x7;\n+\tdata-\u003efull_duplex = (((__force u32)event-\u003eintdata1) \u003e\u003e 12) \u0026 0x1;\n+\tdata-\u003elink = link;\n \n \tif (netif_carrier_ok(dev-\u003enet) != link) {\n \t\tusbnet_link_change(dev, link, 1);\n@@ -403,6 +584,32 @@ ax88179_phy_write_mmd_indirect(struct usbnet dev, u16 prtad, u16 devad,\n \treturn 0;\n }\n \n+static int ax_read_mmd(struct usbnet dev, u16 dev_addr, u16 reg)\n+{\n+\tstruct ax88179_data priv = dev-\u003edriver_priv;\n+\tu16 res;\n+\tint ret;\n+\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\tret = ax88179_read_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, \u0026res);\n+\t\tif (ret \u003c 0)\n+\t\t\treturn ret;\n+\t\treturn res;\n+\t}\n+\n+\treturn ax88179_phy_read_mmd_indirect(dev, reg, dev_addr);\n+}\n+\n+static int ax_write_mmd(struct usbnet dev, u16 dev_addr, u16 reg, u16 data)\n+{\n+\tstruct ax88179_data priv = dev-\u003edriver_priv;\n+\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A)\n+\t\treturn ax88179_write_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, \u0026data);\n+\n+\treturn ax88179_phy_write_mmd_indirect(dev, reg, dev_addr, data);\n+}\n+\n static int ax88179_suspend(struct usb_interface intf, pm_message_t message)\n {\n \tstruct usbnet dev = usb_get_intfdata(intf);\n@@ -414,7 +621,6 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message)\n \n \tusbnet_suspend(intf, message);\n \n-\t/ Enable WoL /\n \tif (priv-\u003ewolopts) {\n \t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,\n \t\t\t\t 1, 1, \u0026tmp8);\n@@ -425,6 +631,26 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message)\n \n \t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,\n \t\t\t\t 1, 1, \u0026tmp8);\n+\n+\t\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026tmp16);\n+\t\t\ttmp16 \|= AX_MEDIUM_RECEIVE_EN;\n+\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026tmp16);\n+\t\t}\n+\n+\t\tif (priv-\u003echip_version == AX_VERSION_AX88279)\n+\t\t\tax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8,\n+\t\t\t\t\t EPHY_LOW_POWER_EN \| S5_WOL_EN\n+\t\t\t\t\t \| S5_WOL_LOW_POWER \| 0x8000, 0, NULL);\n+\n+\t} else if (priv-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8, 0x8000, 0, NULL);\n+\t}\n+\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\tax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 0, EPHY_LOW_POWER_EN, 0, NULL);\n+\t\tax88179_set_pm_mode(dev, false);\n+\t\treturn 0;\n \t}\n \n \t/* Disable RX path /\n@@ -436,11 +662,11 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message)\n \n \t/* Force bulk-in zero length /\n \tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,\n-\t\t\t 2, 2, \u0026tmp16);\n+\t\t\t2, 2, \u0026tmp16);\n \n \ttmp16 \|= AX_PHYPWR_RSTCTL_BZ \| AX_PHYPWR_RSTCTL_IPRL;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,\n-\t\t\t 2, 2, \u0026tmp16);\n+\t\t\t2, 2, \u0026tmp16);\n \n \t/ change clock /\n \ttmp8 = 0;\n@@ -456,12 +682,19 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message)\n }\n \n /* This function is used to enable the autodetach function. /\n-/ This function is determined by offset 0x43 of EEPROM /\n+/ This function is determined by offset 0x43 of EEPROM for the AX88179 /\n static int ax88179_auto_detach(struct usbnet dev)\n {\n+\tstruct ax88179_data priv = dev-\u003edriver_priv;\n \tu16 tmp16;\n \tu8 tmp8;\n \n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\ttmp16 = AX88179A_AUTODETACH_DELAY;\n+\t\tax88179_write_cmd(dev, AX88179A_AUTODETACH, tmp16, 0, 0, NULL);\n+\t\treturn 0;\n+\t}\n+\n \tif (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, \u0026tmp16) \u003c 0)\n \t\treturn 0;\n \n@@ -484,11 +717,31 @@ static int ax88179_auto_detach(struct usbnet dev)\n static int ax88179_resume(struct usb_interface intf)\n {\n \tstruct usbnet dev = usb_get_intfdata(intf);\n+\tstruct ax88179_data ax179_data;\n+\tu8 reg8;\n \n+\tax179_data = dev-\u003edriver_priv;\n \tax88179_set_pm_mode(dev, true);\n \n \tusbnet_link_change(dev, 0, 0);\n \n+\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\tax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\t\tif (!(reg8 \u0026 AX_PHY_POWER)) {\n+\t\t\treg8 = AX_PHY_POWER;\n+\t\t\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\t\t\tmsleep(250);\n+\t\t}\n+\t\tax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL);\n+\n+\t\t/ Now, that AX_FW_MODE_179A is enabled, the PHY needs a power-cycle.\n+\t\t * PHY-power is re-enabled in ax88179_reset()\n+\t\t /\n+\t\treg8 = 0;\n+\t\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\t\tmsleep(250);\n+\t}\n+\n \tax88179_reset(dev);\n \n \tax88179_set_pm_mode(dev, false);\n@@ -510,6 +763,21 @@ static void ax88179_disconnect(struct usb_interface intf)\n \tusbnet_disconnect(intf);\n }\n \n+static void ax88179_get_drvinfo(struct net_device net, struct ethtool_drvinfo info)\n+{\n+\tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data priv = dev-\u003edriver_priv;\n+\n+\t/* Inherit standard device info /\n+\tusbnet_get_drvinfo(net, info);\n+\tif (priv-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn;\n+\n+\tsnprintf(info-\u003efw_version, sizeof(info-\u003efw_version), \"%d.%d.%d.%d\",\n+\t\t priv-\u003efw_version[0], priv-\u003efw_version[1],\n+\t\t priv-\u003efw_version[2], priv-\u003efw_version[3]);\n+}\n+\n static void\n ax88179_get_wol(struct net_device net, struct ethtool_wolinfo wolinfo)\n {\n@@ -536,41 +804,74 @@ ax88179_set_wol(struct net_device net, struct ethtool_wolinfo wolinfo)\n \n static int ax88179_get_eeprom_len(struct net_device net)\n {\n-\treturn AX_EEPROM_LEN;\n+\tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data ax179_data;\n+\n+\tax179_data = dev-\u003edriver_priv;\n+\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn AX_EEPROM_LEN;\n+\telse if (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88279)\n+\t\treturn AX88279_EEPROM_LEN;\n+\telse\n+\t\treturn AX88179A_EEPROM_LEN;\n }\n \n-static int\n-ax88179_get_eeprom(struct net_device net, struct ethtool_eeprom eeprom,\n-\t\t u8 data)\n+static void\n+ax88179_eeprom_access_params(struct ax88179_data ax179_data, int i, u16 value, u16 idx)\n+{\n+\t/* AX88179 has a word-addressable EEPROM\n+\t * AX88179A uses EFUSES with 20 bytes length\n+\t * AX88279 has an EEPROM addressable in 256 byte blocks\n+\t /\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\tvalue = i;\n+\t\tidx = 1;\n+\t} else if (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88279) {\n+\t\tvalue = (i * ax179_data-\u003eeeprom_block) \u003e\u003e 16;\n+\t\tidx = (i ax179_data-\u003eeeprom_block) \u0026 0xffff;\n+\t} else {\n+\t\tvalue = i \u003c\u003c 4;\n+\t\tidx = 0;\n+\t}\n+}\n+\n+static int ax88179_get_eeprom(struct net_device net, struct ethtool_eeprom eeprom, u8 data)\n {\n \tstruct usbnet dev = netdev_priv(net);\n-\tu16 eeprom_buff;\n-\tint first_word, last_word;\n-\tint i, ret;\n+\tstruct ax88179_data ax179_data;\n+\tint first, last, i, ret;\n+\tu8 eeprom_buff;\n+\n+\tax179_data = dev-\u003edriver_priv;\n \n \tif (eeprom-\u003elen == 0)\n \t\treturn -EINVAL;\n \n \teeprom-\u003emagic = AX88179_EEPROM_MAGIC;\n \n-\tfirst_word = eeprom-\u003eoffset \u003e\u003e 1;\n-\tlast_word = (eeprom-\u003eoffset + eeprom-\u003elen - 1) \u003e\u003e 1;\n-\teeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),\n-\t\t\t\t GFP_KERNEL);\n+\tfirst = eeprom-\u003eoffset / ax179_data-\u003eeeprom_block;\n+\tlast = (eeprom-\u003eoffset + eeprom-\u003elen - 1) / ax179_data-\u003eeeprom_block;\n+\n+\teeprom_buff = kzalloc((last - first + 1) ax179_data-\u003eeeprom_block, GFP_KERNEL);\n \tif (!eeprom_buff)\n \t\treturn -ENOMEM;\n \n-\t/* ax88179/178A returns 2 bytes from eeprom on read /\n-\tfor (i = first_word; i \u003c= last_word; i++) {\n-\t\tret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,\n-\t\t\t\t\t \u0026eeprom_buff[i - first_word]);\n+\tfor (i = first; i \u003c= last; i++) {\n+\t\tu16 value, idx;\n+\n+\t\tax88179_eeprom_access_params(ax179_data, i, \u0026value, \u0026idx);\n+\t\tret = __ax88179_read_cmd(dev, ax179_data-\u003eeeprom_read_cmd,\n+\t\t\t\t\t value, idx, ax179_data-\u003eeeprom_block,\n+\t\t\t\t\t eeprom_buff + (i - first) ax179_data-\u003eeeprom_block);\n+\n \t\tif (ret \u003c 0) {\n \t\t\tkfree(eeprom_buff);\n \t\t\treturn -EIO;\n \t\t}\n \t}\n \n-\tmemcpy(data, (u8 )eeprom_buff + (eeprom-\u003eoffset \u0026 1), eeprom-\u003elen);\n+\tmemcpy(data, eeprom_buff + eeprom-\u003eoffset % ax179_data-\u003eeeprom_block, eeprom-\u003elen);\n \tkfree(eeprom_buff);\n \treturn 0;\n }\n@@ -580,12 +881,17 @@ ax88179_set_eeprom(struct net_device net, struct ethtool_eeprom eeprom,\n \t\t u8 data)\n {\n \tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data ax179_data;\n \tu16 eeprom_buff;\n \tint first_word;\n \tint last_word;\n \tint ret;\n \tint i;\n \n+\tax179_data = dev-\u003edriver_priv;\n+\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88179A)\n+\t\treturn -EOPNOTSUPP;\n+\n \tnetdev_dbg(net, \"write EEPROM len %d, offset %d, magic 0x%x\\n\",\n \t\t eeprom-\u003elen, eeprom-\u003eoffset, eeprom-\u003emagic);\n \n@@ -651,12 +957,39 @@ ax88179_set_eeprom(struct net_device net, struct ethtool_eeprom eeprom,\n }\n \n static int ax88179_get_link_ksettings(struct net_device net,\n-\t\t\t\t struct ethtool_link_ksettings cmd)\n+\t\t\t\t struct ethtool_link_ksettings cmd)\n {\n \tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data data;\n+\tint v;\n+\n+\tdata = dev-\u003edriver_priv;\n \n \tmii_ethtool_get_link_ksettings(\u0026dev-\u003emii, cmd);\n \n+\tif (data-\u003echip_version \u003e= AX_VERSION_AX88279) {\n+\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t cmd-\u003elink_modes.supported);\n+\n+\t\tv = ax88179_mdio_read(dev-\u003enet, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\t\tif (v \u003e= 0 \u0026\u0026 v \u0026 ADVERTISE_RESV)\n+\t\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t\t cmd-\u003elink_modes.advertising);\n+\n+\t\tv = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);\n+\t\tif (data-\u003espeed == ETHER_LINK_2500) {\n+\t\t\tcmd-\u003ebase.speed = SPEED_2500;\n+\t\t\t/* MDIO_AN_10GBT_STAT_LP2_5G is broken, but we can deduce that\n+\t\t\t * the link-partner advertised 2500M if remotely AN succceded\n+\t\t\t * for link speed \u003e 1000M and we locally have a link speed of\n+\t\t\t * 2500M\n+\t\t\t /\n+\t\t\tif (v \u003e= 0 \u0026\u0026 v \u0026 MDIO_AN_10GBT_STAT_REMOK)\n+\t\t\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t\t\t cmd-\u003elink_modes.lp_advertising);\n+\t\t}\n+\t}\n+\n \treturn 0;\n }\n \n@@ -664,34 +997,128 @@ static int ax88179_set_link_ksettings(struct net_device net,\n \t\t\t\t const struct ethtool_link_ksettings cmd)\n {\n \tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data data;\n+\tint v;\n+\n+\tdata = dev-\u003edriver_priv;\n+\n+\t/ mii_ethtool_set_link_ksettings handles unknown bits in MII_ADVERTISE\n+\t * transparently, so for the 2.5GBit link speed of the AX_VERSION_AX88279\n+\t * we just set up ADVERTISE_RESV before calling mii_ethtool_set_link_ksettings\n+\t * at least for speeds \u003c 2500\n+\t /\n+\tif (data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tv = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\t\tif (v \u003c 0)\n+\t\t\treturn v;\n+\n+\t\tif (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t cmd-\u003elink_modes.advertising))\n+\t\t\tv \|= ADVERTISE_RESV;\n+\t\telse\n+\t\t\tv \u0026= ~ADVERTISE_RESV;\n+\t\tax88179_mdio_write(net, dev-\u003emii.phy_id, MII_ADVERTISE, v);\n+\t\tif (cmd-\u003ebase.speed == SPEED_2500)\n+\t\t\treturn mii_nway_restart(\u0026dev-\u003emii);\n+\t}\n+\n \treturn mii_ethtool_set_link_ksettings(\u0026dev-\u003emii, cmd);\n }\n \n+static void ax88179a_get_pauseparam(struct net_device net, struct ethtool_pauseparam pause)\n+{\n+\tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data data;\n+\tu16 bmcr, lcladv, rmtadv;\n+\tu8 cap;\n+\n+\tdata = dev-\u003edriver_priv;\n+\n+\tif (data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn;\n+\n+\tbmcr = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_BMCR);\n+\tlcladv = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\trmtadv = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_LPA);\n+\n+\tif (!(bmcr \u0026 BMCR_ANENABLE)) {\n+\t\tpause-\u003eautoneg = 0;\n+\t\tpause-\u003erx_pause = 0;\n+\t\tpause-\u003etx_pause = 0;\n+\t\treturn;\n+\t}\n+\n+\tpause-\u003eautoneg = 1;\n+\n+\tcap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);\n+\n+\tif (cap \u0026 FLOW_CTRL_RX)\n+\t\tpause-\u003erx_pause = 1;\n+\n+\tif (cap \u0026 FLOW_CTRL_TX)\n+\t\tpause-\u003etx_pause = 1;\n+}\n+\n+static int ax88179a_set_pauseparam(struct net_device net, struct ethtool_pauseparam pause)\n+{\n+\tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data data;\n+\tu16 old, new1, bmcr;\n+\tu8 cap = 0;\n+\n+\tdata = dev-\u003edriver_priv;\n+\n+\tif (data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tbmcr = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_BMCR);\n+\tif (pause-\u003eautoneg \u0026\u0026 !(bmcr \u0026 BMCR_ANENABLE))\n+\t\treturn -EINVAL;\n+\n+\tif (pause-\u003erx_pause)\n+\t\tcap \|= FLOW_CTRL_RX;\n+\n+\tif (pause-\u003etx_pause)\n+\t\tcap \|= FLOW_CTRL_TX;\n+\n+\told = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\tnew1 = (old \u0026 ~(ADVERTISE_PAUSE_CAP \| ADVERTISE_PAUSE_ASYM)) \|\n+\t\tmii_advertise_flowctrl(cap);\n+\tif (old != new1)\n+\t\tax88179_mdio_write(net, dev-\u003emii.phy_id, MII_ADVERTISE, new1);\n+\n+\treturn mii_nway_restart(\u0026dev-\u003emii);\n+}\n+\n static int\n ax88179_ethtool_get_eee(struct usbnet dev, struct ethtool_keee data)\n {\n+\tstruct ax88179_data priv = dev-\u003edriver_priv;\n \tint val;\n \n \t/* Get Supported EEE /\n-\tval = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,\n-\t\t\t\t\t MDIO_MMD_PCS);\n+\tval = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);\n \tif (val \u003c 0)\n \t\treturn val;\n \tmii_eee_cap1_mod_linkmode_t(data-\u003esupported, val);\n \n \t/ Get advertisement EEE /\n-\tval = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,\n-\t\t\t\t\t MDIO_MMD_AN);\n+\tval = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);\n \tif (val \u003c 0)\n \t\treturn val;\n \tmii_eee_cap1_mod_linkmode_t(data-\u003eadvertised, val);\n \n \t/ Get LP advertisement EEE /\n-\tval = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,\n-\t\t\t\t\t MDIO_MMD_AN);\n+\tval = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);\n \tif (val \u003c 0)\n \t\treturn val;\n \tmii_eee_cap1_mod_linkmode_t(data-\u003elp_advertised, val);\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88279) {\n+\t\tval = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2);\n+\t\tif (val \u003c 0)\n+\t\t\treturn val;\n+\t\tmii_eee_cap2_mod_linkmode_adv_t(data-\u003elp_advertised, val);\n+\t}\n \n \treturn 0;\n }\n@@ -701,8 +1128,7 @@ ax88179_ethtool_set_eee(struct usbnet dev, struct ethtool_keee data)\n {\n \tu16 tmp16 = linkmode_to_mii_eee_cap1_t(data-\u003eadvertised);\n \n-\treturn ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,\n-\t\t\t\t\t MDIO_MMD_AN, tmp16);\n+\treturn ax_write_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, tmp16);\n }\n \n static int ax88179_chk_eee(struct usbnet dev)\n@@ -712,40 +1138,27 @@ static int ax88179_chk_eee(struct usbnet dev)\n \n \tmii_ethtool_gset(\u0026dev-\u003emii, \u0026ecmd);\n \n-\tif (ecmd.duplex \u0026 DUPLEX_FULL) {\n+\tpriv-\u003eeee_active = 0;\n+\tif ((priv-\u003echip_version \u003c AX_VERSION_AX88279 \u0026\u0026 (ecmd.duplex \u0026 DUPLEX_FULL)) \|\|\n+\t (ecmd.speed == SPEED_1000 \u0026\u0026 (ecmd.duplex \u0026 DUPLEX_FULL))) {\n \t\tint eee_lp, eee_cap, eee_adv;\n \t\tu32 lp, cap, adv, supported = 0;\n \n-\t\teee_cap = ax88179_phy_read_mmd_indirect(dev,\n-\t\t\t\t\t\t\tMDIO_PCS_EEE_ABLE,\n-\t\t\t\t\t\t\tMDIO_MMD_PCS);\n-\t\tif (eee_cap \u003c 0) {\n-\t\t\tpriv-\u003eeee_active = 0;\n+\t\teee_cap = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);\n+\t\tif (eee_cap \u003c 0)\n \t\t\treturn false;\n-\t\t}\n \n \t\tcap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);\n-\t\tif (!cap) {\n-\t\t\tpriv-\u003eeee_active = 0;\n+\t\tif (!cap)\n \t\t\treturn false;\n-\t\t}\n-\n-\t\teee_lp = ax88179_phy_read_mmd_indirect(dev,\n-\t\t\t\t\t\t MDIO_AN_EEE_LPABLE,\n-\t\t\t\t\t\t MDIO_MMD_AN);\n-\t\tif (eee_lp \u003c 0) {\n-\t\t\tpriv-\u003eeee_active = 0;\n-\t\t\treturn false;\n-\t\t}\n \n-\t\teee_adv = ax88179_phy_read_mmd_indirect(dev,\n-\t\t\t\t\t\t\tMDIO_AN_EEE_ADV,\n-\t\t\t\t\t\t\tMDIO_MMD_AN);\n+\t\teee_lp = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);\n+\t\tif (eee_lp \u003c 0)\n+\t\t\treturn true;\n \n-\t\tif (eee_adv \u003c 0) {\n-\t\t\tpriv-\u003eeee_active = 0;\n-\t\t\treturn false;\n-\t\t}\n+\t\teee_adv = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);\n+\t\tif (eee_adv \u003c 0)\n+\t\t\treturn true;\n \n \t\tadv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);\n \t\tlp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);\n@@ -753,65 +1166,53 @@ static int ax88179_chk_eee(struct usbnet dev)\n \t\t\t SUPPORTED_1000baseT_Full :\n \t\t\t SUPPORTED_100baseT_Full;\n \n-\t\tif (!(lp \u0026 adv \u0026 supported)) {\n-\t\t\tpriv-\u003eeee_active = 0;\n-\t\t\treturn false;\n-\t\t}\n+\t\tif (!(lp \u0026 adv \u0026 supported))\n+\t\t\treturn true;\n \n \t\tpriv-\u003eeee_active = 1;\n \t\treturn true;\n \t}\n \n-\tpriv-\u003eeee_active = 0;\n \treturn false;\n }\n \n-static void ax88179_disable_eee(struct usbnet dev)\n-{\n-\tu16 tmp16;\n-\n-\ttmp16 = GMII_PHY_PGSEL_PAGE3;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-\n-\ttmp16 = 0x3246;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t MII_PHYADDR, 2, \u0026tmp16);\n-\n-\ttmp16 = GMII_PHY_PGSEL_PAGE0;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-}\n-\n-static void ax88179_enable_eee(struct usbnet dev)\n+static void ax88179_eee_config(struct usbnet dev, bool enable)\n {\n+\tstruct ax88179_data priv = dev-\u003edriver_priv;\n \tu16 tmp16;\n \n-\ttmp16 = GMII_PHY_PGSEL_PAGE3;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-\n-\ttmp16 = 0x3247;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t MII_PHYADDR, 2, \u0026tmp16);\n-\n-\ttmp16 = GMII_PHY_PGSEL_PAGE5;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-\n-\ttmp16 = 0x0680;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t MII_BMSR, 2, \u0026tmp16);\n+\tif (priv-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\ttmp16 = GMII_PHY_PGSEL_PAGE3;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\n+\t\ttmp16 = enable ? 0x3247 : 0x3246;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t MII_PHYADDR, 2, \u0026tmp16);\n+\t\tif (enable) {\n+\t\t\ttmp16 = GMII_PHY_PGSEL_PAGE5;\n+\t\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\n+\t\t\ttmp16 = 0x0680;\n+\t\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t\t MII_BMSR, 2, \u0026tmp16);\n+\t\t}\n \n-\ttmp16 = GMII_PHY_PGSEL_PAGE0;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\t\ttmp16 = GMII_PHY_PGSEL_PAGE0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\t} else {\n+\t\tax88179_write_cmd(dev, AX_GPHY_CTL, AX_GPHY_EEE_CTRL, enable, 0, NULL);\n+\t}\n }\n \n static int ax88179_get_eee(struct net_device net, struct ethtool_keee edata)\n {\n \tstruct usbnet dev = netdev_priv(net);\n-\tstruct ax88179_data priv = dev-\u003edriver_priv;\n+\tstruct ax88179_data priv;\n+\n+\tpriv = dev-\u003edriver_priv;\n \n \tedata-\u003eeee_enabled = priv-\u003eeee_enabled;\n \tedata-\u003eeee_active = priv-\u003eeee_active;\n@@ -822,18 +1223,20 @@ static int ax88179_get_eee(struct net_device net, struct ethtool_keee edata)\n static int ax88179_set_eee(struct net_device net, struct ethtool_keee edata)\n {\n \tstruct usbnet dev = netdev_priv(net);\n-\tstruct ax88179_data priv = dev-\u003edriver_priv;\n+\tstruct ax88179_data priv;\n \tint ret;\n \n+\tpriv = dev-\u003edriver_priv;\n+\n \tpriv-\u003eeee_enabled = edata-\u003eeee_enabled;\n \tif (!priv-\u003eeee_enabled) {\n-\t\tax88179_disable_eee(dev);\n+\t\tax88179_eee_config(dev, false);\n \t} else {\n \t\tpriv-\u003eeee_enabled = ax88179_chk_eee(dev);\n \t\tif (!priv-\u003eeee_enabled)\n \t\t\treturn -EOPNOTSUPP;\n \n-\t\tax88179_enable_eee(dev);\n+\t\tax88179_eee_config(dev, true);\n \t}\n \n \tret = ax88179_ethtool_set_eee(dev, edata);\n@@ -848,6 +1251,7 @@ static int ax88179_set_eee(struct net_device net, struct ethtool_keee edata)\n }\n \n static const struct ethtool_ops ax88179_ethtool_ops = {\n+\t.get_drvinfo\t\t= ax88179_get_drvinfo,\n \t.get_link\t\t= ethtool_op_get_link,\n \t.get_msglevel\t\t= usbnet_get_msglevel,\n \t.set_msglevel\t\t= usbnet_set_msglevel,\n@@ -861,16 +1265,78 @@ static const struct ethtool_ops ax88179_ethtool_ops = {\n \t.nway_reset\t\t= usbnet_nway_reset,\n \t.get_link_ksettings\t= ax88179_get_link_ksettings,\n \t.set_link_ksettings\t= ax88179_set_link_ksettings,\n+\t.get_pauseparam\t\t= ax88179a_get_pauseparam,\n+\t.set_pauseparam\t\t= ax88179a_set_pauseparam,\n \t.get_ts_info\t\t= ethtool_op_get_ts_info,\n };\n \n+static int ax179a_vlan_rx_kill_vid(struct net_device net, __be16 proto, u16 vid)\n+{\n+\tstruct usbnet dev = netdev_priv(net);\n+\tu8 vlan_ctrl;\n+\tu16 reg16;\n+\tu8 reg8;\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\tvlan_ctrl = reg8;\n+\n+\t/* Address /\n+\treg8 = (vid / 16);\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, \u0026reg8);\n+\n+\t/ Data /\n+\treg8 = vlan_ctrl \| AX_VLAN_CONTROL_RD;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\treg16 \u0026= ~(1 \u003c\u003c (vid % 16));\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\n+\treg8 = vlan_ctrl \| AX_VLAN_CONTROL_WE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\treturn 0;\n+}\n+\n+static int ax179a_vlan_rx_add_vid(struct net_device net, __be16 proto, u16 vid)\n+{\n+\tstruct usbnet dev = netdev_priv(net);\n+\tu8 vlan_ctrl;\n+\tu16 reg16;\n+\tu8 reg8;\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\tvlan_ctrl = reg8;\n+\n+\t/ Address /\n+\treg8 = (vid / 16);\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, \u0026reg8);\n+\n+\t/ Data /\n+\treg8 = vlan_ctrl \| AX_VLAN_CONTROL_RD;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\treg16 \|= (1 \u003c\u003c (vid % 16));\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\n+\treg8 = vlan_ctrl \| AX_VLAN_CONTROL_WE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\treturn 0;\n+}\n+\n static void ax88179_set_multicast(struct net_device net)\n {\n \tstruct usbnet dev = netdev_priv(net);\n-\tstruct ax88179_data data = dev-\u003edriver_priv;\n \tu8 m_filter = ((u8 )dev-\u003edata);\n+\tstruct ax88179_data data;\n+\n+\tdata = dev-\u003edriver_priv;\n \n-\tdata-\u003erxctl = (AX_RX_CTL_START \| AX_RX_CTL_AB \| AX_RX_CTL_IPE);\n+\tdata-\u003erxctl = (AX_RX_CTL_START \| AX_RX_CTL_AB \| AX_RX_CTL_DROPCRCERR);\n+\tif (data-\u003eip_align)\n+\t\tdata-\u003erxctl \|= AX_RX_CTL_IPE;\n \n \tif (net-\u003eflags \u0026 IFF_PROMISC) {\n \t\tdata-\u003erxctl \|= AX_RX_CTL_PRO;\n@@ -909,6 +1375,7 @@ ax88179_set_features(struct net_device net, netdev_features_t features)\n {\n \tu8 tmp;\n \tstruct usbnet dev = netdev_priv(net);\n+\tstruct ax88179_data data = dev-\u003edriver_priv;\n \tnetdev_features_t changed = net-\u003efeatures ^ features;\n \n \tif (changed \u0026 NETIF_F_IP_CSUM) {\n@@ -928,6 +1395,34 @@ ax88179_set_features(struct net_device net, netdev_features_t features)\n \t\ttmp ^= AX_RXCOE_IP \| AX_RXCOE_TCP \| AX_RXCOE_UDP \|\n \t\t AX_RXCOE_TCPV6 \| AX_RXCOE_UDPV6;\n \t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, \u0026tmp);\n+\t\tdata-\u003erx_checksum = !!(features \u0026 NETIF_F_RXCSUM);\n+\t}\n+\n+\tif (changed \u0026 NETIF_F_HW_VLAN_CTAG_FILTER) {\n+\t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n+\t\ttmp ^= AX_VLAN_CONTROL_VFE;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n+\t\tif (features \u0026 NETIF_F_HW_VLAN_CTAG_FILTER) {\n+\t\t\tfor (int i = 0; i \u003c 256; i++) {\n+\t\t\t\tu16 tmp16;\n+\t\t\t\t/ Address /\n+\t\t\t\ttmp = i;\n+\t\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS,\n+\t\t\t\t\t\t 1, 1, \u0026tmp);\n+\t\t\t\t/ Data /\n+\t\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0,\n+\t\t\t\t\t\t 2, 2, \u0026tmp16);\n+\t\t\t\ttmp = AX_VLAN_CONTROL_WE;\n+\t\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL,\n+\t\t\t\t\t\t 1, 1, \u0026tmp);\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tif (changed \u0026 NETIF_F_HW_VLAN_CTAG_RX) {\n+\t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n+\t\ttmp ^= AX_VLAN_CONTROL_VSO;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n \t}\n \n \treturn 0;\n@@ -995,6 +1490,8 @@ static const struct net_device_ops ax88179_netdev_ops = {\n \t.ndo_eth_ioctl\t\t= usbnet_mii_ioctl,\n \t.ndo_set_rx_mode\t= ax88179_set_multicast,\n \t.ndo_set_features\t= ax88179_set_features,\n+\t.ndo_vlan_rx_add_vid\t= ax179a_vlan_rx_add_vid,\n+\t.ndo_vlan_rx_kill_vid\t= ax179a_vlan_rx_kill_vid,\n };\n \n static int ax88179_check_eeprom(struct usbnet dev)\n@@ -1293,6 +1790,17 @@ static int ax88179_bind(struct usbnet dev, struct usb_interface intf)\n \n \tdev-\u003edriver_priv = ax179_data;\n \n+\tret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS,\n+\t\t\t 1, 1, \u0026ax179_data-\u003echip_version);\n+\tif (ret \u003c 0)\n+\t\tgoto err_nodev;\n+\n+\tax179_data-\u003echip_version = (ax179_data-\u003echip_version \u0026 0xf0) \u003e\u003e 4;\n+\tax179_data-\u003eis_ax88772d = 0;\n+\tax179_data-\u003eip_align = 1;\n+\tax179_data-\u003eeeprom_read_cmd = AX_ACCESS_EEPROM;\n+\tax179_data-\u003eeeprom_block = 2;\n+\n \tdev-\u003enet-\u003enetdev_ops = \u0026ax88179_netdev_ops;\n \tdev-\u003enet-\u003eethtool_ops = \u0026ax88179_ethtool_ops;\n \tdev-\u003enet-\u003eneeded_headroom = 8;\n@@ -1317,6 +1825,120 @@ static int ax88179_bind(struct usbnet dev, struct usb_interface intf)\n \tax88179_reset(dev);\n \n \treturn 0;\n+\n+err_nodev:\n+\tkfree(ax179_data);\n+\tax179_data = NULL;\n+\n+\treturn ret;\n+}\n+\n+static int ax88179a_bind(struct usbnet dev, struct usb_interface intf)\n+{\n+\tstruct usb_device udev = interface_to_usbdev(intf);\n+\tstruct ax88179_data ax179_data;\n+\tint ret;\n+\n+\t/* Check if vendor configuration /\n+\tif (udev-\u003eactconfig-\u003edesc.bConfigurationValue != 1) {\n+\t\tnetdev_info(dev-\u003enet, \"Switching to vendor mode\\n\");\n+\t\tusb_driver_set_configuration(udev, 1);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tret = usbnet_get_endpoints(dev, intf);\n+\tif (ret \u003c 0)\n+\t\treturn ret;\n+\n+\tax179_data = kzalloc_obj(ax179_data);\n+\tif (!ax179_data)\n+\t\treturn -ENOMEM;\n+\n+\tdev-\u003edriver_priv = ax179_data;\n+\n+\tret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS,\n+\t\t\t 1, 1, \u0026ax179_data-\u003echip_version);\n+\tif (ret \u003c 0)\n+\t\tgoto err_nodev;\n+\n+\tax179_data-\u003echip_version = (ax179_data-\u003echip_version \u0026 0xf0) \u003e\u003e 4;\n+\tax179_data-\u003eis_ax88772d = 0;\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88179A) {\n+\t\tif (udev-\u003edescriptor.bcdDevice == 0x300)\n+\t\t\tax179_data-\u003eis_ax88772d = 1;\n+\t}\n+\n+\tfor (int i = 0; i \u003c 3; i++) {\n+\t\tret = ax88179_read_cmd(dev, AX88179A_ACCESS_BL, (0xFD + i),\n+\t\t\t\t 1, 1, \u0026ax179_data-\u003efw_version[i]);\n+\t\tif (ret \u003c 0)\n+\t\t\tax179_data-\u003efw_version[i] = 0xff;\n+\t}\n+\tnetdev_info(dev-\u003enet, \"AX88179A/279/772D Chip Version: %x, FW: %d.%d.%d.%d\\n\",\n+\t\t ax179_data-\u003echip_version,\n+\t\t ax179_data-\u003efw_version[0], ax179_data-\u003efw_version[1],\n+\t\t ax179_data-\u003efw_version[2], ax179_data-\u003efw_version[3]);\n+\n+\t/* The AX88279 requires both the AX_RX_CTL_IPE and AX_RX_CTL_DROPCRCERR\n+\t * bits set in AX_RX_CTL for creating correct RX-URBs. AX_RX_CTL_DROPCRCERR\n+\t * is anyway set for all chips, make sure AX_RX_CTL_IPE is set via ip_align.\n+\t * Also configure eeprom access parameters.\n+\t /\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tax179_data-\u003eip_align = 1;\n+\t\tax179_data-\u003eeeprom_read_cmd = AX88179A_FLASH_READ;\n+\t\tax179_data-\u003eeeprom_block = 256;\n+\t} else {\n+\t\tax179_data-\u003eip_align = 0;\n+\t\tax179_data-\u003eeeprom_read_cmd = AX_ACCESS_EFUS;\n+\t\tax179_data-\u003eeeprom_block = 20;\n+\t}\n+\n+\tdev-\u003enet-\u003enetdev_ops = \u0026ax88179_netdev_ops;\n+\tdev-\u003enet-\u003eethtool_ops = \u0026ax88179_ethtool_ops;\n+\tdev-\u003enet-\u003eneeded_headroom = 8;\n+\tdev-\u003enet-\u003eneeded_tailroom = 8;\n+\tdev-\u003enet-\u003emin_mtu = ETH_MIN_MTU;\n+\tdev-\u003ehard_mtu = 9 1024;\n+\tdev-\u003enet-\u003emax_mtu = dev-\u003ehard_mtu - dev-\u003enet-\u003ehard_header_len;\n+\n+\t/* Initialize MII structure /\n+\tdev-\u003emii.dev = dev-\u003enet;\n+\tdev-\u003emii.mdio_read = ax88179_mdio_read;\n+\tdev-\u003emii.mdio_write = ax88179_mdio_write;\n+\tdev-\u003emii.phy_id_mask = 0xff;\n+\tdev-\u003emii.reg_num_mask = 0xff;\n+\tdev-\u003emii.phy_id = 0x03;\n+\tif (!ax179_data-\u003eis_ax88772d)\n+\t\tdev-\u003emii.supports_gmii = 1;\n+\n+\tdev-\u003enet-\u003efeatures \|= NETIF_F_SG \| NETIF_F_IP_CSUM \|\n+\t\t\t NETIF_F_IPV6_CSUM \| NETIF_F_RXCSUM \| NETIF_F_TSO \|\n+\t\t\t NETIF_F_HW_VLAN_CTAG_TX \| NETIF_F_HW_VLAN_CTAG_RX \|\n+\t\t\t NETIF_F_HW_VLAN_CTAG_FILTER;\n+\n+\tdev-\u003enet-\u003ehw_features \|= dev-\u003enet-\u003efeatures;\n+\n+\tdev-\u003enet-\u003evlan_features = NETIF_F_SG \| NETIF_F_IP_CSUM \|\n+\t\t\t\t NETIF_F_IPV6_CSUM \| NETIF_F_RXCSUM \| NETIF_F_TSO;\n+\n+\tnetif_set_tso_max_size(dev-\u003enet, 16384);\n+\n+\t/ Enable Transmission of Link Speed byte in interrupt URB /\n+\tax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL);\n+\tax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0, 0, 0, NULL);\n+\n+\t/ Read MAC address from DTB or ASIX chip /\n+\tax88179_get_mac_addr(dev);\n+\tmemcpy(dev-\u003enet-\u003eperm_addr, dev-\u003enet-\u003edev_addr, ETH_ALEN);\n+\n+\treturn 0;\n+\n+err_nodev:\n+\tkfree(ax179_data);\n+\tax179_data = NULL;\n+\n+\treturn ret;\n }\n \n static void ax88179_unbind(struct usbnet dev, struct usb_interface intf)\n@@ -1338,6 +1960,22 @@ static void ax88179_unbind(struct usbnet dev, struct usb_interface intf)\n \tkfree(ax179_data);\n }\n \n+static void ax88179a_unbind(struct usbnet dev, struct usb_interface intf)\n+{\n+\tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n+\tu16 tmp16;\n+\tu8 tmp8;\n+\n+\t/* Configure RX control register =\u003e stop operation /\n+\ttmp16 = AX_RX_CTL_STOP;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026tmp16);\n+\n+\ttmp8 = 0;\n+\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026tmp8);\n+\n+\tkfree(ax179_data);\n+}\n+\n static void\n ax88179_rx_checksum(struct sk_buff skb, u32 pkt_hdr)\n {\n@@ -1354,6 +1992,21 @@ ax88179_rx_checksum(struct sk_buff skb, u32 pkt_hdr)\n \t\tskb-\u003eip_summed = CHECKSUM_UNNECESSARY;\n }\n \n+static void ax88179a_rx_checksum(struct sk_buff skb, u64 pkt_desc)\n+{\n+\tu32 pkt_type;\n+\n+\tskb-\u003eip_summed = CHECKSUM_NONE;\n+\t/* checksum error bit is set /\n+\tif (pkt_desc \u0026 AX179A_RX_PD_L4_ERR \|\| pkt_desc \u0026 AX179A_RX_PD_L3_ERR)\n+\t\treturn;\n+\n+\tpkt_type = pkt_desc \u0026 AX179A_RX_PD_L4_TYPE_MASK;\n+\t/ It must be a TCP or UDP packet with a valid checksum /\n+\tif (pkt_type == AX179A_RX_PD_L4_TCP \|\| pkt_type == AX179A_RX_PD_L4_UDP)\n+\t\tskb-\u003eip_summed = CHECKSUM_UNNECESSARY;\n+}\n+\n static int ax88179_rx_fixup(struct usbnet dev, struct sk_buff skb)\n {\n \tstruct sk_buff ax_skb;\n@@ -1472,6 +2125,121 @@ static int ax88179_rx_fixup(struct usbnet dev, struct sk_buff skb)\n \treturn 0;\n }\n \n+static int ax88179a_rx_fixup(struct usbnet dev, struct sk_buff skb)\n+{\n+\tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n+\tstruct sk_buff ax_skb;\n+\tu32 hdr_off, pkt_end;\n+\tu64 pkt_desc_ptr;\n+\tu16 vlan_tag;\n+\tu16 pkt_cnt;\n+\tu64 rx_hdr;\n+\n+\t/ SKB contents for AX179A-based chips:\n+\t * \u003cpacket 1\u003e\n+\t * ...\n+\t * \u003cpacket N\u003e\n+\t * \u003cper-packet metadata entry 1\u003e\n+\t * ...\n+\t * \u003cper-packet metadata entry N\u003e\n+\t * \u003crx_hdr\u003e\n+\t \n+\t where:\n+\t * \u003cpacket N\u003e contains pkt_len data bytes and padding:\n+\t \t\t2 bytes of IP alignment (optional, depends on AX_RX_CTL_IPE flag)\n+\t \t\tpacket data received\n+\t \t\toptional padding to 8-bytes boundary\n+\t \u003cper-packet metadata entry N\u003e contains 8 bytes:\n+\t \t\tpkt_len and fields AX_RXHDR_\n+\t * \u003crx-hdr\u003e\tcontains 8 bytes:\n+\t \t\tpkt_cnt and hdr_off (offset of \u003cper-packet metadata entry 1\u003e)\n+\t \n+\t * pkt_cnt is number of entries in the per-packet metadata array.\n+\t /\n+\n+\tif (!skb \|\| skb-\u003elen \u003c sizeof(rx_hdr))\n+\t\tgoto err;\n+\n+\t/ RX Descriptor Header /\n+\tskb_trim(skb, skb-\u003elen - sizeof(rx_hdr));\n+\trx_hdr = le64_to_cpup((u64 )skb_tail_pointer(skb));\n+\n+\t/* Check these packets /\n+\thdr_off = (rx_hdr \u0026 AX179A_RX_DH_DESC_OFFSET_MASK) \u003e\u003e AX179A_RX_DH_DESC_OFFSET_SHIFT;\n+\tpkt_cnt = rx_hdr \u0026 AX179A_RX_DH_PKT_CNT_MASK;\n+\n+\t/ Consistency check header position /\n+\tif (hdr_off != skb-\u003elen - (pkt_cnt sizeof(rx_hdr)))\n+\t\tgoto err;\n+\n+\t/* Make sure that the bounds of the metadata array are inside the SKB\n+\t * (and in front of the counter at the end).\n+\t /\n+\tif (pkt_cnt 8 + hdr_off \u003e skb-\u003elen)\n+\t\tgoto err;\n+\n+\t/* Packets must not overlap the metadata array /\n+\tskb_trim(skb, hdr_off);\n+\n+\tif (!pkt_cnt)\n+\t\tgoto err;\n+\n+\t/ Get the first RX packet descriptor /\n+\tpkt_desc_ptr = (u64 )(skb-\u003edata + hdr_off);\n+\n+\tpkt_end = 0;\n+\twhile (pkt_cnt--) {\n+\t\tu64 pkt_desc = le64_to_cpup(pkt_desc_ptr);\n+\t\tu32 pkt_len_plus_padd;\n+\t\tu32 pkt_len;\n+\n+\t\tpkt_len = (u32)((pkt_desc \u0026 AX179A_RX_PD_LEN_MASK) \u003e\u003e AX179A_RX_PD_LEN_SHIFT)\n+\t\t\t - (ax179_data-\u003eip_align ? 2 : 0);\n+\t\tpkt_len_plus_padd = ((pkt_len + 7 + (ax179_data-\u003eip_align ? 2 : 0)) \u0026 0x7FFF8);\n+\n+\t\tpkt_end += pkt_len_plus_padd;\n+\t\tif (pkt_end \u003e hdr_off \|\| (pkt_cnt == 0 \u0026\u0026 pkt_end != hdr_off))\n+\t\t\tgoto err;\n+\n+\t\tif (pkt_desc \u0026 AX179A_RX_PD_DROP \|\| !(pkt_desc \u0026 AX179A_RX_PD_RX_OK) \|\|\n+\t\t pkt_len \u003e (dev-\u003ehard_mtu + AX179A_RX_HW_PAD)) {\n+\t\t\tskb_pull(skb, pkt_len_plus_padd);\n+\n+\t\t\t/* Next RX Packet Descriptor /\n+\t\t\tpkt_desc_ptr++;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tax_skb = netdev_alloc_skb_ip_align(dev-\u003enet, pkt_len);\n+\t\tif (!ax_skb)\n+\t\t\tgoto err;\n+\n+\t\tskb_put(ax_skb, pkt_len);\n+\t\tmemcpy(ax_skb-\u003edata, skb-\u003edata + (ax179_data-\u003eip_align ? AX179A_RX_HW_PAD : 0),\n+\t\t pkt_len);\n+\n+\t\tif (ax179_data-\u003erx_checksum)\n+\t\t\tax88179a_rx_checksum(ax_skb, pkt_desc);\n+\n+\t\tif (pkt_desc \u0026 AX179A_RX_PD_VLAN) {\n+\t\t\tvlan_tag = pkt_desc \u003e\u003e AX179A_RX_PD_VLAN_SHIFT;\n+\t\t\t__vlan_hwaccel_put_tag(ax_skb, htons(ETH_P_8021Q),\n+\t\t\t\t\t vlan_tag \u0026 VLAN_VID_MASK);\n+\t\t}\n+\n+\t\tusbnet_skb_return(dev, ax_skb);\n+\t\tskb_pull(skb, pkt_len_plus_padd);\n+\n+\t\t/ Next RX Packet Header /\n+\t\tpkt_desc_ptr++;\n+\t}\n+\n+\treturn 1;\n+\n+err:\n+\treturn 0;\n+}\n+\n static struct sk_buff \n ax88179_tx_fixup(struct usbnet dev, struct sk_buff skb, gfp_t flags)\n {\n@@ -1505,6 +2273,59 @@ ax88179_tx_fixup(struct usbnet dev, struct sk_buff skb, gfp_t flags)\n \treturn skb;\n }\n \n+static struct sk_buff \n+ax88179a_tx_fixup(struct usbnet dev, struct sk_buff skb, gfp_t flags)\n+{\n+\tu64 tx_desc = skb-\u003elen \u0026 AX179A_TX_DESC_LEN_MASK;\n+\tint frame_size = dev-\u003emaxpacket;\n+\tstruct sk_buff ax_skb;\n+\tu64 tx_desc_ptr;\n+\tint padding_size;\n+\tint headroom;\n+\tint tailroom;\n+\tu16 tci = 0;\n+\n+\t/ TSO MSS /\n+\ttx_desc \|= ((u64)(skb_shinfo(skb)-\u003egso_size \u0026 AX179A_TX_DESC_MSS_MASK)) \u003c\u003c\n+\t\t AX179A_TX_DESC_MSS_SHIFT;\n+\n+\theadroom = (skb-\u003elen + sizeof(tx_desc)) % 8;\n+\tpadding_size = headroom ? 8 - headroom : 0;\n+\n+\tif (((skb-\u003elen + sizeof(tx_desc) + padding_size) % frame_size) == 0) {\n+\t\tpadding_size += 8;\n+\t\ttx_desc \|= AX179A_TX_DESC_DROP_PADD;\n+\t}\n+\n+\tif ((dev-\u003enet-\u003efeatures \u0026 NETIF_F_HW_VLAN_CTAG_TX) \u0026\u0026 (vlan_get_tag(skb, \u0026tci) \u003e= 0)) {\n+\t\ttx_desc \|= AX179A_TX_DESC_VLAN;\n+\t\ttx_desc \|= ((u64)tci \u0026 AX179A_TX_DESC_VLAN_MASK) \u003c\u003c AX179A_TX_DESC_VLAN_SHIFT;\n+\t}\n+\n+\tif (!dev-\u003ecan_dma_sg \u0026\u0026 (dev-\u003enet-\u003efeatures \u0026 NETIF_F_SG) \u0026\u0026 skb_linearize(skb))\n+\t\treturn NULL;\n+\n+\theadroom = skb_headroom(skb);\n+\ttailroom = skb_tailroom(skb);\n+\n+\tif (!(headroom \u003e= sizeof(tx_desc) \u0026\u0026 tailroom \u003e= padding_size)) {\n+\t\tax_skb = skb_copy_expand(skb, sizeof(tx_desc), padding_size, flags);\n+\t\tdev_kfree_skb_any(skb);\n+\t\tskb = ax_skb;\n+\t\tif (!skb)\n+\t\t\treturn NULL;\n+\t}\n+\tif (padding_size != 0)\n+\t\tskb_put_zero(skb, padding_size);\n+\t/ Copy TX header /\n+\ttx_desc_ptr = skb_push(skb, sizeof(tx_desc));\n+\ttx_desc_ptr = cpu_to_le64(tx_desc);\n+\n+\tusbnet_set_skb_tx_stats(skb, 1, 0);\n+\n+\treturn skb;\n+}\n+\n static int ax88179_link_reset(struct usbnet dev)\n {\n \tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n@@ -1580,73 +2401,343 @@ static int ax88179_link_reset(struct usbnet dev)\n \treturn 0;\n }\n \n+static void ax88179a_bulkin_config(struct usbnet dev, u8 link_sts)\n+{\n+\tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n+\tconst struct ax_bulkin_settings bulkin_data;\n+\tint index = 0;\n+\n+\tswitch (ax179_data-\u003espeed) {\n+\tcase ETHER_LINK_2500:\t/* AX88279 only /\n+\t\tindex = 0;\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_1000:\t/ AX88279 \u0026 AX88178A /\n+\t\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 1;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 2;\n+\t\t} else {\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 0;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 1;\n+\t\t}\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_100:\n+\t\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 3;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 5;\n+\t\t\tif (!ax179_data-\u003efull_duplex)\n+\t\t\t\tindex++;\n+\t\t} else {\n+\t\t\t/ AX88279A \u0026 AX88277D /\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 2;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 4;\n+\t\t\tif (!ax179_data-\u003efull_duplex)\n+\t\t\t\tindex++;\n+\t\t}\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_10:\n+\t\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279)\n+\t\t\tindex = 7;\n+\t\telse\n+\t\t\tindex = 6;\n+\t\tbreak;\n+\n+\tdefault:\t/ No link /\n+\t\tindex = 0;\n+\t}\n+\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279 \u0026\u0026 (link_sts \u0026 AX_USB_FS))\n+\t\tindex = 7;\n+\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tbulkin_data = AX88279_BULKIN_SIZE;\n+\t} else {\n+\t\tif (ax179_data-\u003eis_ax88772d)\n+\t\t\tbulkin_data = AX88772D_BULKIN_SIZE;\n+\t\telse\n+\t\t\tbulkin_data = AX88179A_BULKIN_SIZE;\n+\t}\n+\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, \u0026bulkin_data[index]);\n+}\n+\n+static int ax88179a_link_reset(struct usbnet dev)\n+{\n+\tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n+\tu8 tmp8, link_sts, reg8[3];\n+\tu16 tmp16, mode, speed;\n+\n+\tif (!ax179_data-\u003elink) {\n+\t\tnetdev_info(dev-\u003enet, \"ax88179a - Link status is: 0\\n\");\n+\t\treturn 0;\n+\t}\n+\n+\t/ Stop RX/TX for link configuration /\n+\ttmp16 = AX_RX_CTL_STOP;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026tmp16);\n+\ttmp8 = 0;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, \u0026tmp8);\n+\n+\ttmp8 = 0xa5;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_CDC_DELAY_TX, 1, 1, \u0026tmp8);\n+\n+\ttmp16 = 0x0410;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 2, 2, \u0026tmp16);\n+\n+\ttmp8 = 0;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_ETH_TX_GAP, 1, 1, \u0026tmp8);\n+\n+\ttmp8 = 0x07;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_EP5_EHR, 1, 1, \u0026tmp8);\n+\n+\ttmp8 = 0x28 \| AX_NEW_PAUSE_EN;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_NEW_PAUSE_CTRL, 1, 1, \u0026tmp8);\n+\n+\tmode = AX_MEDIUM_RECEIVE_EN \| AX_MEDIUM_TXFLOW_CTRLEN \| AX_MEDIUM_RXFLOW_CTRLEN;\n+\n+\t/ Link is up, but some older AX88179A FW versions do not send link speed\n+\t * and duplex status in interrupt URB, so read it via MII\n+\t /\n+\tif (!ax179_data-\u003espeed) {\n+\t\tstruct ethtool_link_ksettings cmd;\n+\n+\t\tmii_ethtool_get_link_ksettings(\u0026dev-\u003emii, \u0026cmd);\n+\t\tax179_data-\u003efull_duplex = cmd.base.duplex;\n+\t\tswitch (cmd.base.speed) {\n+\t\tcase SPEED_1000:\n+\t\t\tax179_data-\u003espeed = ETHER_LINK_1000;\n+\t\t\tbreak;\n+\t\tcase SPEED_100:\n+\t\t\tax179_data-\u003espeed = ETHER_LINK_100;\n+\t\t\tbreak;\n+\t\tcase SPEED_10:\n+\t\tdefault:\n+\t\t\tax179_data-\u003espeed = ETHER_LINK_10;\n+\t\t\tbreak;\n+\t\t};\n+\t}\n+\n+\tspeed = 0;\n+\tswitch (ax179_data-\u003espeed) {\n+\tcase ETHER_LINK_2500:\n+\t\treg8[0] = 0x00;\n+\t\treg8[1] = 0xF8;\n+\t\treg8[2] = 0x07;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_PAUSE, 3, 3, reg8);\n+\n+\t\treg8[0] = 0x78;\n+\t\treg8[1] = (AX_LSOFC_WCNT_7_ACCESS \u003c\u003c 5);\n+\t\treg8[2] = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);\n+\n+\t\treg8[0] = 0x40;\n+\t\treg8[1] = AX_MAC_MIQFFCTRL_FORMAT \| AX_MAC_MIQFFCTRL_DROP_CRC \| AX_MAC_LSO_ERR_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 2, 2, reg8);\n+\n+\t\ttmp8 = AX_XGMII_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, \u0026tmp8);\n+\n+\t\ttmp8 = 0x1C \| AX_LSO_ENHANCE_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_LSO_ENHANCE_CTRL, 1, 1, \u0026tmp8);\n+\n+\t\tmode \|= AX_MEDIUM_GIGAMODE \| AX_MEDIUM_FULL_DUPLEX;\n+\n+\t\tspeed = 2500;\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_1000:\n+\t\tmode \|= AX_MEDIUM_GIGAMODE;\n+\t\tspeed = 1000;\n+\t\tfallthrough;\n+\n+\tcase ETHER_LINK_100:\n+\t\treg8[0] = 0x78;\n+\t\treg8[1] = (AX_LSOFC_WCNT_7_ACCESS \u003c\u003c 5) \| AX_GMII_CRC_APPEND;\n+\t\treg8[2] = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);\n+\n+\t\ttmp8 = 0x40;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, \u0026tmp8);\n+\n+\t\tspeed = speed ? speed : 100;\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_10:\n+\t\treg8[0] = 0xFA;\n+\t\treg8[1] = (AX_LSOFC_WCNT_7_ACCESS \u003c\u003c 5) \| AX_GMII_CRC_APPEND;\n+\t\treg8[2] = 0xFF;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);\n+\n+\t\ttmp8 = 0xFA;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, \u0026tmp8);\n+\n+\t\tspeed = 10;\n+\t\tbreak;\n+\t}\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS, 1, 1, \u0026link_sts);\n+\tax88179a_bulkin_config(dev, link_sts);\n+\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88279) {\n+\t\ttmp8 = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, \u0026tmp8);\n+\t}\n+\n+\tif (ax179_data-\u003efull_duplex)\n+\t\tmode \|= AX_MEDIUM_FULL_DUPLEX;\n+\n+\tif (dev-\u003enet-\u003emtu \u003e 1500)\n+\t\tmode \|= AX_MEDIUM_JUMBO_EN;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026mode);\n+\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026ax179_data-\u003erxctl);\n+\n+\ttmp8 = AX_MAC_RX_PATH_READY \| AX_MAC_TX_PATH_READY;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, \u0026tmp8);\n+\n+\tax179_data-\u003eeee_enabled = ax88179_chk_eee(dev);\n+\n+\tnetif_carrier_on(dev-\u003enet);\n+\n+\tnetdev_info(dev-\u003enet, \"ax88179a - Link status is: 1, Link speed: %d, Duplex: %d\\n\",\n+\t\t speed, ax179_data-\u003efull_duplex);\n+\n+\treturn 0;\n+}\n+\n static int ax88179_reset(struct usbnet dev)\n {\n-\tu8 buf[5];\n-\tu16 tmp16;\n-\tu8 tmp;\n \tstruct ax88179_data ax179_data = dev-\u003edriver_priv;\n \tstruct ethtool_keee eee_data;\n+\tu16 tmp16;\n+\tu8 buf[5];\n+\tu8 tmp;\n \n \ttmp16 = (u16 )buf;\n \ttmp = (u8 )buf;\n \n \t/ Power up ethernet PHY /\n-\ttmp16 = 0;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\ttmp16 = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n \n-\ttmp16 = AX_PHYPWR_RSTCTL_IPRL;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n-\tmsleep(500);\n+\t\ttmp16 = AX_PHYPWR_RSTCTL_IPRL;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n+\t\tmsleep(500);\n \n-\ttmp = AX_CLK_SELECT_ACS \| AX_CLK_SELECT_BCS;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);\n-\tmsleep(200);\n+\t\ttmp = AX_CLK_SELECT_ACS \| AX_CLK_SELECT_BCS;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);\n+\t\tmsleep(200);\n+\t} else {\n+\t\ttmp = AX_PHY_POWER;\n+\t\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, tmp);\n+\t\tmsleep(250);\n+\t}\n+\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\ttmp16 = ax88179_mdio_read(dev-\u003enet, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\t\ttmp16 \u0026= ~(ADVERTISE_10FULL \| ADVERTISE_10HALF);\n+\t\ttmp16 \|= ADVERTISE_RESV; / Advertise 2.5GBit link /\n+\t\tax88179_mdio_write(dev-\u003enet, dev-\u003emii.phy_id, MII_ADVERTISE, tmp16);\n+\t}\n \n \t/* Ethernet PHY Auto Detach/\n \tax88179_auto_detach(dev);\n \n+\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\ttmp = AX_MAC_EFF_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BULK_OUT_CTRL, 1, 1, tmp);\n+\n+\t\ttmp16 = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);\n+\n+\t\ttmp = 0x04;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);\n+\t\ttmp = 0x10;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);\n+\n+\t\ttmp = 0;\n+\t\tif (dev-\u003enet-\u003efeatures \u0026 NETIF_F_HW_VLAN_CTAG_FILTER)\n+\t\t\ttmp \|= AX_VLAN_CONTROL_VFE;\n+\t\tif (dev-\u003enet-\u003efeatures \u0026 NETIF_F_HW_VLAN_CTAG_RX)\n+\t\t\ttmp \|= AX_VLAN_CONTROL_VSO;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, tmp);\n+\n+\t\ttmp = 0xff;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_INT_MASK, 1, 1, tmp);\n+\n+\t\ttmp = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_RX_DMA_CTL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_TX_DMA_CTL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_ARC_CTRL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_SWP_CTRL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_HDR_CKSUM, 1, 1, tmp);\n+\t}\n+\n \t/* Read MAC address from DTB or asix chip /\n \tax88179_get_mac_addr(dev);\n \tmemcpy(dev-\u003enet-\u003eperm_addr, dev-\u003enet-\u003edev_addr, ETH_ALEN);\n \n \t/ RX bulk configuration /\n-\tmemcpy(tmp, \u0026AX88179_BULKIN_SIZE[0], 5);\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);\n-\n-\tdev-\u003erx_urb_size = 1024 20;\n-\n-\ttmp = 0x34;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);\n-\n-\ttmp = 0x52;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,\n-\t\t\t 1, 1, tmp);\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\tmemcpy(tmp, \u0026AX88179_BULKIN_SIZE[0], 5);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);\n+\t\ttmp = 0x34;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);\n+\n+\t\ttmp = 0x52;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,\n+\t\t\t\t 1, 1, tmp);\n+\t\tdev-\u003erx_urb_size = 1024 * 20;\n+\t} else {\n+\t\t/* The Bulk-Register configuration for the AX88179A is done in\n+\t\t * ax88179a_link_reset(), once the link is up for a given link and USB-speed.\n+\t\t /\n+\t\tif (ax179_data-\u003eis_ax88772d)\n+\t\t\tdev-\u003erx_urb_size = 1024 24;\n+\t\telse\n+\t\t\tdev-\u003erx_urb_size = 1024 * 48;\n+\t}\n \n \t/* Enable checksum offload /\n \ttmp = AX_RXCOE_IP \| AX_RXCOE_TCP \| AX_RXCOE_UDP \|\n \t AX_RXCOE_TCPV6 \| AX_RXCOE_UDPV6;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);\n+\tax179_data-\u003erx_checksum = 1;\n \n \ttmp = AX_TXCOE_IP \| AX_TXCOE_TCP \| AX_TXCOE_UDP \|\n \t AX_TXCOE_TCPV6 \| AX_TXCOE_UDPV6;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);\n \n \t/ Configure RX control register =\u003e start operation /\n-\ttmp16 = AX_RX_CTL_DROPCRCERR \| AX_RX_CTL_IPE \| AX_RX_CTL_START \|\n-\t\t AX_RX_CTL_AP \| AX_RX_CTL_AMALL \| AX_RX_CTL_AB;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);\n-\n-\ttmp = AX_MONITOR_MODE_PMETYPE \| AX_MONITOR_MODE_PMEPOL \|\n-\t AX_MONITOR_MODE_RWMP;\n+\tax179_data-\u003erxctl = AX_RX_CTL_DROPCRCERR \| AX_RX_CTL_START \|\n+\t\t\t AX_RX_CTL_AP \| AX_RX_CTL_AMALL \| AX_RX_CTL_AB;\n+\tif (ax179_data-\u003eip_align)\n+\t\tax179_data-\u003erxctl \|= AX_RX_CTL_IPE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026ax179_data-\u003erxctl);\n+\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\ttmp = AX_MONITOR_MODE_PMETYPE \| AX_MONITOR_MODE_PMEPOL \| AX_MONITOR_MODE_RWMP;\n+\telse\n+\t\ttmp = AX_MONITOR_MODE_RWMP;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);\n \n \t/ Configure default medium type =\u003e giga /\n \ttmp16 = AX_MEDIUM_RECEIVE_EN \| AX_MEDIUM_TXFLOW_CTRLEN \|\n-\t\t AX_MEDIUM_RXFLOW_CTRLEN \| AX_MEDIUM_FULL_DUPLEX \|\n-\t\t AX_MEDIUM_GIGAMODE;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,\n-\t\t\t 2, 2, tmp16);\n+\t\t AX_MEDIUM_RXFLOW_CTRLEN \| AX_MEDIUM_FULL_DUPLEX;\n+\tif (!ax179_data-\u003eis_ax88772d)\n+\t\ttmp16 \|= AX_MEDIUM_GIGAMODE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);\n \n \t/ Check if WoL is supported /\n \tax179_data-\u003ewol_supported = 0;\n@@ -1654,16 +2745,29 @@ static int ax88179_reset(struct usbnet dev)\n \t\t\t 1, 1, \u0026tmp) \u003e 0)\n \t\tax179_data-\u003ewol_supported = WAKE_MAGIC \| WAKE_PHY;\n \n-\tax88179_led_setting(dev);\n+\t/* For chips starting with AX88179A, LEDS are configured by the adapter\n+\t * firmware directly from EEPROM/EFUSE values\n+\t /\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\tax88179_led_setting(dev);\n \n \tax179_data-\u003eeee_enabled = 0;\n \tax179_data-\u003eeee_active = 0;\n \n-\tax88179_disable_eee(dev);\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\tax88179_eee_config(dev, false);\n \n-\tax88179_ethtool_get_eee(dev, \u0026eee_data);\n-\tlinkmode_zero(eee_data.advertised);\n-\tax88179_ethtool_set_eee(dev, \u0026eee_data);\n+\t\tax88179_ethtool_get_eee(dev, \u0026eee_data);\n+\t\tlinkmode_zero(eee_data.advertised);\n+\t\tax88179_ethtool_set_eee(dev, \u0026eee_data);\n+\t} else {\n+\t\tax88179_eee_config(dev, true);\n+\t\tax88179_ethtool_get_eee(dev, \u0026eee_data);\n+\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised);\n+\t\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88279)\n+\t\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised);\n+\t\tax88179_ethtool_set_eee(dev, \u0026eee_data);\n+\t}\n \n \t/ Restart autoneg /\n \tmii_nway_restart(\u0026dev-\u003emii);\n@@ -1707,6 +2811,24 @@ static int ax88179_stop(struct usbnet dev)\n \treturn 0;\n }\n \n+static int ax88179a_stop(struct usbnet dev)\n+{\n+\tu16 reg16;\n+\tu8 reg8;\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026reg16);\n+\treg16 \u0026= ~AX_MEDIUM_RECEIVE_EN;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026reg16);\n+\n+\treg16 = 0;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026reg16);\n+\n+\treg8 = 0;\n+\tax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\n+\treturn 0;\n+}\n+\n static const struct driver_info ax88179_info = {\n \t.description = \"ASIX AX88179 USB 3.0 Gigabit Ethernet\",\n \t.bind = ax88179_bind,\n@@ -1733,6 +2855,45 @@ static const struct driver_info ax88178a_info = {\n \t.tx_fixup = ax88179_tx_fixup,\n };\n \n+static const struct driver_info ax88179a_info = {\n+\t.description = \"ASIX AX88179A USB 3.2 Gigabit Ethernet\",\n+\t.bind = ax88179a_bind,\n+\t.unbind = ax88179a_unbind,\n+\t.status = ax88179_status,\n+\t.link_reset = ax88179a_link_reset,\n+\t.reset = ax88179_reset,\n+\t.stop = ax88179a_stop,\n+\t.flags = FLAG_ETHER \| FLAG_FRAMING_AX \| FLAG_MULTI_PACKET \| FLAG_AVOID_UNLINK_URBS,\n+\t.rx_fixup = ax88179a_rx_fixup,\n+\t.tx_fixup = ax88179a_tx_fixup,\n+};\n+\n+static const struct driver_info ax88772d_info = {\n+\t.description = \"ASIX AX88772D/E USB 2.0 Fast Ethernet\",\n+\t.bind = ax88179a_bind,\n+\t.unbind = ax88179a_unbind,\n+\t.status = ax88179_status,\n+\t.link_reset = ax88179a_link_reset,\n+\t.reset = ax88179_reset,\n+\t.stop = ax88179a_stop,\n+\t.flags = FLAG_ETHER \| FLAG_FRAMING_AX \| FLAG_MULTI_PACKET \| FLAG_AVOID_UNLINK_URBS,\n+\t.rx_fixup = ax88179a_rx_fixup,\n+\t.tx_fixup = ax88179a_tx_fixup,\n+};\n+\n+static const struct driver_info ax88279_info = {\n+\t.description = \"ASIX AX88279 USB 3.2 2.5Gigabit Ethernet\",\n+\t.bind = ax88179a_bind,\n+\t.unbind = ax88179a_unbind,\n+\t.status = ax88179_status,\n+\t.link_reset = ax88179a_link_reset,\n+\t.reset = ax88179_reset,\n+\t.stop = ax88179a_stop,\n+\t.flags = FLAG_ETHER \| FLAG_FRAMING_AX \| FLAG_MULTI_PACKET \| FLAG_AVOID_UNLINK_URBS,\n+\t.rx_fixup = ax88179a_rx_fixup,\n+\t.tx_fixup = ax88179a_tx_fixup,\n+};\n+\n static const struct driver_info cypress_GX3_info = {\n \t.description = \"Cypress GX3 SuperSpeed to Gigabit Ethernet Controller\",\n \t.bind = ax88179_bind,\n@@ -1878,6 +3039,18 @@ static const struct driver_info at_umc2000sp_info = {\n \n static const struct usb_device_id products[] = {\n {\n+\t/ ASIX AX88179A/B USB 3.2 Gigabit Ethernet /\n+\tUSB_DEVICE_VER(0x0b95, 0x1790, 0x0200, 0x0200),\n+\t.driver_info = (unsigned long)\u0026ax88179a_info,\n+}, {\n+\t/ ASIX AX88772D USB 2.0 100Mbit Ethernet /\n+\tUSB_DEVICE_VER(0x0b95, 0x1790, 0x0300, 0x0300),\n+\t.driver_info = (unsigned long)\u0026ax88772d_info,\n+}, {\n+\t/ ASIX AX88279 USB 3.2 2.5GBit Ethernet /\n+\tUSB_DEVICE_VER(0x0b95, 0x1790, 0x0400, 0x0400),\n+\t.driver_info = (unsigned long)\u0026ax88279_info,\n+}, {\n \t/ ASIX AX88179 10/100/1000 */\n \tUSB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),\n \t.driver_info = (unsigned long)\u0026ax88179_info,\n" }
2/1	2026/07/01 11:01	agent	patch-evaluator	1m Model: gemini-3.1-pro-preview Args: null Results: { "EnableConfigs": [ "USB_NET_AX88179_178A" ], "FocusSymbols": [ "ax88179a_bind", "ax88179a_unbind", "ax88179a_link_reset", "ax88179a_rx_fixup", "ax88179a_tx_fixup", "ax179a_vlan_rx_add_vid", "ax179a_vlan_rx_kill_vid", "ax88179a_get_pauseparam", "ax88179a_set_pauseparam", "ax88179a_rx_checksum", "ax88179a_bulkin_config" ], "Reasoning": "The patch adds support for new ASIX USB Ethernet chips (AX88179A, AX88772D, AX88279) to the ax88179_178a driver. It introduces new initialization, link reset, and packet parsing (rx/tx fixup) logic specific to these chips. Fuzzing should focus on the new USB device binding and packet processing paths.", "WorthFuzzing": true } Instruction: You are an expert Linux kernel maintainer. Your job is to review a provided patch series and determine if it makes functional changes to the kernel that should be fuzzed. IMPORTANT: The changes have ALREADY been applied and committed as the HEAD commit in your workspace. Do NOT rely on your internal knowledge of the kernel. You must actively use your code access tools to examine the actual source code and confirm any assumptions. Return WorthFuzzing=false if the patch only contains: - Modifications to Documentation/, Kconfig files, or code comments. - Purely decorative changes, such as logging (e.g., pr_err, printk) or tracepoints. - Changes to numeric constants or macros that do not functionally alter execution flow. - Code paths that are impossible to reach in virtualized environments like GCE or QEMU, even when utilizing software-emulated hardware (e.g., usb gadget, mac80211_hwsim). If it modifies reachable core kernel logic, drivers, or architectures, use your code search tools to verify the code can be executed, then return WorthFuzzing=true. When returning WorthFuzzing=true, you MUST ALSO: 1. Extract any specific kernel functions that should be heavily fuzzed into FocusSymbols. Avoid listing generic hot-path functions to prevent skewed test distributions. 2. Identify any specific CONFIG_ options required to properly test this new/modified feature. Go and look into the Kconfig files and check for ifdefs around the code, do not make assumptions. Do not list too generic configs (we already have them enabled). Only list those that specifically cover the modified code. List them in the EnableConfigs output array, and DO NOT add a 'CONFIG_' prefix (e.g., return "NET_IPV4" instead of "CONFIG_NET_IPV4"). Prefer calling several tools at the same time to save round-trips. Use set-results tool to provide results of the analysis. It must be called exactly once before the final reply. Ignore results of this tool. Prompt: For your convenience, here is the diff of the changes: commit 9c37795baab5de68feebe32b4e2cf8b37f5af5a4 Author: syz-cluster <triage@syzkaller.com> Date: Wed Jul 1 11:01:23 2026 +0000 syz-cluster: applied patch under review diff --git a/drivers/net/usb/ax88179_178a.c b/drivers/net/usb/ax88179_178a.c index 98f899ea2e9462..12fc20e5f76e69 100644 --- a/drivers/net/usb/ax88179_178a.c +++ b/drivers/net/usb/ax88179_178a.c @@ -13,9 +13,12 @@ #include <linux/usb/usbnet.h> #include <uapi/linux/mdio.h> #include <linux/mdio.h> +#include <linux/if_vlan.h> #define AX88179_PHY_ID 0x03 #define AX_EEPROM_LEN 0x100 +#define AX88279_EEPROM_LEN 0x4000 +#define AX88179A_EEPROM_LEN (32 * 20) #define AX88179_EEPROM_MAGIC 0x17900b95 #define AX_MCAST_FLTSIZE 8 #define AX_MAX_MCAST 64 @@ -32,17 +35,33 @@ #define AX_ACCESS_EEPROM 0x04 #define AX_ACCESS_EFUS 0x05 #define AX_RELOAD_EEPROM_EFUSE 0x06 -#define AX_PAUSE_WATERLVL_HIGH 0x54 -#define AX_PAUSE_WATERLVL_LOW 0x55 - +#define AX88179A_WAKEUP_SETTING 0x07 +#define AX_FW_MODE 0x08 +#define AX_GPHY_CTL 0x0F +#define AX88179A_FLASH_READ 0x21 +#define AX88179A_FLASH_WEN 0x22 +#define AX88179A_FLASH_WDIS 0x23 +#define AX88179A_FLASH_WRITE 0x24 +#define AX88179A_PHY_CLAUSE45 0x27 +#define AX88179A_FLASH_ERASE_SECTION 0x28 +#define AX88179A_ACCESS_BL 0x2A +#define AX88179A_PHY_POWER 0x31 +#define AX88179A_AUTODETACH 0xC0 +#define AX_PAUSE_WATERLVL_LOW 0x54 +#define AX_PAUSE_WATERLVL_HIGH 0x55 + +#define AX_FW_MODE_179A 0x01 #define PHYSICAL_LINK_STATUS 0x02 #define AX_USB_SS 0x04 #define AX_USB_HS 0x02 + #define AX_USB_FS 0x01 #define GENERAL_STATUS 0x03 /* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 / #define AX_SECLD 0x04 +#define AX_CHIP_STATUS 0x05 + #define AX_SROM_ADDR 0x07 #define AX_SROM_CMD 0x0a #define EEP_RD 0x04 @@ -62,6 +81,15 @@ #define AX_RX_CTL_PRO 0x0001 #define AX_RX_CTL_STOP 0x0000 +#define AX88179A_ETH_TX_GAP 0x0D + +#define AX88179A_BFM_DATA 0x0E + #define AX_TX_QUEUE_CFG 0x02 + #define AX_TX_QUEUE_SET 0x08 + #define AX_TX_Q1_AHB_FC_EN 0x10 + #define AX_TX_Q2_AHB_FC_EN 0x20 + #define AX_XGMII_EN 0x80 + #define AX_NODE_ID 0x10 #define AX_MULFLTARY 0x16 @@ -91,7 +119,21 @@ #define AX_PHYPWR_RSTCTL_IPRL 0x0020 #define AX_PHYPWR_RSTCTL_AT 0x1000 +#define AX88179A_VLAN_ID_ADDRESS 0x2A + +#define AX88179A_VLAN_ID_CONTROL 0x2B + #define AX_VLAN_CONTROL_WE 0x0001 + #define AX_VLAN_CONTROL_RD 0x0002 + #define AX_VLAN_CONTROL_VSO 0x0010 + #define AX_VLAN_CONTROL_VFE 0x0020 + +#define AX88179A_VLAN_ID_DATA0 0x2C +#define AX88179A_VLAN_ID_DATA1 0x2D + #define AX_RX_BULKIN_QCTRL 0x2e + +#define AX_GPHY_EEE_CTRL 0x01 + #define AX_CLK_SELECT 0x33 #define AX_CLK_SELECT_BCS 0x01 #define AX_CLK_SELECT_ACS 0x02 @@ -111,7 +153,51 @@ #define AX_TXCOE_TCPV6 0x20 #define AX_TXCOE_UDPV6 0x40 +#define AX88179A_MAC_BM_INT_MASK 0x41 +#define AX88179A_MAC_BM_RX_DMA_CTL 0x43 +#define AX88179A_MAC_BM_TX_DMA_CTL 0x46 + +#define AX88179A_MAC_RX_STATUS_CDC 0x6D + #define AX_LSOFC_WCNT_7_ACCESS 0x03 + #define AX_GMII_CRC_APPEND 0x10 + #define AX_LEDCTRL 0x73 +#define AX88179A_MAC_ARC_CTRL 0x9E +#define AX88179A_MAC_SWP_CTRL 0xB1 + +#define AX88179A_MAC_TX_PAUSE 0xB2 + +#define AX88179A_MAC_CDC_DELAY_TX 0xB5 + +#define AX88179A_MAC_PATH 0xB7 + #define AX_MAC_RX_PATH_READY 0x01 + #define AX_MAC_TX_PATH_READY 0x02 + +#define AX88179A_NEW_PAUSE_CTRL 0xB8 + #define AX_NEW_PAUSE_EN 0x01 + +#define AX88179A_MAC_BULK_OUT_CTRL 0xB9 + #define AX_MAC_EFF_EN 0x02 + +#define AX88179A_MAC_RX_DATA_CDC_CNT 0xC0 + #define AX_MAC_LSO_ERR_EN 0x04 + #define AX_MAC_MIQFFCTRL_FORMAT 0x10 + #define AX_MAC_MIQFFCTRL_DROP_CRC 0x20 + +#define AX88179A_AUTODETACH_DELAY (5UL << 8) +#define AX88179A_AUTODETACH_EN 1 + +#define AX88179A_MAC_LSO_ENHANCE_CTRL 0xC3 + #define AX_LSO_ENHANCE_EN 0x01 + +#define AX88179A_MAC_TX_HDR_CKSUM 0xCC +#define AX88179A_EP5_EHR 0xF9 + +#define AX_PHY_POWER 0x02 + +#define EPHY_LOW_POWER_EN 0x01 +#define S5_WOL_EN 0x04 +#define S5_WOL_LOW_POWER 0x20 #define GMII_PHY_PHYSR 0x11 #define GMII_PHY_PHYSR_SMASK 0xc000 @@ -164,8 +250,56 @@ #define GMII_PHY_PGSEL_PAGE3 0x0003 #define GMII_PHY_PGSEL_PAGE5 0x0005 +/ TX Descriptor / +#define AX179A_TX_DESC_LEN_MASK 0x1FFFFF +#define AX179A_TX_DESC_DROP_PADD BIT(28) +#define AX179A_TX_DESC_VLAN BIT(29) +#define AX179A_TX_DESC_MSS_MASK 0x7FFF +#define AX179A_TX_DESC_MSS_SHIFT 0x20 +#define AX179A_TX_DESC_VLAN_MASK 0xFFFF +#define AX179A_TX_DESC_VLAN_SHIFT 0x30 + +/ RX Packet Descriptor / +#define AX179A_RX_PD_L4_ERR BIT(0) +#define AX179A_RX_PD_L3_ERR BIT(1) +#define AX179A_RX_PD_L4_TYPE_MASK 0x1C +#define AX179A_RX_PD_L4_UDP 0x04 +#define AX179A_RX_PD_L4_TCP 0x10 +#define AX179A_RX_PD_L3_TYPE_MASK 0x60 +#define AX179A_RX_PD_L3_IP 0x20 +#define AX179A_RX_PD_L3_IP6 0x40 + +#define AX179A_RX_PD_VLAN BIT(10) +#define AX179A_RX_PD_RX_OK BIT(11) +#define AX179A_RX_PD_DROP BIT(31) +#define AX179A_RX_PD_LEN_MASK 0x7FFF0000 +#define AX179A_RX_PD_LEN_SHIFT 0x10 +#define AX179A_RX_PD_VLAN_SHIFT 0x20 + +/ RX Descriptor header / +#define AX179A_RX_DH_PKT_CNT_MASK 0x1FFF +#define AX179A_RX_DH_DESC_OFFSET_MASK 0xFFFFE000 +#define AX179A_RX_DH_DESC_OFFSET_SHIFT 0x0D + +#define AX179A_RX_HW_PAD 0x02 + static int ax88179_reset(struct usbnet dev); +enum ax_ether_link_speed { + ETHER_LINK_NONE = 0, + ETHER_LINK_10 = 1, + ETHER_LINK_100 = 2, + ETHER_LINK_1000 = 3, + ETHER_LINK_2500 = 4, +}; + +enum ax_chip_version { + AX_VERSION_INVALID = 0x0, + AX_VERSION_AX88179 = 0x4, + AX_VERSION_AX88179A = 0x6, /* Also AX88772D / + AX_VERSION_AX88279 = 0x7, +}; + struct ax88179_data { u8 eee_enabled; u8 eee_active; @@ -174,6 +308,16 @@ struct ax88179_data { u32 wol_supported; u32 wolopts; u8 disconnecting; + u8 chip_version; + u8 fw_version[4]; + u8 is_ax88772d; + u8 ip_align; + u8 link; + u8 speed; + u8 full_duplex; + u8 rx_checksum; + u8 eeprom_read_cmd; + u16 eeprom_block; }; struct ax88179_int_data { @@ -181,15 +325,48 @@ struct ax88179_int_data { __le32 intdata2; }; -static const struct { +struct ax_bulkin_settings { unsigned char ctrl, timer_l, timer_h, size, ifg; -} AX88179_BULKIN_SIZE[] = { +}; + +static const struct ax_bulkin_settings AX88179_BULKIN_SIZE[] = { {7, 0x4f, 0, 0x12, 0xff}, {7, 0x20, 3, 0x16, 0xff}, {7, 0xae, 7, 0x18, 0xff}, {7, 0xcc, 0x4c, 0x18, 8}, }; +static const struct ax_bulkin_settings AX88179A_BULKIN_SIZE[] = { + {5, 0x7B, 0x00, 0x17, 0x0F}, / 1G, SS / + {5, 0xC0, 0x02, 0x06, 0x0F}, / 1G, HS / + {7, 0xF0, 0x00, 0x0C, 0x0F}, / 100M, Full, SS / + {6, 0x00, 0x00, 0x06, 0x0F}, / 100M, Half, SS / + {5, 0xC0, 0x04, 0x06, 0x0F}, / 100M, Full, HS / + {7, 0xC0, 0x04, 0x06, 0x0F}, / 100M, Half, HS / + {7, 0x00, 0x00, 0x03, 0x3F}, / FS / +}; + +static const struct ax_bulkin_settings AX88772D_BULKIN_SIZE[] = { + {0, 0x00, 0x00, 0x00, 0x00}, / 1G, SS (unused) / + {0, 0x00, 0x00, 0x00, 0x00}, / 1G, HS (unused) / + {0, 0x00, 0x00, 0x00, 0x00}, / 100M, Full, SS (unused) / + {0, 0x00, 0x00, 0x00, 0x00}, / 100M, Half, SS (unused) / + {5, 0xC0, 0x04, 0x06, 0x0F}, / 100M, Full, HS / + {7, 0xC0, 0x04, 0x06, 0x0F}, / 100M, Half, HS / + {7, 0x00, 0x00, 0x03, 0x3F}, / FS / +}; + +static const struct ax_bulkin_settings AX88279_BULKIN_SIZE[] = { + {5, 0x10, 0x01, 0x11, 0x0F}, / 2.5G / + {7, 0xB3, 0x01, 0x11, 0x0F}, / 1G, SS / + {7, 0xC0, 0x02, 0x06, 0x0F}, / 1G, HS / + {7, 0x80, 0x01, 0x03, 0x0F}, / 100M, Full, SS / + {7, 0x80, 0x01, 0x03, 0x0F}, / 100M, Half, SS / + {7, 0x80, 0x01, 0x03, 0x0F}, / 100M, Full, HS / + {7, 0x80, 0x01, 0x03, 0x0F}, / 100M, Half, HS / + {7, 0x00, 0x00, 0x03, 0x3F}, / FS / +}; + static void ax88179_set_pm_mode(struct usbnet dev, bool pm_mode) { struct ax88179_data ax179_data = dev->driver_priv; @@ -313,6 +490,7 @@ static int ax88179_write_cmd(struct usbnet dev, u8 cmd, u16 value, u16 index, static void ax88179_status(struct usbnet dev, struct urb urb) { + struct ax88179_data data = dev->driver_priv; struct ax88179_int_data event; u32 link; @@ -323,6 +501,9 @@ static void ax88179_status(struct usbnet dev, struct urb urb) le32_to_cpus((void )&event->intdata1); link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16; + data->speed = (((__force u32)event->intdata1) >> 8) & 0x7; + data->full_duplex = (((__force u32)event->intdata1) >> 12) & 0x1; + data->link = link; if (netif_carrier_ok(dev->net) != link) { usbnet_link_change(dev, link, 1); @@ -403,6 +584,32 @@ ax88179_phy_write_mmd_indirect(struct usbnet dev, u16 prtad, u16 devad, return 0; } +static int ax_read_mmd(struct usbnet dev, u16 dev_addr, u16 reg) +{ + struct ax88179_data priv = dev->driver_priv; + u16 res; + int ret; + + if (priv->chip_version >= AX_VERSION_AX88179A) { + ret = ax88179_read_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, &res); + if (ret < 0) + return ret; + return res; + } + + return ax88179_phy_read_mmd_indirect(dev, reg, dev_addr); +} + +static int ax_write_mmd(struct usbnet dev, u16 dev_addr, u16 reg, u16 data) +{ + struct ax88179_data priv = dev->driver_priv; + + if (priv->chip_version >= AX_VERSION_AX88179A) + return ax88179_write_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, &data); + + return ax88179_phy_write_mmd_indirect(dev, reg, dev_addr, data); +} + static int ax88179_suspend(struct usb_interface intf, pm_message_t message) { struct usbnet dev = usb_get_intfdata(intf); @@ -414,7 +621,6 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message) usbnet_suspend(intf, message); - / Enable WoL / if (priv->wolopts) { ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, &tmp8); @@ -425,6 +631,26 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message) ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, &tmp8); + + if (priv->chip_version >= AX_VERSION_AX88179A) { + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &tmp16); + tmp16 \|= AX_MEDIUM_RECEIVE_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &tmp16); + } + + if (priv->chip_version == AX_VERSION_AX88279) + ax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8, + EPHY_LOW_POWER_EN \| S5_WOL_EN + \| S5_WOL_LOW_POWER \| 0x8000, 0, NULL); + + } else if (priv->chip_version == AX_VERSION_AX88279) { + ax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8, 0x8000, 0, NULL); + } + + if (priv->chip_version >= AX_VERSION_AX88179A) { + ax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 0, EPHY_LOW_POWER_EN, 0, NULL); + ax88179_set_pm_mode(dev, false); + return 0; } /* Disable RX path / @@ -436,11 +662,11 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message) /* Force bulk-in zero length / ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, - 2, 2, &tmp16); + 2, 2, &tmp16); tmp16 \|= AX_PHYPWR_RSTCTL_BZ \| AX_PHYPWR_RSTCTL_IPRL; ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, - 2, 2, &tmp16); + 2, 2, &tmp16); / change clock / tmp8 = 0; @@ -456,12 +682,19 @@ static int ax88179_suspend(struct usb_interface intf, pm_message_t message) } /* This function is used to enable the autodetach function. / -/ This function is determined by offset 0x43 of EEPROM / +/ This function is determined by offset 0x43 of EEPROM for the AX88179 / static int ax88179_auto_detach(struct usbnet dev) { + struct ax88179_data priv = dev->driver_priv; u16 tmp16; u8 tmp8; + if (priv->chip_version >= AX_VERSION_AX88179A) { + tmp16 = AX88179A_AUTODETACH_DELAY; + ax88179_write_cmd(dev, AX88179A_AUTODETACH, tmp16, 0, 0, NULL); + return 0; + } + if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0) return 0; @@ -484,11 +717,31 @@ static int ax88179_auto_detach(struct usbnet dev) static int ax88179_resume(struct usb_interface intf) { struct usbnet dev = usb_get_intfdata(intf); + struct ax88179_data ax179_data; + u8 reg8; + ax179_data = dev->driver_priv; ax88179_set_pm_mode(dev, true); usbnet_link_change(dev, 0, 0); + if (ax179_data->chip_version >= AX_VERSION_AX88179A) { + ax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8); + if (!(reg8 & AX_PHY_POWER)) { + reg8 = AX_PHY_POWER; + ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8); + msleep(250); + } + ax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL); + + / Now, that AX_FW_MODE_179A is enabled, the PHY needs a power-cycle. + * PHY-power is re-enabled in ax88179_reset() + / + reg8 = 0; + ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8); + msleep(250); + } + ax88179_reset(dev); ax88179_set_pm_mode(dev, false); @@ -510,6 +763,21 @@ static void ax88179_disconnect(struct usb_interface intf) usbnet_disconnect(intf); } +static void ax88179_get_drvinfo(struct net_device net, struct ethtool_drvinfo info) +{ + struct usbnet dev = netdev_priv(net); + struct ax88179_data priv = dev->driver_priv; + + /* Inherit standard device info / + usbnet_get_drvinfo(net, info); + if (priv->chip_version < AX_VERSION_AX88179A) + return; + + snprintf(info->fw_version, sizeof(info->fw_version), "%d.%d.%d.%d", + priv->fw_version[0], priv->fw_version[1], + priv->fw_version[2], priv->fw_version[3]); +} + static void ax88179_get_wol(struct net_device net, struct ethtool_wolinfo wolinfo) { @@ -536,41 +804,74 @@ ax88179_set_wol(struct net_device net, struct ethtool_wolinfo wolinfo) static int ax88179_get_eeprom_len(struct net_device net) { - return AX_EEPROM_LEN; + struct usbnet dev = netdev_priv(net); + struct ax88179_data ax179_data; + + ax179_data = dev->driver_priv; + + if (ax179_data->chip_version < AX_VERSION_AX88179A) + return AX_EEPROM_LEN; + else if (ax179_data->chip_version >= AX_VERSION_AX88279) + return AX88279_EEPROM_LEN; + else + return AX88179A_EEPROM_LEN; } -static int -ax88179_get_eeprom(struct net_device net, struct ethtool_eeprom eeprom, - u8 data) +static void +ax88179_eeprom_access_params(struct ax88179_data ax179_data, int i, u16 value, u16 idx) +{ + /* AX88179 has a word-addressable EEPROM + * AX88179A uses EFUSES with 20 bytes length + * AX88279 has an EEPROM addressable in 256 byte blocks + / + if (ax179_data->chip_version < AX_VERSION_AX88179A) { + value = i; + idx = 1; + } else if (ax179_data->chip_version >= AX_VERSION_AX88279) { + value = (i * ax179_data->eeprom_block) >> 16; + idx = (i ax179_data->eeprom_block) & 0xffff; + } else { + value = i << 4; + idx = 0; + } +} + +static int ax88179_get_eeprom(struct net_device net, struct ethtool_eeprom eeprom, u8 data) { struct usbnet dev = netdev_priv(net); - u16 eeprom_buff; - int first_word, last_word; - int i, ret; + struct ax88179_data ax179_data; + int first, last, i, ret; + u8 eeprom_buff; + + ax179_data = dev->driver_priv; if (eeprom->len == 0) return -EINVAL; eeprom->magic = AX88179_EEPROM_MAGIC; - first_word = eeprom->offset >> 1; - last_word = (eeprom->offset + eeprom->len - 1) >> 1; - eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16), - GFP_KERNEL); + first = eeprom->offset / ax179_data->eeprom_block; + last = (eeprom->offset + eeprom->len - 1) / ax179_data->eeprom_block; + + eeprom_buff = kzalloc((last - first + 1) ax179_data->eeprom_block, GFP_KERNEL); if (!eeprom_buff) return -ENOMEM; - /* ax88179/178A returns 2 bytes from eeprom on read / - for (i = first_word; i <= last_word; i++) { - ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2, - &eeprom_buff[i - first_word]); + for (i = first; i <= last; i++) { + u16 value, idx; + + ax88179_eeprom_access_params(ax179_data, i, &value, &idx); + ret = __ax88179_read_cmd(dev, ax179_data->eeprom_read_cmd, + value, idx, ax179_data->eeprom_block, + eeprom_buff + (i - first) ax179_data->eeprom_block); + if (ret < 0) { kfree(eeprom_buff); return -EIO; } } - memcpy(data, (u8 )eeprom_buff + (eeprom->offset & 1), eeprom->len); + memcpy(data, eeprom_buff + eeprom->offset % ax179_data->eeprom_block, eeprom->len); kfree(eeprom_buff); return 0; } @@ -580,12 +881,17 @@ ax88179_set_eeprom(struct net_device net, struct ethtool_eeprom eeprom, u8 data) { struct usbnet dev = netdev_priv(net); + struct ax88179_data ax179_data; u16 eeprom_buff; int first_word; int last_word; int ret; int i; + ax179_data = dev->driver_priv; + if (ax179_data->chip_version >= AX_VERSION_AX88179A) + return -EOPNOTSUPP; + netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n", eeprom->len, eeprom->offset, eeprom->magic); @@ -651,12 +957,39 @@ ax88179_set_eeprom(struct net_device net, struct ethtool_eeprom eeprom, } static int ax88179_get_link_ksettings(struct net_device net, - struct ethtool_link_ksettings cmd) + struct ethtool_link_ksettings cmd) { struct usbnet dev = netdev_priv(net); + struct ax88179_data data; + int v; + + data = dev->driver_priv; mii_ethtool_get_link_ksettings(&dev->mii, cmd); + if (data->chip_version >= AX_VERSION_AX88279) { + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.supported); + + v = ax88179_mdio_read(dev->net, dev->mii.phy_id, MII_ADVERTISE); + if (v >= 0 && v & ADVERTISE_RESV) + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.advertising); + + v = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); + if (data->speed == ETHER_LINK_2500) { + cmd->base.speed = SPEED_2500; + /* MDIO_AN_10GBT_STAT_LP2_5G is broken, but we can deduce that + * the link-partner advertised 2500M if remotely AN succceded + * for link speed > 1000M and we locally have a link speed of + * 2500M + / + if (v >= 0 && v & MDIO_AN_10GBT_STAT_REMOK) + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.lp_advertising); + } + } + return 0; } @@ -664,34 +997,128 @@ static int ax88179_set_link_ksettings(struct net_device net, const struct ethtool_link_ksettings cmd) { struct usbnet dev = netdev_priv(net); + struct ax88179_data data; + int v; + + data = dev->driver_priv; + + / mii_ethtool_set_link_ksettings handles unknown bits in MII_ADVERTISE + * transparently, so for the 2.5GBit link speed of the AX_VERSION_AX88279 + * we just set up ADVERTISE_RESV before calling mii_ethtool_set_link_ksettings + * at least for speeds < 2500 + / + if (data->chip_version == AX_VERSION_AX88279) { + v = ax88179_mdio_read(net, dev->mii.phy_id, MII_ADVERTISE); + if (v < 0) + return v; + + if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.advertising)) + v \|= ADVERTISE_RESV; + else + v &= ~ADVERTISE_RESV; + ax88179_mdio_write(net, dev->mii.phy_id, MII_ADVERTISE, v); + if (cmd->base.speed == SPEED_2500) + return mii_nway_restart(&dev->mii); + } + return mii_ethtool_set_link_ksettings(&dev->mii, cmd); } +static void ax88179a_get_pauseparam(struct net_device net, struct ethtool_pauseparam pause) +{ + struct usbnet dev = netdev_priv(net); + struct ax88179_data data; + u16 bmcr, lcladv, rmtadv; + u8 cap; + + data = dev->driver_priv; + + if (data->chip_version < AX_VERSION_AX88179A) + return; + + bmcr = ax88179_mdio_read(net, dev->mii.phy_id, MII_BMCR); + lcladv = ax88179_mdio_read(net, dev->mii.phy_id, MII_ADVERTISE); + rmtadv = ax88179_mdio_read(net, dev->mii.phy_id, MII_LPA); + + if (!(bmcr & BMCR_ANENABLE)) { + pause->autoneg = 0; + pause->rx_pause = 0; + pause->tx_pause = 0; + return; + } + + pause->autoneg = 1; + + cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); + + if (cap & FLOW_CTRL_RX) + pause->rx_pause = 1; + + if (cap & FLOW_CTRL_TX) + pause->tx_pause = 1; +} + +static int ax88179a_set_pauseparam(struct net_device net, struct ethtool_pauseparam pause) +{ + struct usbnet dev = netdev_priv(net); + struct ax88179_data data; + u16 old, new1, bmcr; + u8 cap = 0; + + data = dev->driver_priv; + + if (data->chip_version < AX_VERSION_AX88179A) + return -EOPNOTSUPP; + + bmcr = ax88179_mdio_read(net, dev->mii.phy_id, MII_BMCR); + if (pause->autoneg && !(bmcr & BMCR_ANENABLE)) + return -EINVAL; + + if (pause->rx_pause) + cap \|= FLOW_CTRL_RX; + + if (pause->tx_pause) + cap \|= FLOW_CTRL_TX; + + old = ax88179_mdio_read(net, dev->mii.phy_id, MII_ADVERTISE); + new1 = (old & ~(ADVERTISE_PAUSE_CAP \| ADVERTISE_PAUSE_ASYM)) \| + mii_advertise_flowctrl(cap); + if (old != new1) + ax88179_mdio_write(net, dev->mii.phy_id, MII_ADVERTISE, new1); + + return mii_nway_restart(&dev->mii); +} + static int ax88179_ethtool_get_eee(struct usbnet dev, struct ethtool_keee data) { + struct ax88179_data priv = dev->driver_priv; int val; /* Get Supported EEE / - val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE, - MDIO_MMD_PCS); + val = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); if (val < 0) return val; mii_eee_cap1_mod_linkmode_t(data->supported, val); / Get advertisement EEE / - val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV, - MDIO_MMD_AN); + val = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); if (val < 0) return val; mii_eee_cap1_mod_linkmode_t(data->advertised, val); / Get LP advertisement EEE / - val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE, - MDIO_MMD_AN); + val = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); if (val < 0) return val; mii_eee_cap1_mod_linkmode_t(data->lp_advertised, val); + if (priv->chip_version >= AX_VERSION_AX88279) { + val = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2); + if (val < 0) + return val; + mii_eee_cap2_mod_linkmode_adv_t(data->lp_advertised, val); + } return 0; } @@ -701,8 +1128,7 @@ ax88179_ethtool_set_eee(struct usbnet dev, struct ethtool_keee data) { u16 tmp16 = linkmode_to_mii_eee_cap1_t(data->advertised); - return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV, - MDIO_MMD_AN, tmp16); + return ax_write_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, tmp16); } static int ax88179_chk_eee(struct usbnet dev) @@ -712,40 +1138,27 @@ static int ax88179_chk_eee(struct usbnet dev) mii_ethtool_gset(&dev->mii, &ecmd); - if (ecmd.duplex & DUPLEX_FULL) { + priv->eee_active = 0; + if ((priv->chip_version < AX_VERSION_AX88279 && (ecmd.duplex & DUPLEX_FULL)) \|\| + (ecmd.speed == SPEED_1000 && (ecmd.duplex & DUPLEX_FULL))) { int eee_lp, eee_cap, eee_adv; u32 lp, cap, adv, supported = 0; - eee_cap = ax88179_phy_read_mmd_indirect(dev, - MDIO_PCS_EEE_ABLE, - MDIO_MMD_PCS); - if (eee_cap < 0) { - priv->eee_active = 0; + eee_cap = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); + if (eee_cap < 0) return false; - } cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap); - if (!cap) { - priv->eee_active = 0; + if (!cap) return false; - } - - eee_lp = ax88179_phy_read_mmd_indirect(dev, - MDIO_AN_EEE_LPABLE, - MDIO_MMD_AN); - if (eee_lp < 0) { - priv->eee_active = 0; - return false; - } - eee_adv = ax88179_phy_read_mmd_indirect(dev, - MDIO_AN_EEE_ADV, - MDIO_MMD_AN); + eee_lp = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); + if (eee_lp < 0) + return true; - if (eee_adv < 0) { - priv->eee_active = 0; - return false; - } + eee_adv = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); + if (eee_adv < 0) + return true; adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv); lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp); @@ -753,65 +1166,53 @@ static int ax88179_chk_eee(struct usbnet dev) SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full; - if (!(lp & adv & supported)) { - priv->eee_active = 0; - return false; - } + if (!(lp & adv & supported)) + return true; priv->eee_active = 1; return true; } - priv->eee_active = 0; return false; } -static void ax88179_disable_eee(struct usbnet dev) -{ - u16 tmp16; - - tmp16 = GMII_PHY_PGSEL_PAGE3; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - GMII_PHY_PAGE_SELECT, 2, &tmp16); - - tmp16 = 0x3246; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - MII_PHYADDR, 2, &tmp16); - - tmp16 = GMII_PHY_PGSEL_PAGE0; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - GMII_PHY_PAGE_SELECT, 2, &tmp16); -} - -static void ax88179_enable_eee(struct usbnet dev) +static void ax88179_eee_config(struct usbnet dev, bool enable) { + struct ax88179_data priv = dev->driver_priv; u16 tmp16; - tmp16 = GMII_PHY_PGSEL_PAGE3; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - GMII_PHY_PAGE_SELECT, 2, &tmp16); - - tmp16 = 0x3247; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - MII_PHYADDR, 2, &tmp16); - - tmp16 = GMII_PHY_PGSEL_PAGE5; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - GMII_PHY_PAGE_SELECT, 2, &tmp16); - - tmp16 = 0x0680; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - MII_BMSR, 2, &tmp16); + if (priv->chip_version < AX_VERSION_AX88179A) { + tmp16 = GMII_PHY_PGSEL_PAGE3; + ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, + GMII_PHY_PAGE_SELECT, 2, &tmp16); + + tmp16 = enable ? 0x3247 : 0x3246; + ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, + MII_PHYADDR, 2, &tmp16); + if (enable) { + tmp16 = GMII_PHY_PGSEL_PAGE5; + ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, + GMII_PHY_PAGE_SELECT, 2, &tmp16); + + tmp16 = 0x0680; + ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, + MII_BMSR, 2, &tmp16); + } - tmp16 = GMII_PHY_PGSEL_PAGE0; - ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, - GMII_PHY_PAGE_SELECT, 2, &tmp16); + tmp16 = GMII_PHY_PGSEL_PAGE0; + ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, + GMII_PHY_PAGE_SELECT, 2, &tmp16); + } else { + ax88179_write_cmd(dev, AX_GPHY_CTL, AX_GPHY_EEE_CTRL, enable, 0, NULL); + } } static int ax88179_get_eee(struct net_device net, struct ethtool_keee edata) { struct usbnet dev = netdev_priv(net); - struct ax88179_data priv = dev->driver_priv; + struct ax88179_data priv; + + priv = dev->driver_priv; edata->eee_enabled = priv->eee_enabled; edata->eee_active = priv->eee_active; @@ -822,18 +1223,20 @@ static int ax88179_get_eee(struct net_device net, struct ethtool_keee edata) static int ax88179_set_eee(struct net_device net, struct ethtool_keee edata) { struct usbnet dev = netdev_priv(net); - struct ax88179_data priv = dev->driver_priv; + struct ax88179_data priv; int ret; + priv = dev->driver_priv; + priv->eee_enabled = edata->eee_enabled; if (!priv->eee_enabled) { - ax88179_disable_eee(dev); + ax88179_eee_config(dev, false); } else { priv->eee_enabled = ax88179_chk_eee(dev); if (!priv->eee_enabled) return -EOPNOTSUPP; - ax88179_enable_eee(dev); + ax88179_eee_config(dev, true); } ret = ax88179_ethtool_set_eee(dev, edata); @@ -848,6 +1251,7 @@ static int ax88179_set_eee(struct net_device net, struct ethtool_keee edata) } static const struct ethtool_ops ax88179_ethtool_ops = { + .get_drvinfo = ax88179_get_drvinfo, .get_link = ethtool_op_get_link, .get_msglevel = usbnet_get_msglevel, .set_msglevel = usbnet_set_msglevel, @@ -861,16 +1265,78 @@ static const struct ethtool_ops ax88179_ethtool_ops = { .nway_reset = usbnet_nway_reset, .get_link_ksettings = ax88179_get_link_ksettings, .set_link_ksettings = ax88179_set_link_ksettings, + .get_pauseparam = ax88179a_get_pauseparam, + .set_pauseparam = ax88179a_set_pauseparam, .get_ts_info = ethtool_op_get_ts_info, }; +static int ax179a_vlan_rx_kill_vid(struct net_device net, __be16 proto, u16 vid) +{ + struct usbnet dev = netdev_priv(net); + u8 vlan_ctrl; + u16 reg16; + u8 reg8; + + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8); + vlan_ctrl = reg8; + + /* Address / + reg8 = (vid / 16); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, &reg8); + + / Data / + reg8 = vlan_ctrl \| AX_VLAN_CONTROL_RD; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8); + + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16); + reg16 &= ~(1 << (vid % 16)); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16); + + reg8 = vlan_ctrl \| AX_VLAN_CONTROL_WE; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8); + + return 0; +} + +static int ax179a_vlan_rx_add_vid(struct net_device net, __be16 proto, u16 vid) +{ + struct usbnet dev = netdev_priv(net); + u8 vlan_ctrl; + u16 reg16; + u8 reg8; + + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8); + vlan_ctrl = reg8; + + / Address / + reg8 = (vid / 16); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, &reg8); + + / Data / + reg8 = vlan_ctrl \| AX_VLAN_CONTROL_RD; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8); + + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16); + reg16 \|= (1 << (vid % 16)); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16); + + reg8 = vlan_ctrl \| AX_VLAN_CONTROL_WE; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8); + + return 0; +} + static void ax88179_set_multicast(struct net_device net) { struct usbnet dev = netdev_priv(net); - struct ax88179_data data = dev->driver_priv; u8 m_filter = ((u8 )dev->data); + struct ax88179_data data; + + data = dev->driver_priv; - data->rxctl = (AX_RX_CTL_START \| AX_RX_CTL_AB \| AX_RX_CTL_IPE); + data->rxctl = (AX_RX_CTL_START \| AX_RX_CTL_AB \| AX_RX_CTL_DROPCRCERR); + if (data->ip_align) + data->rxctl \|= AX_RX_CTL_IPE; if (net->flags & IFF_PROMISC) { data->rxctl \|= AX_RX_CTL_PRO; @@ -909,6 +1375,7 @@ ax88179_set_features(struct net_device net, netdev_features_t features) { u8 tmp; struct usbnet dev = netdev_priv(net); + struct ax88179_data data = dev->driver_priv; netdev_features_t changed = net->features ^ features; if (changed & NETIF_F_IP_CSUM) { @@ -928,6 +1395,34 @@ ax88179_set_features(struct net_device net, netdev_features_t features) tmp ^= AX_RXCOE_IP \| AX_RXCOE_TCP \| AX_RXCOE_UDP \| AX_RXCOE_TCPV6 \| AX_RXCOE_UDPV6; ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp); + data->rx_checksum = !!(features & NETIF_F_RXCSUM); + } + + if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp); + tmp ^= AX_VLAN_CONTROL_VFE; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp); + if (features & NETIF_F_HW_VLAN_CTAG_FILTER) { + for (int i = 0; i < 256; i++) { + u16 tmp16; + / Address / + tmp = i; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, + 1, 1, &tmp); + / Data / + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, + 2, 2, &tmp16); + tmp = AX_VLAN_CONTROL_WE; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, + 1, 1, &tmp); + } + } + } + + if (changed & NETIF_F_HW_VLAN_CTAG_RX) { + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp); + tmp ^= AX_VLAN_CONTROL_VSO; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp); } return 0; @@ -995,6 +1490,8 @@ static const struct net_device_ops ax88179_netdev_ops = { .ndo_eth_ioctl = usbnet_mii_ioctl, .ndo_set_rx_mode = ax88179_set_multicast, .ndo_set_features = ax88179_set_features, + .ndo_vlan_rx_add_vid = ax179a_vlan_rx_add_vid, + .ndo_vlan_rx_kill_vid = ax179a_vlan_rx_kill_vid, }; static int ax88179_check_eeprom(struct usbnet dev) @@ -1293,6 +1790,17 @@ static int ax88179_bind(struct usbnet dev, struct usb_interface intf) dev->driver_priv = ax179_data; + ret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS, + 1, 1, &ax179_data->chip_version); + if (ret < 0) + goto err_nodev; + + ax179_data->chip_version = (ax179_data->chip_version & 0xf0) >> 4; + ax179_data->is_ax88772d = 0; + ax179_data->ip_align = 1; + ax179_data->eeprom_read_cmd = AX_ACCESS_EEPROM; + ax179_data->eeprom_block = 2; + dev->net->netdev_ops = &ax88179_netdev_ops; dev->net->ethtool_ops = &ax88179_ethtool_ops; dev->net->needed_headroom = 8; @@ -1317,6 +1825,120 @@ static int ax88179_bind(struct usbnet dev, struct usb_interface intf) ax88179_reset(dev); return 0; + +err_nodev: + kfree(ax179_data); + ax179_data = NULL; + + return ret; +} + +static int ax88179a_bind(struct usbnet dev, struct usb_interface intf) +{ + struct usb_device udev = interface_to_usbdev(intf); + struct ax88179_data ax179_data; + int ret; + + /* Check if vendor configuration / + if (udev->actconfig->desc.bConfigurationValue != 1) { + netdev_info(dev->net, "Switching to vendor mode\n"); + usb_driver_set_configuration(udev, 1); + return -ENODEV; + } + + ret = usbnet_get_endpoints(dev, intf); + if (ret < 0) + return ret; + + ax179_data = kzalloc_obj(ax179_data); + if (!ax179_data) + return -ENOMEM; + + dev->driver_priv = ax179_data; + + ret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS, + 1, 1, &ax179_data->chip_version); + if (ret < 0) + goto err_nodev; + + ax179_data->chip_version = (ax179_data->chip_version & 0xf0) >> 4; + ax179_data->is_ax88772d = 0; + if (ax179_data->chip_version == AX_VERSION_AX88179A) { + if (udev->descriptor.bcdDevice == 0x300) + ax179_data->is_ax88772d = 1; + } + + for (int i = 0; i < 3; i++) { + ret = ax88179_read_cmd(dev, AX88179A_ACCESS_BL, (0xFD + i), + 1, 1, &ax179_data->fw_version[i]); + if (ret < 0) + ax179_data->fw_version[i] = 0xff; + } + netdev_info(dev->net, "AX88179A/279/772D Chip Version: %x, FW: %d.%d.%d.%d\n", + ax179_data->chip_version, + ax179_data->fw_version[0], ax179_data->fw_version[1], + ax179_data->fw_version[2], ax179_data->fw_version[3]); + + /* The AX88279 requires both the AX_RX_CTL_IPE and AX_RX_CTL_DROPCRCERR + * bits set in AX_RX_CTL for creating correct RX-URBs. AX_RX_CTL_DROPCRCERR + * is anyway set for all chips, make sure AX_RX_CTL_IPE is set via ip_align. + * Also configure eeprom access parameters. + / + if (ax179_data->chip_version == AX_VERSION_AX88279) { + ax179_data->ip_align = 1; + ax179_data->eeprom_read_cmd = AX88179A_FLASH_READ; + ax179_data->eeprom_block = 256; + } else { + ax179_data->ip_align = 0; + ax179_data->eeprom_read_cmd = AX_ACCESS_EFUS; + ax179_data->eeprom_block = 20; + } + + dev->net->netdev_ops = &ax88179_netdev_ops; + dev->net->ethtool_ops = &ax88179_ethtool_ops; + dev->net->needed_headroom = 8; + dev->net->needed_tailroom = 8; + dev->net->min_mtu = ETH_MIN_MTU; + dev->hard_mtu = 9 1024; + dev->net->max_mtu = dev->hard_mtu - dev->net->hard_header_len; + + /* Initialize MII structure / + dev->mii.dev = dev->net; + dev->mii.mdio_read = ax88179_mdio_read; + dev->mii.mdio_write = ax88179_mdio_write; + dev->mii.phy_id_mask = 0xff; + dev->mii.reg_num_mask = 0xff; + dev->mii.phy_id = 0x03; + if (!ax179_data->is_ax88772d) + dev->mii.supports_gmii = 1; + + dev->net->features \|= NETIF_F_SG \| NETIF_F_IP_CSUM \| + NETIF_F_IPV6_CSUM \| NETIF_F_RXCSUM \| NETIF_F_TSO \| + NETIF_F_HW_VLAN_CTAG_TX \| NETIF_F_HW_VLAN_CTAG_RX \| + NETIF_F_HW_VLAN_CTAG_FILTER; + + dev->net->hw_features \|= dev->net->features; + + dev->net->vlan_features = NETIF_F_SG \| NETIF_F_IP_CSUM \| + NETIF_F_IPV6_CSUM \| NETIF_F_RXCSUM \| NETIF_F_TSO; + + netif_set_tso_max_size(dev->net, 16384); + + / Enable Transmission of Link Speed byte in interrupt URB / + ax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL); + ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0, 0, 0, NULL); + + / Read MAC address from DTB or ASIX chip / + ax88179_get_mac_addr(dev); + memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN); + + return 0; + +err_nodev: + kfree(ax179_data); + ax179_data = NULL; + + return ret; } static void ax88179_unbind(struct usbnet dev, struct usb_interface intf) @@ -1338,6 +1960,22 @@ static void ax88179_unbind(struct usbnet dev, struct usb_interface intf) kfree(ax179_data); } +static void ax88179a_unbind(struct usbnet dev, struct usb_interface intf) +{ + struct ax88179_data ax179_data = dev->driver_priv; + u16 tmp16; + u8 tmp8; + + /* Configure RX control register => stop operation / + tmp16 = AX_RX_CTL_STOP; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16); + + tmp8 = 0; + ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &tmp8); + + kfree(ax179_data); +} + static void ax88179_rx_checksum(struct sk_buff skb, u32 pkt_hdr) { @@ -1354,6 +1992,21 @@ ax88179_rx_checksum(struct sk_buff skb, u32 pkt_hdr) skb->ip_summed = CHECKSUM_UNNECESSARY; } +static void ax88179a_rx_checksum(struct sk_buff skb, u64 pkt_desc) +{ + u32 pkt_type; + + skb->ip_summed = CHECKSUM_NONE; + /* checksum error bit is set / + if (pkt_desc & AX179A_RX_PD_L4_ERR \|\| pkt_desc & AX179A_RX_PD_L3_ERR) + return; + + pkt_type = pkt_desc & AX179A_RX_PD_L4_TYPE_MASK; + / It must be a TCP or UDP packet with a valid checksum / + if (pkt_type == AX179A_RX_PD_L4_TCP \|\| pkt_type == AX179A_RX_PD_L4_UDP) + skb->ip_summed = CHECKSUM_UNNECESSARY; +} + static int ax88179_rx_fixup(struct usbnet dev, struct sk_buff skb) { struct sk_buff ax_skb; @@ -1472,6 +2125,121 @@ static int ax88179_rx_fixup(struct usbnet dev, struct sk_buff skb) return 0; } +static int ax88179a_rx_fixup(struct usbnet dev, struct sk_buff skb) +{ + struct ax88179_data ax179_data = dev->driver_priv; + struct sk_buff ax_skb; + u32 hdr_off, pkt_end; + u64 pkt_desc_ptr; + u16 vlan_tag; + u16 pkt_cnt; + u64 rx_hdr; + + / SKB contents for AX179A-based chips: + * <packet 1> + * ... + * <packet N> + * <per-packet metadata entry 1> + * ... + * <per-packet metadata entry N> + * <rx_hdr> + * + * where: + * <packet N> contains pkt_len data bytes and padding: + * 2 bytes of IP alignment (optional, depends on AX_RX_CTL_IPE flag) + * packet data received + * optional padding to 8-bytes boundary + * <per-packet metadata entry N> contains 8 bytes: + * pkt_len and fields AX_RXHDR_* + * <rx-hdr> contains 8 bytes: + * pkt_cnt and hdr_off (offset of <per-packet metadata entry 1>) + * + * pkt_cnt is number of entries in the per-packet metadata array. + / + + if (!skb \|\| skb->len < sizeof(rx_hdr)) + goto err; + + / RX Descriptor Header / + skb_trim(skb, skb->len - sizeof(rx_hdr)); + rx_hdr = le64_to_cpup((u64 )skb_tail_pointer(skb)); + + /* Check these packets / + hdr_off = (rx_hdr & AX179A_RX_DH_DESC_OFFSET_MASK) >> AX179A_RX_DH_DESC_OFFSET_SHIFT; + pkt_cnt = rx_hdr & AX179A_RX_DH_PKT_CNT_MASK; + + / Consistency check header position / + if (hdr_off != skb->len - (pkt_cnt sizeof(rx_hdr))) + goto err; + + /* Make sure that the bounds of the metadata array are inside the SKB + * (and in front of the counter at the end). + / + if (pkt_cnt 8 + hdr_off > skb->len) + goto err; + + /* Packets must not overlap the metadata array / + skb_trim(skb, hdr_off); + + if (!pkt_cnt) + goto err; + + / Get the first RX packet descriptor / + pkt_desc_ptr = (u64 )(skb->data + hdr_off); + + pkt_end = 0; + while (pkt_cnt--) { + u64 pkt_desc = le64_to_cpup(pkt_desc_ptr); + u32 pkt_len_plus_padd; + u32 pkt_len; + + pkt_len = (u32)((pkt_desc & AX179A_RX_PD_LEN_MASK) >> AX179A_RX_PD_LEN_SHIFT) + - (ax179_data->ip_align ? 2 : 0); + pkt_len_plus_padd = ((pkt_len + 7 + (ax179_data->ip_align ? 2 : 0)) & 0x7FFF8); + + pkt_end += pkt_len_plus_padd; + if (pkt_end > hdr_off \|\| (pkt_cnt == 0 && pkt_end != hdr_off)) + goto err; + + if (pkt_desc & AX179A_RX_PD_DROP \|\| !(pkt_desc & AX179A_RX_PD_RX_OK) \|\| + pkt_len > (dev->hard_mtu + AX179A_RX_HW_PAD)) { + skb_pull(skb, pkt_len_plus_padd); + + /* Next RX Packet Descriptor / + pkt_desc_ptr++; + continue; + } + + ax_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len); + if (!ax_skb) + goto err; + + skb_put(ax_skb, pkt_len); + memcpy(ax_skb->data, skb->data + (ax179_data->ip_align ? AX179A_RX_HW_PAD : 0), + pkt_len); + + if (ax179_data->rx_checksum) + ax88179a_rx_checksum(ax_skb, pkt_desc); + + if (pkt_desc & AX179A_RX_PD_VLAN) { + vlan_tag = pkt_desc >> AX179A_RX_PD_VLAN_SHIFT; + __vlan_hwaccel_put_tag(ax_skb, htons(ETH_P_8021Q), + vlan_tag & VLAN_VID_MASK); + } + + usbnet_skb_return(dev, ax_skb); + skb_pull(skb, pkt_len_plus_padd); + + / Next RX Packet Header / + pkt_desc_ptr++; + } + + return 1; + +err: + return 0; +} + static struct sk_buff ax88179_tx_fixup(struct usbnet dev, struct sk_buff skb, gfp_t flags) { @@ -1505,6 +2273,59 @@ ax88179_tx_fixup(struct usbnet dev, struct sk_buff skb, gfp_t flags) return skb; } +static struct sk_buff * +ax88179a_tx_fixup(struct usbnet dev, struct sk_buff skb, gfp_t flags) +{ + u64 tx_desc = skb->len & AX179A_TX_DESC_LEN_MASK; + int frame_size = dev->maxpacket; + struct sk_buff ax_skb; + u64 tx_desc_ptr; + int padding_size; + int headroom; + int tailroom; + u16 tci = 0; + + /* TSO MSS / + tx_desc \|= ((u64)(skb_shinfo(skb)->gso_size & AX179A_TX_DESC_MSS_MASK)) << + AX179A_TX_DESC_MSS_SHIFT; + + headroom = (skb->len + sizeof(tx_desc)) % 8; + padding_size = headroom ? 8 - headroom : 0; + + if (((skb->len + sizeof(tx_desc) + padding_size) % frame_size) == 0) { + padding_size += 8; + tx_desc \|= AX179A_TX_DESC_DROP_PADD; + } + + if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_TX) && (vlan_get_tag(skb, &tci) >= 0)) { + tx_desc \|= AX179A_TX_DESC_VLAN; + tx_desc \|= ((u64)tci & AX179A_TX_DESC_VLAN_MASK) << AX179A_TX_DESC_VLAN_SHIFT; + } + + if (!dev->can_dma_sg && (dev->net->features & NETIF_F_SG) && skb_linearize(skb)) + return NULL; + + headroom = skb_headroom(skb); + tailroom = skb_tailroom(skb); + + if (!(headroom >= sizeof(tx_desc) && tailroom >= padding_size)) { + ax_skb = skb_copy_expand(skb, sizeof(tx_desc), padding_size, flags); + dev_kfree_skb_any(skb); + skb = ax_skb; + if (!skb) + return NULL; + } + if (padding_size != 0) + skb_put_zero(skb, padding_size); + / Copy TX header / + tx_desc_ptr = skb_push(skb, sizeof(tx_desc)); + tx_desc_ptr = cpu_to_le64(tx_desc); + + usbnet_set_skb_tx_stats(skb, 1, 0); + + return skb; +} + static int ax88179_link_reset(struct usbnet dev) { struct ax88179_data ax179_data = dev->driver_priv; @@ -1580,73 +2401,343 @@ static int ax88179_link_reset(struct usbnet dev) return 0; } +static void ax88179a_bulkin_config(struct usbnet dev, u8 link_sts) +{ + struct ax88179_data ax179_data = dev->driver_priv; + const struct ax_bulkin_settings bulkin_data; + int index = 0; + + switch (ax179_data->speed) { + case ETHER_LINK_2500: /* AX88279 only / + index = 0; + break; + + case ETHER_LINK_1000: / AX88279 & AX88178A / + if (ax179_data->chip_version == AX_VERSION_AX88279) { + if (link_sts & AX_USB_SS) + index = 1; + else if (link_sts & AX_USB_HS) + index = 2; + } else { + if (link_sts & AX_USB_SS) + index = 0; + else if (link_sts & AX_USB_HS) + index = 1; + } + break; + + case ETHER_LINK_100: + if (ax179_data->chip_version == AX_VERSION_AX88279) { + if (link_sts & AX_USB_SS) + index = 3; + else if (link_sts & AX_USB_HS) + index = 5; + if (!ax179_data->full_duplex) + index++; + } else { + / AX88279A & AX88277D / + if (link_sts & AX_USB_SS) + index = 2; + else if (link_sts & AX_USB_HS) + index = 4; + if (!ax179_data->full_duplex) + index++; + } + break; + + case ETHER_LINK_10: + if (ax179_data->chip_version == AX_VERSION_AX88279) + index = 7; + else + index = 6; + break; + + default: / No link / + index = 0; + } + + if (ax179_data->chip_version == AX_VERSION_AX88279 && (link_sts & AX_USB_FS)) + index = 7; + + if (ax179_data->chip_version == AX_VERSION_AX88279) { + bulkin_data = AX88279_BULKIN_SIZE; + } else { + if (ax179_data->is_ax88772d) + bulkin_data = AX88772D_BULKIN_SIZE; + else + bulkin_data = AX88179A_BULKIN_SIZE; + } + + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, &bulkin_data[index]); +} + +static int ax88179a_link_reset(struct usbnet dev) +{ + struct ax88179_data ax179_data = dev->driver_priv; + u8 tmp8, link_sts, reg8[3]; + u16 tmp16, mode, speed; + + if (!ax179_data->link) { + netdev_info(dev->net, "ax88179a - Link status is: 0\n"); + return 0; + } + + / Stop RX/TX for link configuration / + tmp16 = AX_RX_CTL_STOP; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16); + tmp8 = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, &tmp8); + + tmp8 = 0xa5; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_CDC_DELAY_TX, 1, 1, &tmp8); + + tmp16 = 0x0410; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 2, 2, &tmp16); + + tmp8 = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_ETH_TX_GAP, 1, 1, &tmp8); + + tmp8 = 0x07; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_EP5_EHR, 1, 1, &tmp8); + + tmp8 = 0x28 \| AX_NEW_PAUSE_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_NEW_PAUSE_CTRL, 1, 1, &tmp8); + + mode = AX_MEDIUM_RECEIVE_EN \| AX_MEDIUM_TXFLOW_CTRLEN \| AX_MEDIUM_RXFLOW_CTRLEN; + + / Link is up, but some older AX88179A FW versions do not send link speed + * and duplex status in interrupt URB, so read it via MII + / + if (!ax179_data->speed) { + struct ethtool_link_ksettings cmd; + + mii_ethtool_get_link_ksettings(&dev->mii, &cmd); + ax179_data->full_duplex = cmd.base.duplex; + switch (cmd.base.speed) { + case SPEED_1000: + ax179_data->speed = ETHER_LINK_1000; + break; + case SPEED_100: + ax179_data->speed = ETHER_LINK_100; + break; + case SPEED_10: + default: + ax179_data->speed = ETHER_LINK_10; + break; + }; + } + + speed = 0; + switch (ax179_data->speed) { + case ETHER_LINK_2500: + reg8[0] = 0x00; + reg8[1] = 0xF8; + reg8[2] = 0x07; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_PAUSE, 3, 3, reg8); + + reg8[0] = 0x78; + reg8[1] = (AX_LSOFC_WCNT_7_ACCESS << 5); + reg8[2] = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8); + + reg8[0] = 0x40; + reg8[1] = AX_MAC_MIQFFCTRL_FORMAT \| AX_MAC_MIQFFCTRL_DROP_CRC \| AX_MAC_LSO_ERR_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 2, 2, reg8); + + tmp8 = AX_XGMII_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, &tmp8); + + tmp8 = 0x1C \| AX_LSO_ENHANCE_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_LSO_ENHANCE_CTRL, 1, 1, &tmp8); + + mode \|= AX_MEDIUM_GIGAMODE \| AX_MEDIUM_FULL_DUPLEX; + + speed = 2500; + break; + + case ETHER_LINK_1000: + mode \|= AX_MEDIUM_GIGAMODE; + speed = 1000; + fallthrough; + + case ETHER_LINK_100: + reg8[0] = 0x78; + reg8[1] = (AX_LSOFC_WCNT_7_ACCESS << 5) \| AX_GMII_CRC_APPEND; + reg8[2] = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8); + + tmp8 = 0x40; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, &tmp8); + + speed = speed ? speed : 100; + break; + + case ETHER_LINK_10: + reg8[0] = 0xFA; + reg8[1] = (AX_LSOFC_WCNT_7_ACCESS << 5) \| AX_GMII_CRC_APPEND; + reg8[2] = 0xFF; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8); + + tmp8 = 0xFA; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, &tmp8); + + speed = 10; + break; + } + + ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS, 1, 1, &link_sts); + ax88179a_bulkin_config(dev, link_sts); + + if (ax179_data->chip_version < AX_VERSION_AX88279) { + tmp8 = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, &tmp8); + } + + if (ax179_data->full_duplex) + mode \|= AX_MEDIUM_FULL_DUPLEX; + + if (dev->net->mtu > 1500) + mode \|= AX_MEDIUM_JUMBO_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &mode); + + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &ax179_data->rxctl); + + tmp8 = AX_MAC_RX_PATH_READY \| AX_MAC_TX_PATH_READY; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, &tmp8); + + ax179_data->eee_enabled = ax88179_chk_eee(dev); + + netif_carrier_on(dev->net); + + netdev_info(dev->net, "ax88179a - Link status is: 1, Link speed: %d, Duplex: %d\n", + speed, ax179_data->full_duplex); + + return 0; +} + static int ax88179_reset(struct usbnet dev) { - u8 buf[5]; - u16 tmp16; - u8 tmp; struct ax88179_data ax179_data = dev->driver_priv; struct ethtool_keee eee_data; + u16 tmp16; + u8 buf[5]; + u8 tmp; tmp16 = (u16 )buf; tmp = (u8 )buf; / Power up ethernet PHY / - tmp16 = 0; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); + if (ax179_data->chip_version < AX_VERSION_AX88179A) { + tmp16 = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); - tmp16 = AX_PHYPWR_RSTCTL_IPRL; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); - msleep(500); + tmp16 = AX_PHYPWR_RSTCTL_IPRL; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); + msleep(500); - tmp = AX_CLK_SELECT_ACS \| AX_CLK_SELECT_BCS; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp); - msleep(200); + tmp = AX_CLK_SELECT_ACS \| AX_CLK_SELECT_BCS; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp); + msleep(200); + } else { + tmp = AX_PHY_POWER; + ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, tmp); + msleep(250); + } + + if (ax179_data->chip_version == AX_VERSION_AX88279) { + tmp16 = ax88179_mdio_read(dev->net, dev->mii.phy_id, MII_ADVERTISE); + tmp16 &= ~(ADVERTISE_10FULL \| ADVERTISE_10HALF); + tmp16 \|= ADVERTISE_RESV; / Advertise 2.5GBit link / + ax88179_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, tmp16); + } /* Ethernet PHY Auto Detach/ ax88179_auto_detach(dev); + if (ax179_data->chip_version >= AX_VERSION_AX88179A) { + tmp = AX_MAC_EFF_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BULK_OUT_CTRL, 1, 1, tmp); + + tmp16 = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16); + + tmp = 0x04; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp); + tmp = 0x10; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp); + + tmp = 0; + if (dev->net->features & NETIF_F_HW_VLAN_CTAG_FILTER) + tmp \|= AX_VLAN_CONTROL_VFE; + if (dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) + tmp \|= AX_VLAN_CONTROL_VSO; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, tmp); + + tmp = 0xff; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_INT_MASK, 1, 1, tmp); + + tmp = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_RX_DMA_CTL, 1, 1, tmp); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_TX_DMA_CTL, 1, 1, tmp); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_ARC_CTRL, 1, 1, tmp); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_SWP_CTRL, 1, 1, tmp); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_HDR_CKSUM, 1, 1, tmp); + } + /* Read MAC address from DTB or asix chip / ax88179_get_mac_addr(dev); memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN); / RX bulk configuration / - memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); - - dev->rx_urb_size = 1024 20; - - tmp = 0x34; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp); - - tmp = 0x52; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, - 1, 1, tmp); + if (ax179_data->chip_version < AX_VERSION_AX88179A) { + memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); + tmp = 0x34; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp); + + tmp = 0x52; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, + 1, 1, tmp); + dev->rx_urb_size = 1024 * 20; + } else { + /* The Bulk-Register configuration for the AX88179A is done in + * ax88179a_link_reset(), once the link is up for a given link and USB-speed. + / + if (ax179_data->is_ax88772d) + dev->rx_urb_size = 1024 24; + else + dev->rx_urb_size = 1024 * 48; + } /* Enable checksum offload / tmp = AX_RXCOE_IP \| AX_RXCOE_TCP \| AX_RXCOE_UDP \| AX_RXCOE_TCPV6 \| AX_RXCOE_UDPV6; ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp); + ax179_data->rx_checksum = 1; tmp = AX_TXCOE_IP \| AX_TXCOE_TCP \| AX_TXCOE_UDP \| AX_TXCOE_TCPV6 \| AX_TXCOE_UDPV6; ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp); / Configure RX control register => start operation / - tmp16 = AX_RX_CTL_DROPCRCERR \| AX_RX_CTL_IPE \| AX_RX_CTL_START \| - AX_RX_CTL_AP \| AX_RX_CTL_AMALL \| AX_RX_CTL_AB; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16); - - tmp = AX_MONITOR_MODE_PMETYPE \| AX_MONITOR_MODE_PMEPOL \| - AX_MONITOR_MODE_RWMP; + ax179_data->rxctl = AX_RX_CTL_DROPCRCERR \| AX_RX_CTL_START \| + AX_RX_CTL_AP \| AX_RX_CTL_AMALL \| AX_RX_CTL_AB; + if (ax179_data->ip_align) + ax179_data->rxctl \|= AX_RX_CTL_IPE; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &ax179_data->rxctl); + + if (ax179_data->chip_version < AX_VERSION_AX88179A) + tmp = AX_MONITOR_MODE_PMETYPE \| AX_MONITOR_MODE_PMEPOL \| AX_MONITOR_MODE_RWMP; + else + tmp = AX_MONITOR_MODE_RWMP; ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp); / Configure default medium type => giga / tmp16 = AX_MEDIUM_RECEIVE_EN \| AX_MEDIUM_TXFLOW_CTRLEN \| - AX_MEDIUM_RXFLOW_CTRLEN \| AX_MEDIUM_FULL_DUPLEX \| - AX_MEDIUM_GIGAMODE; - ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, - 2, 2, tmp16); + AX_MEDIUM_RXFLOW_CTRLEN \| AX_MEDIUM_FULL_DUPLEX; + if (!ax179_data->is_ax88772d) + tmp16 \|= AX_MEDIUM_GIGAMODE; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16); / Check if WoL is supported / ax179_data->wol_supported = 0; @@ -1654,16 +2745,29 @@ static int ax88179_reset(struct usbnet dev) 1, 1, &tmp) > 0) ax179_data->wol_supported = WAKE_MAGIC \| WAKE_PHY; - ax88179_led_setting(dev); + /* For chips starting with AX88179A, LEDS are configured by the adapter + * firmware directly from EEPROM/EFUSE values + / + if (ax179_data->chip_version < AX_VERSION_AX88179A) + ax88179_led_setting(dev); ax179_data->eee_enabled = 0; ax179_data->eee_active = 0; - ax88179_disable_eee(dev); + if (ax179_data->chip_version < AX_VERSION_AX88179A) { + ax88179_eee_config(dev, false); - ax88179_ethtool_get_eee(dev, &eee_data); - linkmode_zero(eee_data.advertised); - ax88179_ethtool_set_eee(dev, &eee_data); + ax88179_ethtool_get_eee(dev, &eee_data); + linkmode_zero(eee_data.advertised); + ax88179_ethtool_set_eee(dev, &eee_data); + } else { + ax88179_eee_config(dev, true); + ax88179_ethtool_get_eee(dev, &eee_data); + linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised); + if (ax179_data->chip_version >= AX_VERSION_AX88279) + linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised); + ax88179_ethtool_set_eee(dev, &eee_data); + } / Restart autoneg / mii_nway_restart(&dev->mii); @@ -1707,6 +2811,24 @@ static int ax88179_stop(struct usbnet dev) return 0; } +static int ax88179a_stop(struct usbnet dev) +{ + u16 reg16; + u8 reg8; + + ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &reg16); + reg16 &= ~AX_MEDIUM_RECEIVE_EN; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &reg16); + + reg16 = 0; + ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &reg16); + + reg8 = 0; + ax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8); + + return 0; +} + static const struct driver_info ax88179_info = { .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet", .bind = ax88179_bind, @@ -1733,6 +2855,45 @@ static const struct driver_info ax88178a_info = { .tx_fixup = ax88179_tx_fixup, }; +static const struct driver_info ax88179a_info = { + .description = "ASIX AX88179A USB 3.2 Gigabit Ethernet", + .bind = ax88179a_bind, + .unbind = ax88179a_unbind, + .status = ax88179_status, + .link_reset = ax88179a_link_reset, + .reset = ax88179_reset, + .stop = ax88179a_stop, + .flags = FLAG_ETHER \| FLAG_FRAMING_AX \| FLAG_MULTI_PACKET \| FLAG_AVOID_UNLINK_URBS, + .rx_fixup = ax88179a_rx_fixup, + .tx_fixup = ax88179a_tx_fixup, +}; + +static const struct driver_info ax88772d_info = { + .description = "ASIX AX88772D/E USB 2.0 Fast Ethernet", + .bind = ax88179a_bind, + .unbind = ax88179a_unbind, + .status = ax88179_status, + .link_reset = ax88179a_link_reset, + .reset = ax88179_reset, + .stop = ax88179a_stop, + .flags = FLAG_ETHER \| FLAG_FRAMING_AX \| FLAG_MULTI_PACKET \| FLAG_AVOID_UNLINK_URBS, + .rx_fixup = ax88179a_rx_fixup, + .tx_fixup = ax88179a_tx_fixup, +}; + +static const struct driver_info ax88279_info = { + .description = "ASIX AX88279 USB 3.2 2.5Gigabit Ethernet", + .bind = ax88179a_bind, + .unbind = ax88179a_unbind, + .status = ax88179_status, + .link_reset = ax88179a_link_reset, + .reset = ax88179_reset, + .stop = ax88179a_stop, + .flags = FLAG_ETHER \| FLAG_FRAMING_AX \| FLAG_MULTI_PACKET \| FLAG_AVOID_UNLINK_URBS, + .rx_fixup = ax88179a_rx_fixup, + .tx_fixup = ax88179a_tx_fixup, +}; + static const struct driver_info cypress_GX3_info = { .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller", .bind = ax88179_bind, @@ -1878,6 +3039,18 @@ static const struct driver_info at_umc2000sp_info = { static const struct usb_device_id products[] = { { + / ASIX AX88179A/B USB 3.2 Gigabit Ethernet / + USB_DEVICE_VER(0x0b95, 0x1790, 0x0200, 0x0200), + .driver_info = (unsigned long)&ax88179a_info, +}, { + / ASIX AX88772D USB 2.0 100Mbit Ethernet / + USB_DEVICE_VER(0x0b95, 0x1790, 0x0300, 0x0300), + .driver_info = (unsigned long)&ax88772d_info, +}, { + / ASIX AX88279 USB 3.2 2.5GBit Ethernet / + USB_DEVICE_VER(0x0b95, 0x1790, 0x0400, 0x0400), + .driver_info = (unsigned long)&ax88279_info, +}, { / ASIX AX88179 10/100/1000 */ USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0), .driver_info = (unsigned long)&ax88179_info,
3/2	2026/07/01 11:01	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 31805 output: 38 thoughts: 274 Thoughts: My Assessment of the AX88179 Driver Patch Okay, so I'm looking at this patch targeting `drivers/net/usb/ax88179_178a.c`. It's pretty straightforward, but let's break it down from a functional testing perspective. It's adding support for a handful of new chips: the AX88179A, AX88772D, and AX88279. This likely involves some architectural differences that require new device info structures: `ax88179a_info`, `ax88772d_info`, `ax88279_info`. The introduction of these new structures hints at hardware-specific register mappings or control sequences, which is always a juicy target for finding subtle issues. We also have new functions: `ax88179a_bind`, `ax88179a_unbind`, `ax88179a_rx_fixup`, `ax88179a_tx_fixup`, `ax88179a_link_reset`, `ax88179a_stop`. These probably implement the device-specific initialization, resource management, and link handling for each of these new chipsets. The fact that the patch modifies existing functions like `ax88179_reset` and `ax88179_status` implies either shared functionality across chipsets or modifications to handle the new devices gracefully. Functionally, this is a modification to a USB network driver, which is already a fairly complex area. Network drivers, in general, are always high-value targets because of the high likelihood of exploitable flaws. This patch, with its additions of support for several new chips, has definitely piqued my interest. The complexity, the interaction with USB, and the potential for off-by-one errors in these fixup functions make this patch an obvious candidate for fuzzing. Before I dive too deeply, let's get a handle on what configurations are required to build this. I need to know what Kconfig options are involved. Let's start by grepping the `drivers/net/usb/Makefile` for the filename itself: `drivers/net/usb/ax88179_178a.c`. That should give me the Kconfig dependencies.
4/2	2026/07/01 11:01	tool	grepper	0m Args: { "Expression": "ax88179_178a", "PathPrefix": "drivers/net/usb/Makefile" } Results: { "Output": "drivers/net/usb/Makefile=14=asix-y := asix_devices.o asix_common.o ax88172a.o\ndrivers/net/usb/Makefile:15:obj-$(CONFIG_USB_NET_AX88179_178A) += ax88179_178a.o\ndrivers/net/usb/Makefile-16-obj-$(CONFIG_USB_NET_CDCETHER)\t+= cdc_ether.o\n" }
5/2	2026/07/01 11:01	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 32756 output: 43 thoughts: 142 Thoughts: Examining the USB Network Configuration Okay, so the current configuration I'm working with is `USB_NET_AX88179_178A`. My initial thought is to make sure I'm not missing any other necessary configurations. From looking at the changes, it seems VLAN support is being added with functions like `ax179a_vlan_rx_kill_vid` and `ax179a_vlan_rx_add_vid`. It also utilizes `vlan_get_tag` and `__vlan_hwaccel_put_tag`. These VLAN functions are commonly linked to `VLAN_8021Q`, so I should probably verify that that's enabled as well. To confirm any dependencies, I'll need to double check the `drivers/net/usb/Kconfig` file and search for the `USB_NET_AX88179_178A` configuration specifically. That should provide a definitive answer on any mandatory or potentially helpful related configs.
6/2	2026/07/01 11:02	tool	grepper	0m Args: { "Expression": "USB_NET_AX88179_178A", "PathPrefix": "drivers/net/usb/Kconfig" } Results: { "Output": "drivers/net/usb/Kconfig=166=config USB_NET_AX8817X\n--\ndrivers/net/usb/Kconfig-197-\ndrivers/net/usb/Kconfig:198:config USB_NET_AX88179_178A\ndrivers/net/usb/Kconfig-199-\ttristate \"ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet\"\n" }
7/2	2026/07/01 11:02	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 33294 output: 36 thoughts: 21 Thoughts: Here's a summary of my thought process, as requested: Navigating the USB Network Driver Configuration Okay, let's dive into this. To get a handle on this USB network driver situation, I should start by looking at the configuration file. Given the context, I think the most relevant section will be within the `drivers/net/usb` directory. And if I recall correctly, `Kconfig` files are the primary means of defining the kernel configuration options. So, let's take a look at `drivers/net/usb/Kconfig`, specifically around line 198. That's a reasonable place to start – hopefully, it contains the core options I'm interested in to understand how these drivers are being configured. I expect to find some key settings there.
8/2	2026/07/01 11:02	tool	read-file	0m Args: { "File": "drivers/net/usb/Kconfig", "FirstLine": 195, "LineCount": 20 } Results: { "Contents": " 195:\t\t This driver creates an interface named \"ethX\", where X depends on\n 196:\t\t what other networking devices you have in use.\n 197:\t\n 198:\tconfig USB_NET_AX88179_178A\n 199:\t\ttristate \"ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet\"\n 200:\t\tdepends on USB_USBNET\n 201:\t\tselect CRC32\n 202:\t\tselect PHYLIB\n 203:\t\tdefault y\n 204:\t\thelp\n 205:\t\t This option adds support for ASIX AX88179 based USB 3.0/2.0\n 206:\t\t to Gigabit Ethernet adapters.\n 207:\t\n 208:\t\t This driver should work with at least the following devices:\n 209:\t\t * ASIX AX88179\n 210:\t\t * ASIX AX88178A\n 211:\t\t * Sitcomm LN-032\n 212:\t\n 213:\t\t This driver creates an interface named \"ethX\", where X depends on\n 214:\t\t what other networking devices you have in use.\n" }
9/2	2026/07/01 11:02	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 33855 output: 36 thoughts: 637 Thoughts: Focusing the Fuzzing Target: AX88179A USB Network Driver Okay, so I'm looking at this patch and the core configuration seems to be `USB_NET_AX88179_178A`. That's where we need to start. My goal is to identify the critical symbols for fuzzing this specific USB network driver. Let's see what the patch introduces. I need to zero in on the key functions. Right, here are the new symbols: `ax88179a_bind`, `ax88179a_unbind`, `ax88179a_rx_fixup`, `ax88179a_tx_fixup`, `ax88179a_link_reset`, `ax88179a_stop`, `ax179a_vlan_rx_kill_vid`, `ax179a_vlan_rx_add_vid`, `ax88179a_get_pauseparam`, `ax88179a_set_pauseparam`, `ax88179a_rx_checksum`, and `ax88179a_bulkin_config`. Now, the interesting bit. `ax88179a_rx_fixup` and `ax88179a_tx_fixup`... those are hot-path functions. Normally, I'd avoid hot-path functions as they can be less efficient to fuzz. However, considering this is a USB network driver, the `rx_fixup` and `tx_fixup` functions are where all the packet parsing magic happens and are device-specific. They're exactly what we want to target with USB fuzzing, as they'll likely be the entry points for malformed data from the device. Wait, I need to keep in mind the prompt. I remember it saying to "avoid hot-path functions". But in this context, excluding them would be a mistake. These are the main entry points for the USB data! If I skip them, I miss the most important logic for fuzzing. Alright, so I'm going to include the following symbols: `ax88179a_bind`, `ax88179a_link_reset`, `ax88179a_rx_fixup`, `ax88179a_tx_fixup`, `ax179a_vlan_rx_add_vid`, and `ax179a_vlan_rx_kill_vid`. To be absolutely sure about `ax88179a_rx_fixup`, let's double-check. Yes, it's called for every URB received, so it really is core to the packet parsing. Definitely including that. Finally, a quick review of the configuration: `USB_NET_AX88179_178A`. And, a final thought, could `VLAN_8021Q` be needed to allow VLAN functions to be compiled or reachable? The code uses `vlan_get_tag` and `__vlan_hwaccel_put_tag` – those are defined in `linux/if_vlan.h`, so I need to check the dependencies.
10/2	2026/07/01 11:02	tool	grepper	0m Args: { "Expression": "vlan_get_tag", "PathPrefix": "include/linux/if_vlan.h" } Results: { "Output": "include/linux/if_vlan.h=544=static inline void __vlan_hwaccel_put_tag(struct sk_buff skb,\n--\ninclude/linux/if_vlan.h-551-/\ninclude/linux/if_vlan.h:552: __vlan_get_tag - get the VLAN ID that is part of the payload\ninclude/linux/if_vlan.h-553- * @skb: skbuff to query\n--\ninclude/linux/if_vlan.h-557- /\ninclude/linux/if_vlan.h:558:static inline int __vlan_get_tag(const struct sk_buff skb, u16 vlan_tci)\ninclude/linux/if_vlan.h-559-{\n--\ninclude/linux/if_vlan.h=576=static inline int __vlan_hwaccel_get_tag(const struct sk_buff skb,\n--\ninclude/linux/if_vlan.h-588-/*\ninclude/linux/if_vlan.h:589: vlan_get_tag - get the VLAN ID from the skb\ninclude/linux/if_vlan.h-590- * @skb: skbuff to query\n--\ninclude/linux/if_vlan.h-594- /\ninclude/linux/if_vlan.h:595:static inline int vlan_get_tag(const struct sk_buff skb, u16 *vlan_tci)\ninclude/linux/if_vlan.h-596-{\n--\ninclude/linux/if_vlan.h-599-\t} else {\ninclude/linux/if_vlan.h:600:\t\treturn __vlan_get_tag(skb, vlan_tci);\ninclude/linux/if_vlan.h-601-\t}\n" }
11/2	2026/07/01 11:02	llm	patch-evaluator	0m Model: gemini-3.1-pro-preview Args: null Results: null Tokens: input: 35739 output: 298 thoughts: 368 Thoughts: My Analysis of the AX88179A Driver Patch Okay, so looking at this patch, it seems the developers are adding support for some new ASIX USB Ethernet chips – the AX88179A, AX88772D, and AX88279 – to the existing `ax88179_178a` driver. Interesting. I note that these functions are declared inline, and compilation doesn't directly hinge on `CONFIG_VLAN_8021Q`. However, while not essential, `VLAN_8021Q` is definitely relevant for testing the VLAN functionality – something to keep in mind for full coverage. The core focus, however, is on `USB_NET_AX88179_178A`. The key functions to scrutinize are: `ax88179a_bind`, `ax88179a_unbind`, `ax88179a_link_reset`, `ax88179a_rx_fixup`, `ax88179a_tx_fixup`, `ax179a_vlan_rx_add_vid`, `ax179a_vlan_rx_kill_vid`, `ax88179a_get_pauseparam`, `ax88179a_set_pauseparam`, `ax88179a_rx_checksum`, and `ax88179a_bulkin_config`. These seem to represent the core driver functionality, dealing with device binding, unbinding, link management, RX/TX packet handling, VLAN manipulation, pause parameter handling, checksum offloading and bulk data transfer configuration. From my perspective, the patch introduces new initialization routines, link reset logic, and packet processing steps (RX/TX fixup), all specific to these new chips. So, from a fuzzing perspective, I'd want to heavily focus on the new USB device binding and the packet processing paths, particularly the RX and TX fixup routines. These are the areas where new logic and potential vulnerabilities are most likely to emerge. I'll log `USB_NET_AX88179_178A` as the relevant config, and then I'll call `set-results`.
12/2	2026/07/01 11:02	tool	set-results	0m Args: { "EnableConfigs": [ "USB_NET_AX88179_178A" ], "FocusSymbols": [ "ax88179a_bind", "ax88179a_unbind", "ax88179a_link_reset", "ax88179a_rx_fixup", "ax88179a_tx_fixup", "ax179a_vlan_rx_add_vid", "ax179a_vlan_rx_kill_vid", "ax88179a_get_pauseparam", "ax88179a_set_pauseparam", "ax88179a_rx_checksum", "ax88179a_bulkin_config" ], "Reasoning": "The patch adds support for new ASIX USB Ethernet chips (AX88179A, AX88772D, AX88279) to the ax88179_178a driver. It introduces new initialization, link reset, and packet parsing (rx/tx fixup) logic specific to these chips. Fuzzing should focus on the new USB device binding and packet processing paths.", "WorthFuzzing": true } Results: { "EnableConfigs": [ "USB_NET_AX88179_178A" ], "FocusSymbols": [ "ax88179a_bind", "ax88179a_unbind", "ax88179a_link_reset", "ax88179a_rx_fixup", "ax88179a_tx_fixup", "ax179a_vlan_rx_add_vid", "ax179a_vlan_rx_kill_vid", "ax88179a_get_pauseparam", "ax88179a_set_pauseparam", "ax88179a_rx_checksum", "ax88179a_bulkin_config" ], "Reasoning": "The patch adds support for new ASIX USB Ethernet chips (AX88179A, AX88772D, AX88279) to the ax88179_178a driver. It introduces new initialization, link reset, and packet parsing (rx/tx fixup) logic specific to these chips. Fuzzing should focus on the new USB device binding and packet processing paths.", "WorthFuzzing": true }

{
  "PatchDiff": "commit 9c37795baab5de68feebe32b4e2cf8b37f5af5a4\nAuthor: syz-cluster \u003ctriage@syzkaller.com\u003e\nDate:   Wed Jul 1 11:01:23 2026 +0000\n\n    syz-cluster: applied patch under review\n\ndiff --git a/drivers/net/usb/ax88179_178a.c b/drivers/net/usb/ax88179_178a.c\nindex 98f899ea2e9462..12fc20e5f76e69 100644\n--- a/drivers/net/usb/ax88179_178a.c\n+++ b/drivers/net/usb/ax88179_178a.c\n@@ -13,9 +13,12 @@\n #include \u003clinux/usb/usbnet.h\u003e\n #include \u003cuapi/linux/mdio.h\u003e\n #include \u003clinux/mdio.h\u003e\n+#include \u003clinux/if_vlan.h\u003e\n \n #define AX88179_PHY_ID\t\t\t\t0x03\n #define AX_EEPROM_LEN\t\t\t\t0x100\n+#define AX88279_EEPROM_LEN\t\t\t0x4000\n+#define AX88179A_EEPROM_LEN\t\t\t(32 * 20)\n #define AX88179_EEPROM_MAGIC\t\t\t0x17900b95\n #define AX_MCAST_FLTSIZE\t\t\t8\n #define AX_MAX_MCAST\t\t\t\t64\n@@ -32,17 +35,33 @@\n #define AX_ACCESS_EEPROM\t\t\t0x04\n #define AX_ACCESS_EFUS\t\t\t\t0x05\n #define AX_RELOAD_EEPROM_EFUSE\t\t\t0x06\n-#define AX_PAUSE_WATERLVL_HIGH\t\t\t0x54\n-#define AX_PAUSE_WATERLVL_LOW\t\t\t0x55\n-\n+#define AX88179A_WAKEUP_SETTING\t\t\t0x07\n+#define AX_FW_MODE\t\t\t\t0x08\n+#define AX_GPHY_CTL\t\t\t\t0x0F\n+#define AX88179A_FLASH_READ\t\t\t0x21\n+#define AX88179A_FLASH_WEN\t\t\t0x22\n+#define AX88179A_FLASH_WDIS\t\t\t0x23\n+#define AX88179A_FLASH_WRITE\t\t\t0x24\n+#define AX88179A_PHY_CLAUSE45\t\t\t0x27\n+#define AX88179A_FLASH_ERASE_SECTION\t\t0x28\n+#define AX88179A_ACCESS_BL\t\t\t0x2A\n+#define AX88179A_PHY_POWER\t\t\t0x31\n+#define AX88179A_AUTODETACH\t\t\t0xC0\n+#define AX_PAUSE_WATERLVL_LOW\t\t\t0x54\n+#define AX_PAUSE_WATERLVL_HIGH\t\t\t0x55\n+\n+#define AX_FW_MODE_179A\t\t\t\t0x01\n #define PHYSICAL_LINK_STATUS\t\t\t0x02\n \t#define\tAX_USB_SS\t\t0x04\n \t#define\tAX_USB_HS\t\t0x02\n+\t#define AX_USB_FS\t\t0x01\n \n #define GENERAL_STATUS\t\t\t\t0x03\n /* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */\n \t#define\tAX_SECLD\t\t0x04\n \n+#define AX_CHIP_STATUS\t\t\t\t0x05\n+\n #define AX_SROM_ADDR\t\t\t\t0x07\n #define AX_SROM_CMD\t\t\t\t0x0a\n \t#define EEP_RD\t\t\t0x04\n@@ -62,6 +81,15 @@\n \t#define AX_RX_CTL_PRO\t\t0x0001\n \t#define AX_RX_CTL_STOP\t\t0x0000\n \n+#define AX88179A_ETH_TX_GAP\t\t\t0x0D\n+\n+#define AX88179A_BFM_DATA\t\t\t0x0E\n+\t#define AX_TX_QUEUE_CFG\t\t0x02\n+\t#define AX_TX_QUEUE_SET\t\t0x08\n+\t#define AX_TX_Q1_AHB_FC_EN\t0x10\n+\t#define AX_TX_Q2_AHB_FC_EN\t0x20\n+\t#define AX_XGMII_EN\t\t0x80\n+\n #define AX_NODE_ID\t\t\t\t0x10\n #define AX_MULFLTARY\t\t\t\t0x16\n \n@@ -91,7 +119,21 @@\n \t#define AX_PHYPWR_RSTCTL_IPRL\t0x0020\n \t#define AX_PHYPWR_RSTCTL_AT\t0x1000\n \n+#define AX88179A_VLAN_ID_ADDRESS\t\t0x2A\n+\n+#define AX88179A_VLAN_ID_CONTROL\t\t0x2B\n+\t#define AX_VLAN_CONTROL_WE\t0x0001\n+\t#define AX_VLAN_CONTROL_RD\t0x0002\n+\t#define AX_VLAN_CONTROL_VSO\t0x0010\n+\t#define AX_VLAN_CONTROL_VFE\t0x0020\n+\n+#define AX88179A_VLAN_ID_DATA0\t\t\t0x2C\n+#define AX88179A_VLAN_ID_DATA1\t\t\t0x2D\n+\n #define AX_RX_BULKIN_QCTRL\t\t\t0x2e\n+\n+#define AX_GPHY_EEE_CTRL\t\t\t0x01\n+\n #define AX_CLK_SELECT\t\t\t\t0x33\n \t#define AX_CLK_SELECT_BCS\t0x01\n \t#define AX_CLK_SELECT_ACS\t0x02\n@@ -111,7 +153,51 @@\n \t#define AX_TXCOE_TCPV6\t\t0x20\n \t#define AX_TXCOE_UDPV6\t\t0x40\n \n+#define AX88179A_MAC_BM_INT_MASK\t\t0x41\n+#define AX88179A_MAC_BM_RX_DMA_CTL\t\t0x43\n+#define AX88179A_MAC_BM_TX_DMA_CTL\t\t0x46\n+\n+#define AX88179A_MAC_RX_STATUS_CDC\t\t0x6D\n+\t#define AX_LSOFC_WCNT_7_ACCESS\t0x03\n+\t#define AX_GMII_CRC_APPEND\t0x10\n+\n #define AX_LEDCTRL\t\t\t\t0x73\n+#define AX88179A_MAC_ARC_CTRL\t\t\t0x9E\n+#define AX88179A_MAC_SWP_CTRL\t\t\t0xB1\n+\n+#define AX88179A_MAC_TX_PAUSE\t\t\t0xB2\n+\n+#define AX88179A_MAC_CDC_DELAY_TX\t\t0xB5\n+\n+#define AX88179A_MAC_PATH\t\t\t0xB7\n+\t#define AX_MAC_RX_PATH_READY\t0x01\n+\t#define AX_MAC_TX_PATH_READY\t0x02\n+\n+#define AX88179A_NEW_PAUSE_CTRL\t\t\t0xB8\n+\t#define AX_NEW_PAUSE_EN\t\t0x01\n+\n+#define AX88179A_MAC_BULK_OUT_CTRL\t\t0xB9\n+\t#define AX_MAC_EFF_EN\t\t0x02\n+\n+#define AX88179A_MAC_RX_DATA_CDC_CNT\t\t0xC0\n+\t#define AX_MAC_LSO_ERR_EN\t0x04\n+\t#define AX_MAC_MIQFFCTRL_FORMAT\t0x10\n+\t#define AX_MAC_MIQFFCTRL_DROP_CRC 0x20\n+\n+#define AX88179A_AUTODETACH_DELAY\t(5UL \u003c\u003c 8)\n+#define AX88179A_AUTODETACH_EN\t\t1\n+\n+#define AX88179A_MAC_LSO_ENHANCE_CTRL\t\t0xC3\n+\t#define AX_LSO_ENHANCE_EN\t0x01\n+\n+#define AX88179A_MAC_TX_HDR_CKSUM\t\t0xCC\n+#define AX88179A_EP5_EHR\t\t\t0xF9\n+\n+#define AX_PHY_POWER\t\t\t\t0x02\n+\n+#define EPHY_LOW_POWER_EN\t\t\t0x01\n+#define S5_WOL_EN\t\t\t\t0x04\n+#define S5_WOL_LOW_POWER\t\t\t0x20\n \n #define GMII_PHY_PHYSR\t\t\t\t0x11\n \t#define GMII_PHY_PHYSR_SMASK\t0xc000\n@@ -164,8 +250,56 @@\n \t#define GMII_PHY_PGSEL_PAGE3\t0x0003\n \t#define GMII_PHY_PGSEL_PAGE5\t0x0005\n \n+/* TX Descriptor */\n+#define AX179A_TX_DESC_LEN_MASK\t\t0x1FFFFF\n+#define AX179A_TX_DESC_DROP_PADD\tBIT(28)\n+#define AX179A_TX_DESC_VLAN\t\tBIT(29)\n+#define AX179A_TX_DESC_MSS_MASK\t\t0x7FFF\n+#define AX179A_TX_DESC_MSS_SHIFT\t0x20\n+#define AX179A_TX_DESC_VLAN_MASK\t0xFFFF\n+#define AX179A_TX_DESC_VLAN_SHIFT\t0x30\n+\n+/* RX Packet Descriptor */\n+#define AX179A_RX_PD_L4_ERR\t\tBIT(0)\n+#define AX179A_RX_PD_L3_ERR\t\tBIT(1)\n+#define AX179A_RX_PD_L4_TYPE_MASK\t0x1C\n+#define AX179A_RX_PD_L4_UDP\t\t0x04\n+#define AX179A_RX_PD_L4_TCP\t\t0x10\n+#define AX179A_RX_PD_L3_TYPE_MASK\t0x60\n+#define AX179A_RX_PD_L3_IP\t\t0x20\n+#define AX179A_RX_PD_L3_IP6\t\t0x40\n+\n+#define AX179A_RX_PD_VLAN\t\tBIT(10)\n+#define AX179A_RX_PD_RX_OK\t\tBIT(11)\n+#define AX179A_RX_PD_DROP\t\tBIT(31)\n+#define AX179A_RX_PD_LEN_MASK\t0x7FFF0000\n+#define AX179A_RX_PD_LEN_SHIFT\t0x10\n+#define AX179A_RX_PD_VLAN_SHIFT\t0x20\n+\n+/* RX Descriptor header */\n+#define AX179A_RX_DH_PKT_CNT_MASK\t\t0x1FFF\n+#define AX179A_RX_DH_DESC_OFFSET_MASK\t0xFFFFE000\n+#define AX179A_RX_DH_DESC_OFFSET_SHIFT\t0x0D\n+\n+#define AX179A_RX_HW_PAD\t\t\t0x02\n+\n static int ax88179_reset(struct usbnet *dev);\n \n+enum ax_ether_link_speed {\n+\tETHER_LINK_NONE = 0,\n+\tETHER_LINK_10   = 1,\n+\tETHER_LINK_100  = 2,\n+\tETHER_LINK_1000 = 3,\n+\tETHER_LINK_2500 = 4,\n+};\n+\n+enum ax_chip_version {\n+\tAX_VERSION_INVALID\t\t= 0x0,\n+\tAX_VERSION_AX88179\t\t= 0x4,\n+\tAX_VERSION_AX88179A\t\t= 0x6,\t/* Also AX88772D */\n+\tAX_VERSION_AX88279\t\t= 0x7,\n+};\n+\n struct ax88179_data {\n \tu8  eee_enabled;\n \tu8  eee_active;\n@@ -174,6 +308,16 @@ struct ax88179_data {\n \tu32 wol_supported;\n \tu32 wolopts;\n \tu8 disconnecting;\n+\tu8 chip_version;\n+\tu8 fw_version[4];\n+\tu8 is_ax88772d;\n+\tu8 ip_align;\n+\tu8 link;\n+\tu8 speed;\n+\tu8 full_duplex;\n+\tu8 rx_checksum;\n+\tu8 eeprom_read_cmd;\n+\tu16 eeprom_block;\n };\n \n struct ax88179_int_data {\n@@ -181,15 +325,48 @@ struct ax88179_int_data {\n \t__le32 intdata2;\n };\n \n-static const struct {\n+struct ax_bulkin_settings {\n \tunsigned char ctrl, timer_l, timer_h, size, ifg;\n-} AX88179_BULKIN_SIZE[] =\t{\n+};\n+\n+static const struct ax_bulkin_settings AX88179_BULKIN_SIZE[] =\t{\n \t{7, 0x4f, 0,\t0x12, 0xff},\n \t{7, 0x20, 3,\t0x16, 0xff},\n \t{7, 0xae, 7,\t0x18, 0xff},\n \t{7, 0xcc, 0x4c, 0x18, 8},\n };\n \n+static const struct ax_bulkin_settings AX88179A_BULKIN_SIZE[] = {\n+\t{5, 0x7B, 0x00,\t0x17, 0x0F},\t/* 1G, SS */\n+\t{5, 0xC0, 0x02,\t0x06, 0x0F},\t/* 1G, HS */\n+\t{7, 0xF0, 0x00,\t0x0C, 0x0F},\t/* 100M, Full, SS */\n+\t{6, 0x00, 0x00,\t0x06, 0x0F},\t/* 100M, Half, SS */\n+\t{5, 0xC0, 0x04,\t0x06, 0x0F},\t/* 100M, Full, HS */\n+\t{7, 0xC0, 0x04,\t0x06, 0x0F},\t/* 100M, Half, HS */\n+\t{7, 0x00, 0x00,\t0x03, 0x3F},\t/* FS */\n+};\n+\n+static const struct ax_bulkin_settings AX88772D_BULKIN_SIZE[] = {\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/* 1G, SS (unused) */\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/* 1G, HS (unused) */\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/* 100M, Full, SS (unused) */\n+\t{0, 0x00, 0x00,\t0x00, 0x00},\t/* 100M, Half, SS (unused) */\n+\t{5, 0xC0, 0x04,\t0x06, 0x0F},\t/* 100M, Full, HS */\n+\t{7, 0xC0, 0x04,\t0x06, 0x0F},\t/* 100M, Half, HS */\n+\t{7, 0x00, 0x00,\t0x03, 0x3F},\t/* FS */\n+};\n+\n+static const struct ax_bulkin_settings AX88279_BULKIN_SIZE[] = {\n+\t{5, 0x10, 0x01,\t0x11, 0x0F},\t/* 2.5G */\n+\t{7, 0xB3, 0x01,\t0x11, 0x0F},\t/* 1G, SS */\n+\t{7, 0xC0, 0x02,\t0x06, 0x0F},\t/* 1G, HS */\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/* 100M, Full, SS */\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/* 100M, Half, SS */\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/* 100M, Full, HS */\n+\t{7, 0x80, 0x01,\t0x03, 0x0F},\t/* 100M, Half, HS */\n+\t{7, 0x00, 0x00,\t0x03, 0x3F},\t/* FS */\n+};\n+\n static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)\n {\n \tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n@@ -313,6 +490,7 @@ static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,\n \n static void ax88179_status(struct usbnet *dev, struct urb *urb)\n {\n+\tstruct ax88179_data *data = dev-\u003edriver_priv;\n \tstruct ax88179_int_data *event;\n \tu32 link;\n \n@@ -323,6 +501,9 @@ static void ax88179_status(struct usbnet *dev, struct urb *urb)\n \tle32_to_cpus((void *)\u0026event-\u003eintdata1);\n \n \tlink = (((__force u32)event-\u003eintdata1) \u0026 AX_INT_PPLS_LINK) \u003e\u003e 16;\n+\tdata-\u003espeed = (((__force u32)event-\u003eintdata1) \u003e\u003e 8) \u0026 0x7;\n+\tdata-\u003efull_duplex = (((__force u32)event-\u003eintdata1) \u003e\u003e 12) \u0026 0x1;\n+\tdata-\u003elink = link;\n \n \tif (netif_carrier_ok(dev-\u003enet) != link) {\n \t\tusbnet_link_change(dev, link, 1);\n@@ -403,6 +584,32 @@ ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,\n \treturn 0;\n }\n \n+static int ax_read_mmd(struct usbnet *dev, u16 dev_addr, u16 reg)\n+{\n+\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n+\tu16 res;\n+\tint ret;\n+\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\tret = ax88179_read_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, \u0026res);\n+\t\tif (ret \u003c 0)\n+\t\t\treturn ret;\n+\t\treturn res;\n+\t}\n+\n+\treturn ax88179_phy_read_mmd_indirect(dev, reg, dev_addr);\n+}\n+\n+static int ax_write_mmd(struct usbnet *dev, u16 dev_addr, u16 reg, u16 data)\n+{\n+\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n+\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A)\n+\t\treturn ax88179_write_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, \u0026data);\n+\n+\treturn ax88179_phy_write_mmd_indirect(dev, reg, dev_addr, data);\n+}\n+\n static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)\n {\n \tstruct usbnet *dev = usb_get_intfdata(intf);\n@@ -414,7 +621,6 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)\n \n \tusbnet_suspend(intf, message);\n \n-\t/* Enable WoL */\n \tif (priv-\u003ewolopts) {\n \t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,\n \t\t\t\t 1, 1, \u0026tmp8);\n@@ -425,6 +631,26 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)\n \n \t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,\n \t\t\t\t  1, 1, \u0026tmp8);\n+\n+\t\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026tmp16);\n+\t\t\ttmp16 |= AX_MEDIUM_RECEIVE_EN;\n+\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026tmp16);\n+\t\t}\n+\n+\t\tif (priv-\u003echip_version == AX_VERSION_AX88279)\n+\t\t\tax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8,\n+\t\t\t\t\t  EPHY_LOW_POWER_EN | S5_WOL_EN\n+\t\t\t\t\t  | S5_WOL_LOW_POWER | 0x8000, 0, NULL);\n+\n+\t} else if (priv-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8, 0x8000, 0, NULL);\n+\t}\n+\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\tax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 0, EPHY_LOW_POWER_EN, 0, NULL);\n+\t\tax88179_set_pm_mode(dev, false);\n+\t\treturn 0;\n \t}\n \n \t/* Disable RX path */\n@@ -436,11 +662,11 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)\n \n \t/* Force bulk-in zero length */\n \tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,\n-\t\t\t 2, 2, \u0026tmp16);\n+\t\t\t2, 2, \u0026tmp16);\n \n \ttmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,\n-\t\t\t  2, 2, \u0026tmp16);\n+\t\t\t2, 2, \u0026tmp16);\n \n \t/* change clock */\n \ttmp8 = 0;\n@@ -456,12 +682,19 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)\n }\n \n /* This function is used to enable the autodetach function. */\n-/* This function is determined by offset 0x43 of EEPROM */\n+/* This function is determined by offset 0x43 of EEPROM for the AX88179 */\n static int ax88179_auto_detach(struct usbnet *dev)\n {\n+\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n \tu16 tmp16;\n \tu8 tmp8;\n \n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\ttmp16 = AX88179A_AUTODETACH_DELAY;\n+\t\tax88179_write_cmd(dev, AX88179A_AUTODETACH, tmp16, 0, 0, NULL);\n+\t\treturn 0;\n+\t}\n+\n \tif (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, \u0026tmp16) \u003c 0)\n \t\treturn 0;\n \n@@ -484,11 +717,31 @@ static int ax88179_auto_detach(struct usbnet *dev)\n static int ax88179_resume(struct usb_interface *intf)\n {\n \tstruct usbnet *dev = usb_get_intfdata(intf);\n+\tstruct ax88179_data *ax179_data;\n+\tu8 reg8;\n \n+\tax179_data = dev-\u003edriver_priv;\n \tax88179_set_pm_mode(dev, true);\n \n \tusbnet_link_change(dev, 0, 0);\n \n+\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\tax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\t\tif (!(reg8 \u0026 AX_PHY_POWER)) {\n+\t\t\treg8 = AX_PHY_POWER;\n+\t\t\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\t\t\tmsleep(250);\n+\t\t}\n+\t\tax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL);\n+\n+\t\t/* Now, that AX_FW_MODE_179A is enabled, the PHY needs a power-cycle.\n+\t\t * PHY-power is re-enabled in ax88179_reset()\n+\t\t */\n+\t\treg8 = 0;\n+\t\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\t\tmsleep(250);\n+\t}\n+\n \tax88179_reset(dev);\n \n \tax88179_set_pm_mode(dev, false);\n@@ -510,6 +763,21 @@ static void ax88179_disconnect(struct usb_interface *intf)\n \tusbnet_disconnect(intf);\n }\n \n+static void ax88179_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info)\n+{\n+\tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n+\n+\t/* Inherit standard device info */\n+\tusbnet_get_drvinfo(net, info);\n+\tif (priv-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn;\n+\n+\tsnprintf(info-\u003efw_version, sizeof(info-\u003efw_version), \"%d.%d.%d.%d\",\n+\t\t priv-\u003efw_version[0], priv-\u003efw_version[1],\n+\t\t priv-\u003efw_version[2], priv-\u003efw_version[3]);\n+}\n+\n static void\n ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)\n {\n@@ -536,41 +804,74 @@ ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)\n \n static int ax88179_get_eeprom_len(struct net_device *net)\n {\n-\treturn AX_EEPROM_LEN;\n+\tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *ax179_data;\n+\n+\tax179_data = dev-\u003edriver_priv;\n+\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn AX_EEPROM_LEN;\n+\telse if (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88279)\n+\t\treturn AX88279_EEPROM_LEN;\n+\telse\n+\t\treturn AX88179A_EEPROM_LEN;\n }\n \n-static int\n-ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,\n-\t\t   u8 *data)\n+static void\n+ax88179_eeprom_access_params(struct ax88179_data *ax179_data, int i, u16 *value, u16 *idx)\n+{\n+\t/* AX88179 has a word-addressable EEPROM\n+\t * AX88179A uses EFUSES with 20 bytes length\n+\t * AX88279 has an EEPROM addressable in 256 byte blocks\n+\t */\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\t*value = i;\n+\t\t*idx = 1;\n+\t} else if (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88279) {\n+\t\t*value = (i * ax179_data-\u003eeeprom_block) \u003e\u003e 16;\n+\t\t*idx = (i * ax179_data-\u003eeeprom_block) \u0026 0xffff;\n+\t} else {\n+\t\t*value = i \u003c\u003c 4;\n+\t\t*idx = 0;\n+\t}\n+}\n+\n+static int ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, u8 *data)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n-\tu16 *eeprom_buff;\n-\tint first_word, last_word;\n-\tint i, ret;\n+\tstruct ax88179_data *ax179_data;\n+\tint first, last, i, ret;\n+\tu8 *eeprom_buff;\n+\n+\tax179_data = dev-\u003edriver_priv;\n \n \tif (eeprom-\u003elen == 0)\n \t\treturn -EINVAL;\n \n \teeprom-\u003emagic = AX88179_EEPROM_MAGIC;\n \n-\tfirst_word = eeprom-\u003eoffset \u003e\u003e 1;\n-\tlast_word = (eeprom-\u003eoffset + eeprom-\u003elen - 1) \u003e\u003e 1;\n-\teeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),\n-\t\t\t\t    GFP_KERNEL);\n+\tfirst = eeprom-\u003eoffset / ax179_data-\u003eeeprom_block;\n+\tlast = (eeprom-\u003eoffset + eeprom-\u003elen - 1) / ax179_data-\u003eeeprom_block;\n+\n+\teeprom_buff = kzalloc((last - first + 1) * ax179_data-\u003eeeprom_block, GFP_KERNEL);\n \tif (!eeprom_buff)\n \t\treturn -ENOMEM;\n \n-\t/* ax88179/178A returns 2 bytes from eeprom on read */\n-\tfor (i = first_word; i \u003c= last_word; i++) {\n-\t\tret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,\n-\t\t\t\t\t \u0026eeprom_buff[i - first_word]);\n+\tfor (i = first; i \u003c= last; i++) {\n+\t\tu16 value, idx;\n+\n+\t\tax88179_eeprom_access_params(ax179_data, i, \u0026value, \u0026idx);\n+\t\tret = __ax88179_read_cmd(dev, ax179_data-\u003eeeprom_read_cmd,\n+\t\t\t\t\t value, idx, ax179_data-\u003eeeprom_block,\n+\t\t\t\t\t eeprom_buff + (i - first) * ax179_data-\u003eeeprom_block);\n+\n \t\tif (ret \u003c 0) {\n \t\t\tkfree(eeprom_buff);\n \t\t\treturn -EIO;\n \t\t}\n \t}\n \n-\tmemcpy(data, (u8 *)eeprom_buff + (eeprom-\u003eoffset \u0026 1), eeprom-\u003elen);\n+\tmemcpy(data, eeprom_buff + eeprom-\u003eoffset % ax179_data-\u003eeeprom_block, eeprom-\u003elen);\n \tkfree(eeprom_buff);\n \treturn 0;\n }\n@@ -580,12 +881,17 @@ ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,\n \t\t   u8 *data)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *ax179_data;\n \tu16 *eeprom_buff;\n \tint first_word;\n \tint last_word;\n \tint ret;\n \tint i;\n \n+\tax179_data = dev-\u003edriver_priv;\n+\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88179A)\n+\t\treturn -EOPNOTSUPP;\n+\n \tnetdev_dbg(net, \"write EEPROM len %d, offset %d, magic 0x%x\\n\",\n \t\t   eeprom-\u003elen, eeprom-\u003eoffset, eeprom-\u003emagic);\n \n@@ -651,12 +957,39 @@ ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,\n }\n \n static int ax88179_get_link_ksettings(struct net_device *net,\n-\t\t\t\t      struct ethtool_link_ksettings *cmd)\n+\t\t\t\t       struct ethtool_link_ksettings *cmd)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *data;\n+\tint v;\n+\n+\tdata = dev-\u003edriver_priv;\n \n \tmii_ethtool_get_link_ksettings(\u0026dev-\u003emii, cmd);\n \n+\tif (data-\u003echip_version \u003e= AX_VERSION_AX88279) {\n+\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t cmd-\u003elink_modes.supported);\n+\n+\t\tv = ax88179_mdio_read(dev-\u003enet, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\t\tif (v \u003e= 0 \u0026\u0026 v \u0026 ADVERTISE_RESV)\n+\t\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t\t cmd-\u003elink_modes.advertising);\n+\n+\t\tv = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);\n+\t\tif (data-\u003espeed == ETHER_LINK_2500) {\n+\t\t\tcmd-\u003ebase.speed = SPEED_2500;\n+\t\t\t/* MDIO_AN_10GBT_STAT_LP2_5G is broken, but we can deduce that\n+\t\t\t * the link-partner advertised 2500M if remotely AN succceded\n+\t\t\t * for link speed \u003e 1000M and we locally have a link speed of\n+\t\t\t * 2500M\n+\t\t\t */\n+\t\t\tif (v \u003e= 0 \u0026\u0026 v \u0026 MDIO_AN_10GBT_STAT_REMOK)\n+\t\t\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t\t\t cmd-\u003elink_modes.lp_advertising);\n+\t\t}\n+\t}\n+\n \treturn 0;\n }\n \n@@ -664,34 +997,128 @@ static int ax88179_set_link_ksettings(struct net_device *net,\n \t\t\t\t      const struct ethtool_link_ksettings *cmd)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *data;\n+\tint v;\n+\n+\tdata = dev-\u003edriver_priv;\n+\n+\t/* mii_ethtool_set_link_ksettings handles unknown bits in MII_ADVERTISE\n+\t * transparently, so for the 2.5GBit link speed of the AX_VERSION_AX88279\n+\t * we just set up ADVERTISE_RESV before calling mii_ethtool_set_link_ksettings\n+\t * at least for speeds \u003c 2500\n+\t */\n+\tif (data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tv = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\t\tif (v \u003c 0)\n+\t\t\treturn v;\n+\n+\t\tif (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,\n+\t\t\t\t      cmd-\u003elink_modes.advertising))\n+\t\t\tv |= ADVERTISE_RESV;\n+\t\telse\n+\t\t\tv \u0026= ~ADVERTISE_RESV;\n+\t\tax88179_mdio_write(net, dev-\u003emii.phy_id, MII_ADVERTISE, v);\n+\t\tif (cmd-\u003ebase.speed == SPEED_2500)\n+\t\t\treturn mii_nway_restart(\u0026dev-\u003emii);\n+\t}\n+\n \treturn mii_ethtool_set_link_ksettings(\u0026dev-\u003emii, cmd);\n }\n \n+static void ax88179a_get_pauseparam(struct net_device *net, struct ethtool_pauseparam *pause)\n+{\n+\tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *data;\n+\tu16 bmcr, lcladv, rmtadv;\n+\tu8 cap;\n+\n+\tdata = dev-\u003edriver_priv;\n+\n+\tif (data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn;\n+\n+\tbmcr = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_BMCR);\n+\tlcladv = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\trmtadv = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_LPA);\n+\n+\tif (!(bmcr \u0026 BMCR_ANENABLE)) {\n+\t\tpause-\u003eautoneg = 0;\n+\t\tpause-\u003erx_pause = 0;\n+\t\tpause-\u003etx_pause = 0;\n+\t\treturn;\n+\t}\n+\n+\tpause-\u003eautoneg = 1;\n+\n+\tcap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);\n+\n+\tif (cap \u0026 FLOW_CTRL_RX)\n+\t\tpause-\u003erx_pause = 1;\n+\n+\tif (cap \u0026 FLOW_CTRL_TX)\n+\t\tpause-\u003etx_pause = 1;\n+}\n+\n+static int ax88179a_set_pauseparam(struct net_device *net, struct ethtool_pauseparam *pause)\n+{\n+\tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *data;\n+\tu16 old, new1, bmcr;\n+\tu8 cap = 0;\n+\n+\tdata = dev-\u003edriver_priv;\n+\n+\tif (data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\treturn -EOPNOTSUPP;\n+\n+\tbmcr = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_BMCR);\n+\tif (pause-\u003eautoneg \u0026\u0026 !(bmcr \u0026 BMCR_ANENABLE))\n+\t\treturn -EINVAL;\n+\n+\tif (pause-\u003erx_pause)\n+\t\tcap |= FLOW_CTRL_RX;\n+\n+\tif (pause-\u003etx_pause)\n+\t\tcap |= FLOW_CTRL_TX;\n+\n+\told = ax88179_mdio_read(net, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\tnew1 = (old \u0026 ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) |\n+\t\tmii_advertise_flowctrl(cap);\n+\tif (old != new1)\n+\t\tax88179_mdio_write(net, dev-\u003emii.phy_id, MII_ADVERTISE, new1);\n+\n+\treturn mii_nway_restart(\u0026dev-\u003emii);\n+}\n+\n static int\n ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_keee *data)\n {\n+\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n \tint val;\n \n \t/* Get Supported EEE */\n-\tval = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,\n-\t\t\t\t\t    MDIO_MMD_PCS);\n+\tval = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);\n \tif (val \u003c 0)\n \t\treturn val;\n \tmii_eee_cap1_mod_linkmode_t(data-\u003esupported, val);\n \n \t/* Get advertisement EEE */\n-\tval = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,\n-\t\t\t\t\t    MDIO_MMD_AN);\n+\tval = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);\n \tif (val \u003c 0)\n \t\treturn val;\n \tmii_eee_cap1_mod_linkmode_t(data-\u003eadvertised, val);\n \n \t/* Get LP advertisement EEE */\n-\tval = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,\n-\t\t\t\t\t    MDIO_MMD_AN);\n+\tval = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);\n \tif (val \u003c 0)\n \t\treturn val;\n \tmii_eee_cap1_mod_linkmode_t(data-\u003elp_advertised, val);\n+\tif (priv-\u003echip_version \u003e= AX_VERSION_AX88279) {\n+\t\tval = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2);\n+\t\tif (val \u003c 0)\n+\t\t\treturn val;\n+\t\tmii_eee_cap2_mod_linkmode_adv_t(data-\u003elp_advertised, val);\n+\t}\n \n \treturn 0;\n }\n@@ -701,8 +1128,7 @@ ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_keee *data)\n {\n \tu16 tmp16 = linkmode_to_mii_eee_cap1_t(data-\u003eadvertised);\n \n-\treturn ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,\n-\t\t\t\t\t      MDIO_MMD_AN, tmp16);\n+\treturn ax_write_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, tmp16);\n }\n \n static int ax88179_chk_eee(struct usbnet *dev)\n@@ -712,40 +1138,27 @@ static int ax88179_chk_eee(struct usbnet *dev)\n \n \tmii_ethtool_gset(\u0026dev-\u003emii, \u0026ecmd);\n \n-\tif (ecmd.duplex \u0026 DUPLEX_FULL) {\n+\tpriv-\u003eeee_active = 0;\n+\tif ((priv-\u003echip_version \u003c AX_VERSION_AX88279 \u0026\u0026 (ecmd.duplex \u0026 DUPLEX_FULL)) ||\n+\t    (ecmd.speed == SPEED_1000 \u0026\u0026 (ecmd.duplex \u0026 DUPLEX_FULL))) {\n \t\tint eee_lp, eee_cap, eee_adv;\n \t\tu32 lp, cap, adv, supported = 0;\n \n-\t\teee_cap = ax88179_phy_read_mmd_indirect(dev,\n-\t\t\t\t\t\t\tMDIO_PCS_EEE_ABLE,\n-\t\t\t\t\t\t\tMDIO_MMD_PCS);\n-\t\tif (eee_cap \u003c 0) {\n-\t\t\tpriv-\u003eeee_active = 0;\n+\t\teee_cap = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);\n+\t\tif (eee_cap \u003c 0)\n \t\t\treturn false;\n-\t\t}\n \n \t\tcap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);\n-\t\tif (!cap) {\n-\t\t\tpriv-\u003eeee_active = 0;\n+\t\tif (!cap)\n \t\t\treturn false;\n-\t\t}\n-\n-\t\teee_lp = ax88179_phy_read_mmd_indirect(dev,\n-\t\t\t\t\t\t       MDIO_AN_EEE_LPABLE,\n-\t\t\t\t\t\t       MDIO_MMD_AN);\n-\t\tif (eee_lp \u003c 0) {\n-\t\t\tpriv-\u003eeee_active = 0;\n-\t\t\treturn false;\n-\t\t}\n \n-\t\teee_adv = ax88179_phy_read_mmd_indirect(dev,\n-\t\t\t\t\t\t\tMDIO_AN_EEE_ADV,\n-\t\t\t\t\t\t\tMDIO_MMD_AN);\n+\t\teee_lp = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);\n+\t\tif (eee_lp \u003c 0)\n+\t\t\treturn true;\n \n-\t\tif (eee_adv \u003c 0) {\n-\t\t\tpriv-\u003eeee_active = 0;\n-\t\t\treturn false;\n-\t\t}\n+\t\teee_adv = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);\n+\t\tif (eee_adv \u003c 0)\n+\t\t\treturn true;\n \n \t\tadv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);\n \t\tlp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);\n@@ -753,65 +1166,53 @@ static int ax88179_chk_eee(struct usbnet *dev)\n \t\t\t     SUPPORTED_1000baseT_Full :\n \t\t\t     SUPPORTED_100baseT_Full;\n \n-\t\tif (!(lp \u0026 adv \u0026 supported)) {\n-\t\t\tpriv-\u003eeee_active = 0;\n-\t\t\treturn false;\n-\t\t}\n+\t\tif (!(lp \u0026 adv \u0026 supported))\n+\t\t\treturn true;\n \n \t\tpriv-\u003eeee_active = 1;\n \t\treturn true;\n \t}\n \n-\tpriv-\u003eeee_active = 0;\n \treturn false;\n }\n \n-static void ax88179_disable_eee(struct usbnet *dev)\n-{\n-\tu16 tmp16;\n-\n-\ttmp16 = GMII_PHY_PGSEL_PAGE3;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-\n-\ttmp16 = 0x3246;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  MII_PHYADDR, 2, \u0026tmp16);\n-\n-\ttmp16 = GMII_PHY_PGSEL_PAGE0;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-}\n-\n-static void ax88179_enable_eee(struct usbnet *dev)\n+static void ax88179_eee_config(struct usbnet *dev, bool enable)\n {\n+\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n \tu16 tmp16;\n \n-\ttmp16 = GMII_PHY_PGSEL_PAGE3;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-\n-\ttmp16 = 0x3247;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  MII_PHYADDR, 2, \u0026tmp16);\n-\n-\ttmp16 = GMII_PHY_PGSEL_PAGE5;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n-\n-\ttmp16 = 0x0680;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  MII_BMSR, 2, \u0026tmp16);\n+\tif (priv-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\ttmp16 = GMII_PHY_PGSEL_PAGE3;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\n+\t\ttmp16 = enable ? 0x3247 : 0x3246;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t  MII_PHYADDR, 2, \u0026tmp16);\n+\t\tif (enable) {\n+\t\t\ttmp16 = GMII_PHY_PGSEL_PAGE5;\n+\t\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\n+\t\t\ttmp16 = 0x0680;\n+\t\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t\t  MII_BMSR, 2, \u0026tmp16);\n+\t\t}\n \n-\ttmp16 = GMII_PHY_PGSEL_PAGE0;\n-\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n-\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\t\ttmp16 = GMII_PHY_PGSEL_PAGE0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,\n+\t\t\t\t  GMII_PHY_PAGE_SELECT, 2, \u0026tmp16);\n+\t} else {\n+\t\tax88179_write_cmd(dev, AX_GPHY_CTL, AX_GPHY_EEE_CTRL, enable, 0, NULL);\n+\t}\n }\n \n static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n-\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n+\tstruct ax88179_data *priv;\n+\n+\tpriv = dev-\u003edriver_priv;\n \n \tedata-\u003eeee_enabled = priv-\u003eeee_enabled;\n \tedata-\u003eeee_active = priv-\u003eeee_active;\n@@ -822,18 +1223,20 @@ static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)\n static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n-\tstruct ax88179_data *priv = dev-\u003edriver_priv;\n+\tstruct ax88179_data *priv;\n \tint ret;\n \n+\tpriv = dev-\u003edriver_priv;\n+\n \tpriv-\u003eeee_enabled = edata-\u003eeee_enabled;\n \tif (!priv-\u003eeee_enabled) {\n-\t\tax88179_disable_eee(dev);\n+\t\tax88179_eee_config(dev, false);\n \t} else {\n \t\tpriv-\u003eeee_enabled = ax88179_chk_eee(dev);\n \t\tif (!priv-\u003eeee_enabled)\n \t\t\treturn -EOPNOTSUPP;\n \n-\t\tax88179_enable_eee(dev);\n+\t\tax88179_eee_config(dev, true);\n \t}\n \n \tret = ax88179_ethtool_set_eee(dev, edata);\n@@ -848,6 +1251,7 @@ static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)\n }\n \n static const struct ethtool_ops ax88179_ethtool_ops = {\n+\t.get_drvinfo\t\t= ax88179_get_drvinfo,\n \t.get_link\t\t= ethtool_op_get_link,\n \t.get_msglevel\t\t= usbnet_get_msglevel,\n \t.set_msglevel\t\t= usbnet_set_msglevel,\n@@ -861,16 +1265,78 @@ static const struct ethtool_ops ax88179_ethtool_ops = {\n \t.nway_reset\t\t= usbnet_nway_reset,\n \t.get_link_ksettings\t= ax88179_get_link_ksettings,\n \t.set_link_ksettings\t= ax88179_set_link_ksettings,\n+\t.get_pauseparam\t\t= ax88179a_get_pauseparam,\n+\t.set_pauseparam\t\t= ax88179a_set_pauseparam,\n \t.get_ts_info\t\t= ethtool_op_get_ts_info,\n };\n \n+static int ax179a_vlan_rx_kill_vid(struct net_device *net, __be16 proto, u16 vid)\n+{\n+\tstruct usbnet *dev = netdev_priv(net);\n+\tu8 vlan_ctrl;\n+\tu16 reg16;\n+\tu8 reg8;\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\tvlan_ctrl = reg8;\n+\n+\t/* Address */\n+\treg8 = (vid / 16);\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, \u0026reg8);\n+\n+\t/* Data */\n+\treg8 = vlan_ctrl | AX_VLAN_CONTROL_RD;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\treg16 \u0026= ~(1 \u003c\u003c (vid % 16));\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\n+\treg8 = vlan_ctrl | AX_VLAN_CONTROL_WE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\treturn 0;\n+}\n+\n+static int ax179a_vlan_rx_add_vid(struct net_device *net, __be16 proto, u16 vid)\n+{\n+\tstruct usbnet *dev = netdev_priv(net);\n+\tu8 vlan_ctrl;\n+\tu16 reg16;\n+\tu8 reg8;\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\tvlan_ctrl = reg8;\n+\n+\t/* Address */\n+\treg8 = (vid / 16);\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, \u0026reg8);\n+\n+\t/* Data */\n+\treg8 = vlan_ctrl | AX_VLAN_CONTROL_RD;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\treg16 |= (1 \u003c\u003c (vid % 16));\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, \u0026reg16);\n+\n+\treg8 = vlan_ctrl | AX_VLAN_CONTROL_WE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026reg8);\n+\n+\treturn 0;\n+}\n+\n static void ax88179_set_multicast(struct net_device *net)\n {\n \tstruct usbnet *dev = netdev_priv(net);\n-\tstruct ax88179_data *data = dev-\u003edriver_priv;\n \tu8 *m_filter = ((u8 *)dev-\u003edata);\n+\tstruct ax88179_data *data;\n+\n+\tdata = dev-\u003edriver_priv;\n \n-\tdata-\u003erxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);\n+\tdata-\u003erxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_DROPCRCERR);\n+\tif (data-\u003eip_align)\n+\t\tdata-\u003erxctl |= AX_RX_CTL_IPE;\n \n \tif (net-\u003eflags \u0026 IFF_PROMISC) {\n \t\tdata-\u003erxctl |= AX_RX_CTL_PRO;\n@@ -909,6 +1375,7 @@ ax88179_set_features(struct net_device *net, netdev_features_t features)\n {\n \tu8 tmp;\n \tstruct usbnet *dev = netdev_priv(net);\n+\tstruct ax88179_data *data = dev-\u003edriver_priv;\n \tnetdev_features_t changed = net-\u003efeatures ^ features;\n \n \tif (changed \u0026 NETIF_F_IP_CSUM) {\n@@ -928,6 +1395,34 @@ ax88179_set_features(struct net_device *net, netdev_features_t features)\n \t\ttmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |\n \t\t       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;\n \t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, \u0026tmp);\n+\t\tdata-\u003erx_checksum = !!(features \u0026 NETIF_F_RXCSUM);\n+\t}\n+\n+\tif (changed \u0026 NETIF_F_HW_VLAN_CTAG_FILTER) {\n+\t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n+\t\ttmp ^= AX_VLAN_CONTROL_VFE;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n+\t\tif (features \u0026 NETIF_F_HW_VLAN_CTAG_FILTER) {\n+\t\t\tfor (int i = 0; i \u003c 256; i++) {\n+\t\t\t\tu16 tmp16;\n+\t\t\t\t/* Address */\n+\t\t\t\ttmp = i;\n+\t\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS,\n+\t\t\t\t\t\t  1, 1, \u0026tmp);\n+\t\t\t\t/* Data */\n+\t\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0,\n+\t\t\t\t\t\t  2, 2, \u0026tmp16);\n+\t\t\t\ttmp = AX_VLAN_CONTROL_WE;\n+\t\t\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL,\n+\t\t\t\t\t\t  1, 1, \u0026tmp);\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tif (changed \u0026 NETIF_F_HW_VLAN_CTAG_RX) {\n+\t\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n+\t\ttmp ^= AX_VLAN_CONTROL_VSO;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, \u0026tmp);\n \t}\n \n \treturn 0;\n@@ -995,6 +1490,8 @@ static const struct net_device_ops ax88179_netdev_ops = {\n \t.ndo_eth_ioctl\t\t= usbnet_mii_ioctl,\n \t.ndo_set_rx_mode\t= ax88179_set_multicast,\n \t.ndo_set_features\t= ax88179_set_features,\n+\t.ndo_vlan_rx_add_vid\t= ax179a_vlan_rx_add_vid,\n+\t.ndo_vlan_rx_kill_vid\t= ax179a_vlan_rx_kill_vid,\n };\n \n static int ax88179_check_eeprom(struct usbnet *dev)\n@@ -1293,6 +1790,17 @@ static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)\n \n \tdev-\u003edriver_priv = ax179_data;\n \n+\tret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS,\n+\t\t\t       1, 1, \u0026ax179_data-\u003echip_version);\n+\tif (ret \u003c 0)\n+\t\tgoto err_nodev;\n+\n+\tax179_data-\u003echip_version = (ax179_data-\u003echip_version \u0026 0xf0) \u003e\u003e 4;\n+\tax179_data-\u003eis_ax88772d = 0;\n+\tax179_data-\u003eip_align = 1;\n+\tax179_data-\u003eeeprom_read_cmd = AX_ACCESS_EEPROM;\n+\tax179_data-\u003eeeprom_block = 2;\n+\n \tdev-\u003enet-\u003enetdev_ops = \u0026ax88179_netdev_ops;\n \tdev-\u003enet-\u003eethtool_ops = \u0026ax88179_ethtool_ops;\n \tdev-\u003enet-\u003eneeded_headroom = 8;\n@@ -1317,6 +1825,120 @@ static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)\n \tax88179_reset(dev);\n \n \treturn 0;\n+\n+err_nodev:\n+\tkfree(ax179_data);\n+\tax179_data = NULL;\n+\n+\treturn ret;\n+}\n+\n+static int ax88179a_bind(struct usbnet *dev, struct usb_interface *intf)\n+{\n+\tstruct usb_device *udev = interface_to_usbdev(intf);\n+\tstruct ax88179_data *ax179_data;\n+\tint ret;\n+\n+\t/* Check if vendor configuration */\n+\tif (udev-\u003eactconfig-\u003edesc.bConfigurationValue != 1) {\n+\t\tnetdev_info(dev-\u003enet, \"Switching to vendor mode\\n\");\n+\t\tusb_driver_set_configuration(udev, 1);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tret = usbnet_get_endpoints(dev, intf);\n+\tif (ret \u003c 0)\n+\t\treturn ret;\n+\n+\tax179_data = kzalloc_obj(*ax179_data);\n+\tif (!ax179_data)\n+\t\treturn -ENOMEM;\n+\n+\tdev-\u003edriver_priv = ax179_data;\n+\n+\tret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS,\n+\t\t\t       1, 1, \u0026ax179_data-\u003echip_version);\n+\tif (ret \u003c 0)\n+\t\tgoto err_nodev;\n+\n+\tax179_data-\u003echip_version = (ax179_data-\u003echip_version \u0026 0xf0) \u003e\u003e 4;\n+\tax179_data-\u003eis_ax88772d = 0;\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88179A) {\n+\t\tif (udev-\u003edescriptor.bcdDevice == 0x300)\n+\t\t\tax179_data-\u003eis_ax88772d = 1;\n+\t}\n+\n+\tfor (int i = 0; i \u003c 3; i++) {\n+\t\tret = ax88179_read_cmd(dev, AX88179A_ACCESS_BL, (0xFD + i),\n+\t\t\t\t       1, 1, \u0026ax179_data-\u003efw_version[i]);\n+\t\tif (ret \u003c 0)\n+\t\t\tax179_data-\u003efw_version[i] = 0xff;\n+\t}\n+\tnetdev_info(dev-\u003enet, \"AX88179A/279/772D Chip Version: %x, FW: %d.%d.%d.%d\\n\",\n+\t\t    ax179_data-\u003echip_version,\n+\t\t    ax179_data-\u003efw_version[0], ax179_data-\u003efw_version[1],\n+\t\t    ax179_data-\u003efw_version[2], ax179_data-\u003efw_version[3]);\n+\n+\t/* The AX88279 requires both the AX_RX_CTL_IPE and AX_RX_CTL_DROPCRCERR\n+\t * bits set in AX_RX_CTL for creating correct RX-URBs. AX_RX_CTL_DROPCRCERR\n+\t * is anyway set for all chips, make sure AX_RX_CTL_IPE is set via ip_align.\n+\t * Also configure eeprom access parameters.\n+\t */\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tax179_data-\u003eip_align = 1;\n+\t\tax179_data-\u003eeeprom_read_cmd = AX88179A_FLASH_READ;\n+\t\tax179_data-\u003eeeprom_block = 256;\n+\t} else {\n+\t\tax179_data-\u003eip_align = 0;\n+\t\tax179_data-\u003eeeprom_read_cmd = AX_ACCESS_EFUS;\n+\t\tax179_data-\u003eeeprom_block = 20;\n+\t}\n+\n+\tdev-\u003enet-\u003enetdev_ops = \u0026ax88179_netdev_ops;\n+\tdev-\u003enet-\u003eethtool_ops = \u0026ax88179_ethtool_ops;\n+\tdev-\u003enet-\u003eneeded_headroom = 8;\n+\tdev-\u003enet-\u003eneeded_tailroom = 8;\n+\tdev-\u003enet-\u003emin_mtu = ETH_MIN_MTU;\n+\tdev-\u003ehard_mtu = 9 * 1024;\n+\tdev-\u003enet-\u003emax_mtu = dev-\u003ehard_mtu - dev-\u003enet-\u003ehard_header_len;\n+\n+\t/* Initialize MII structure */\n+\tdev-\u003emii.dev = dev-\u003enet;\n+\tdev-\u003emii.mdio_read = ax88179_mdio_read;\n+\tdev-\u003emii.mdio_write = ax88179_mdio_write;\n+\tdev-\u003emii.phy_id_mask = 0xff;\n+\tdev-\u003emii.reg_num_mask = 0xff;\n+\tdev-\u003emii.phy_id = 0x03;\n+\tif (!ax179_data-\u003eis_ax88772d)\n+\t\tdev-\u003emii.supports_gmii = 1;\n+\n+\tdev-\u003enet-\u003efeatures |= NETIF_F_SG | NETIF_F_IP_CSUM |\n+\t\t\t      NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO |\n+\t\t\t      NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |\n+\t\t\t      NETIF_F_HW_VLAN_CTAG_FILTER;\n+\n+\tdev-\u003enet-\u003ehw_features |= dev-\u003enet-\u003efeatures;\n+\n+\tdev-\u003enet-\u003evlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |\n+\t\t\t\t  NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;\n+\n+\tnetif_set_tso_max_size(dev-\u003enet, 16384);\n+\n+\t/* Enable Transmission of Link Speed byte in interrupt URB */\n+\tax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL);\n+\tax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0, 0, 0, NULL);\n+\n+\t/* Read MAC address from DTB or ASIX chip */\n+\tax88179_get_mac_addr(dev);\n+\tmemcpy(dev-\u003enet-\u003eperm_addr, dev-\u003enet-\u003edev_addr, ETH_ALEN);\n+\n+\treturn 0;\n+\n+err_nodev:\n+\tkfree(ax179_data);\n+\tax179_data = NULL;\n+\n+\treturn ret;\n }\n \n static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)\n@@ -1338,6 +1960,22 @@ static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)\n \tkfree(ax179_data);\n }\n \n+static void ax88179a_unbind(struct usbnet *dev, struct usb_interface *intf)\n+{\n+\tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n+\tu16 tmp16;\n+\tu8 tmp8;\n+\n+\t/* Configure RX control register =\u003e stop operation */\n+\ttmp16 = AX_RX_CTL_STOP;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026tmp16);\n+\n+\ttmp8 = 0;\n+\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026tmp8);\n+\n+\tkfree(ax179_data);\n+}\n+\n static void\n ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)\n {\n@@ -1354,6 +1992,21 @@ ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)\n \t\tskb-\u003eip_summed = CHECKSUM_UNNECESSARY;\n }\n \n+static void ax88179a_rx_checksum(struct sk_buff *skb, u64 pkt_desc)\n+{\n+\tu32 pkt_type;\n+\n+\tskb-\u003eip_summed = CHECKSUM_NONE;\n+\t/* checksum error bit is set */\n+\tif (pkt_desc \u0026 AX179A_RX_PD_L4_ERR || pkt_desc \u0026 AX179A_RX_PD_L3_ERR)\n+\t\treturn;\n+\n+\tpkt_type = pkt_desc \u0026 AX179A_RX_PD_L4_TYPE_MASK;\n+\t/* It must be a TCP or UDP packet with a valid checksum */\n+\tif (pkt_type == AX179A_RX_PD_L4_TCP || pkt_type == AX179A_RX_PD_L4_UDP)\n+\t\tskb-\u003eip_summed = CHECKSUM_UNNECESSARY;\n+}\n+\n static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)\n {\n \tstruct sk_buff *ax_skb;\n@@ -1472,6 +2125,121 @@ static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)\n \treturn 0;\n }\n \n+static int ax88179a_rx_fixup(struct usbnet *dev, struct sk_buff *skb)\n+{\n+\tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n+\tstruct sk_buff *ax_skb;\n+\tu32 hdr_off, pkt_end;\n+\tu64 *pkt_desc_ptr;\n+\tu16 vlan_tag;\n+\tu16 pkt_cnt;\n+\tu64 rx_hdr;\n+\n+\t/* SKB contents for AX179A-based chips:\n+\t *   \u003cpacket 1\u003e\n+\t *   ...\n+\t *   \u003cpacket N\u003e\n+\t *   \u003cper-packet metadata entry 1\u003e\n+\t *   ...\n+\t *   \u003cper-packet metadata entry N\u003e\n+\t *   \u003crx_hdr\u003e\n+\t *\n+\t * where:\n+\t *   \u003cpacket N\u003e contains pkt_len data bytes and padding:\n+\t *\t\t2 bytes of IP alignment (optional, depends on AX_RX_CTL_IPE flag)\n+\t *\t\tpacket data received\n+\t *\t\toptional padding to 8-bytes boundary\n+\t *   \u003cper-packet metadata entry N\u003e contains 8 bytes:\n+\t *\t\tpkt_len and fields AX_RXHDR_*\n+\t *   \u003crx-hdr\u003e\tcontains 8 bytes:\n+\t *\t\tpkt_cnt and hdr_off (offset of \u003cper-packet metadata entry 1\u003e)\n+\t *\n+\t * pkt_cnt is number of entries in the per-packet metadata array.\n+\t */\n+\n+\tif (!skb || skb-\u003elen \u003c sizeof(rx_hdr))\n+\t\tgoto err;\n+\n+\t/* RX Descriptor Header */\n+\tskb_trim(skb, skb-\u003elen - sizeof(rx_hdr));\n+\trx_hdr = le64_to_cpup((u64 *)skb_tail_pointer(skb));\n+\n+\t/* Check these packets */\n+\thdr_off = (rx_hdr \u0026 AX179A_RX_DH_DESC_OFFSET_MASK) \u003e\u003e AX179A_RX_DH_DESC_OFFSET_SHIFT;\n+\tpkt_cnt = rx_hdr \u0026 AX179A_RX_DH_PKT_CNT_MASK;\n+\n+\t/* Consistency check header position */\n+\tif (hdr_off != skb-\u003elen - (pkt_cnt * sizeof(rx_hdr)))\n+\t\tgoto err;\n+\n+\t/* Make sure that the bounds of the metadata array are inside the SKB\n+\t * (and in front of the counter at the end).\n+\t */\n+\tif (pkt_cnt * 8 + hdr_off \u003e skb-\u003elen)\n+\t\tgoto err;\n+\n+\t/* Packets must not overlap the metadata array */\n+\tskb_trim(skb, hdr_off);\n+\n+\tif (!pkt_cnt)\n+\t\tgoto err;\n+\n+\t/* Get the first RX packet descriptor */\n+\tpkt_desc_ptr = (u64 *)(skb-\u003edata + hdr_off);\n+\n+\tpkt_end = 0;\n+\twhile (pkt_cnt--) {\n+\t\tu64 pkt_desc = le64_to_cpup(pkt_desc_ptr);\n+\t\tu32 pkt_len_plus_padd;\n+\t\tu32 pkt_len;\n+\n+\t\tpkt_len = (u32)((pkt_desc \u0026 AX179A_RX_PD_LEN_MASK) \u003e\u003e AX179A_RX_PD_LEN_SHIFT)\n+\t\t\t  - (ax179_data-\u003eip_align ? 2 : 0);\n+\t\tpkt_len_plus_padd = ((pkt_len + 7 + (ax179_data-\u003eip_align ? 2 : 0)) \u0026 0x7FFF8);\n+\n+\t\tpkt_end += pkt_len_plus_padd;\n+\t\tif (pkt_end \u003e hdr_off || (pkt_cnt == 0 \u0026\u0026 pkt_end != hdr_off))\n+\t\t\tgoto err;\n+\n+\t\tif (pkt_desc \u0026 AX179A_RX_PD_DROP || !(pkt_desc \u0026 AX179A_RX_PD_RX_OK) ||\n+\t\t    pkt_len \u003e (dev-\u003ehard_mtu + AX179A_RX_HW_PAD)) {\n+\t\t\tskb_pull(skb, pkt_len_plus_padd);\n+\n+\t\t\t/* Next RX Packet Descriptor */\n+\t\t\tpkt_desc_ptr++;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tax_skb = netdev_alloc_skb_ip_align(dev-\u003enet, pkt_len);\n+\t\tif (!ax_skb)\n+\t\t\tgoto err;\n+\n+\t\tskb_put(ax_skb, pkt_len);\n+\t\tmemcpy(ax_skb-\u003edata, skb-\u003edata + (ax179_data-\u003eip_align ? AX179A_RX_HW_PAD : 0),\n+\t\t       pkt_len);\n+\n+\t\tif (ax179_data-\u003erx_checksum)\n+\t\t\tax88179a_rx_checksum(ax_skb, pkt_desc);\n+\n+\t\tif (pkt_desc \u0026 AX179A_RX_PD_VLAN) {\n+\t\t\tvlan_tag = pkt_desc \u003e\u003e AX179A_RX_PD_VLAN_SHIFT;\n+\t\t\t__vlan_hwaccel_put_tag(ax_skb, htons(ETH_P_8021Q),\n+\t\t\t\t\t       vlan_tag \u0026 VLAN_VID_MASK);\n+\t\t}\n+\n+\t\tusbnet_skb_return(dev, ax_skb);\n+\t\tskb_pull(skb, pkt_len_plus_padd);\n+\n+\t\t/* Next RX Packet Header */\n+\t\tpkt_desc_ptr++;\n+\t}\n+\n+\treturn 1;\n+\n+err:\n+\treturn 0;\n+}\n+\n static struct sk_buff *\n ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)\n {\n@@ -1505,6 +2273,59 @@ ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)\n \treturn skb;\n }\n \n+static struct sk_buff *\n+ax88179a_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)\n+{\n+\tu64 tx_desc = skb-\u003elen \u0026 AX179A_TX_DESC_LEN_MASK;\n+\tint frame_size = dev-\u003emaxpacket;\n+\tstruct sk_buff *ax_skb;\n+\tu64 *tx_desc_ptr;\n+\tint padding_size;\n+\tint headroom;\n+\tint tailroom;\n+\tu16 tci = 0;\n+\n+\t/* TSO MSS */\n+\ttx_desc |= ((u64)(skb_shinfo(skb)-\u003egso_size \u0026 AX179A_TX_DESC_MSS_MASK)) \u003c\u003c\n+\t\t   AX179A_TX_DESC_MSS_SHIFT;\n+\n+\theadroom = (skb-\u003elen + sizeof(tx_desc)) % 8;\n+\tpadding_size = headroom ? 8 - headroom : 0;\n+\n+\tif (((skb-\u003elen + sizeof(tx_desc) + padding_size) % frame_size) == 0) {\n+\t\tpadding_size += 8;\n+\t\ttx_desc |= AX179A_TX_DESC_DROP_PADD;\n+\t}\n+\n+\tif ((dev-\u003enet-\u003efeatures \u0026 NETIF_F_HW_VLAN_CTAG_TX) \u0026\u0026 (vlan_get_tag(skb, \u0026tci) \u003e= 0)) {\n+\t\ttx_desc |= AX179A_TX_DESC_VLAN;\n+\t\ttx_desc |= ((u64)tci \u0026 AX179A_TX_DESC_VLAN_MASK) \u003c\u003c AX179A_TX_DESC_VLAN_SHIFT;\n+\t}\n+\n+\tif (!dev-\u003ecan_dma_sg \u0026\u0026 (dev-\u003enet-\u003efeatures \u0026 NETIF_F_SG) \u0026\u0026 skb_linearize(skb))\n+\t\treturn NULL;\n+\n+\theadroom = skb_headroom(skb);\n+\ttailroom = skb_tailroom(skb);\n+\n+\tif (!(headroom \u003e= sizeof(tx_desc) \u0026\u0026 tailroom \u003e= padding_size)) {\n+\t\tax_skb = skb_copy_expand(skb, sizeof(tx_desc), padding_size, flags);\n+\t\tdev_kfree_skb_any(skb);\n+\t\tskb = ax_skb;\n+\t\tif (!skb)\n+\t\t\treturn NULL;\n+\t}\n+\tif (padding_size != 0)\n+\t\tskb_put_zero(skb, padding_size);\n+\t/* Copy TX header */\n+\ttx_desc_ptr = skb_push(skb, sizeof(tx_desc));\n+\t*tx_desc_ptr = cpu_to_le64(tx_desc);\n+\n+\tusbnet_set_skb_tx_stats(skb, 1, 0);\n+\n+\treturn skb;\n+}\n+\n static int ax88179_link_reset(struct usbnet *dev)\n {\n \tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n@@ -1580,73 +2401,343 @@ static int ax88179_link_reset(struct usbnet *dev)\n \treturn 0;\n }\n \n+static void ax88179a_bulkin_config(struct usbnet *dev, u8 link_sts)\n+{\n+\tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n+\tconst struct ax_bulkin_settings *bulkin_data;\n+\tint index = 0;\n+\n+\tswitch (ax179_data-\u003espeed) {\n+\tcase ETHER_LINK_2500:\t/* AX88279 only */\n+\t\tindex = 0;\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_1000:\t/* AX88279 \u0026 AX88178A */\n+\t\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 1;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 2;\n+\t\t} else {\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 0;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 1;\n+\t\t}\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_100:\n+\t\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 3;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 5;\n+\t\t\tif (!ax179_data-\u003efull_duplex)\n+\t\t\t\tindex++;\n+\t\t} else {\n+\t\t\t/* AX88279A \u0026 AX88277D */\n+\t\t\tif (link_sts \u0026 AX_USB_SS)\n+\t\t\t\tindex = 2;\n+\t\t\telse if (link_sts \u0026 AX_USB_HS)\n+\t\t\t\tindex = 4;\n+\t\t\tif (!ax179_data-\u003efull_duplex)\n+\t\t\t\tindex++;\n+\t\t}\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_10:\n+\t\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279)\n+\t\t\tindex = 7;\n+\t\telse\n+\t\t\tindex = 6;\n+\t\tbreak;\n+\n+\tdefault:\t/* No link */\n+\t\tindex = 0;\n+\t}\n+\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279 \u0026\u0026 (link_sts \u0026 AX_USB_FS))\n+\t\tindex = 7;\n+\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\tbulkin_data = AX88279_BULKIN_SIZE;\n+\t} else {\n+\t\tif (ax179_data-\u003eis_ax88772d)\n+\t\t\tbulkin_data = AX88772D_BULKIN_SIZE;\n+\t\telse\n+\t\t\tbulkin_data = AX88179A_BULKIN_SIZE;\n+\t}\n+\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, \u0026bulkin_data[index]);\n+}\n+\n+static int ax88179a_link_reset(struct usbnet *dev)\n+{\n+\tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n+\tu8 tmp8, link_sts, reg8[3];\n+\tu16 tmp16, mode, speed;\n+\n+\tif (!ax179_data-\u003elink) {\n+\t\tnetdev_info(dev-\u003enet, \"ax88179a - Link status is: 0\\n\");\n+\t\treturn 0;\n+\t}\n+\n+\t/* Stop RX/TX for link configuration */\n+\ttmp16 = AX_RX_CTL_STOP;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026tmp16);\n+\ttmp8 = 0;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, \u0026tmp8);\n+\n+\ttmp8 = 0xa5;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_CDC_DELAY_TX, 1, 1, \u0026tmp8);\n+\n+\ttmp16 = 0x0410;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 2, 2, \u0026tmp16);\n+\n+\ttmp8 = 0;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_ETH_TX_GAP, 1, 1, \u0026tmp8);\n+\n+\ttmp8 = 0x07;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_EP5_EHR, 1, 1, \u0026tmp8);\n+\n+\ttmp8 = 0x28 | AX_NEW_PAUSE_EN;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_NEW_PAUSE_CTRL, 1, 1, \u0026tmp8);\n+\n+\tmode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | AX_MEDIUM_RXFLOW_CTRLEN;\n+\n+\t/* Link is up, but some older AX88179A FW versions do not send link speed\n+\t * and duplex status in interrupt URB, so read it via MII\n+\t */\n+\tif (!ax179_data-\u003espeed) {\n+\t\tstruct ethtool_link_ksettings cmd;\n+\n+\t\tmii_ethtool_get_link_ksettings(\u0026dev-\u003emii, \u0026cmd);\n+\t\tax179_data-\u003efull_duplex = cmd.base.duplex;\n+\t\tswitch (cmd.base.speed) {\n+\t\tcase SPEED_1000:\n+\t\t\tax179_data-\u003espeed = ETHER_LINK_1000;\n+\t\t\tbreak;\n+\t\tcase SPEED_100:\n+\t\t\tax179_data-\u003espeed = ETHER_LINK_100;\n+\t\t\tbreak;\n+\t\tcase SPEED_10:\n+\t\tdefault:\n+\t\t\tax179_data-\u003espeed = ETHER_LINK_10;\n+\t\t\tbreak;\n+\t\t};\n+\t}\n+\n+\tspeed = 0;\n+\tswitch (ax179_data-\u003espeed) {\n+\tcase ETHER_LINK_2500:\n+\t\treg8[0] = 0x00;\n+\t\treg8[1] = 0xF8;\n+\t\treg8[2] = 0x07;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_PAUSE, 3, 3, reg8);\n+\n+\t\treg8[0] = 0x78;\n+\t\treg8[1] = (AX_LSOFC_WCNT_7_ACCESS \u003c\u003c 5);\n+\t\treg8[2] = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);\n+\n+\t\treg8[0] = 0x40;\n+\t\treg8[1] = AX_MAC_MIQFFCTRL_FORMAT | AX_MAC_MIQFFCTRL_DROP_CRC | AX_MAC_LSO_ERR_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 2, 2, reg8);\n+\n+\t\ttmp8 = AX_XGMII_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, \u0026tmp8);\n+\n+\t\ttmp8 = 0x1C | AX_LSO_ENHANCE_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_LSO_ENHANCE_CTRL, 1, 1, \u0026tmp8);\n+\n+\t\tmode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_FULL_DUPLEX;\n+\n+\t\tspeed = 2500;\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_1000:\n+\t\tmode |= AX_MEDIUM_GIGAMODE;\n+\t\tspeed = 1000;\n+\t\tfallthrough;\n+\n+\tcase ETHER_LINK_100:\n+\t\treg8[0] = 0x78;\n+\t\treg8[1] = (AX_LSOFC_WCNT_7_ACCESS \u003c\u003c 5) | AX_GMII_CRC_APPEND;\n+\t\treg8[2] = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);\n+\n+\t\ttmp8 = 0x40;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, \u0026tmp8);\n+\n+\t\tspeed = speed ? speed : 100;\n+\t\tbreak;\n+\n+\tcase ETHER_LINK_10:\n+\t\treg8[0] = 0xFA;\n+\t\treg8[1] = (AX_LSOFC_WCNT_7_ACCESS \u003c\u003c 5) | AX_GMII_CRC_APPEND;\n+\t\treg8[2] = 0xFF;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);\n+\n+\t\ttmp8 = 0xFA;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, \u0026tmp8);\n+\n+\t\tspeed = 10;\n+\t\tbreak;\n+\t}\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS, 1, 1, \u0026link_sts);\n+\tax88179a_bulkin_config(dev, link_sts);\n+\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88279) {\n+\t\ttmp8 = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, \u0026tmp8);\n+\t}\n+\n+\tif (ax179_data-\u003efull_duplex)\n+\t\tmode |= AX_MEDIUM_FULL_DUPLEX;\n+\n+\tif (dev-\u003enet-\u003emtu \u003e 1500)\n+\t\tmode |= AX_MEDIUM_JUMBO_EN;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026mode);\n+\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026ax179_data-\u003erxctl);\n+\n+\ttmp8 = AX_MAC_RX_PATH_READY | AX_MAC_TX_PATH_READY;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, \u0026tmp8);\n+\n+\tax179_data-\u003eeee_enabled = ax88179_chk_eee(dev);\n+\n+\tnetif_carrier_on(dev-\u003enet);\n+\n+\tnetdev_info(dev-\u003enet, \"ax88179a - Link status is: 1, Link speed: %d, Duplex: %d\\n\",\n+\t\t    speed, ax179_data-\u003efull_duplex);\n+\n+\treturn 0;\n+}\n+\n static int ax88179_reset(struct usbnet *dev)\n {\n-\tu8 buf[5];\n-\tu16 *tmp16;\n-\tu8 *tmp;\n \tstruct ax88179_data *ax179_data = dev-\u003edriver_priv;\n \tstruct ethtool_keee eee_data;\n+\tu16 *tmp16;\n+\tu8 buf[5];\n+\tu8 *tmp;\n \n \ttmp16 = (u16 *)buf;\n \ttmp = (u8 *)buf;\n \n \t/* Power up ethernet PHY */\n-\t*tmp16 = 0;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\t*tmp16 = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n \n-\t*tmp16 = AX_PHYPWR_RSTCTL_IPRL;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n-\tmsleep(500);\n+\t\t*tmp16 = AX_PHYPWR_RSTCTL_IPRL;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);\n+\t\tmsleep(500);\n \n-\t*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);\n-\tmsleep(200);\n+\t\t*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);\n+\t\tmsleep(200);\n+\t} else {\n+\t\t*tmp = AX_PHY_POWER;\n+\t\tax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, tmp);\n+\t\tmsleep(250);\n+\t}\n+\n+\tif (ax179_data-\u003echip_version == AX_VERSION_AX88279) {\n+\t\t*tmp16 = ax88179_mdio_read(dev-\u003enet, dev-\u003emii.phy_id, MII_ADVERTISE);\n+\t\t*tmp16 \u0026= ~(ADVERTISE_10FULL | ADVERTISE_10HALF);\n+\t\t*tmp16 |= ADVERTISE_RESV; /* Advertise 2.5GBit link */\n+\t\tax88179_mdio_write(dev-\u003enet, dev-\u003emii.phy_id, MII_ADVERTISE, *tmp16);\n+\t}\n \n \t/* Ethernet PHY Auto Detach*/\n \tax88179_auto_detach(dev);\n \n+\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88179A) {\n+\t\t*tmp = AX_MAC_EFF_EN;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BULK_OUT_CTRL, 1, 1, tmp);\n+\n+\t\t*tmp16 = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);\n+\n+\t\t*tmp = 0x04;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);\n+\t\t*tmp = 0x10;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);\n+\n+\t\t*tmp = 0;\n+\t\tif (dev-\u003enet-\u003efeatures \u0026 NETIF_F_HW_VLAN_CTAG_FILTER)\n+\t\t\t*tmp |= AX_VLAN_CONTROL_VFE;\n+\t\tif (dev-\u003enet-\u003efeatures \u0026 NETIF_F_HW_VLAN_CTAG_RX)\n+\t\t\t*tmp |= AX_VLAN_CONTROL_VSO;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, tmp);\n+\n+\t\t*tmp = 0xff;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_INT_MASK, 1, 1, tmp);\n+\n+\t\t*tmp = 0;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_RX_DMA_CTL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_TX_DMA_CTL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_ARC_CTRL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_SWP_CTRL, 1, 1, tmp);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_HDR_CKSUM, 1, 1, tmp);\n+\t}\n+\n \t/* Read MAC address from DTB or asix chip */\n \tax88179_get_mac_addr(dev);\n \tmemcpy(dev-\u003enet-\u003eperm_addr, dev-\u003enet-\u003edev_addr, ETH_ALEN);\n \n \t/* RX bulk configuration */\n-\tmemcpy(tmp, \u0026AX88179_BULKIN_SIZE[0], 5);\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);\n-\n-\tdev-\u003erx_urb_size = 1024 * 20;\n-\n-\t*tmp = 0x34;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);\n-\n-\t*tmp = 0x52;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,\n-\t\t\t  1, 1, tmp);\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\tmemcpy(tmp, \u0026AX88179_BULKIN_SIZE[0], 5);\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);\n+\t\t*tmp = 0x34;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);\n+\n+\t\t*tmp = 0x52;\n+\t\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,\n+\t\t\t\t  1, 1, tmp);\n+\t\tdev-\u003erx_urb_size = 1024 * 20;\n+\t} else {\n+\t\t/* The Bulk-Register configuration for the AX88179A is done in\n+\t\t * ax88179a_link_reset(), once the link is up for a given link and USB-speed.\n+\t\t */\n+\t\tif (ax179_data-\u003eis_ax88772d)\n+\t\t\tdev-\u003erx_urb_size = 1024 * 24;\n+\t\telse\n+\t\t\tdev-\u003erx_urb_size = 1024 * 48;\n+\t}\n \n \t/* Enable checksum offload */\n \t*tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |\n \t       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);\n+\tax179_data-\u003erx_checksum = 1;\n \n \t*tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |\n \t       AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);\n \n \t/* Configure RX control register =\u003e start operation */\n-\t*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |\n-\t\t AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);\n-\n-\t*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |\n-\t       AX_MONITOR_MODE_RWMP;\n+\tax179_data-\u003erxctl = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_START |\n+\t\t\t    AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;\n+\tif (ax179_data-\u003eip_align)\n+\t\tax179_data-\u003erxctl |= AX_RX_CTL_IPE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026ax179_data-\u003erxctl);\n+\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\t*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL | AX_MONITOR_MODE_RWMP;\n+\telse\n+\t\t*tmp = AX_MONITOR_MODE_RWMP;\n \tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);\n \n \t/* Configure default medium type =\u003e giga */\n \t*tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |\n-\t\t AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |\n-\t\t AX_MEDIUM_GIGAMODE;\n-\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,\n-\t\t\t  2, 2, tmp16);\n+\t\t AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX;\n+\tif (!ax179_data-\u003eis_ax88772d)\n+\t\t*tmp16 |= AX_MEDIUM_GIGAMODE;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);\n \n \t/* Check if WoL is supported */\n \tax179_data-\u003ewol_supported = 0;\n@@ -1654,16 +2745,29 @@ static int ax88179_reset(struct usbnet *dev)\n \t\t\t     1, 1, \u0026tmp) \u003e 0)\n \t\tax179_data-\u003ewol_supported = WAKE_MAGIC | WAKE_PHY;\n \n-\tax88179_led_setting(dev);\n+\t/* For chips starting with AX88179A, LEDS are configured by the adapter\n+\t * firmware directly from EEPROM/EFUSE values\n+\t */\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A)\n+\t\tax88179_led_setting(dev);\n \n \tax179_data-\u003eeee_enabled = 0;\n \tax179_data-\u003eeee_active = 0;\n \n-\tax88179_disable_eee(dev);\n+\tif (ax179_data-\u003echip_version \u003c AX_VERSION_AX88179A) {\n+\t\tax88179_eee_config(dev, false);\n \n-\tax88179_ethtool_get_eee(dev, \u0026eee_data);\n-\tlinkmode_zero(eee_data.advertised);\n-\tax88179_ethtool_set_eee(dev, \u0026eee_data);\n+\t\tax88179_ethtool_get_eee(dev, \u0026eee_data);\n+\t\tlinkmode_zero(eee_data.advertised);\n+\t\tax88179_ethtool_set_eee(dev, \u0026eee_data);\n+\t} else {\n+\t\tax88179_eee_config(dev, true);\n+\t\tax88179_ethtool_get_eee(dev, \u0026eee_data);\n+\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised);\n+\t\tif (ax179_data-\u003echip_version \u003e= AX_VERSION_AX88279)\n+\t\t\tlinkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised);\n+\t\tax88179_ethtool_set_eee(dev, \u0026eee_data);\n+\t}\n \n \t/* Restart autoneg */\n \tmii_nway_restart(\u0026dev-\u003emii);\n@@ -1707,6 +2811,24 @@ static int ax88179_stop(struct usbnet *dev)\n \treturn 0;\n }\n \n+static int ax88179a_stop(struct usbnet *dev)\n+{\n+\tu16 reg16;\n+\tu8 reg8;\n+\n+\tax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026reg16);\n+\treg16 \u0026= ~AX_MEDIUM_RECEIVE_EN;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, \u0026reg16);\n+\n+\treg16 = 0;\n+\tax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, \u0026reg16);\n+\n+\treg8 = 0;\n+\tax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, \u0026reg8);\n+\n+\treturn 0;\n+}\n+\n static const struct driver_info ax88179_info = {\n \t.description = \"ASIX AX88179 USB 3.0 Gigabit Ethernet\",\n \t.bind = ax88179_bind,\n@@ -1733,6 +2855,45 @@ static const struct driver_info ax88178a_info = {\n \t.tx_fixup = ax88179_tx_fixup,\n };\n \n+static const struct driver_info ax88179a_info = {\n+\t.description = \"ASIX AX88179A USB 3.2 Gigabit Ethernet\",\n+\t.bind = ax88179a_bind,\n+\t.unbind = ax88179a_unbind,\n+\t.status = ax88179_status,\n+\t.link_reset = ax88179a_link_reset,\n+\t.reset = ax88179_reset,\n+\t.stop = ax88179a_stop,\n+\t.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET | FLAG_AVOID_UNLINK_URBS,\n+\t.rx_fixup = ax88179a_rx_fixup,\n+\t.tx_fixup = ax88179a_tx_fixup,\n+};\n+\n+static const struct driver_info ax88772d_info = {\n+\t.description = \"ASIX AX88772D/E USB 2.0 Fast Ethernet\",\n+\t.bind = ax88179a_bind,\n+\t.unbind = ax88179a_unbind,\n+\t.status = ax88179_status,\n+\t.link_reset = ax88179a_link_reset,\n+\t.reset = ax88179_reset,\n+\t.stop = ax88179a_stop,\n+\t.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET | FLAG_AVOID_UNLINK_URBS,\n+\t.rx_fixup = ax88179a_rx_fixup,\n+\t.tx_fixup = ax88179a_tx_fixup,\n+};\n+\n+static const struct driver_info ax88279_info = {\n+\t.description = \"ASIX AX88279 USB 3.2 2.5Gigabit Ethernet\",\n+\t.bind = ax88179a_bind,\n+\t.unbind = ax88179a_unbind,\n+\t.status = ax88179_status,\n+\t.link_reset = ax88179a_link_reset,\n+\t.reset = ax88179_reset,\n+\t.stop = ax88179a_stop,\n+\t.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET | FLAG_AVOID_UNLINK_URBS,\n+\t.rx_fixup = ax88179a_rx_fixup,\n+\t.tx_fixup = ax88179a_tx_fixup,\n+};\n+\n static const struct driver_info cypress_GX3_info = {\n \t.description = \"Cypress GX3 SuperSpeed to Gigabit Ethernet Controller\",\n \t.bind = ax88179_bind,\n@@ -1878,6 +3039,18 @@ static const struct driver_info at_umc2000sp_info = {\n \n static const struct usb_device_id products[] = {\n {\n+\t/* ASIX AX88179A/B USB 3.2 Gigabit Ethernet */\n+\tUSB_DEVICE_VER(0x0b95, 0x1790, 0x0200, 0x0200),\n+\t.driver_info = (unsigned long)\u0026ax88179a_info,\n+}, {\n+\t/* ASIX AX88772D USB 2.0 100Mbit Ethernet */\n+\tUSB_DEVICE_VER(0x0b95, 0x1790, 0x0300, 0x0300),\n+\t.driver_info = (unsigned long)\u0026ax88772d_info,\n+}, {\n+\t/* ASIX AX88279 USB 3.2 2.5GBit Ethernet */\n+\tUSB_DEVICE_VER(0x0b95, 0x1790, 0x0400, 0x0400),\n+\t.driver_info = (unsigned long)\u0026ax88279_info,\n+}, {\n \t/* ASIX AX88179 10/100/1000 */\n \tUSB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),\n \t.driver_info = (unsigned long)\u0026ax88179_info,\n"
}

For your convenience, here is the diff of the changes:
commit 9c37795baab5de68feebe32b4e2cf8b37f5af5a4
Author: syz-cluster <triage@syzkaller.com>
Date:   Wed Jul 1 11:01:23 2026 +0000

    syz-cluster: applied patch under review

diff --git a/drivers/net/usb/ax88179_178a.c b/drivers/net/usb/ax88179_178a.c
index 98f899ea2e9462..12fc20e5f76e69 100644
--- a/drivers/net/usb/ax88179_178a.c
+++ b/drivers/net/usb/ax88179_178a.c
@@ -13,9 +13,12 @@
 #include <linux/usb/usbnet.h>
 #include <uapi/linux/mdio.h>
 #include <linux/mdio.h>
+#include <linux/if_vlan.h>
 
 #define AX88179_PHY_ID				0x03
 #define AX_EEPROM_LEN				0x100
+#define AX88279_EEPROM_LEN			0x4000
+#define AX88179A_EEPROM_LEN			(32 * 20)
 #define AX88179_EEPROM_MAGIC			0x17900b95
 #define AX_MCAST_FLTSIZE			8
 #define AX_MAX_MCAST				64
@@ -32,17 +35,33 @@
 #define AX_ACCESS_EEPROM			0x04
 #define AX_ACCESS_EFUS				0x05
 #define AX_RELOAD_EEPROM_EFUSE			0x06
-#define AX_PAUSE_WATERLVL_HIGH			0x54
-#define AX_PAUSE_WATERLVL_LOW			0x55
-
+#define AX88179A_WAKEUP_SETTING			0x07
+#define AX_FW_MODE				0x08
+#define AX_GPHY_CTL				0x0F
+#define AX88179A_FLASH_READ			0x21
+#define AX88179A_FLASH_WEN			0x22
+#define AX88179A_FLASH_WDIS			0x23
+#define AX88179A_FLASH_WRITE			0x24
+#define AX88179A_PHY_CLAUSE45			0x27
+#define AX88179A_FLASH_ERASE_SECTION		0x28
+#define AX88179A_ACCESS_BL			0x2A
+#define AX88179A_PHY_POWER			0x31
+#define AX88179A_AUTODETACH			0xC0
+#define AX_PAUSE_WATERLVL_LOW			0x54
+#define AX_PAUSE_WATERLVL_HIGH			0x55
+
+#define AX_FW_MODE_179A				0x01
 #define PHYSICAL_LINK_STATUS			0x02
 	#define	AX_USB_SS		0x04
 	#define	AX_USB_HS		0x02
+	#define AX_USB_FS		0x01
 
 #define GENERAL_STATUS				0x03
 /* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */
 	#define	AX_SECLD		0x04
 
+#define AX_CHIP_STATUS				0x05
+
 #define AX_SROM_ADDR				0x07
 #define AX_SROM_CMD				0x0a
 	#define EEP_RD			0x04
@@ -62,6 +81,15 @@
 	#define AX_RX_CTL_PRO		0x0001
 	#define AX_RX_CTL_STOP		0x0000
 
+#define AX88179A_ETH_TX_GAP			0x0D
+
+#define AX88179A_BFM_DATA			0x0E
+	#define AX_TX_QUEUE_CFG		0x02
+	#define AX_TX_QUEUE_SET		0x08
+	#define AX_TX_Q1_AHB_FC_EN	0x10
+	#define AX_TX_Q2_AHB_FC_EN	0x20
+	#define AX_XGMII_EN		0x80
+
 #define AX_NODE_ID				0x10
 #define AX_MULFLTARY				0x16
 
@@ -91,7 +119,21 @@
 	#define AX_PHYPWR_RSTCTL_IPRL	0x0020
 	#define AX_PHYPWR_RSTCTL_AT	0x1000
 
+#define AX88179A_VLAN_ID_ADDRESS		0x2A
+
+#define AX88179A_VLAN_ID_CONTROL		0x2B
+	#define AX_VLAN_CONTROL_WE	0x0001
+	#define AX_VLAN_CONTROL_RD	0x0002
+	#define AX_VLAN_CONTROL_VSO	0x0010
+	#define AX_VLAN_CONTROL_VFE	0x0020
+
+#define AX88179A_VLAN_ID_DATA0			0x2C
+#define AX88179A_VLAN_ID_DATA1			0x2D
+
 #define AX_RX_BULKIN_QCTRL			0x2e
+
+#define AX_GPHY_EEE_CTRL			0x01
+
 #define AX_CLK_SELECT				0x33
 	#define AX_CLK_SELECT_BCS	0x01
 	#define AX_CLK_SELECT_ACS	0x02
@@ -111,7 +153,51 @@
 	#define AX_TXCOE_TCPV6		0x20
 	#define AX_TXCOE_UDPV6		0x40
 
+#define AX88179A_MAC_BM_INT_MASK		0x41
+#define AX88179A_MAC_BM_RX_DMA_CTL		0x43
+#define AX88179A_MAC_BM_TX_DMA_CTL		0x46
+
+#define AX88179A_MAC_RX_STATUS_CDC		0x6D
+	#define AX_LSOFC_WCNT_7_ACCESS	0x03
+	#define AX_GMII_CRC_APPEND	0x10
+
 #define AX_LEDCTRL				0x73
+#define AX88179A_MAC_ARC_CTRL			0x9E
+#define AX88179A_MAC_SWP_CTRL			0xB1
+
+#define AX88179A_MAC_TX_PAUSE			0xB2
+
+#define AX88179A_MAC_CDC_DELAY_TX		0xB5
+
+#define AX88179A_MAC_PATH			0xB7
+	#define AX_MAC_RX_PATH_READY	0x01
+	#define AX_MAC_TX_PATH_READY	0x02
+
+#define AX88179A_NEW_PAUSE_CTRL			0xB8
+	#define AX_NEW_PAUSE_EN		0x01
+
+#define AX88179A_MAC_BULK_OUT_CTRL		0xB9
+	#define AX_MAC_EFF_EN		0x02
+
+#define AX88179A_MAC_RX_DATA_CDC_CNT		0xC0
+	#define AX_MAC_LSO_ERR_EN	0x04
+	#define AX_MAC_MIQFFCTRL_FORMAT	0x10
+	#define AX_MAC_MIQFFCTRL_DROP_CRC 0x20
+
+#define AX88179A_AUTODETACH_DELAY	(5UL << 8)
+#define AX88179A_AUTODETACH_EN		1
+
+#define AX88179A_MAC_LSO_ENHANCE_CTRL		0xC3
+	#define AX_LSO_ENHANCE_EN	0x01
+
+#define AX88179A_MAC_TX_HDR_CKSUM		0xCC
+#define AX88179A_EP5_EHR			0xF9
+
+#define AX_PHY_POWER				0x02
+
+#define EPHY_LOW_POWER_EN			0x01
+#define S5_WOL_EN				0x04
+#define S5_WOL_LOW_POWER			0x20
 
 #define GMII_PHY_PHYSR				0x11
 	#define GMII_PHY_PHYSR_SMASK	0xc000
@@ -164,8 +250,56 @@
 	#define GMII_PHY_PGSEL_PAGE3	0x0003
 	#define GMII_PHY_PGSEL_PAGE5	0x0005
 
+/* TX Descriptor */
+#define AX179A_TX_DESC_LEN_MASK		0x1FFFFF
+#define AX179A_TX_DESC_DROP_PADD	BIT(28)
+#define AX179A_TX_DESC_VLAN		BIT(29)
+#define AX179A_TX_DESC_MSS_MASK		0x7FFF
+#define AX179A_TX_DESC_MSS_SHIFT	0x20
+#define AX179A_TX_DESC_VLAN_MASK	0xFFFF
+#define AX179A_TX_DESC_VLAN_SHIFT	0x30
+
+/* RX Packet Descriptor */
+#define AX179A_RX_PD_L4_ERR		BIT(0)
+#define AX179A_RX_PD_L3_ERR		BIT(1)
+#define AX179A_RX_PD_L4_TYPE_MASK	0x1C
+#define AX179A_RX_PD_L4_UDP		0x04
+#define AX179A_RX_PD_L4_TCP		0x10
+#define AX179A_RX_PD_L3_TYPE_MASK	0x60
+#define AX179A_RX_PD_L3_IP		0x20
+#define AX179A_RX_PD_L3_IP6		0x40
+
+#define AX179A_RX_PD_VLAN		BIT(10)
+#define AX179A_RX_PD_RX_OK		BIT(11)
+#define AX179A_RX_PD_DROP		BIT(31)
+#define AX179A_RX_PD_LEN_MASK	0x7FFF0000
+#define AX179A_RX_PD_LEN_SHIFT	0x10
+#define AX179A_RX_PD_VLAN_SHIFT	0x20
+
+/* RX Descriptor header */
+#define AX179A_RX_DH_PKT_CNT_MASK		0x1FFF
+#define AX179A_RX_DH_DESC_OFFSET_MASK	0xFFFFE000
+#define AX179A_RX_DH_DESC_OFFSET_SHIFT	0x0D
+
+#define AX179A_RX_HW_PAD			0x02
+
 static int ax88179_reset(struct usbnet *dev);
 
+enum ax_ether_link_speed {
+	ETHER_LINK_NONE = 0,
+	ETHER_LINK_10   = 1,
+	ETHER_LINK_100  = 2,
+	ETHER_LINK_1000 = 3,
+	ETHER_LINK_2500 = 4,
+};
+
+enum ax_chip_version {
+	AX_VERSION_INVALID		= 0x0,
+	AX_VERSION_AX88179		= 0x4,
+	AX_VERSION_AX88179A		= 0x6,	/* Also AX88772D */
+	AX_VERSION_AX88279		= 0x7,
+};
+
 struct ax88179_data {
 	u8  eee_enabled;
 	u8  eee_active;
@@ -174,6 +308,16 @@ struct ax88179_data {
 	u32 wol_supported;
 	u32 wolopts;
 	u8 disconnecting;
+	u8 chip_version;
+	u8 fw_version[4];
+	u8 is_ax88772d;
+	u8 ip_align;
+	u8 link;
+	u8 speed;
+	u8 full_duplex;
+	u8 rx_checksum;
+	u8 eeprom_read_cmd;
+	u16 eeprom_block;
 };
 
 struct ax88179_int_data {
@@ -181,15 +325,48 @@ struct ax88179_int_data {
 	__le32 intdata2;
 };
 
-static const struct {
+struct ax_bulkin_settings {
 	unsigned char ctrl, timer_l, timer_h, size, ifg;
-} AX88179_BULKIN_SIZE[] =	{
+};
+
+static const struct ax_bulkin_settings AX88179_BULKIN_SIZE[] =	{
 	{7, 0x4f, 0,	0x12, 0xff},
 	{7, 0x20, 3,	0x16, 0xff},
 	{7, 0xae, 7,	0x18, 0xff},
 	{7, 0xcc, 0x4c, 0x18, 8},
 };
 
+static const struct ax_bulkin_settings AX88179A_BULKIN_SIZE[] = {
+	{5, 0x7B, 0x00,	0x17, 0x0F},	/* 1G, SS */
+	{5, 0xC0, 0x02,	0x06, 0x0F},	/* 1G, HS */
+	{7, 0xF0, 0x00,	0x0C, 0x0F},	/* 100M, Full, SS */
+	{6, 0x00, 0x00,	0x06, 0x0F},	/* 100M, Half, SS */
+	{5, 0xC0, 0x04,	0x06, 0x0F},	/* 100M, Full, HS */
+	{7, 0xC0, 0x04,	0x06, 0x0F},	/* 100M, Half, HS */
+	{7, 0x00, 0x00,	0x03, 0x3F},	/* FS */
+};
+
+static const struct ax_bulkin_settings AX88772D_BULKIN_SIZE[] = {
+	{0, 0x00, 0x00,	0x00, 0x00},	/* 1G, SS (unused) */
+	{0, 0x00, 0x00,	0x00, 0x00},	/* 1G, HS (unused) */
+	{0, 0x00, 0x00,	0x00, 0x00},	/* 100M, Full, SS (unused) */
+	{0, 0x00, 0x00,	0x00, 0x00},	/* 100M, Half, SS (unused) */
+	{5, 0xC0, 0x04,	0x06, 0x0F},	/* 100M, Full, HS */
+	{7, 0xC0, 0x04,	0x06, 0x0F},	/* 100M, Half, HS */
+	{7, 0x00, 0x00,	0x03, 0x3F},	/* FS */
+};
+
+static const struct ax_bulkin_settings AX88279_BULKIN_SIZE[] = {
+	{5, 0x10, 0x01,	0x11, 0x0F},	/* 2.5G */
+	{7, 0xB3, 0x01,	0x11, 0x0F},	/* 1G, SS */
+	{7, 0xC0, 0x02,	0x06, 0x0F},	/* 1G, HS */
+	{7, 0x80, 0x01,	0x03, 0x0F},	/* 100M, Full, SS */
+	{7, 0x80, 0x01,	0x03, 0x0F},	/* 100M, Half, SS */
+	{7, 0x80, 0x01,	0x03, 0x0F},	/* 100M, Full, HS */
+	{7, 0x80, 0x01,	0x03, 0x0F},	/* 100M, Half, HS */
+	{7, 0x00, 0x00,	0x03, 0x3F},	/* FS */
+};
+
 static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
 {
 	struct ax88179_data *ax179_data = dev->driver_priv;
@@ -313,6 +490,7 @@ static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 
 static void ax88179_status(struct usbnet *dev, struct urb *urb)
 {
+	struct ax88179_data *data = dev->driver_priv;
 	struct ax88179_int_data *event;
 	u32 link;
 
@@ -323,6 +501,9 @@ static void ax88179_status(struct usbnet *dev, struct urb *urb)
 	le32_to_cpus((void *)&event->intdata1);
 
 	link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
+	data->speed = (((__force u32)event->intdata1) >> 8) & 0x7;
+	data->full_duplex = (((__force u32)event->intdata1) >> 12) & 0x1;
+	data->link = link;
 
 	if (netif_carrier_ok(dev->net) != link) {
 		usbnet_link_change(dev, link, 1);
@@ -403,6 +584,32 @@ ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
 	return 0;
 }
 
+static int ax_read_mmd(struct usbnet *dev, u16 dev_addr, u16 reg)
+{
+	struct ax88179_data *priv = dev->driver_priv;
+	u16 res;
+	int ret;
+
+	if (priv->chip_version >= AX_VERSION_AX88179A) {
+		ret = ax88179_read_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, &res);
+		if (ret < 0)
+			return ret;
+		return res;
+	}
+
+	return ax88179_phy_read_mmd_indirect(dev, reg, dev_addr);
+}
+
+static int ax_write_mmd(struct usbnet *dev, u16 dev_addr, u16 reg, u16 data)
+{
+	struct ax88179_data *priv = dev->driver_priv;
+
+	if (priv->chip_version >= AX_VERSION_AX88179A)
+		return ax88179_write_cmd(dev, AX88179A_PHY_CLAUSE45, dev_addr, reg, 2, &data);
+
+	return ax88179_phy_write_mmd_indirect(dev, reg, dev_addr, data);
+}
+
 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
 {
 	struct usbnet *dev = usb_get_intfdata(intf);
@@ -414,7 +621,6 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
 
 	usbnet_suspend(intf, message);
 
-	/* Enable WoL */
 	if (priv->wolopts) {
 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
 				 1, 1, &tmp8);
@@ -425,6 +631,26 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
 
 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
 				  1, 1, &tmp8);
+
+		if (priv->chip_version >= AX_VERSION_AX88179A) {
+			ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &tmp16);
+			tmp16 |= AX_MEDIUM_RECEIVE_EN;
+			ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &tmp16);
+		}
+
+		if (priv->chip_version == AX_VERSION_AX88279)
+			ax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8,
+					  EPHY_LOW_POWER_EN | S5_WOL_EN
+					  | S5_WOL_LOW_POWER | 0x8000, 0, NULL);
+
+	} else if (priv->chip_version == AX_VERSION_AX88279) {
+		ax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 8, 0x8000, 0, NULL);
+	}
+
+	if (priv->chip_version >= AX_VERSION_AX88179A) {
+		ax88179_write_cmd(dev, AX88179A_WAKEUP_SETTING, 0, EPHY_LOW_POWER_EN, 0, NULL);
+		ax88179_set_pm_mode(dev, false);
+		return 0;
 	}
 
 	/* Disable RX path */
@@ -436,11 +662,11 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
 
 	/* Force bulk-in zero length */
 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
-			 2, 2, &tmp16);
+			2, 2, &tmp16);
 
 	tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
-			  2, 2, &tmp16);
+			2, 2, &tmp16);
 
 	/* change clock */
 	tmp8 = 0;
@@ -456,12 +682,19 @@ static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
 }
 
 /* This function is used to enable the autodetach function. */
-/* This function is determined by offset 0x43 of EEPROM */
+/* This function is determined by offset 0x43 of EEPROM for the AX88179 */
 static int ax88179_auto_detach(struct usbnet *dev)
 {
+	struct ax88179_data *priv = dev->driver_priv;
 	u16 tmp16;
 	u8 tmp8;
 
+	if (priv->chip_version >= AX_VERSION_AX88179A) {
+		tmp16 = AX88179A_AUTODETACH_DELAY;
+		ax88179_write_cmd(dev, AX88179A_AUTODETACH, tmp16, 0, 0, NULL);
+		return 0;
+	}
+
 	if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
 		return 0;
 
@@ -484,11 +717,31 @@ static int ax88179_auto_detach(struct usbnet *dev)
 static int ax88179_resume(struct usb_interface *intf)
 {
 	struct usbnet *dev = usb_get_intfdata(intf);
+	struct ax88179_data *ax179_data;
+	u8 reg8;
 
+	ax179_data = dev->driver_priv;
 	ax88179_set_pm_mode(dev, true);
 
 	usbnet_link_change(dev, 0, 0);
 
+	if (ax179_data->chip_version >= AX_VERSION_AX88179A) {
+		ax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8);
+		if (!(reg8 & AX_PHY_POWER)) {
+			reg8 = AX_PHY_POWER;
+			ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8);
+			msleep(250);
+		}
+		ax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL);
+
+		/* Now, that AX_FW_MODE_179A is enabled, the PHY needs a power-cycle.
+		 * PHY-power is re-enabled in ax88179_reset()
+		 */
+		reg8 = 0;
+		ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8);
+		msleep(250);
+	}
+
 	ax88179_reset(dev);
 
 	ax88179_set_pm_mode(dev, false);
@@ -510,6 +763,21 @@ static void ax88179_disconnect(struct usb_interface *intf)
 	usbnet_disconnect(intf);
 }
 
+static void ax88179_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info)
+{
+	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *priv = dev->driver_priv;
+
+	/* Inherit standard device info */
+	usbnet_get_drvinfo(net, info);
+	if (priv->chip_version < AX_VERSION_AX88179A)
+		return;
+
+	snprintf(info->fw_version, sizeof(info->fw_version), "%d.%d.%d.%d",
+		 priv->fw_version[0], priv->fw_version[1],
+		 priv->fw_version[2], priv->fw_version[3]);
+}
+
 static void
 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 {
@@ -536,41 +804,74 @@ ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 
 static int ax88179_get_eeprom_len(struct net_device *net)
 {
-	return AX_EEPROM_LEN;
+	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *ax179_data;
+
+	ax179_data = dev->driver_priv;
+
+	if (ax179_data->chip_version < AX_VERSION_AX88179A)
+		return AX_EEPROM_LEN;
+	else if (ax179_data->chip_version >= AX_VERSION_AX88279)
+		return AX88279_EEPROM_LEN;
+	else
+		return AX88179A_EEPROM_LEN;
 }
 
-static int
-ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
-		   u8 *data)
+static void
+ax88179_eeprom_access_params(struct ax88179_data *ax179_data, int i, u16 *value, u16 *idx)
+{
+	/* AX88179 has a word-addressable EEPROM
+	 * AX88179A uses EFUSES with 20 bytes length
+	 * AX88279 has an EEPROM addressable in 256 byte blocks
+	 */
+	if (ax179_data->chip_version < AX_VERSION_AX88179A) {
+		*value = i;
+		*idx = 1;
+	} else if (ax179_data->chip_version >= AX_VERSION_AX88279) {
+		*value = (i * ax179_data->eeprom_block) >> 16;
+		*idx = (i * ax179_data->eeprom_block) & 0xffff;
+	} else {
+		*value = i << 4;
+		*idx = 0;
+	}
+}
+
+static int ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, u8 *data)
 {
 	struct usbnet *dev = netdev_priv(net);
-	u16 *eeprom_buff;
-	int first_word, last_word;
-	int i, ret;
+	struct ax88179_data *ax179_data;
+	int first, last, i, ret;
+	u8 *eeprom_buff;
+
+	ax179_data = dev->driver_priv;
 
 	if (eeprom->len == 0)
 		return -EINVAL;
 
 	eeprom->magic = AX88179_EEPROM_MAGIC;
 
-	first_word = eeprom->offset >> 1;
-	last_word = (eeprom->offset + eeprom->len - 1) >> 1;
-	eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
-				    GFP_KERNEL);
+	first = eeprom->offset / ax179_data->eeprom_block;
+	last = (eeprom->offset + eeprom->len - 1) / ax179_data->eeprom_block;
+
+	eeprom_buff = kzalloc((last - first + 1) * ax179_data->eeprom_block, GFP_KERNEL);
 	if (!eeprom_buff)
 		return -ENOMEM;
 
-	/* ax88179/178A returns 2 bytes from eeprom on read */
-	for (i = first_word; i <= last_word; i++) {
-		ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
-					 &eeprom_buff[i - first_word]);
+	for (i = first; i <= last; i++) {
+		u16 value, idx;
+
+		ax88179_eeprom_access_params(ax179_data, i, &value, &idx);
+		ret = __ax88179_read_cmd(dev, ax179_data->eeprom_read_cmd,
+					 value, idx, ax179_data->eeprom_block,
+					 eeprom_buff + (i - first) * ax179_data->eeprom_block);
+
 		if (ret < 0) {
 			kfree(eeprom_buff);
 			return -EIO;
 		}
 	}
 
-	memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
+	memcpy(data, eeprom_buff + eeprom->offset % ax179_data->eeprom_block, eeprom->len);
 	kfree(eeprom_buff);
 	return 0;
 }
@@ -580,12 +881,17 @@ ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
 		   u8 *data)
 {
 	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *ax179_data;
 	u16 *eeprom_buff;
 	int first_word;
 	int last_word;
 	int ret;
 	int i;
 
+	ax179_data = dev->driver_priv;
+	if (ax179_data->chip_version >= AX_VERSION_AX88179A)
+		return -EOPNOTSUPP;
+
 	netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
 		   eeprom->len, eeprom->offset, eeprom->magic);
 
@@ -651,12 +957,39 @@ ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
 }
 
 static int ax88179_get_link_ksettings(struct net_device *net,
-				      struct ethtool_link_ksettings *cmd)
+				       struct ethtool_link_ksettings *cmd)
 {
 	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *data;
+	int v;
+
+	data = dev->driver_priv;
 
 	mii_ethtool_get_link_ksettings(&dev->mii, cmd);
 
+	if (data->chip_version >= AX_VERSION_AX88279) {
+		linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+				 cmd->link_modes.supported);
+
+		v = ax88179_mdio_read(dev->net, dev->mii.phy_id, MII_ADVERTISE);
+		if (v >= 0 && v & ADVERTISE_RESV)
+			linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+					 cmd->link_modes.advertising);
+
+		v = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
+		if (data->speed == ETHER_LINK_2500) {
+			cmd->base.speed = SPEED_2500;
+			/* MDIO_AN_10GBT_STAT_LP2_5G is broken, but we can deduce that
+			 * the link-partner advertised 2500M if remotely AN succceded
+			 * for link speed > 1000M and we locally have a link speed of
+			 * 2500M
+			 */
+			if (v >= 0 && v & MDIO_AN_10GBT_STAT_REMOK)
+				linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+						 cmd->link_modes.lp_advertising);
+		}
+	}
+
 	return 0;
 }
 
@@ -664,34 +997,128 @@ static int ax88179_set_link_ksettings(struct net_device *net,
 				      const struct ethtool_link_ksettings *cmd)
 {
 	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *data;
+	int v;
+
+	data = dev->driver_priv;
+
+	/* mii_ethtool_set_link_ksettings handles unknown bits in MII_ADVERTISE
+	 * transparently, so for the 2.5GBit link speed of the AX_VERSION_AX88279
+	 * we just set up ADVERTISE_RESV before calling mii_ethtool_set_link_ksettings
+	 * at least for speeds < 2500
+	 */
+	if (data->chip_version == AX_VERSION_AX88279) {
+		v = ax88179_mdio_read(net, dev->mii.phy_id, MII_ADVERTISE);
+		if (v < 0)
+			return v;
+
+		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+				      cmd->link_modes.advertising))
+			v |= ADVERTISE_RESV;
+		else
+			v &= ~ADVERTISE_RESV;
+		ax88179_mdio_write(net, dev->mii.phy_id, MII_ADVERTISE, v);
+		if (cmd->base.speed == SPEED_2500)
+			return mii_nway_restart(&dev->mii);
+	}
+
 	return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
 }
 
+static void ax88179a_get_pauseparam(struct net_device *net, struct ethtool_pauseparam *pause)
+{
+	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *data;
+	u16 bmcr, lcladv, rmtadv;
+	u8 cap;
+
+	data = dev->driver_priv;
+
+	if (data->chip_version < AX_VERSION_AX88179A)
+		return;
+
+	bmcr = ax88179_mdio_read(net, dev->mii.phy_id, MII_BMCR);
+	lcladv = ax88179_mdio_read(net, dev->mii.phy_id, MII_ADVERTISE);
+	rmtadv = ax88179_mdio_read(net, dev->mii.phy_id, MII_LPA);
+
+	if (!(bmcr & BMCR_ANENABLE)) {
+		pause->autoneg = 0;
+		pause->rx_pause = 0;
+		pause->tx_pause = 0;
+		return;
+	}
+
+	pause->autoneg = 1;
+
+	cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
+
+	if (cap & FLOW_CTRL_RX)
+		pause->rx_pause = 1;
+
+	if (cap & FLOW_CTRL_TX)
+		pause->tx_pause = 1;
+}
+
+static int ax88179a_set_pauseparam(struct net_device *net, struct ethtool_pauseparam *pause)
+{
+	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *data;
+	u16 old, new1, bmcr;
+	u8 cap = 0;
+
+	data = dev->driver_priv;
+
+	if (data->chip_version < AX_VERSION_AX88179A)
+		return -EOPNOTSUPP;
+
+	bmcr = ax88179_mdio_read(net, dev->mii.phy_id, MII_BMCR);
+	if (pause->autoneg && !(bmcr & BMCR_ANENABLE))
+		return -EINVAL;
+
+	if (pause->rx_pause)
+		cap |= FLOW_CTRL_RX;
+
+	if (pause->tx_pause)
+		cap |= FLOW_CTRL_TX;
+
+	old = ax88179_mdio_read(net, dev->mii.phy_id, MII_ADVERTISE);
+	new1 = (old & ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) |
+		mii_advertise_flowctrl(cap);
+	if (old != new1)
+		ax88179_mdio_write(net, dev->mii.phy_id, MII_ADVERTISE, new1);
+
+	return mii_nway_restart(&dev->mii);
+}
+
 static int
 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_keee *data)
 {
+	struct ax88179_data *priv = dev->driver_priv;
 	int val;
 
 	/* Get Supported EEE */
-	val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
-					    MDIO_MMD_PCS);
+	val = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
 	if (val < 0)
 		return val;
 	mii_eee_cap1_mod_linkmode_t(data->supported, val);
 
 	/* Get advertisement EEE */
-	val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
-					    MDIO_MMD_AN);
+	val = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
 	if (val < 0)
 		return val;
 	mii_eee_cap1_mod_linkmode_t(data->advertised, val);
 
 	/* Get LP advertisement EEE */
-	val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
-					    MDIO_MMD_AN);
+	val = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
 	if (val < 0)
 		return val;
 	mii_eee_cap1_mod_linkmode_t(data->lp_advertised, val);
+	if (priv->chip_version >= AX_VERSION_AX88279) {
+		val = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2);
+		if (val < 0)
+			return val;
+		mii_eee_cap2_mod_linkmode_adv_t(data->lp_advertised, val);
+	}
 
 	return 0;
 }
@@ -701,8 +1128,7 @@ ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_keee *data)
 {
 	u16 tmp16 = linkmode_to_mii_eee_cap1_t(data->advertised);
 
-	return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
-					      MDIO_MMD_AN, tmp16);
+	return ax_write_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, tmp16);
 }
 
 static int ax88179_chk_eee(struct usbnet *dev)
@@ -712,40 +1138,27 @@ static int ax88179_chk_eee(struct usbnet *dev)
 
 	mii_ethtool_gset(&dev->mii, &ecmd);
 
-	if (ecmd.duplex & DUPLEX_FULL) {
+	priv->eee_active = 0;
+	if ((priv->chip_version < AX_VERSION_AX88279 && (ecmd.duplex & DUPLEX_FULL)) ||
+	    (ecmd.speed == SPEED_1000 && (ecmd.duplex & DUPLEX_FULL))) {
 		int eee_lp, eee_cap, eee_adv;
 		u32 lp, cap, adv, supported = 0;
 
-		eee_cap = ax88179_phy_read_mmd_indirect(dev,
-							MDIO_PCS_EEE_ABLE,
-							MDIO_MMD_PCS);
-		if (eee_cap < 0) {
-			priv->eee_active = 0;
+		eee_cap = ax_read_mmd(dev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
+		if (eee_cap < 0)
 			return false;
-		}
 
 		cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
-		if (!cap) {
-			priv->eee_active = 0;
+		if (!cap)
 			return false;
-		}
-
-		eee_lp = ax88179_phy_read_mmd_indirect(dev,
-						       MDIO_AN_EEE_LPABLE,
-						       MDIO_MMD_AN);
-		if (eee_lp < 0) {
-			priv->eee_active = 0;
-			return false;
-		}
 
-		eee_adv = ax88179_phy_read_mmd_indirect(dev,
-							MDIO_AN_EEE_ADV,
-							MDIO_MMD_AN);
+		eee_lp = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
+		if (eee_lp < 0)
+			return true;
 
-		if (eee_adv < 0) {
-			priv->eee_active = 0;
-			return false;
-		}
+		eee_adv = ax_read_mmd(dev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
+		if (eee_adv < 0)
+			return true;
 
 		adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
 		lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
@@ -753,65 +1166,53 @@ static int ax88179_chk_eee(struct usbnet *dev)
 			     SUPPORTED_1000baseT_Full :
 			     SUPPORTED_100baseT_Full;
 
-		if (!(lp & adv & supported)) {
-			priv->eee_active = 0;
-			return false;
-		}
+		if (!(lp & adv & supported))
+			return true;
 
 		priv->eee_active = 1;
 		return true;
 	}
 
-	priv->eee_active = 0;
 	return false;
 }
 
-static void ax88179_disable_eee(struct usbnet *dev)
-{
-	u16 tmp16;
-
-	tmp16 = GMII_PHY_PGSEL_PAGE3;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
-
-	tmp16 = 0x3246;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  MII_PHYADDR, 2, &tmp16);
-
-	tmp16 = GMII_PHY_PGSEL_PAGE0;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
-}
-
-static void ax88179_enable_eee(struct usbnet *dev)
+static void ax88179_eee_config(struct usbnet *dev, bool enable)
 {
+	struct ax88179_data *priv = dev->driver_priv;
 	u16 tmp16;
 
-	tmp16 = GMII_PHY_PGSEL_PAGE3;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
-
-	tmp16 = 0x3247;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  MII_PHYADDR, 2, &tmp16);
-
-	tmp16 = GMII_PHY_PGSEL_PAGE5;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
-
-	tmp16 = 0x0680;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  MII_BMSR, 2, &tmp16);
+	if (priv->chip_version < AX_VERSION_AX88179A) {
+		tmp16 = GMII_PHY_PGSEL_PAGE3;
+		ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
+				  GMII_PHY_PAGE_SELECT, 2, &tmp16);
+
+		tmp16 = enable ? 0x3247 : 0x3246;
+		ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
+				  MII_PHYADDR, 2, &tmp16);
+		if (enable) {
+			tmp16 = GMII_PHY_PGSEL_PAGE5;
+			ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
+					  GMII_PHY_PAGE_SELECT, 2, &tmp16);
+
+			tmp16 = 0x0680;
+			ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
+					  MII_BMSR, 2, &tmp16);
+		}
 
-	tmp16 = GMII_PHY_PGSEL_PAGE0;
-	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
-			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
+		tmp16 = GMII_PHY_PGSEL_PAGE0;
+		ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
+				  GMII_PHY_PAGE_SELECT, 2, &tmp16);
+	} else {
+		ax88179_write_cmd(dev, AX_GPHY_CTL, AX_GPHY_EEE_CTRL, enable, 0, NULL);
+	}
 }
 
 static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)
 {
 	struct usbnet *dev = netdev_priv(net);
-	struct ax88179_data *priv = dev->driver_priv;
+	struct ax88179_data *priv;
+
+	priv = dev->driver_priv;
 
 	edata->eee_enabled = priv->eee_enabled;
 	edata->eee_active = priv->eee_active;
@@ -822,18 +1223,20 @@ static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)
 static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)
 {
 	struct usbnet *dev = netdev_priv(net);
-	struct ax88179_data *priv = dev->driver_priv;
+	struct ax88179_data *priv;
 	int ret;
 
+	priv = dev->driver_priv;
+
 	priv->eee_enabled = edata->eee_enabled;
 	if (!priv->eee_enabled) {
-		ax88179_disable_eee(dev);
+		ax88179_eee_config(dev, false);
 	} else {
 		priv->eee_enabled = ax88179_chk_eee(dev);
 		if (!priv->eee_enabled)
 			return -EOPNOTSUPP;
 
-		ax88179_enable_eee(dev);
+		ax88179_eee_config(dev, true);
 	}
 
 	ret = ax88179_ethtool_set_eee(dev, edata);
@@ -848,6 +1251,7 @@ static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)
 }
 
 static const struct ethtool_ops ax88179_ethtool_ops = {
+	.get_drvinfo		= ax88179_get_drvinfo,
 	.get_link		= ethtool_op_get_link,
 	.get_msglevel		= usbnet_get_msglevel,
 	.set_msglevel		= usbnet_set_msglevel,
@@ -861,16 +1265,78 @@ static const struct ethtool_ops ax88179_ethtool_ops = {
 	.nway_reset		= usbnet_nway_reset,
 	.get_link_ksettings	= ax88179_get_link_ksettings,
 	.set_link_ksettings	= ax88179_set_link_ksettings,
+	.get_pauseparam		= ax88179a_get_pauseparam,
+	.set_pauseparam		= ax88179a_set_pauseparam,
 	.get_ts_info		= ethtool_op_get_ts_info,
 };
 
+static int ax179a_vlan_rx_kill_vid(struct net_device *net, __be16 proto, u16 vid)
+{
+	struct usbnet *dev = netdev_priv(net);
+	u8 vlan_ctrl;
+	u16 reg16;
+	u8 reg8;
+
+	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8);
+	vlan_ctrl = reg8;
+
+	/* Address */
+	reg8 = (vid / 16);
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, &reg8);
+
+	/* Data */
+	reg8 = vlan_ctrl | AX_VLAN_CONTROL_RD;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8);
+
+	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16);
+	reg16 &= ~(1 << (vid % 16));
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16);
+
+	reg8 = vlan_ctrl | AX_VLAN_CONTROL_WE;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8);
+
+	return 0;
+}
+
+static int ax179a_vlan_rx_add_vid(struct net_device *net, __be16 proto, u16 vid)
+{
+	struct usbnet *dev = netdev_priv(net);
+	u8 vlan_ctrl;
+	u16 reg16;
+	u8 reg8;
+
+	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8);
+	vlan_ctrl = reg8;
+
+	/* Address */
+	reg8 = (vid / 16);
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS, 1, 1, &reg8);
+
+	/* Data */
+	reg8 = vlan_ctrl | AX_VLAN_CONTROL_RD;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8);
+
+	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16);
+	reg16 |= (1 << (vid % 16));
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0, 2, 2, &reg16);
+
+	reg8 = vlan_ctrl | AX_VLAN_CONTROL_WE;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &reg8);
+
+	return 0;
+}
+
 static void ax88179_set_multicast(struct net_device *net)
 {
 	struct usbnet *dev = netdev_priv(net);
-	struct ax88179_data *data = dev->driver_priv;
 	u8 *m_filter = ((u8 *)dev->data);
+	struct ax88179_data *data;
+
+	data = dev->driver_priv;
 
-	data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
+	data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_DROPCRCERR);
+	if (data->ip_align)
+		data->rxctl |= AX_RX_CTL_IPE;
 
 	if (net->flags & IFF_PROMISC) {
 		data->rxctl |= AX_RX_CTL_PRO;
@@ -909,6 +1375,7 @@ ax88179_set_features(struct net_device *net, netdev_features_t features)
 {
 	u8 tmp;
 	struct usbnet *dev = netdev_priv(net);
+	struct ax88179_data *data = dev->driver_priv;
 	netdev_features_t changed = net->features ^ features;
 
 	if (changed & NETIF_F_IP_CSUM) {
@@ -928,6 +1395,34 @@ ax88179_set_features(struct net_device *net, netdev_features_t features)
 		tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
 		       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
+		data->rx_checksum = !!(features & NETIF_F_RXCSUM);
+	}
+
+	if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) {
+		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp);
+		tmp ^= AX_VLAN_CONTROL_VFE;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp);
+		if (features & NETIF_F_HW_VLAN_CTAG_FILTER) {
+			for (int i = 0; i < 256; i++) {
+				u16 tmp16;
+				/* Address */
+				tmp = i;
+				ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_ADDRESS,
+						  1, 1, &tmp);
+				/* Data */
+				ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_DATA0,
+						  2, 2, &tmp16);
+				tmp = AX_VLAN_CONTROL_WE;
+				ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL,
+						  1, 1, &tmp);
+			}
+		}
+	}
+
+	if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
+		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp);
+		tmp ^= AX_VLAN_CONTROL_VSO;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, &tmp);
 	}
 
 	return 0;
@@ -995,6 +1490,8 @@ static const struct net_device_ops ax88179_netdev_ops = {
 	.ndo_eth_ioctl		= usbnet_mii_ioctl,
 	.ndo_set_rx_mode	= ax88179_set_multicast,
 	.ndo_set_features	= ax88179_set_features,
+	.ndo_vlan_rx_add_vid	= ax179a_vlan_rx_add_vid,
+	.ndo_vlan_rx_kill_vid	= ax179a_vlan_rx_kill_vid,
 };
 
 static int ax88179_check_eeprom(struct usbnet *dev)
@@ -1293,6 +1790,17 @@ static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
 
 	dev->driver_priv = ax179_data;
 
+	ret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS,
+			       1, 1, &ax179_data->chip_version);
+	if (ret < 0)
+		goto err_nodev;
+
+	ax179_data->chip_version = (ax179_data->chip_version & 0xf0) >> 4;
+	ax179_data->is_ax88772d = 0;
+	ax179_data->ip_align = 1;
+	ax179_data->eeprom_read_cmd = AX_ACCESS_EEPROM;
+	ax179_data->eeprom_block = 2;
+
 	dev->net->netdev_ops = &ax88179_netdev_ops;
 	dev->net->ethtool_ops = &ax88179_ethtool_ops;
 	dev->net->needed_headroom = 8;
@@ -1317,6 +1825,120 @@ static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
 	ax88179_reset(dev);
 
 	return 0;
+
+err_nodev:
+	kfree(ax179_data);
+	ax179_data = NULL;
+
+	return ret;
+}
+
+static int ax88179a_bind(struct usbnet *dev, struct usb_interface *intf)
+{
+	struct usb_device *udev = interface_to_usbdev(intf);
+	struct ax88179_data *ax179_data;
+	int ret;
+
+	/* Check if vendor configuration */
+	if (udev->actconfig->desc.bConfigurationValue != 1) {
+		netdev_info(dev->net, "Switching to vendor mode\n");
+		usb_driver_set_configuration(udev, 1);
+		return -ENODEV;
+	}
+
+	ret = usbnet_get_endpoints(dev, intf);
+	if (ret < 0)
+		return ret;
+
+	ax179_data = kzalloc_obj(*ax179_data);
+	if (!ax179_data)
+		return -ENOMEM;
+
+	dev->driver_priv = ax179_data;
+
+	ret = ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CHIP_STATUS,
+			       1, 1, &ax179_data->chip_version);
+	if (ret < 0)
+		goto err_nodev;
+
+	ax179_data->chip_version = (ax179_data->chip_version & 0xf0) >> 4;
+	ax179_data->is_ax88772d = 0;
+	if (ax179_data->chip_version == AX_VERSION_AX88179A) {
+		if (udev->descriptor.bcdDevice == 0x300)
+			ax179_data->is_ax88772d = 1;
+	}
+
+	for (int i = 0; i < 3; i++) {
+		ret = ax88179_read_cmd(dev, AX88179A_ACCESS_BL, (0xFD + i),
+				       1, 1, &ax179_data->fw_version[i]);
+		if (ret < 0)
+			ax179_data->fw_version[i] = 0xff;
+	}
+	netdev_info(dev->net, "AX88179A/279/772D Chip Version: %x, FW: %d.%d.%d.%d\n",
+		    ax179_data->chip_version,
+		    ax179_data->fw_version[0], ax179_data->fw_version[1],
+		    ax179_data->fw_version[2], ax179_data->fw_version[3]);
+
+	/* The AX88279 requires both the AX_RX_CTL_IPE and AX_RX_CTL_DROPCRCERR
+	 * bits set in AX_RX_CTL for creating correct RX-URBs. AX_RX_CTL_DROPCRCERR
+	 * is anyway set for all chips, make sure AX_RX_CTL_IPE is set via ip_align.
+	 * Also configure eeprom access parameters.
+	 */
+	if (ax179_data->chip_version == AX_VERSION_AX88279) {
+		ax179_data->ip_align = 1;
+		ax179_data->eeprom_read_cmd = AX88179A_FLASH_READ;
+		ax179_data->eeprom_block = 256;
+	} else {
+		ax179_data->ip_align = 0;
+		ax179_data->eeprom_read_cmd = AX_ACCESS_EFUS;
+		ax179_data->eeprom_block = 20;
+	}
+
+	dev->net->netdev_ops = &ax88179_netdev_ops;
+	dev->net->ethtool_ops = &ax88179_ethtool_ops;
+	dev->net->needed_headroom = 8;
+	dev->net->needed_tailroom = 8;
+	dev->net->min_mtu = ETH_MIN_MTU;
+	dev->hard_mtu = 9 * 1024;
+	dev->net->max_mtu = dev->hard_mtu - dev->net->hard_header_len;
+
+	/* Initialize MII structure */
+	dev->mii.dev = dev->net;
+	dev->mii.mdio_read = ax88179_mdio_read;
+	dev->mii.mdio_write = ax88179_mdio_write;
+	dev->mii.phy_id_mask = 0xff;
+	dev->mii.reg_num_mask = 0xff;
+	dev->mii.phy_id = 0x03;
+	if (!ax179_data->is_ax88772d)
+		dev->mii.supports_gmii = 1;
+
+	dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
+			      NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO |
+			      NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
+			      NETIF_F_HW_VLAN_CTAG_FILTER;
+
+	dev->net->hw_features |= dev->net->features;
+
+	dev->net->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
+				  NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
+
+	netif_set_tso_max_size(dev->net, 16384);
+
+	/* Enable Transmission of Link Speed byte in interrupt URB */
+	ax88179_write_cmd(dev, AX_FW_MODE, AX_FW_MODE_179A, 0, 0, NULL);
+	ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0, 0, 0, NULL);
+
+	/* Read MAC address from DTB or ASIX chip */
+	ax88179_get_mac_addr(dev);
+	memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
+
+	return 0;
+
+err_nodev:
+	kfree(ax179_data);
+	ax179_data = NULL;
+
+	return ret;
 }
 
 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
@@ -1338,6 +1960,22 @@ static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
 	kfree(ax179_data);
 }
 
+static void ax88179a_unbind(struct usbnet *dev, struct usb_interface *intf)
+{
+	struct ax88179_data *ax179_data = dev->driver_priv;
+	u16 tmp16;
+	u8 tmp8;
+
+	/* Configure RX control register => stop operation */
+	tmp16 = AX_RX_CTL_STOP;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
+
+	tmp8 = 0;
+	ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &tmp8);
+
+	kfree(ax179_data);
+}
+
 static void
 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
 {
@@ -1354,6 +1992,21 @@ ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
 		skb->ip_summed = CHECKSUM_UNNECESSARY;
 }
 
+static void ax88179a_rx_checksum(struct sk_buff *skb, u64 pkt_desc)
+{
+	u32 pkt_type;
+
+	skb->ip_summed = CHECKSUM_NONE;
+	/* checksum error bit is set */
+	if (pkt_desc & AX179A_RX_PD_L4_ERR || pkt_desc & AX179A_RX_PD_L3_ERR)
+		return;
+
+	pkt_type = pkt_desc & AX179A_RX_PD_L4_TYPE_MASK;
+	/* It must be a TCP or UDP packet with a valid checksum */
+	if (pkt_type == AX179A_RX_PD_L4_TCP || pkt_type == AX179A_RX_PD_L4_UDP)
+		skb->ip_summed = CHECKSUM_UNNECESSARY;
+}
+
 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
 {
 	struct sk_buff *ax_skb;
@@ -1472,6 +2125,121 @@ static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
 	return 0;
 }
 
+static int ax88179a_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
+{
+	struct ax88179_data *ax179_data = dev->driver_priv;
+	struct sk_buff *ax_skb;
+	u32 hdr_off, pkt_end;
+	u64 *pkt_desc_ptr;
+	u16 vlan_tag;
+	u16 pkt_cnt;
+	u64 rx_hdr;
+
+	/* SKB contents for AX179A-based chips:
+	 *   <packet 1>
+	 *   ...
+	 *   <packet N>
+	 *   <per-packet metadata entry 1>
+	 *   ...
+	 *   <per-packet metadata entry N>
+	 *   <rx_hdr>
+	 *
+	 * where:
+	 *   <packet N> contains pkt_len data bytes and padding:
+	 *		2 bytes of IP alignment (optional, depends on AX_RX_CTL_IPE flag)
+	 *		packet data received
+	 *		optional padding to 8-bytes boundary
+	 *   <per-packet metadata entry N> contains 8 bytes:
+	 *		pkt_len and fields AX_RXHDR_*
+	 *   <rx-hdr>	contains 8 bytes:
+	 *		pkt_cnt and hdr_off (offset of <per-packet metadata entry 1>)
+	 *
+	 * pkt_cnt is number of entries in the per-packet metadata array.
+	 */
+
+	if (!skb || skb->len < sizeof(rx_hdr))
+		goto err;
+
+	/* RX Descriptor Header */
+	skb_trim(skb, skb->len - sizeof(rx_hdr));
+	rx_hdr = le64_to_cpup((u64 *)skb_tail_pointer(skb));
+
+	/* Check these packets */
+	hdr_off = (rx_hdr & AX179A_RX_DH_DESC_OFFSET_MASK) >> AX179A_RX_DH_DESC_OFFSET_SHIFT;
+	pkt_cnt = rx_hdr & AX179A_RX_DH_PKT_CNT_MASK;
+
+	/* Consistency check header position */
+	if (hdr_off != skb->len - (pkt_cnt * sizeof(rx_hdr)))
+		goto err;
+
+	/* Make sure that the bounds of the metadata array are inside the SKB
+	 * (and in front of the counter at the end).
+	 */
+	if (pkt_cnt * 8 + hdr_off > skb->len)
+		goto err;
+
+	/* Packets must not overlap the metadata array */
+	skb_trim(skb, hdr_off);
+
+	if (!pkt_cnt)
+		goto err;
+
+	/* Get the first RX packet descriptor */
+	pkt_desc_ptr = (u64 *)(skb->data + hdr_off);
+
+	pkt_end = 0;
+	while (pkt_cnt--) {
+		u64 pkt_desc = le64_to_cpup(pkt_desc_ptr);
+		u32 pkt_len_plus_padd;
+		u32 pkt_len;
+
+		pkt_len = (u32)((pkt_desc & AX179A_RX_PD_LEN_MASK) >> AX179A_RX_PD_LEN_SHIFT)
+			  - (ax179_data->ip_align ? 2 : 0);
+		pkt_len_plus_padd = ((pkt_len + 7 + (ax179_data->ip_align ? 2 : 0)) & 0x7FFF8);
+
+		pkt_end += pkt_len_plus_padd;
+		if (pkt_end > hdr_off || (pkt_cnt == 0 && pkt_end != hdr_off))
+			goto err;
+
+		if (pkt_desc & AX179A_RX_PD_DROP || !(pkt_desc & AX179A_RX_PD_RX_OK) ||
+		    pkt_len > (dev->hard_mtu + AX179A_RX_HW_PAD)) {
+			skb_pull(skb, pkt_len_plus_padd);
+
+			/* Next RX Packet Descriptor */
+			pkt_desc_ptr++;
+			continue;
+		}
+
+		ax_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len);
+		if (!ax_skb)
+			goto err;
+
+		skb_put(ax_skb, pkt_len);
+		memcpy(ax_skb->data, skb->data + (ax179_data->ip_align ? AX179A_RX_HW_PAD : 0),
+		       pkt_len);
+
+		if (ax179_data->rx_checksum)
+			ax88179a_rx_checksum(ax_skb, pkt_desc);
+
+		if (pkt_desc & AX179A_RX_PD_VLAN) {
+			vlan_tag = pkt_desc >> AX179A_RX_PD_VLAN_SHIFT;
+			__vlan_hwaccel_put_tag(ax_skb, htons(ETH_P_8021Q),
+					       vlan_tag & VLAN_VID_MASK);
+		}
+
+		usbnet_skb_return(dev, ax_skb);
+		skb_pull(skb, pkt_len_plus_padd);
+
+		/* Next RX Packet Header */
+		pkt_desc_ptr++;
+	}
+
+	return 1;
+
+err:
+	return 0;
+}
+
 static struct sk_buff *
 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
 {
@@ -1505,6 +2273,59 @@ ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
 	return skb;
 }
 
+static struct sk_buff *
+ax88179a_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
+{
+	u64 tx_desc = skb->len & AX179A_TX_DESC_LEN_MASK;
+	int frame_size = dev->maxpacket;
+	struct sk_buff *ax_skb;
+	u64 *tx_desc_ptr;
+	int padding_size;
+	int headroom;
+	int tailroom;
+	u16 tci = 0;
+
+	/* TSO MSS */
+	tx_desc |= ((u64)(skb_shinfo(skb)->gso_size & AX179A_TX_DESC_MSS_MASK)) <<
+		   AX179A_TX_DESC_MSS_SHIFT;
+
+	headroom = (skb->len + sizeof(tx_desc)) % 8;
+	padding_size = headroom ? 8 - headroom : 0;
+
+	if (((skb->len + sizeof(tx_desc) + padding_size) % frame_size) == 0) {
+		padding_size += 8;
+		tx_desc |= AX179A_TX_DESC_DROP_PADD;
+	}
+
+	if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_TX) && (vlan_get_tag(skb, &tci) >= 0)) {
+		tx_desc |= AX179A_TX_DESC_VLAN;
+		tx_desc |= ((u64)tci & AX179A_TX_DESC_VLAN_MASK) << AX179A_TX_DESC_VLAN_SHIFT;
+	}
+
+	if (!dev->can_dma_sg && (dev->net->features & NETIF_F_SG) && skb_linearize(skb))
+		return NULL;
+
+	headroom = skb_headroom(skb);
+	tailroom = skb_tailroom(skb);
+
+	if (!(headroom >= sizeof(tx_desc) && tailroom >= padding_size)) {
+		ax_skb = skb_copy_expand(skb, sizeof(tx_desc), padding_size, flags);
+		dev_kfree_skb_any(skb);
+		skb = ax_skb;
+		if (!skb)
+			return NULL;
+	}
+	if (padding_size != 0)
+		skb_put_zero(skb, padding_size);
+	/* Copy TX header */
+	tx_desc_ptr = skb_push(skb, sizeof(tx_desc));
+	*tx_desc_ptr = cpu_to_le64(tx_desc);
+
+	usbnet_set_skb_tx_stats(skb, 1, 0);
+
+	return skb;
+}
+
 static int ax88179_link_reset(struct usbnet *dev)
 {
 	struct ax88179_data *ax179_data = dev->driver_priv;
@@ -1580,73 +2401,343 @@ static int ax88179_link_reset(struct usbnet *dev)
 	return 0;
 }
 
+static void ax88179a_bulkin_config(struct usbnet *dev, u8 link_sts)
+{
+	struct ax88179_data *ax179_data = dev->driver_priv;
+	const struct ax_bulkin_settings *bulkin_data;
+	int index = 0;
+
+	switch (ax179_data->speed) {
+	case ETHER_LINK_2500:	/* AX88279 only */
+		index = 0;
+		break;
+
+	case ETHER_LINK_1000:	/* AX88279 & AX88178A */
+		if (ax179_data->chip_version == AX_VERSION_AX88279) {
+			if (link_sts & AX_USB_SS)
+				index = 1;
+			else if (link_sts & AX_USB_HS)
+				index = 2;
+		} else {
+			if (link_sts & AX_USB_SS)
+				index = 0;
+			else if (link_sts & AX_USB_HS)
+				index = 1;
+		}
+		break;
+
+	case ETHER_LINK_100:
+		if (ax179_data->chip_version == AX_VERSION_AX88279) {
+			if (link_sts & AX_USB_SS)
+				index = 3;
+			else if (link_sts & AX_USB_HS)
+				index = 5;
+			if (!ax179_data->full_duplex)
+				index++;
+		} else {
+			/* AX88279A & AX88277D */
+			if (link_sts & AX_USB_SS)
+				index = 2;
+			else if (link_sts & AX_USB_HS)
+				index = 4;
+			if (!ax179_data->full_duplex)
+				index++;
+		}
+		break;
+
+	case ETHER_LINK_10:
+		if (ax179_data->chip_version == AX_VERSION_AX88279)
+			index = 7;
+		else
+			index = 6;
+		break;
+
+	default:	/* No link */
+		index = 0;
+	}
+
+	if (ax179_data->chip_version == AX_VERSION_AX88279 && (link_sts & AX_USB_FS))
+		index = 7;
+
+	if (ax179_data->chip_version == AX_VERSION_AX88279) {
+		bulkin_data = AX88279_BULKIN_SIZE;
+	} else {
+		if (ax179_data->is_ax88772d)
+			bulkin_data = AX88772D_BULKIN_SIZE;
+		else
+			bulkin_data = AX88179A_BULKIN_SIZE;
+	}
+
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, &bulkin_data[index]);
+}
+
+static int ax88179a_link_reset(struct usbnet *dev)
+{
+	struct ax88179_data *ax179_data = dev->driver_priv;
+	u8 tmp8, link_sts, reg8[3];
+	u16 tmp16, mode, speed;
+
+	if (!ax179_data->link) {
+		netdev_info(dev->net, "ax88179a - Link status is: 0\n");
+		return 0;
+	}
+
+	/* Stop RX/TX for link configuration */
+	tmp16 = AX_RX_CTL_STOP;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
+	tmp8 = 0;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, &tmp8);
+
+	tmp8 = 0xa5;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_CDC_DELAY_TX, 1, 1, &tmp8);
+
+	tmp16 = 0x0410;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 2, 2, &tmp16);
+
+	tmp8 = 0;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_ETH_TX_GAP, 1, 1, &tmp8);
+
+	tmp8 = 0x07;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_EP5_EHR, 1, 1, &tmp8);
+
+	tmp8 = 0x28 | AX_NEW_PAUSE_EN;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_NEW_PAUSE_CTRL, 1, 1, &tmp8);
+
+	mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | AX_MEDIUM_RXFLOW_CTRLEN;
+
+	/* Link is up, but some older AX88179A FW versions do not send link speed
+	 * and duplex status in interrupt URB, so read it via MII
+	 */
+	if (!ax179_data->speed) {
+		struct ethtool_link_ksettings cmd;
+
+		mii_ethtool_get_link_ksettings(&dev->mii, &cmd);
+		ax179_data->full_duplex = cmd.base.duplex;
+		switch (cmd.base.speed) {
+		case SPEED_1000:
+			ax179_data->speed = ETHER_LINK_1000;
+			break;
+		case SPEED_100:
+			ax179_data->speed = ETHER_LINK_100;
+			break;
+		case SPEED_10:
+		default:
+			ax179_data->speed = ETHER_LINK_10;
+			break;
+		};
+	}
+
+	speed = 0;
+	switch (ax179_data->speed) {
+	case ETHER_LINK_2500:
+		reg8[0] = 0x00;
+		reg8[1] = 0xF8;
+		reg8[2] = 0x07;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_PAUSE, 3, 3, reg8);
+
+		reg8[0] = 0x78;
+		reg8[1] = (AX_LSOFC_WCNT_7_ACCESS << 5);
+		reg8[2] = 0;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);
+
+		reg8[0] = 0x40;
+		reg8[1] = AX_MAC_MIQFFCTRL_FORMAT | AX_MAC_MIQFFCTRL_DROP_CRC | AX_MAC_LSO_ERR_EN;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 2, 2, reg8);
+
+		tmp8 = AX_XGMII_EN;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, &tmp8);
+
+		tmp8 = 0x1C | AX_LSO_ENHANCE_EN;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_LSO_ENHANCE_CTRL, 1, 1, &tmp8);
+
+		mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_FULL_DUPLEX;
+
+		speed = 2500;
+		break;
+
+	case ETHER_LINK_1000:
+		mode |= AX_MEDIUM_GIGAMODE;
+		speed = 1000;
+		fallthrough;
+
+	case ETHER_LINK_100:
+		reg8[0] = 0x78;
+		reg8[1] = (AX_LSOFC_WCNT_7_ACCESS << 5) | AX_GMII_CRC_APPEND;
+		reg8[2] = 0;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);
+
+		tmp8 = 0x40;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, &tmp8);
+
+		speed = speed ? speed : 100;
+		break;
+
+	case ETHER_LINK_10:
+		reg8[0] = 0xFA;
+		reg8[1] = (AX_LSOFC_WCNT_7_ACCESS << 5) | AX_GMII_CRC_APPEND;
+		reg8[2] = 0xFF;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_STATUS_CDC, 3, 3, reg8);
+
+		tmp8 = 0xFA;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_RX_DATA_CDC_CNT, 1, 1, &tmp8);
+
+		speed = 10;
+		break;
+	}
+
+	ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS, 1, 1, &link_sts);
+	ax88179a_bulkin_config(dev, link_sts);
+
+	if (ax179_data->chip_version < AX_VERSION_AX88279) {
+		tmp8 = 0;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_BFM_DATA, 1, 1, &tmp8);
+	}
+
+	if (ax179_data->full_duplex)
+		mode |= AX_MEDIUM_FULL_DUPLEX;
+
+	if (dev->net->mtu > 1500)
+		mode |= AX_MEDIUM_JUMBO_EN;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &mode);
+
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &ax179_data->rxctl);
+
+	tmp8 = AX_MAC_RX_PATH_READY | AX_MAC_TX_PATH_READY;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_PATH, 1, 1, &tmp8);
+
+	ax179_data->eee_enabled = ax88179_chk_eee(dev);
+
+	netif_carrier_on(dev->net);
+
+	netdev_info(dev->net, "ax88179a - Link status is: 1, Link speed: %d, Duplex: %d\n",
+		    speed, ax179_data->full_duplex);
+
+	return 0;
+}
+
 static int ax88179_reset(struct usbnet *dev)
 {
-	u8 buf[5];
-	u16 *tmp16;
-	u8 *tmp;
 	struct ax88179_data *ax179_data = dev->driver_priv;
 	struct ethtool_keee eee_data;
+	u16 *tmp16;
+	u8 buf[5];
+	u8 *tmp;
 
 	tmp16 = (u16 *)buf;
 	tmp = (u8 *)buf;
 
 	/* Power up ethernet PHY */
-	*tmp16 = 0;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
+	if (ax179_data->chip_version < AX_VERSION_AX88179A) {
+		*tmp16 = 0;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
 
-	*tmp16 = AX_PHYPWR_RSTCTL_IPRL;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
-	msleep(500);
+		*tmp16 = AX_PHYPWR_RSTCTL_IPRL;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
+		msleep(500);
 
-	*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
-	msleep(200);
+		*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
+		msleep(200);
+	} else {
+		*tmp = AX_PHY_POWER;
+		ax88179_write_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, tmp);
+		msleep(250);
+	}
+
+	if (ax179_data->chip_version == AX_VERSION_AX88279) {
+		*tmp16 = ax88179_mdio_read(dev->net, dev->mii.phy_id, MII_ADVERTISE);
+		*tmp16 &= ~(ADVERTISE_10FULL | ADVERTISE_10HALF);
+		*tmp16 |= ADVERTISE_RESV; /* Advertise 2.5GBit link */
+		ax88179_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, *tmp16);
+	}
 
 	/* Ethernet PHY Auto Detach*/
 	ax88179_auto_detach(dev);
 
+	if (ax179_data->chip_version >= AX_VERSION_AX88179A) {
+		*tmp = AX_MAC_EFF_EN;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BULK_OUT_CTRL, 1, 1, tmp);
+
+		*tmp16 = 0;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
+
+		*tmp = 0x04;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
+		*tmp = 0x10;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);
+
+		*tmp = 0;
+		if (dev->net->features & NETIF_F_HW_VLAN_CTAG_FILTER)
+			*tmp |= AX_VLAN_CONTROL_VFE;
+		if (dev->net->features & NETIF_F_HW_VLAN_CTAG_RX)
+			*tmp |= AX_VLAN_CONTROL_VSO;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_VLAN_ID_CONTROL, 1, 1, tmp);
+
+		*tmp = 0xff;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_INT_MASK, 1, 1, tmp);
+
+		*tmp = 0;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_RX_DMA_CTL, 1, 1, tmp);
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_BM_TX_DMA_CTL, 1, 1, tmp);
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_ARC_CTRL, 1, 1, tmp);
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_SWP_CTRL, 1, 1, tmp);
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX88179A_MAC_TX_HDR_CKSUM, 1, 1, tmp);
+	}
+
 	/* Read MAC address from DTB or asix chip */
 	ax88179_get_mac_addr(dev);
 	memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
 
 	/* RX bulk configuration */
-	memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
-
-	dev->rx_urb_size = 1024 * 20;
-
-	*tmp = 0x34;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
-
-	*tmp = 0x52;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
-			  1, 1, tmp);
+	if (ax179_data->chip_version < AX_VERSION_AX88179A) {
+		memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
+		*tmp = 0x34;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
+
+		*tmp = 0x52;
+		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
+				  1, 1, tmp);
+		dev->rx_urb_size = 1024 * 20;
+	} else {
+		/* The Bulk-Register configuration for the AX88179A is done in
+		 * ax88179a_link_reset(), once the link is up for a given link and USB-speed.
+		 */
+		if (ax179_data->is_ax88772d)
+			dev->rx_urb_size = 1024 * 24;
+		else
+			dev->rx_urb_size = 1024 * 48;
+	}
 
 	/* Enable checksum offload */
 	*tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
 	       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
+	ax179_data->rx_checksum = 1;
 
 	*tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
 	       AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
 
 	/* Configure RX control register => start operation */
-	*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
-		 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
-
-	*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
-	       AX_MONITOR_MODE_RWMP;
+	ax179_data->rxctl = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_START |
+			    AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
+	if (ax179_data->ip_align)
+		ax179_data->rxctl |= AX_RX_CTL_IPE;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &ax179_data->rxctl);
+
+	if (ax179_data->chip_version < AX_VERSION_AX88179A)
+		*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL | AX_MONITOR_MODE_RWMP;
+	else
+		*tmp = AX_MONITOR_MODE_RWMP;
 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
 
 	/* Configure default medium type => giga */
 	*tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
-		 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
-		 AX_MEDIUM_GIGAMODE;
-	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
-			  2, 2, tmp16);
+		 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX;
+	if (!ax179_data->is_ax88772d)
+		*tmp16 |= AX_MEDIUM_GIGAMODE;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);
 
 	/* Check if WoL is supported */
 	ax179_data->wol_supported = 0;
@@ -1654,16 +2745,29 @@ static int ax88179_reset(struct usbnet *dev)
 			     1, 1, &tmp) > 0)
 		ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
 
-	ax88179_led_setting(dev);
+	/* For chips starting with AX88179A, LEDS are configured by the adapter
+	 * firmware directly from EEPROM/EFUSE values
+	 */
+	if (ax179_data->chip_version < AX_VERSION_AX88179A)
+		ax88179_led_setting(dev);
 
 	ax179_data->eee_enabled = 0;
 	ax179_data->eee_active = 0;
 
-	ax88179_disable_eee(dev);
+	if (ax179_data->chip_version < AX_VERSION_AX88179A) {
+		ax88179_eee_config(dev, false);
 
-	ax88179_ethtool_get_eee(dev, &eee_data);
-	linkmode_zero(eee_data.advertised);
-	ax88179_ethtool_set_eee(dev, &eee_data);
+		ax88179_ethtool_get_eee(dev, &eee_data);
+		linkmode_zero(eee_data.advertised);
+		ax88179_ethtool_set_eee(dev, &eee_data);
+	} else {
+		ax88179_eee_config(dev, true);
+		ax88179_ethtool_get_eee(dev, &eee_data);
+		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised);
+		if (ax179_data->chip_version >= AX_VERSION_AX88279)
+			linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, eee_data.advertised);
+		ax88179_ethtool_set_eee(dev, &eee_data);
+	}
 
 	/* Restart autoneg */
 	mii_nway_restart(&dev->mii);
@@ -1707,6 +2811,24 @@ static int ax88179_stop(struct usbnet *dev)
 	return 0;
 }
 
+static int ax88179a_stop(struct usbnet *dev)
+{
+	u16 reg16;
+	u8 reg8;
+
+	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &reg16);
+	reg16 &= ~AX_MEDIUM_RECEIVE_EN;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, &reg16);
+
+	reg16 = 0;
+	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &reg16);
+
+	reg8 = 0;
+	ax88179_read_cmd(dev, AX88179A_PHY_POWER, 0, 0, 1, &reg8);
+
+	return 0;
+}
+
 static const struct driver_info ax88179_info = {
 	.description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
 	.bind = ax88179_bind,
@@ -1733,6 +2855,45 @@ static const struct driver_info ax88178a_info = {
 	.tx_fixup = ax88179_tx_fixup,
 };
 
+static const struct driver_info ax88179a_info = {
+	.description = "ASIX AX88179A USB 3.2 Gigabit Ethernet",
+	.bind = ax88179a_bind,
+	.unbind = ax88179a_unbind,
+	.status = ax88179_status,
+	.link_reset = ax88179a_link_reset,
+	.reset = ax88179_reset,
+	.stop = ax88179a_stop,
+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET | FLAG_AVOID_UNLINK_URBS,
+	.rx_fixup = ax88179a_rx_fixup,
+	.tx_fixup = ax88179a_tx_fixup,
+};
+
+static const struct driver_info ax88772d_info = {
+	.description = "ASIX AX88772D/E USB 2.0 Fast Ethernet",
+	.bind = ax88179a_bind,
+	.unbind = ax88179a_unbind,
+	.status = ax88179_status,
+	.link_reset = ax88179a_link_reset,
+	.reset = ax88179_reset,
+	.stop = ax88179a_stop,
+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET | FLAG_AVOID_UNLINK_URBS,
+	.rx_fixup = ax88179a_rx_fixup,
+	.tx_fixup = ax88179a_tx_fixup,
+};
+
+static const struct driver_info ax88279_info = {
+	.description = "ASIX AX88279 USB 3.2 2.5Gigabit Ethernet",
+	.bind = ax88179a_bind,
+	.unbind = ax88179a_unbind,
+	.status = ax88179_status,
+	.link_reset = ax88179a_link_reset,
+	.reset = ax88179_reset,
+	.stop = ax88179a_stop,
+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET | FLAG_AVOID_UNLINK_URBS,
+	.rx_fixup = ax88179a_rx_fixup,
+	.tx_fixup = ax88179a_tx_fixup,
+};
+
 static const struct driver_info cypress_GX3_info = {
 	.description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
 	.bind = ax88179_bind,
@@ -1878,6 +3039,18 @@ static const struct driver_info at_umc2000sp_info = {
 
 static const struct usb_device_id products[] = {
 {
+	/* ASIX AX88179A/B USB 3.2 Gigabit Ethernet */
+	USB_DEVICE_VER(0x0b95, 0x1790, 0x0200, 0x0200),
+	.driver_info = (unsigned long)&ax88179a_info,
+}, {
+	/* ASIX AX88772D USB 2.0 100Mbit Ethernet */
+	USB_DEVICE_VER(0x0b95, 0x1790, 0x0300, 0x0300),
+	.driver_info = (unsigned long)&ax88772d_info,
+}, {
+	/* ASIX AX88279 USB 3.2 2.5GBit Ethernet */
+	USB_DEVICE_VER(0x0b95, 0x1790, 0x0400, 0x0400),
+	.driver_info = (unsigned long)&ax88279_info,
+}, {
 	/* ASIX AX88179 10/100/1000 */
 	USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
 	.driver_info = (unsigned long)&ax88179_info,