Subject KVM: arm64: Add GICv5 IRS support
Author sascha.bischoff@arm.com
Date 2026-07-24 10:48:40 +0000 UTC
Version
Cc fuad.tabba@linux.dev joey.gouly@arm.com kvm@vger.kernel.org kvmarm@lists.linux.dev linux-arm-kernel@lists.infradead.org lpieralisi@kernel.org maz@kernel.org nd@arm.com oliver.upton@linux.dev peter.maydell@linaro.org sascha.bischoff@arm.com suzuki.poulose@arm.com timothy.hayes@arm.com yuzenghui@huawei.com
Patches (48)
Name Content [All]
[PATCH v4 01/48] irqchip/gic-v5: Allow KVM setup without a maintenance IRQ [Body]
[PATCH v4 02/48] irqchip/gic-v5: Provide OF IRS config frame attrs to KVM [Body]
[PATCH v4 03/48] irqchip/gic-v5: Set up gic_kvm_info on ACPI hosts [Body]
[PATCH v4 04/48] KVM: arm64: gic-v5: Define remaining IRS MMIO registers [Body]
[PATCH v4 05/48] arm64/sysreg: Add GICv5 GIC VDPEND encoding [Body]
[PATCH v4 06/48] arm64/sysreg: Update ICC_CR0_EL1 with LINK and LINK_IDLE fields [Body]
[PATCH v4 07/48] KVM: arm64: gic-v5: Extract host IRS caps from IRS config frame [Body]
[PATCH v4 08/48] KVM: arm64: gic-v5: Add VPE doorbell domain [Body]
[PATCH v4 09/48] KVM: arm64: gic-v5: Create and manage VM and VPE tables [Body]
[PATCH v4 10/48] KVM: arm64: gic-v5: Introduce guest IST alloc and management [Body]
[PATCH v4 11/48] KVM: arm64: gic-v5: Implement VMT/vIST IRS MMIO Ops [Body]
[PATCH v4 12/48] KVM: arm64: gic-v5: Keep GICv5 vCPU limit model-specific [Body]
[PATCH v4 13/48] KVM: arm64: gic-v5: Implement VPE IRS MMIO Ops [Body]
[PATCH v4 14/48] KVM: arm64: gic-v5: Set up VMTEs and VPE doorbells [Body]
[PATCH v4 15/48] KVM: arm64: gic-v5: Add resident/non-resident hyp calls [Body]
[PATCH v4 16/48] KVM: arm64: gic-v5: Request doorbells when VPEs enter WFI [Body]
[PATCH v4 17/48] KVM: arm64: gic-v5: Introduce struct vgic_v5_irs and IRS base address [Body]
[PATCH v4 18/48] KVM: arm64: gic-v5: Add IRS IODEV support to MMIO handlers [Body]
[PATCH v4 19/48] KVM: arm64: gic-v5: Add KVM_VGIC_V5_ADDR_TYPE_IRS to UAPI [Body]
[PATCH v4 20/48] KVM: arm64: gic-v5: Add GICv5 IRS IODEV and MMIO emulation [Body]
[PATCH v4 21/48] KVM: arm64: gic-v5: Initialise per-VM IRS state [Body]
[PATCH v4 22/48] KVM: arm64: gic-v5: Register the IRS IODEV [Body]
[PATCH v4 23/48] KVM: arm64: gic-v5: Set IRICHPPIDIS based on IRS enable state [Body]
[PATCH v4 24/48] KVM: arm64: selftests: Update vGICv5 selftest to set IRS address [Body]
[PATCH v4 25/48] KVM: arm64: gic-v5: Add GIC VDPEND hyp call [Body]
[PATCH v4 26/48] KVM: arm64: gic: Introduce set_pending_state() to irq_op [Body]
[PATCH v4 27/48] KVM: arm64: gic-v5: Support SPI injection [Body]
[PATCH v4 28/48] Documentation: KVM: Extend VGICv5 device attribute docs [Body]
[PATCH v4 29/48] KVM: arm64: gic-v5: Add GICv5 SPI injection to irqfd [Body]
[PATCH v4 30/48] KVM: arm64: gic-v5: Mask per-vcpu PPI state in vgic_v5_finalize_ppi_state() [Body]
[PATCH v4 31/48] KVM: arm64: gic-v5: Add GICv5 EL1 sysreg userspace accessors [Body]
[PATCH v4 32/48] KVM: arm64: gic-v5: Handle userspace accesses to IRS MMIO region [Body]
[PATCH v4 33/48] KVM: arm64: gic-v5: Add CoreSight MMIO regs to IRS [Body]
[PATCH v4 34/48] KVM: arm64: gic-v5: Add VGICv5 IST save/restore UAPI [Body]
[PATCH v4 35/48] KVM: arm64: gic-v5: Implement save/restore mechanisms for ISTs [Body]
[PATCH v4 36/48] Documentation: KVM: Document KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS for VGICv5 [Body]
[PATCH v4 37/48] Documentation: KVM: Add KVM_DEV_ARM_VGIC_GRP_IRS_REGS to VGICv5 docs [Body]
[PATCH v4 38/48] Documentation: KVM: Add docs for KVM_DEV_ARM_VGIC_GRP_IST [Body]
[PATCH v4 39/48] Documentation: KVM: Add the VGICv5 IRS save/restore sequences [Body]
[PATCH v4 40/48] KVM: selftests: Add VGICv5 IRS address attribute tests [Body]
[PATCH v4 41/48] KVM: selftests: Add VGICv5 NR_IRQS attribute tests [Body]
[PATCH v4 42/48] KVM: selftests: Add VGICv5 IRS_REGS attribute tests [Body]
[PATCH v4 43/48] KVM: selftests: Add VGICv5 IST attribute tests [Body]
[PATCH v4 44/48] KVM: selftests: Add VGICv5 USERSPACE_PPIS tests [Body]
[PATCH v4 45/48] KVM: selftests: Add VGICv5 CPU sysreg attribute tests [Body]
[PATCH v4 46/48] KVM: selftests: Add VGICv5 SPI injection tests [Body]
[PATCH v4 47/48] KVM: selftests: Add VGICv5 LPI delivery tests [Body]
[PATCH v4 48/48] KVM: selftests: Add VGICv5 IST save/restore coverage [Body]
Series Summary
Passed
✓ All tests passed. No findings.
Sessions
Session 2026-07-24
Passed
ID (for dev) ee971ec2-bd03-4587-a63c-55c0481f4cee
Status finished
Triaged OK [Log] [Trajectory]
Execution Log [Link]
Test Base Patched Verdict