Configuring GICv3 to deal with the lack of GIC in the guest relies on not setting ICH_HCR_EL2.En in the shadow register, as this is an indication of the fact that we want to trap all system registers to report an UNDEF in the guest. Make sure we leave vgic_hcr untouched in this case. Reported-by: Mark Brown Closes: https://lore.kernel.org/r/72e1e8b5-e397-4dc5-9cd6-a32b6af3d739@sirena.org.uk Fixes: 877324a1b5415 ("KVM: arm64: Revamp vgic maintenance interrupt configuration") Signed-off-by: Marc Zyngier --- arch/arm64/kvm/vgic/vgic-v3.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c index 598621b14a30d..1d6dd1b545bdd 100644 --- a/arch/arm64/kvm/vgic/vgic-v3.c +++ b/arch/arm64/kvm/vgic/vgic-v3.c @@ -26,6 +26,9 @@ void vgic_v3_configure_hcr(struct kvm_vcpu *vcpu, { struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3; + if (!irqchip_in_kernel(vcpu->kvm)) + return; + cpuif->vgic_hcr = ICH_HCR_EL2_En; if (irqs_pending_outside_lrs(als)) -- 2.47.3