Syzbot CI

Subject	vfio/pci: Add CXL Type-2 device passthrough support
Author	mhonap@nvidia.com
Date	2026-06-25 16:53:57 +0000 UTC
Version
Cc	alejandro.lucero-palau@amd.com alex@shazbot.org alison.schofield@intel.com ankita@nvidia.com cjia@nvidia.com dave.jiang@intel.com dave@stgolabs.net djbw@kernel.org dmatlack@google.com gourry@gourry.net ira.weiny@intel.com jgg@ziepe.ca jic23@kernel.org kjaju@nvidia.com kvm@vger.kernel.org linux-cxl@vger.kernel.org linux-doc@vger.kernel.org linux-kernel@vger.kernel.org linux-kselftest@vger.kernel.org mhonap@nvidia.com vsethi@nvidia.com zhiw@nvidia.com

Patches (11)

Expand

Name	Content [All]
[PATCH v3 01/11] cxl: Add cxl_get_hdm_info() helper for HDM decoder metadata	[Body]
[PATCH v3 02/11] cxl: Split cxl_await_range_active() from media-ready wait	[Body]
[PATCH v3 03/11] cxl: Record BIR and BAR offset in cxl_register_map	[Body]
[PATCH v3 04/11] cxl: Move component/HDM register defines to uapi/cxl/cxl_regs.h	[Body]
[PATCH v3 05/11] vfio: UAPI for CXL Type-2 device passthrough	[Body]
[PATCH v3 06/11] cxl: Add register-virtualization helpers for vfio Type-2 passthrough	[Body]
[PATCH v3 07/11] vfio/pci: Add CONFIG_VFIO_PCI_CXL with bind-time CXL Type-2 acquisition	[Body]
[PATCH v3 08/11] vfio/pci/cxl: Add HDM + COMP_REGS regions and DVSEC clipping shim	[Body]
[PATCH v3 09/11] selftests/vfio: Add CXL Type-2 device passthrough smoke test	[Body]
[PATCH v3 10/11] docs: vfio-pci: Document CXL Type-2 device passthrough	[Body]
[PATCH v3 11/11] vfio/pci: Provide opt-out for CXL Type-2 extensions	[Body]

Series Summary

skipped

Session skipped: failed to find a base commit: series does not apply

Sessions

Session 2026-06-25

skipped

ID (for dev)	f329d93d-c87a-4694-9dd0-8139e09c1295
Status	skipped
Triaged	Skipped: failed to find a base commit: series does not apply [Log]
Execution Log	[Link]

Test	Base	Patched	Verdict