Move ingenic_mac_init() to between variant specific set_mode() implementations and ingenic_mac_probe(). No code changes. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 28 +++++++++---------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index c1670f6bae14..8d0627055799 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -71,20 +71,6 @@ struct ingenic_soc_info { int (*set_mode)(struct plat_stmmacenet_data *plat_dat); }; -static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv) -{ - struct ingenic_mac *mac = bsp_priv; - int ret; - - if (mac->soc_info->set_mode) { - ret = mac->soc_info->set_mode(mac->plat_dat); - if (ret) - return ret; - } - - return 0; -} - static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) { struct ingenic_mac *mac = plat_dat->bsp_priv; @@ -234,6 +220,20 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } +static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv) +{ + struct ingenic_mac *mac = bsp_priv; + int ret; + + if (mac->soc_info->set_mode) { + ret = mac->soc_info->set_mode(mac->plat_dat); + if (ret) + return ret; + } + + return 0; +} + static int ingenic_mac_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat_dat; -- 2.47.3 All paths configure the transmit clock as an input. Move this out of the switch() statement to simplify the code. Signed-off-by: Russell King (Oracle) --- .../net/ethernet/stmicro/stmmac/dwmac-ingenic.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 8d0627055799..c6c82f277f62 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -78,20 +78,17 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_MII: - val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); break; case PHY_INTERFACE_MODE_GMII: - val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_GMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_GMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); break; case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -99,8 +96,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); break; @@ -110,6 +106,8 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } + val |= FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT); + /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -- 2.47.3 Use the common dwmac definitions for the PHY interface selection field. Signed-off-by: Russell King (Oracle) --- drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index c6c82f277f62..5de2bd984d34 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -35,10 +35,10 @@ #define MACPHYC_RX_DELAY_MASK GENMASK(10, 4) #define MACPHYC_SOFT_RST_MASK GENMASK(3, 3) #define MACPHYC_PHY_INFT_MASK GENMASK(2, 0) -#define MACPHYC_PHY_INFT_RMII 0x4 -#define MACPHYC_PHY_INFT_RGMII 0x1 -#define MACPHYC_PHY_INFT_GMII 0x0 -#define MACPHYC_PHY_INFT_MII 0x0 +#define MACPHYC_PHY_INFT_RMII PHY_INTF_SEL_RMII +#define MACPHYC_PHY_INFT_RGMII PHY_INTF_SEL_RGMII +#define MACPHYC_PHY_INFT_GMII PHY_INTF_SEL_GMII_MII +#define MACPHYC_PHY_INFT_MII PHY_INTF_SEL_GMII_MII #define MACPHYC_TX_DELAY_PS_MAX 2496 #define MACPHYC_TX_DELAY_PS_MIN 20 -- 2.47.3 Use the PHY_INTF_SEL_x values directly in each of the mac_set_mode methods rather than the driver private MACPHYC_PHY_INFT_x definitions. Remove the MACPHYC_PHY_INFT_x definitions. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 20 ++++++++----------- 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 5de2bd984d34..b56d7ada1939 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -35,10 +35,6 @@ #define MACPHYC_RX_DELAY_MASK GENMASK(10, 4) #define MACPHYC_SOFT_RST_MASK GENMASK(3, 3) #define MACPHYC_PHY_INFT_MASK GENMASK(2, 0) -#define MACPHYC_PHY_INFT_RMII PHY_INTF_SEL_RMII -#define MACPHYC_PHY_INFT_RGMII PHY_INTF_SEL_RGMII -#define MACPHYC_PHY_INFT_GMII PHY_INTF_SEL_GMII_MII -#define MACPHYC_PHY_INFT_MII PHY_INTF_SEL_GMII_MII #define MACPHYC_TX_DELAY_PS_MAX 2496 #define MACPHYC_TX_DELAY_PS_MIN 20 @@ -78,17 +74,17 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_MII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_GMII_MII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); break; case PHY_INTERFACE_MODE_GMII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_GMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_GMII_MII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); break; case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -96,7 +92,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RGMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); break; @@ -138,7 +134,7 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -160,7 +156,7 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -183,7 +179,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -191,7 +187,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RGMII); if (mac->tx_delay == 0) val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN); -- 2.47.3 Move the preparation of the PHY_INTF_SEL_x bitfield out of the switch() statement such that it only appears once. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 34 +++++++++++++------ 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index b56d7ada1939..6680f7d3a469 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -71,20 +71,21 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; + u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_MII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_GMII_MII); + phy_intf_sel = PHY_INTF_SEL_GMII_MII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); break; case PHY_INTERFACE_MODE_GMII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_GMII_MII); + phy_intf_sel = PHY_INTF_SEL_GMII_MII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); break; case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); + phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -92,7 +93,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RGMII); + phy_intf_sel = PHY_INTF_SEL_RGMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); break; @@ -102,7 +103,8 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } - val |= FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT); + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel) | + FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT); /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); @@ -131,10 +133,11 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; + u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); + phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -144,6 +147,8 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); + /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } @@ -152,11 +157,12 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; + u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); + val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII); + phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -166,6 +172,8 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } + val |= FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); + /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } @@ -174,12 +182,13 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; + u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | - FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) | - FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RMII); + FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); + phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -187,7 +196,8 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, PHY_INTF_SEL_RGMII); + val = 0; + phy_intf_sel = PHY_INTF_SEL_RGMII; if (mac->tx_delay == 0) val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN); @@ -210,6 +220,8 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return -EINVAL; } + val |= FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); + /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -- 2.47.3 Use stmmac_get_phy_intf_sel() to decode the PHY interface mode to the phy_intf_sel value, validate the result against the SoC specific supported phy_intf_sel values, and pass into the SoC specific set_mode() methods, replacing the local phy_intf_sel variable. This provides the value for the MACPHYC_PHY_INFT_MASK field. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 55 ++++++++++++------- 1 file changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 6680f7d3a469..79735a476e86 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -64,28 +64,27 @@ struct ingenic_soc_info { enum ingenic_mac_version version; u32 mask; - int (*set_mode)(struct plat_stmmacenet_data *plat_dat); + int (*set_mode)(struct plat_stmmacenet_data *plat_dat, u8 phy_intf_sel); + + u8 valid_phy_intf_sel; }; -static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat, + u8 phy_intf_sel) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_MII: - phy_intf_sel = PHY_INTF_SEL_GMII_MII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); break; case PHY_INTERFACE_MODE_GMII: - phy_intf_sel = PHY_INTF_SEL_GMII_MII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); break; case PHY_INTERFACE_MODE_RMII: - phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -93,7 +92,6 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - phy_intf_sel = PHY_INTF_SEL_RGMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); break; @@ -110,7 +108,8 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, + u8 phy_intf_sel) { struct ingenic_mac *mac = plat_dat->bsp_priv; @@ -129,15 +128,14 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, 0); } -static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat, + u8 phy_intf_sel) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: - phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -153,16 +151,15 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat, + u8 phy_intf_sel) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII); - phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -178,17 +175,16 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, + u8 phy_intf_sel) { struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - u8 phy_intf_sel; switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); - phy_intf_sel = PHY_INTF_SEL_RMII; dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; @@ -197,8 +193,6 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: val = 0; - phy_intf_sel = PHY_INTF_SEL_RGMII; - if (mac->tx_delay == 0) val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN); else @@ -229,10 +223,21 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv) { struct ingenic_mac *mac = bsp_priv; - int ret; + phy_interface_t interface; + int phy_intf_sel, ret; if (mac->soc_info->set_mode) { - ret = mac->soc_info->set_mode(mac->plat_dat); + interface = mac->plat_dat->phy_interface; + + phy_intf_sel = stmmac_get_phy_intf_sel(interface); + if (phy_intf_sel < 0 || phy_intf_sel >= BITS_PER_BYTE || + ~mac->soc_info->valid_phy_intf_sel & BIT(phy_intf_sel)) { + dev_err(mac->dev, "unsupported interface %s\n", + phy_modes(interface)); + return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL; + } + + ret = mac->soc_info->set_mode(mac->plat_dat, phy_intf_sel); if (ret) return ret; } @@ -309,6 +314,9 @@ static struct ingenic_soc_info jz4775_soc_info = { .mask = MACPHYC_TXCLK_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, .set_mode = jz4775_mac_set_mode, + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_GMII_MII) | + BIT(PHY_INTF_SEL_RGMII) | + BIT(PHY_INTF_SEL_RMII), }; static struct ingenic_soc_info x1000_soc_info = { @@ -316,6 +324,7 @@ static struct ingenic_soc_info x1000_soc_info = { .mask = MACPHYC_SOFT_RST_MASK, .set_mode = x1000_mac_set_mode, + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII), }; static struct ingenic_soc_info x1600_soc_info = { @@ -323,6 +332,7 @@ static struct ingenic_soc_info x1600_soc_info = { .mask = MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, .set_mode = x1600_mac_set_mode, + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII), }; static struct ingenic_soc_info x1830_soc_info = { @@ -330,6 +340,7 @@ static struct ingenic_soc_info x1830_soc_info = { .mask = MACPHYC_MODE_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, .set_mode = x1830_mac_set_mode, + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII), }; static struct ingenic_soc_info x2000_soc_info = { @@ -338,6 +349,8 @@ static struct ingenic_soc_info x2000_soc_info = { MACPHYC_RX_DELAY_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, .set_mode = x2000_mac_set_mode, + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RGMII) | + BIT(PHY_INTF_SEL_RMII), }; static const struct of_device_id ingenic_mac_of_matches[] = { -- 2.47.3 Move the printing of the MAC PHY control register interface mode setting into ingenic_set_phy_intf_sel(), and use phy_modes() to print the string rather than using the enum name. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 79735a476e86..539513890db1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -77,22 +77,12 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat, switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_MII: - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); - break; - case PHY_INTERFACE_MODE_GMII: - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); - break; - case PHY_INTERFACE_MODE_RMII: - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); - break; - case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: case PHY_INTERFACE_MODE_RGMII_RXID: - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); break; default: @@ -115,7 +105,6 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; default: @@ -136,7 +125,6 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat, switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; default: @@ -160,7 +148,6 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat, switch (plat_dat->phy_interface) { case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII); - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; default: @@ -185,7 +172,6 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, case PHY_INTERFACE_MODE_RMII: val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); break; case PHY_INTERFACE_MODE_RGMII: @@ -205,7 +191,6 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) | FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1); - dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); break; default: @@ -237,6 +222,9 @@ static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv) return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL; } + dev_dbg(mac->dev, "MAC PHY control register: interface %s\n", + phy_modes(interface)); + ret = mac->soc_info->set_mode(mac->plat_dat, phy_intf_sel); if (ret) return ret; -- 2.47.3 x1000, x1600 and x1830 only accept RMII mode. PHY_INTF_SEL_RMII is only selected with PHY_INTERFACE_MODE_RMII, and PHY_INTF_SEL_RMII has been validated by the SoC's .valid_phy_intf_sel bitmask. Thus, checking the interface mode in these functions becomes unnecessary. Remove these. jz4775 is similar, except for a greater set of PHY_INTF_SEL_x valies. Also remove the switch statement here. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 50 +------------------ 1 file changed, 2 insertions(+), 48 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 539513890db1..7b2576fbb1e1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -75,22 +75,6 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat, struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - switch (plat_dat->phy_interface) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RMII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_TXID: - case PHY_INTERFACE_MODE_RGMII_RXID: - break; - - default: - dev_err(mac->dev, "Unsupported interface %s\n", - phy_modes(plat_dat->phy_interface)); - return -EINVAL; - } - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel) | FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT); @@ -103,16 +87,6 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, { struct ingenic_mac *mac = plat_dat->bsp_priv; - switch (plat_dat->phy_interface) { - case PHY_INTERFACE_MODE_RMII: - break; - - default: - dev_err(mac->dev, "Unsupported interface %s\n", - phy_modes(plat_dat->phy_interface)); - return -EINVAL; - } - /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, 0); } @@ -123,16 +97,6 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat, struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - switch (plat_dat->phy_interface) { - case PHY_INTERFACE_MODE_RMII: - break; - - default: - dev_err(mac->dev, "Unsupported interface %s\n", - phy_modes(plat_dat->phy_interface)); - return -EINVAL; - } - val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); /* Update MAC PHY control register */ @@ -145,18 +109,8 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat, struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - switch (plat_dat->phy_interface) { - case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII); - break; - - default: - dev_err(mac->dev, "Unsupported interface %s\n", - phy_modes(plat_dat->phy_interface)); - return -EINVAL; - } - - val |= FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); + val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); -- 2.47.3 As per the previous commit, we have validated that the phy_intf_sel value is one that is permissible for this SoC, so there is no need to handle invalid PHY interface modes. We can also apply the other configuration based upon the phy_intf_sel value rather than the PHY interface mode. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 28 +++++-------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 7b2576fbb1e1..eb5744e0b9ea 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -122,39 +122,25 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; - switch (plat_dat->phy_interface) { - case PHY_INTERFACE_MODE_RMII: - val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | - FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); - break; - - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_TXID: - case PHY_INTERFACE_MODE_RGMII_RXID: - val = 0; + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); + + if (phy_intf_sel == PHY_INTF_SEL_RMII) { + val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | + FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); + } else if (phy_intf_sel == PHY_INTF_SEL_RGMII) { if (mac->tx_delay == 0) val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN); else val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_DELAY) | - FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac->tx_delay + 9750) / 19500 - 1); + FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac->tx_delay + 9750) / 19500 - 1); if (mac->rx_delay == 0) val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); else val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) | FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1); - - break; - - default: - dev_err(mac->dev, "Unsupported interface %s\n", - phy_modes(plat_dat->phy_interface)); - return -EINVAL; } - val |= FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); - /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -- 2.47.3 It no longer makes sense to pass a pointer to struct plat_stmmacenet_data when calling the set_mode() methods to only use it to get a pointer to the ingenic_mac structure that we already had in the caller. Simplify this by passing the struct ingenic_mac pointer. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 25 ++++++------------- 1 file changed, 7 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index eb5744e0b9ea..41a2071262bc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -64,15 +64,13 @@ struct ingenic_soc_info { enum ingenic_mac_version version; u32 mask; - int (*set_mode)(struct plat_stmmacenet_data *plat_dat, u8 phy_intf_sel); + int (*set_mode)(struct ingenic_mac *mac, u8 phy_intf_sel); u8 valid_phy_intf_sel; }; -static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat, - u8 phy_intf_sel) +static int jz4775_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel) { - struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel) | @@ -82,19 +80,14 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat, return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, - u8 phy_intf_sel) +static int x1000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel) { - struct ingenic_mac *mac = plat_dat->bsp_priv; - /* Update MAC PHY control register */ return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, 0); } -static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat, - u8 phy_intf_sel) +static int x1600_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel) { - struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); @@ -103,10 +96,8 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat, return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat, - u8 phy_intf_sel) +static int x1830_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel) { - struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) | @@ -116,10 +107,8 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat, return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat, - u8 phy_intf_sel) +static int x2000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel) { - struct ingenic_mac *mac = plat_dat->bsp_priv; unsigned int val; val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel); @@ -165,7 +154,7 @@ static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv) dev_dbg(mac->dev, "MAC PHY control register: interface %s\n", phy_modes(interface)); - ret = mac->soc_info->set_mode(mac->plat_dat, phy_intf_sel); + ret = mac->soc_info->set_mode(mac, phy_intf_sel); if (ret) return ret; } -- 2.47.3 Rather than placing the phy_intf_sel() setup in the ->init() method, move it to the new ->set_phy_intf_sel() method. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 33 +++++++------------ 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c index 41a2071262bc..957bc78d5a1e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -134,32 +134,21 @@ static int x2000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel) return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); } -static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv) +static int ingenic_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel) { struct ingenic_mac *mac = bsp_priv; - phy_interface_t interface; - int phy_intf_sel, ret; - - if (mac->soc_info->set_mode) { - interface = mac->plat_dat->phy_interface; - - phy_intf_sel = stmmac_get_phy_intf_sel(interface); - if (phy_intf_sel < 0 || phy_intf_sel >= BITS_PER_BYTE || - ~mac->soc_info->valid_phy_intf_sel & BIT(phy_intf_sel)) { - dev_err(mac->dev, "unsupported interface %s\n", - phy_modes(interface)); - return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL; - } - dev_dbg(mac->dev, "MAC PHY control register: interface %s\n", - phy_modes(interface)); + if (!mac->soc_info->set_mode) + return 0; - ret = mac->soc_info->set_mode(mac, phy_intf_sel); - if (ret) - return ret; - } + if (phy_intf_sel >= BITS_PER_BYTE || + ~mac->soc_info->valid_phy_intf_sel & BIT(phy_intf_sel)) + return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL; + + dev_dbg(mac->dev, "MAC PHY control register: interface %s\n", + phy_modes(mac->plat_dat->phy_interface)); - return 0; + return mac->soc_info->set_mode(mac, phy_intf_sel); } static int ingenic_mac_probe(struct platform_device *pdev) @@ -221,7 +210,7 @@ static int ingenic_mac_probe(struct platform_device *pdev) mac->plat_dat = plat_dat; plat_dat->bsp_priv = mac; - plat_dat->init = ingenic_mac_init; + plat_dat->set_phy_intf_sel = ingenic_set_phy_intf_sel; return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); } -- 2.47.3