From: Monish Chunara Add the MSM SDHCI compatible name to support both eMMC and SD card for Lemans, which uses 'sa8775p' as the fallback SoC. Ensure the new compatible string matches existing Lemans-compatible formats without introducing a new naming convention. The SDHCI controller on Lemans is based on MSM SDHCI v5 IP. Hence, document the compatible with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Monish Chunara Signed-off-by: Wasim Nazir --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 22d1f50c3fd1..594bd174ff21 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -48,6 +48,7 @@ properties: - qcom,qcs615-sdhci - qcom,qcs8300-sdhci - qcom,qdu1000-sdhci + - qcom,sa8775p-sdhci - qcom,sar2130p-sdhci - qcom,sc7180-sdhci - qcom,sc7280-sdhci -- 2.51.0 From: Monish Chunara Introduce the SDHC v5 controller node for the Lemans platform. This controller supports either eMMC or SD-card, but only one can be active at a time. SD-card is the preferred configuration on Lemans targets, so describe this controller. Define the SDC interface pins including clk, cmd, and data lines to enable proper communication with the SDHC controller. Signed-off-by: Monish Chunara Co-developed-by: Wasim Nazir Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans.dtsi | 91 ++++++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi index 99a566b42ef2..9e4709dce32b 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -3834,6 +3834,57 @@ apss_tpdm2_out: endpoint { }; }; + sdhc: mmc@87c4000 { + compatible = "qcom,sa8775p-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0 0x087c4000 0x0 0x1000>; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>; + clock-names = "iface", "core"; + + interconnects = <&aggre1_noc MASTER_SDC 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDC1 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + + power-domains = <&rpmhpd SA8775P_CX>; + operating-points-v2 = <&sdhc_opp_table>; + + iommus = <&apps_smmu 0x0 0x0>; + dma-coherent; + + resets = <&gcc GCC_SDCC1_BCR>; + + no-sdio; + no-mmc; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + + status = "disabled"; + + sdhc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_low_svs>; + opp-peak-kBps = <1800000 400000>; + opp-avg-kBps = <100000 0>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmhpd_opp_nom>; + opp-peak-kBps = <5400000 1600000>; + opp-avg-kBps = <390000 0>; + }; + }; + }; + usb_0_hsphy: phy@88e4000 { compatible = "qcom,sa8775p-usb-hs-phy", "qcom,usb-snps-hs-5nm-phy"; @@ -5643,6 +5694,46 @@ qup_uart21_rx: qup-uart21-rx-pins { function = "qup3_se0"; }; }; + + sdc_default: sdc-default-state { + clk-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <10>; + }; + }; + + sdc_sleep: sdc-sleep-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-bus-hold; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-bus-hold; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <2>; + bias-bus-hold; + }; + }; }; sram: sram@146d8000 { -- 2.51.0 From: Nirmesh Kumar Singh Integrate the TCA9534 I/O expander via I2C to provide 8 additional GPIO lines for extended I/O functionality. Signed-off-by: Nirmesh Kumar Singh Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 9e415012140b..753c5afc3342 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -277,6 +277,38 @@ vreg_l8e: ldo8 { }; }; +&i2c18 { + status = "okay"; + + expander0: gpio@38 { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x38>; + }; + + expander1: gpio@39 { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x39>; + }; + + expander2: gpio@3a { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3a>; + }; + + expander3: gpio@3b { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3b>; + }; +}; + &mdss0 { status = "okay"; }; -- 2.51.0 From: Monish Chunara Define the nvmem layout on the EEPROM connected via I2C to enable structured storage and access to board-specific configuration data, such as MAC addresses for Ethernet. Signed-off-by: Monish Chunara Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 753c5afc3342..c60629c3369e 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -307,6 +307,18 @@ expander3: gpio@3b { gpio-controller; reg = <0x3b>; }; + + eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + pagesize = <64>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + }; + }; }; &mdss0 { -- 2.51.0 From: Viken Dadhaniya Enable GPI DMA controllers (gpi_dma0, gpi_dma1, gpi_dma2) and QUPv3 interfaces (qupv3_id_0, qupv3_id_2) in the device tree to support DMA and peripheral communication on the Lemans EVK platform. Signed-off-by: Viken Dadhaniya Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index c60629c3369e..196c5ee0dd34 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -277,6 +277,18 @@ vreg_l8e: ldo8 { }; }; +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&gpi_dma2 { + status = "okay"; +}; + &i2c18 { status = "okay"; @@ -367,10 +379,18 @@ &mdss0_dp1_phy { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; +&qupv3_id_2 { + status = "okay"; +}; + &sleep_clk { clock-frequency = <32768>; }; -- 2.51.0 From: Sushrut Shree Trivedi Enable PCIe0 and PCIe1 along with the respective phy-nodes. PCIe0 is routed to an m.2 E key connector on the mainboard for wifi attaches while PCIe1 routes to a standard PCIe x4 expansion slot. Signed-off-by: Sushrut Shree Trivedi Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 82 +++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 196c5ee0dd34..7528fa1c661a 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -379,6 +379,40 @@ &mdss0_dp1_phy { status = "okay"; }; +&pcie0 { + perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_default_state>; + + status = "okay"; +}; + +&pcie0_phy { + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l1c>; + + status = "okay"; +}; + +&pcie1 { + perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_default_state>; + + status = "okay"; +}; + +&pcie1_phy { + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l1c>; + + status = "okay"; +}; + &qupv3_id_0 { status = "okay"; }; @@ -395,6 +429,54 @@ &sleep_clk { clock-frequency = <32768>; }; +&tlmm { + pcie0_default_state: pcie0-default-state { + clkreq-pins { + pins = "gpio1"; + function = "pcie0_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio2"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-pins { + pins = "gpio0"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie1_default_state: pcie1-default-state { + clkreq-pins { + pins = "gpio3"; + function = "pcie1_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio4"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-pins { + pins = "gpio5"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + &uart10 { compatible = "qcom,geni-debug-uart"; pinctrl-0 = <&qup_uart10_default>; -- 2.51.0 Enable remoteproc subsystems for supported DSPs such as Audio DSP, Compute DSP-0/1 and Generic DSP-0/1, along with their corresponding firmware. Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 7528fa1c661a..eb7682fa4057 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -425,6 +425,36 @@ &qupv3_id_2 { status = "okay"; }; +&remoteproc_adsp { + firmware-name = "qcom/sa8775p/adsp.mbn"; + + status = "okay"; +}; + +&remoteproc_cdsp0 { + firmware-name = "qcom/sa8775p/cdsp0.mbn"; + + status = "okay"; +}; + +&remoteproc_cdsp1 { + firmware-name = "qcom/sa8775p/cdsp1.mbn"; + + status = "okay"; +}; + +&remoteproc_gpdsp0 { + firmware-name = "qcom/sa8775p/gpdsp0.mbn"; + + status = "okay"; +}; + +&remoteproc_gpdsp1 { + firmware-name = "qcom/sa8775p/gpdsp1.mbn"; + + status = "okay"; +}; + &sleep_clk { clock-frequency = <32768>; }; -- 2.51.0 From: Vikash Garodia Enable the Iris video codec accelerator on the Lemans EVK board and reference the appropriate firmware required for its operation. This allows hardware-accelerated video encoding and decoding using the Iris codec engine. Signed-off-by: Vikash Garodia Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index eb7682fa4057..d85686d55994 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -333,6 +333,12 @@ nvmem-layout { }; }; +&iris { + firmware-name = "qcom/vpu/vpu30_p4_s6_16mb.mbn"; + + status = "okay"; +}; + &mdss0 { status = "okay"; }; -- 2.51.0 From: Krishna Kurapati Enable the first USB controller in device mode on the Lemans EVK board and configure the associated LDO regulators to power the PHYs accordingly. The USB port is a Type-C port controlled by HD3SS3320 port controller. The role switch notifications would need to be routed to glue driver by adding an appropriate usb-c-connector node in DT. However in the design, the vbus supply that is to be provided to connected peripherals when port is configured as an DFP, is controlled by a GPIO. There is also one ID line going from Port controller chip to GPIO-50 of the SoC. As per the datasheet of HD3SS3320: "Upon detecting a UFP device, HD3SS3220 will keep ID pin high if VBUS is not at VSafe0V. Once VBUS is at VSafe0V, the HD3SS3220 will assert ID pin low. This is done to enforce Type-C requirement that VBUS must be at VSafe0V before re-enabling VBUS." The current HD3SS3220 driver doesn't have this functionality present. So, putting the first USB controller in device mode for now. Once the vbus control based on ID pin is implemented in hd3ss3220.c, the usb-c-connector will be implemented and dr mode would be made OTG. Signed-off-by: Krishna Kurapati Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index d85686d55994..b67b909fb97f 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -538,6 +538,29 @@ &ufs_mem_phy { status = "okay"; }; +&usb_0 { + status = "okay"; +}; + +&usb_0_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_0_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l6c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; + +&usb_0_qmpphy { + vdda-phy-supply = <&vreg_l1c>; + vdda-pll-supply = <&vreg_l7a>; + + status = "okay"; +}; + &xo_board_clk { clock-frequency = <38400000>; }; -- 2.51.0 From: Monish Chunara Enable the SD Host Controller Interface (SDHCI) on the lemans EVK board to support SD card for storage. Also add the corresponding regulators. Signed-off-by: Monish Chunara Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 43 +++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index b67b909fb97f..c9e7977466b3 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -16,6 +16,7 @@ / { compatible = "qcom,lemans-evk", "qcom,qcs9100", "qcom,sa8775p"; aliases { + mmc1 = &sdhc; serial0 = &uart10; }; @@ -46,6 +47,28 @@ edp1_connector_in: endpoint { }; }; }; + + vmmc_sdc: regulator-vmmc-sdc { + compatible = "regulator-fixed"; + + regulator-name = "vmmc_sdc"; + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + vreg_sdc: regulator-vreg-sdc { + compatible = "regulator-gpio"; + + regulator-name = "vreg_sdc"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + + gpios = <&expander1 7 GPIO_ACTIVE_HIGH>; + states = <1800000 1>, <2950000 0>; + + startup-delay-us = <100>; + }; }; &apps_rsc { @@ -461,6 +484,20 @@ &remoteproc_gpdsp1 { status = "okay"; }; +&sdhc { + vmmc-supply = <&vmmc_sdc>; + vqmmc-supply = <&vreg_sdc>; + + pinctrl-0 = <&sdc_default>, <&sd_cd>; + pinctrl-1 = <&sdc_sleep>, <&sd_cd>; + pinctrl-names = "default", "sleep"; + + bus-width = <4>; + cd-gpios = <&tlmm 36 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + &sleep_clk { clock-frequency = <32768>; }; @@ -511,6 +548,12 @@ wake-pins { bias-pull-up; }; }; + + sd_cd: sd-cd-state { + pins = "gpio36"; + function = "gpio"; + bias-pull-up; + }; }; &uart10 { -- 2.51.0 From: Mohd Ayaan Anwar Enable the QCA8081 2.5G Ethernet PHY on port 0. Add MDC and MDIO pin functions for ethernet0, and enable the internal SGMII/SerDes PHY node. Additionally, support fetching the MAC address from EEPROM via an nvmem cell. Signed-off-by: Mohd Ayaan Anwar Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 115 ++++++++++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index c9e7977466b3..69ce6a60361a 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -16,6 +16,7 @@ / { compatible = "qcom,lemans-evk", "qcom,qcs9100", "qcom,sa8775p"; aliases { + ethernet0 = ðernet0; mmc1 = &sdhc; serial0 = &uart10; }; @@ -300,6 +301,94 @@ vreg_l8e: ldo8 { }; }; +ðernet0 { + phy-handle = <&hsgmii_phy0>; + phy-mode = "2500base-x"; + + pinctrl-0 = <ðernet0_default>; + pinctrl-names = "default"; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + nvmem-cells = <&mac_addr0>; + nvmem-cell-names = "mac-address"; + + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + hsgmii_phy0: ethernet-phy@1c { + compatible = "ethernet-phy-id004d.d101"; + reg = <0x1c>; + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + &gpi_dma0 { status = "okay"; }; @@ -352,6 +441,10 @@ nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; + + mac_addr0: mac-addr@0 { + reg = <0x0 0x6>; + }; }; }; }; @@ -498,11 +591,33 @@ &sdhc { status = "okay"; }; +&serdes0 { + phy-supply = <&vreg_l5a>; + + status = "okay"; +}; + &sleep_clk { clock-frequency = <32768>; }; &tlmm { + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins = "gpio8"; + function = "emac0_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins = "gpio9"; + function = "emac0_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + pcie0_default_state: pcie0-default-state { clkreq-pins { pins = "gpio1"; -- 2.51.0 From: Mohammad Rafi Shaik Add GPR(Generic Pack router) node along with APM(Audio Process Manager) and PRM(Proxy resource Manager) audio services. Signed-off-by: Mohammad Rafi Shaik Reviewed-by: Konrad Dybcio Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans.dtsi | 40 ++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi index 9e4709dce32b..41003d8878f0 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -18,6 +18,7 @@ #include #include #include +#include #include / { @@ -6700,6 +6701,45 @@ compute-cb@5 { dma-coherent; }; }; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x3001 0x0>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; }; }; }; -- 2.51.0 From: Mohammad Rafi Shaik Add the sound card for Lemans-Evk board and verified playback functionality using the max98357a I2S speaker amplifier and I2S microphones. The max98357a speaker amplifier is connected via High-Speed MI2S HS0 interface, while the microphones utilize the HS2 interface. This patch also introduces pin control support for the High-Speed I2S interfaces. Signed-off-by: Mohammad Rafi Shaik Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 52 +++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/lemans.dtsi | 14 +++++++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 69ce6a60361a..7802fd830aa0 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -7,6 +7,7 @@ #include #include +#include #include "lemans.dtsi" #include "lemans-pmics.dtsi" @@ -25,6 +26,17 @@ chosen { stdout-path = "serial0:115200n8"; }; + dmic: audio-codec-0 { + compatible = "dmic-codec"; + #sound-dai-cells = <0>; + num-channels = <1>; + }; + + max98357a: audio-codec-1 { + compatible = "maxim,max98357a"; + #sound-dai-cells = <0>; + }; + edp0-connector { compatible = "dp-connector"; label = "EDP0"; @@ -70,6 +82,46 @@ vreg_sdc: regulator-vreg-sdc { startup-delay-us = <100>; }; + + sound { + compatible = "qcom,qcs9100-sndcard"; + model = "LEMANS-EVK"; + + pinctrl-0 = <&hs0_mi2s_active>, <&hs2_mi2s_active>; + pinctrl-names = "default"; + + hs0-mi2s-playback-dai-link { + link-name = "HS0 MI2S Playback"; + + codec { + sound-dai = <&max98357a>; + }; + + cpu { + sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + hs2-mi2s-capture-dai-link { + link-name = "HS2 MI2S Capture"; + + codec { + sound-dai = <&dmic>; + }; + + cpu { + sound-dai = <&q6apmbedai TERTIARY_MI2S_TX>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + }; }; &apps_rsc { diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi index 41003d8878f0..de8f5d78d0d2 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -5068,6 +5068,20 @@ dp1_hot_plug_det: dp1-hot-plug-det-state { bias-disable; }; + hs0_mi2s_active: hs0-mi2s-active-state { + pins = "gpio114", "gpio115", "gpio116", "gpio117"; + function = "hs0_mi2s"; + drive-strength = <8>; + bias-disable; + }; + + hs2_mi2s_active: hs2-mi2s-active-state { + pins = "gpio122", "gpio123", "gpio124", "gpio125"; + function = "hs2_mi2s"; + drive-strength = <8>; + bias-disable; + }; + qup_i2c0_default: qup-i2c0-state { pins = "gpio20", "gpio21"; function = "qup0_se0"; -- 2.51.0