Patch Series

Subject KVM: arm64: Introduce vGIC-v5 with PPI support
Author sascha.bischoff@arm.com
Date 2025-12-19 15:52:36 +0000 UTC
Version 2
Cc joey.gouly@arm.com kvm@vger.kernel.org kvmarm@lists.linux.dev linux-arm-kernel@lists.infradead.org lpieralisi@kernel.org maz@kernel.org nd@arm.com oliver.upton@linux.dev peter.maydell@linaro.org sascha.bischoff@arm.com suzuki.poulose@arm.com timothy.hayes@arm.com yuzenghui@huawei.com

Patches (36)

Name Content [All]
[PATCH v2 01/36] KVM: arm64: Account for RES1 bits in DECLARE_FEAT_MAP() and co [Body]
[PATCH v2 02/36] KVM: arm64: gic-v3: Switch vGIC-v3 to use generated ICH_VMCR_EL2 [Body]
[PATCH v2 03/36] arm64/sysreg: Drop ICH_HFGRTR_EL2.ICC_HAPR_EL1 and make RES1 [Body]
[PATCH v2 04/36] arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support [Body]
[PATCH v2 05/36] arm64/sysreg: Add GICR CDNMIA encoding [Body]
[PATCH v2 06/36] KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers [Body]
[PATCH v2 07/36] KVM: arm64: gic: Introduce interrupt type helpers [Body]
[PATCH v2 08/36] KVM: arm64: Introduce kvm_call_hyp_nvhe_res() [Body]
[PATCH v2 09/36] KVM: arm64: gic-v5: Detect implemented PPIs on boot [Body]
[PATCH v2 10/36] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE [Body]
[PATCH v2 11/36] KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs [Body]
[PATCH v2 12/36] KVM: arm64: gic-v5: Add emulation for ICC_IAFFIDR_EL1 accesses [Body]
[PATCH v2 13/36] KVM: arm64: gic: Set vgic_model before initing private IRQs [Body]
[PATCH v2 14/36] KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface [Body]
[PATCH v2 15/36] KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore [Body]
[PATCH v2 16/36] KVM: arm64: gic-v5: Implement direct injection of PPIs [Body]
[PATCH v2 17/36] KVM: arm64: gic: Introduce irq_queue and set_pending_state to irq_ops [Body]
[PATCH v2 18/36] KVM: arm64: gic-v5: Implement PPI interrupt injection [Body]
[PATCH v2 19/36] KVM: arm64: gic-v5: Check for pending PPIs [Body]
[PATCH v2 20/36] KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5 [Body]
[PATCH v2 21/36] KVM: arm64: gic-v5: Finalize GICv5 PPIs and generate mask [Body]
[PATCH v2 22/36] KVM: arm64: gic-v5: Trap and mask guest PPI register accesses [Body]
[PATCH v2 23/36] KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE [Body]
[PATCH v2 24/36] KVM: arm64: gic-v5: Create, init vgic_v5 [Body]
[PATCH v2 25/36] KVM: arm64: gic-v5: Reset vcpu state [Body]
[PATCH v2 26/36] KVM: arm64: gic-v5: Bump arch timer for GICv5 [Body]
[PATCH v2 27/36] KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 [Body]
[PATCH v2 28/36] KVM: arm64: gic: Hide GICv5 for protected guests [Body]
[PATCH v2 29/36] KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests [Body]
[PATCH v2 30/36] KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them [Body]
[PATCH v2 31/36] KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot [Body]
[PATCH v2 32/36] irqchip/gic-v5: Check if impl is virt capable [Body]
[PATCH v2 33/36] KVM: arm64: gic-v5: Probe for GICv5 device [Body]
[PATCH v2 34/36] Documentation: KVM: Introduce documentation for VGICv5 [Body]
[PATCH v2 35/36] KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest [Body]
[PATCH v2 36/36] KVM: arm64: gic-v5: Communicate userspace-drivable PPIs via a UAPI [Body]

Session 2025-12-19

ID (for dev) fe7c9f3d-e54e-4177-b354-a467dfc1aa73
Status finished
Triaged OK [Log]
Execution Log [Link]
Test Base Patched Verdict
[KASAN] Build Base 0499add8efd72456514c6218c062911ccc922a99 [Config] passed [Log]
[KASAN] Boot test: Base 0499add8efd72456514c6218c062911ccc922a99 [Config] passed [Log]
[KASAN] Build Patched 0499add8efd72456514c6218c062911ccc922a99 [Config] [patched] passed [Log]
[KASAN] Boot test: Patched 0499add8efd72456514c6218c062911ccc922a99 [Config] [patched] passed [Log]
[KASAN] Fuzzing 0499add8efd72456514c6218c062911ccc922a99 [Config] 0499add8efd72456514c6218c062911ccc922a99 [Config] [patched] passed [Log] [Artifacts]