Create initial schema for Nuvoton MA35 family Gigabit MAC. Reviewed-by: Rob Herring (Arm) Signed-off-by: Joey Lu --- .../bindings/net/nuvoton,ma35d1-dwmac.yaml | 133 ++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 1 + 2 files changed, 134 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml b/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml new file mode 100644 index 000000000000..4d9e06f2dc26 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton DWMAC glue layer controller + +maintainers: + - Joey Lu + +description: + Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on + Synopsys DesignWare MAC (version 3.73a). + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + items: + - enum: + - nuvoton,ma35d1-dwmac + - enum: + - snps,dwmac-3.70a + + reg: + maxItems: 1 + description: + Register range should be one of the GMAC interface. + + interrupts: + maxItems: 1 + + clocks: + items: + - description: MAC clock + - description: PTP clock + + clock-names: + items: + - const: stmmaceth + - const: ptp_ref + + nuvoton,sys: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to access syscon registers. + - description: GMAC interface ID. + enum: + - 0 + - 1 + description: + A phandle to the syscon with one argument that configures system registers + for MA35D1's two GMACs. The argument specifies the GMAC interface ID. + + resets: + maxItems: 1 + + reset-names: + items: + - const: stmmaceth + + phy-mode: + enum: + - rmii + - rgmii + - rgmii-id + - rgmii-txid + - rgmii-rxid + + tx-internal-delay-ps: + default: 0 + minimum: 0 + maximum: 2000 + description: + RGMII TX path delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. + Allowed values are from 0 to 2000. + + rx-internal-delay-ps: + default: 0 + minimum: 0 + maximum: 2000 + description: + RGMII RX path delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. + Allowed values are from 0 to 2000. + +required: + - clocks + - clock-names + - nuvoton,sys + - resets + - reset-names + - phy-mode + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + ethernet@40120000 { + compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a"; + reg = <0x40120000 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 0>; + resets = <&sys MA35D1_RESET_GMAC0>; + reset-names = "stmmaceth"; + snps,multicast-filter-bins = <0>; + snps,perfect-filter-entries = <8>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; + + phy-mode = "rgmii-id"; + phy-handle = <ð_phy0>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 38bc34dc4f09..de04cbbab0c6 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -69,6 +69,7 @@ properties: - ingenic,x2000-mac - loongson,ls2k-dwmac - loongson,ls7a-dwmac + - nuvoton,ma35d1-dwmac - nxp,s32g2-dwmac - qcom,qcs404-ethqos - qcom,sa8775p-ethqos -- 2.43.0 Add GMAC nodes for our MA35D1 development boards: two RGMII interfaces for SOM board, and one RGMII and one RMII interface for IoT board. Signed-off-by: Joey Lu --- .../boot/dts/nuvoton/ma35d1-iot-512m.dts | 25 +++++++++ .../boot/dts/nuvoton/ma35d1-som-256m.dts | 24 +++++++++ arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 52 +++++++++++++++++++ 3 files changed, 101 insertions(+) diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts index 9482bec1aa57..78534d613486 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts @@ -18,6 +18,8 @@ aliases { serial12 = &uart12; serial13 = &uart13; serial14 = &uart14; + ethernet0 = &gmac0; + ethernet1 = &gmac1; }; chosen { @@ -126,3 +128,26 @@ &uart14 { pinctrl-0 = <&pinctrl_uart14>; status = "okay"; }; + +&gmac0 { + status = "okay"; + phy-handle = <ð_phy0>; +}; + +&mdio0 { + eth_phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rmii"; + phy-handle = <ð_phy1>; +}; + +&mdio1 { + eth_phy1: ethernet-phy@1 { + reg = <1>; + }; +}; diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts index f6f20a17e501..a029b660e8dc 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts @@ -18,6 +18,8 @@ aliases { serial12 = &uart12; serial14 = &uart14; serial16 = &uart16; + ethernet0 = &gmac0; + ethernet1 = &gmac1; }; chosen { @@ -129,3 +131,25 @@ &uart16 { pinctrl-0 = <&pinctrl_uart16>; status = "okay"; }; + +&gmac0 { + status = "okay"; + phy-handle = <ð_phy0>; +}; + +&mdio0 { + eth_phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&gmac1 { + status = "okay"; + phy-handle = <ð_phy1>; +}; + +&mdio1 { + eth_phy1: ethernet-phy@1 { + reg = <1>; + }; +}; diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi index e51b98f5bdce..7228ad4735b5 100644 --- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi @@ -379,5 +379,57 @@ uart16: serial@40880000 { clocks = <&clk UART16_GATE>; status = "disabled"; }; + + gmac0: ethernet@40120000 { + compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a"; + reg = <0x0 0x40120000 0x0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 0>; + resets = <&sys MA35D1_RESET_GMAC0>; + reset-names = "stmmaceth"; + snps,multicast-filter-bins = <0>; + snps,perfect-filter-entries = <8>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; + + phy-mode = "rgmii-id"; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + gmac1: ethernet@40130000 { + compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a"; + reg = <0x0 0x40130000 0x0 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk EMAC1_GATE>, <&clk EPLL_DIV8>; + clock-names = "stmmaceth", "ptp_ref"; + + nuvoton,sys = <&sys 1>; + resets = <&sys MA35D1_RESET_GMAC1>; + reset-names = "stmmaceth"; + snps,multicast-filter-bins = <0>; + snps,perfect-filter-entries = <8>; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; + + phy-mode = "rgmii-id"; + status = "disabled"; + + mdio1: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; }; -- 2.43.0 Add support for Gigabit Ethernet on Nuvoton MA35 series using dwmac driver. Reviewed-by: Andrew Lunn Signed-off-by: Joey Lu --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-nuvoton.c | 139 ++++++++++++++++++ 3 files changed, 152 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 07088d03dbab..861f1c6c14f1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -132,6 +132,18 @@ config DWMAC_MESON the stmmac device driver. This driver is used for Meson6, Meson8, Meson8b and GXBB SoCs. +config DWMAC_NUVOTON + tristate "Nuvoton MA35 dwmac support" + default ARCH_MA35 + depends on OF && (ARCH_MA35 || COMPILE_TEST) + select MFD_SYSCON + help + Support for Ethernet controller on Nuvoton MA35 series SoC. + + This selects the Nuvoton MA35 series SoC glue layer support + for the stmmac device driver. The nuvoton-dwmac driver is + used for MA35 series SoCs. + config DWMAC_QCOM_ETHQOS tristate "Qualcomm ETHQOS support" default ARCH_QCOM diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index c9263987ef8d..4ade030b634f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o obj-$(CONFIG_DWMAC_MEDIATEK) += dwmac-mediatek.o obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o +obj-$(CONFIG_DWMAC_NUVOTON) += dwmac-nuvoton.o obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o obj-$(CONFIG_DWMAC_RENESAS_GBETH) += dwmac-renesas-gbeth.o obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c new file mode 100644 index 000000000000..29d15f41b244 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Nuvoton DWMAC specific glue layer + * + * Copyright (C) 2025 Nuvoton Technology Corp. + * + * Author: Joey Lu + */ + +#include +#include +#include +#include +#include +#include + +#include "stmmac.h" +#include "stmmac_platform.h" + +#define NVT_REG_SYS_GMAC0MISCR 0x108 +#define NVT_REG_SYS_GMAC1MISCR 0x10C + +#define NVT_MISCR_RMII BIT(0) + +/* Two thousand picoseconds are evenly mapped to a 4-bit field, + * resulting in each step being 2000/15 picoseconds. + */ +#define NVT_PATH_DELAY_STEP 134 +#define NVT_TX_DELAY_MASK GENMASK(19, 16) +#define NVT_RX_DELAY_MASK GENMASK(23, 20) + +static int nvt_gmac_get_delay(struct device *dev, const char *property) +{ + u32 arg; + + if (of_property_read_u32(dev->of_node, property, &arg)) + return 0; + + if (arg > 2000) { + dev_err(dev, "Invalid %s argument.\n", property); + return -EINVAL; + } + + if (arg == 2000) + return 15; + + return arg / NVT_PATH_DELAY_STEP; +} + +static int nvt_gmac_setup(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + phy_interface_t phy_mode; + struct regmap *regmap; + u32 macid, miscr, reg; + int ret; + + regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node, "nuvoton,sys", 1, &macid); + if (IS_ERR(regmap)) + ret = dev_err_probe(dev, PTR_ERR(regmap), "Failed to get sys register\n"); + + if (macid > 1) + ret = dev_err_probe(dev, -EINVAL, "Invalid sys arguments\n"); + + if (of_get_phy_mode(pdev->dev.of_node, &phy_mode)) + ret = dev_err_probe(dev, -EINVAL, "Missing phy mode property\n"); + + miscr = (macid == 0) ? NVT_REG_SYS_GMAC0MISCR : NVT_REG_SYS_GMAC1MISCR; + + switch (phy_mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + ret = nvt_gmac_get_delay(dev, "rx-internal-delay-ps"); + if (ret < 0) + return ret; + reg = FIELD_PREP(NVT_RX_DELAY_MASK, ret); + + ret = nvt_gmac_get_delay(dev, "tx-internal-delay-ps"); + if (ret < 0) + return ret; + reg |= FIELD_PREP(NVT_TX_DELAY_MASK, ret); + break; + case PHY_INTERFACE_MODE_RMII: + reg = NVT_MISCR_RMII; + break; + default: + return dev_err_probe(dev, -EINVAL, "Unsupported phy-mode (%d)\n", phy_mode); + } + + regmap_update_bits(regmap, miscr, + NVT_RX_DELAY_MASK | NVT_TX_DELAY_MASK | NVT_MISCR_RMII, reg); + + return 0; +} + +static int nvt_gmac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct device *dev = &pdev->dev; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return dev_err_probe(dev, ret, "Failed to get platform resources\n"); + + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return dev_err_probe(dev, PTR_ERR(plat_dat), "Failed to get platform data\n"); + + ret = nvt_gmac_setup(pdev); + if (ret) + return ret; + + return stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); +} + +static const struct of_device_id nvt_dwmac_match[] = { + { .compatible = "nuvoton,ma35d1-dwmac"}, + { } +}; +MODULE_DEVICE_TABLE(of, nvt_dwmac_match); + +static struct platform_driver nvt_dwmac_driver = { + .probe = nvt_gmac_probe, + .remove = stmmac_pltfr_remove, + .driver = { + .name = "nuvoton-dwmac", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = nvt_dwmac_match, + }, +}; +module_platform_driver(nvt_dwmac_driver); + +MODULE_AUTHOR("Joey Lu "); +MODULE_DESCRIPTION("Nuvoton DWMAC specific glue layer"); +MODULE_LICENSE("GPL"); -- 2.43.0