From: Fangyu Yu In the irq bypass scenario,the host interrupt comes from VFIO, and it is an enabled MSI/MSI-X interrupt. Due to the reconfiguration of the PCI-e BAR space during the irq bypass process,this host irq will not be triggered in the host system. We can use this host irq as a notice MSI in IOMMU MRIF mode. Signed-off-by: Fangyu Yu --- arch/riscv/kvm/aia_imsic.c | 69 +++++++++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/aia_imsic.c b/arch/riscv/kvm/aia_imsic.c index e91164742fd0..58807e68a3dd 100644 --- a/arch/riscv/kvm/aia_imsic.c +++ b/arch/riscv/kvm/aia_imsic.c @@ -60,6 +60,9 @@ struct imsic { struct imsic_mrif *swfile; phys_addr_t swfile_pa; raw_spinlock_t swfile_extirq_lock; + + bool mrif_support; + struct xarray hostirq_array; /* Attached host irq array */ }; #define imsic_vs_csr_read(__c) \ @@ -740,6 +743,57 @@ void kvm_riscv_vcpu_aia_imsic_release(struct kvm_vcpu *vcpu) kvm_riscv_aia_free_hgei(old_vsfile_cpu, old_vsfile_hgei); } +static int kvm_arch_update_irqfd_unset(struct kvm *kvm, unsigned int host_irq) +{ + struct kvm_vcpu *vcpu; + unsigned long tmp; + + kvm_for_each_vcpu(tmp, vcpu, kvm) { + struct imsic *imsic = vcpu->arch.aia_context.imsic_state; + struct msi_msg *curr = xa_load(&imsic->hostirq_array, host_irq); + + if (!curr) + continue; + + xa_erase(&imsic->hostirq_array, host_irq); + kfree(curr); + break; + } + + return irq_set_vcpu_affinity(host_irq, NULL); +} + +static struct msi_msg *kvm_arch_update_irqfd_hostirq(struct imsic *imsic, + unsigned int host_irq, int *ret, + struct kvm_kernel_irq_routing_entry *e) +{ + struct msi_msg *priv_msg = xa_load(&imsic->hostirq_array, host_irq); + + if (!priv_msg) { + priv_msg = kzalloc(sizeof(*priv_msg), GFP_KERNEL); + if (!priv_msg) { + *ret = -ENOMEM; + goto out; + } + + struct msi_msg host_msg, *curr; + + get_cached_msi_msg(host_irq, &host_msg); + priv_msg[0] = host_msg; + curr = xa_cmpxchg(&imsic->hostirq_array, host_irq, + NULL, priv_msg, GFP_ATOMIC); + if (WARN_ON_ONCE(curr)) { + *ret = xa_err(curr) ? : -EBUSY; + kfree(priv_msg); + goto out; + } + } + *ret = 0; + +out: + return priv_msg; +} + int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq, uint32_t guest_irq, bool set) { @@ -750,7 +804,7 @@ int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq, int idx, ret = -ENXIO; if (!set) - return irq_set_vcpu_affinity(host_irq, NULL); + return kvm_arch_update_irqfd_unset(kvm, host_irq); idx = srcu_read_lock(&kvm->irq_srcu); irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu); @@ -795,6 +849,11 @@ int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq, vcpu_info.msi_addr_pattern = tppn & ~vcpu_info.msi_addr_mask; vcpu_info.gpa = target; + vcpu_info.host_irq = host_irq; + vcpu_info.host_msg = + kvm_arch_update_irqfd_hostirq(imsic, host_irq, &ret, e); + if (ret) + goto out; read_lock_irqsave(&imsic->vsfile_lock, flags); @@ -848,6 +907,10 @@ static int kvm_riscv_vcpu_irq_update(struct kvm_vcpu *vcpu) if (!irqfd->producer) continue; host_irq = irqfd->producer->irq; + vcpu_info.host_irq = host_irq; + vcpu_info.host_msg = xa_load(&imsic->hostirq_array, host_irq); + if (!vcpu_info.host_msg) + continue; if (imsic->vsfile_cpu < 0) { vcpu_info.hpa = imsic->swfile_pa; @@ -855,6 +918,7 @@ static int kvm_riscv_vcpu_irq_update(struct kvm_vcpu *vcpu) } else { vcpu_info.mrif = false; } + ret = irq_set_vcpu_affinity(host_irq, &vcpu_info); if (ret) { spin_unlock_irq(&kvm->irqfds.lock); @@ -1195,6 +1259,9 @@ int kvm_riscv_vcpu_aia_imsic_init(struct kvm_vcpu *vcpu) imsic->swfile_pa = page_to_phys(swfile_page); raw_spin_lock_init(&imsic->swfile_extirq_lock); + xa_init(&imsic->hostirq_array); + imsic->mrif_support = false; + /* Setup IO device */ kvm_iodevice_init(&imsic->iodev, &imsic_iodoev_ops); mutex_lock(&kvm->slots_lock); -- 2.49.0