7.3-stable review patch. If anyone has any objections, please let me know. ------------------ From: Vikash Garodia [ Upstream commit cc330f5589965bcf99307ee9c66deb8a0a53e0ee ] When video power domain is switched from software-controlled mode to hardware-controlled mode, the core may be powered down without the AHB bridge going through the required reset sequence. This may leave the bridge FIFO in a stale state. Reset the CPU-to-VPU AHB bridge before switching the power domain to hardware-controlled mode. This ensures that the bridge FIFO are in reset state before going for mode switch. Reported-by: Birk Skyum Link: https://lore.kernel.org/all/20260913194707.91885-1-birk.skyum@pm.me Fixes: 95a337f92f0a ("media: iris: switch to hardware mode after firmware boot") Cc: stable@vger.kernel.org Co-developed-by: Renjiang Han Signed-off-by: Renjiang Han Signed-off-by: Vikash Garodia Reviewed-by: Vishnu Reddy Tested-by: Birk Skyum # Lenovo Yoga Slim 7x Signed-off-by: Bryan O'Donoghue Signed-off-by: Sasha Levin --- drivers/media/platform/qcom/iris/iris_vpu_common.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c index e4847c1077097..2ef8004e976e3 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -311,6 +311,11 @@ int iris_vpu_power_on_hw(struct iris_core *core) int iris_vpu_set_hwmode(struct iris_core *core) { + writel(CORE_BRIDGE_SW_RESET | CORE_BRIDGE_HW_RESET_DISABLE, + core->reg_base + CPU_CS_AHB_BRIDGE_SYNC_RESET); + writel(CORE_BRIDGE_HW_RESET_DISABLE, core->reg_base + CPU_CS_AHB_BRIDGE_SYNC_RESET); + writel(0x0, core->reg_base + CPU_CS_AHB_BRIDGE_SYNC_RESET); + return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true); } -- 2.53.0