From: Javen Xu This patch will enable RTL8168FP/RTL8168EP/RTL8168H/RTL8125/RTL8126/RTL8127 LTR support. Signed-off-by: Javen Xu --- v2: Replace some register numbers with names according to datasheet. v3: Address some checkpath warnings and remove rtl_ltr_disable(). --- drivers/net/ethernet/realtek/r8169_main.c | 98 +++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index f9df6aadacce..8479452ac82b 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -312,6 +312,15 @@ enum rtl_registers { IBIMR0 = 0xfa, IBISR0 = 0xfb, FuncForceEvent = 0xfc, + + ALDPS_LTR = 0xe0a2, + LTR_OBFF_LOCK = 0xe032, + LTR_SNOOP = 0xe034, + +#define ALDPS_LTR_EN BIT(0) +#define LTR_OBFF_LOCK_EN BIT(0) +#define LINK_SPEED_CHANGE_EN BIT(14) +#define LTR_SNOOP_EN GENMASK(15, 14) }; enum rtl8168_8101_registers { @@ -397,6 +406,8 @@ enum rtl8168_registers { #define PWM_EN (1 << 22) #define RXDV_GATED_EN (1 << 19) #define EARLY_TALLY_EN (1 << 16) + COMBO_LTR_EXTEND = 0xb6, +#define COMBO_LTR_EXTEND_EN BIT(0) }; enum rtl8125_registers { @@ -2919,6 +2930,92 @@ static void rtl_disable_exit_l1(struct rtl8169_private *tp) } } +static void rtl_enable_ltr(struct rtl8169_private *tp) +{ + switch (tp->mac_version) { + case RTL_GIGA_MAC_VER_80: + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003); + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN); + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN); + r8168_mac_ocp_write(tp, 0xcdd2, 0x8c09); + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd4, 0x9003); + r8168_mac_ocp_write(tp, 0xcdda, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003); + r8168_mac_ocp_write(tp, 0xcddc, 0x9003); + r8168_mac_ocp_write(tp, 0xcde8, 0x887a); + r8168_mac_ocp_write(tp, 0xcdea, 0x9003); + r8168_mac_ocp_write(tp, 0xcdec, 0x8c09); + r8168_mac_ocp_write(tp, 0xcdee, 0x9003); + r8168_mac_ocp_write(tp, 0xcdf0, 0x8a62); + r8168_mac_ocp_write(tp, 0xcdf2, 0x9003); + r8168_mac_ocp_write(tp, 0xcdf4, 0x883e); + r8168_mac_ocp_write(tp, 0xcdf6, 0x9003); + r8168_mac_ocp_write(tp, 0xcdf8, 0x8849); + r8168_mac_ocp_write(tp, 0xcdfa, 0x9003); + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN); + break; + case RTL_GIGA_MAC_VER_70: + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003); + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN); + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN); + r8168_mac_ocp_write(tp, 0xcdd2, 0x8c09); + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd4, 0x9003); + r8168_mac_ocp_write(tp, 0xcdda, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003); + r8168_mac_ocp_write(tp, 0xcddc, 0x9003); + r8168_mac_ocp_write(tp, 0xcde8, 0x887a); + r8168_mac_ocp_write(tp, 0xcdea, 0x9003); + r8168_mac_ocp_write(tp, 0xcdec, 0x8c09); + r8168_mac_ocp_write(tp, 0xcdee, 0x9003); + r8168_mac_ocp_write(tp, 0xcdf0, 0x8a62); + r8168_mac_ocp_write(tp, 0xcdf2, 0x9003); + r8168_mac_ocp_write(tp, 0xcdf4, 0x883e); + r8168_mac_ocp_write(tp, 0xcdf6, 0x9003); + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN); + break; + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66: + r8168_mac_ocp_write(tp, 0xcdd0, 0x9003); + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN); + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN); + r8168_mac_ocp_write(tp, 0xcdd2, 0x889c); + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd4, 0x8c30); + r8168_mac_ocp_write(tp, 0xcdda, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003); + r8168_mac_ocp_write(tp, 0xcddc, 0x9003); + r8168_mac_ocp_write(tp, 0xcde8, 0x883e); + r8168_mac_ocp_write(tp, 0xcdea, 0x9003); + r8168_mac_ocp_write(tp, 0xcdec, 0x889c); + r8168_mac_ocp_write(tp, 0xcdee, 0x9003); + r8168_mac_ocp_write(tp, 0xcdf0, 0x8C09); + r8168_mac_ocp_write(tp, 0xcdf2, 0x9003); + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0000, LINK_SPEED_CHANGE_EN); + break; + case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: + case RTL_GIGA_MAC_VER_52: + r8168_mac_ocp_modify(tp, ALDPS_LTR, 0x0000, ALDPS_LTR_EN); + RTL_W8(tp, COMBO_LTR_EXTEND, RTL_R8(tp, COMBO_LTR_EXTEND) | COMBO_LTR_EXTEND_EN); + fallthrough; + case RTL_GIGA_MAC_VER_51: + r8168_mac_ocp_modify(tp, LTR_SNOOP, 0x0000, LTR_SNOOP_EN); + r8168_mac_ocp_write(tp, 0xe02c, 0x1880); + r8168_mac_ocp_write(tp, 0xe02e, 0x4880); + r8168_mac_ocp_write(tp, 0xcdd8, 0x9003); + r8168_mac_ocp_write(tp, 0xcdda, 0x9003); + r8168_mac_ocp_write(tp, 0xcddc, 0x9003); + r8168_mac_ocp_write(tp, 0xcdd2, 0x883c); + r8168_mac_ocp_write(tp, 0xcdd4, 0x8c12); + r8168_mac_ocp_write(tp, 0xcdd6, 0x9003); + break; + default: + return; + } + /* chip can trigger LTR */ + r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0003, LTR_OBFF_LOCK_EN); +} + static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) { u8 val8; @@ -2947,6 +3044,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) break; } + rtl_enable_ltr(tp); switch (tp->mac_version) { case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST: -- 2.43.0