Add in the additional changes required to run GICv5 VMs with IRS and ITS support. For the IRS, this adds the ability to set the address of the IRS and do save/restore operations for the MMIO regs and ISTs. For the ITS, it allows the ITS device to be created, the base address to be set, and again for save/restore of the MMIO regions to take place. Signed-off-by: Sascha Bischoff --- arm64/include/asm/kvm.h | 9 +++++++++ include/linux/kvm.h | 4 +++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/arm64/include/asm/kvm.h b/arm64/include/asm/kvm.h index 1c13bfa2..6572514b 100644 --- a/arm64/include/asm/kvm.h +++ b/arm64/include/asm/kvm.h @@ -97,6 +97,13 @@ struct kvm_regs { #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) #define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) +/* Supported VGICv5 address types */ +#define KVM_VGIC_V5_ADDR_TYPE_IRS 6 +#define KVM_VGIC_V5_ADDR_TYPE_ITS 7 + +#define KVM_VGIC_V5_IRS_SIZE (2 * SZ_64K) +#define KVM_VGIC_V5_ITS_SIZE (2 * SZ_64K) + #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ #define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ #define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */ @@ -422,6 +429,8 @@ enum { (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff #define VGIC_LEVEL_INFO_LINE_LEVEL 0 +#define KVM_DEV_ARM_VGIC_GRP_IRS_REGS 10 +#define KVM_DEV_ARM_VGIC_GRP_IST 11 #define KVM_DEV_ARM_VGIC_CTRL_INIT 0 #define KVM_DEV_ARM_ITS_SAVE_TABLES 1 diff --git a/include/linux/kvm.h b/include/linux/kvm.h index f7dabbf1..14292051 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h @@ -1210,7 +1210,9 @@ enum kvm_device_type { KVM_DEV_TYPE_LOONGARCH_PCHPIC, #define KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_ARM_VGIC_V5, -#define KVM_DEV_TYPE_ARM_VGIC_V5 KVM_DEV_TYPE_ARM_VGIC_V5 +#define KVM_DEV_TYPE_ARM_VGIC_V5 KVM_DEV_TYPE_ARM_VGIC_V5 + KVM_DEV_TYPE_ARM_VGIC_V5_ITS, +#define KVM_DEV_TYPE_ARM_VGIC_V5_ITS KVM_DEV_TYPE_ARM_VGIC_V5_ITS KVM_DEV_TYPE_MAX, -- 2.34.1