Use stmmac_get_phy_intf_sel() to decode the PHY interface mode to the phy_intf_sel value, validate the result and use that to set the control register to select the operating mode for the DWMAC core. Note that when an unsupported interface mode is used, the array would decode this to PHY_INTF_SEL_GMII_MII, so preserve this behaviour. Signed-off-by: Russell King (Oracle) --- .../net/ethernet/stmicro/stmmac/dwmac-sti.c | 22 ++++++++----------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c index c97535824be0..593e154b5957 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c @@ -77,10 +77,9 @@ * 001-RGMII * 010-SGMII * 100-RMII - * These are the DW MAC phy_intf_sel values + * These are the DW MAC phy_intf_sel values. */ #define MII_PHY_SEL_MASK GENMASK(4, 2) -#define MII_PHY_SEL_VAL(val) FIELD_PREP_CONST(MII_PHY_SEL_MASK, val) struct sti_dwmac { phy_interface_t interface; /* MII interface */ @@ -99,15 +98,6 @@ struct sti_dwmac_of_data { void (*fix_retime_src)(void *priv, int speed, unsigned int mode); }; -static u8 phy_intf_sels[] = { - [PHY_INTERFACE_MODE_MII] = PHY_INTF_SEL_GMII_MII, - [PHY_INTERFACE_MODE_GMII] = PHY_INTF_SEL_GMII_MII, - [PHY_INTERFACE_MODE_RGMII] = PHY_INTF_SEL_RGMII, - [PHY_INTERFACE_MODE_RGMII_ID] = PHY_INTF_SEL_RGMII, - [PHY_INTERFACE_MODE_SGMII] = PHY_INTF_SEL_SGMII, - [PHY_INTERFACE_MODE_RMII] = PHY_INTF_SEL_RMII, -}; - enum { TX_RETIME_SRC_NA = 0, TX_RETIME_SRC_TXCLK = 1, @@ -160,13 +150,19 @@ static int sti_dwmac_set_mode(struct sti_dwmac *dwmac) { struct regmap *regmap = dwmac->regmap; u32 reg = dwmac->ctrl_reg; - u8 phy_intf_sel; + int phy_intf_sel; u32 val; if (dwmac->gmac_en) regmap_update_bits(regmap, reg, EN_MASK, EN); - phy_intf_sel = phy_intf_sels[dwmac->interface]; + phy_intf_sel = stmmac_get_phy_intf_sel(dwmac->interface); + if (phy_intf_sel != PHY_INTF_SEL_GMII_MII && + phy_intf_sel != PHY_INTF_SEL_RGMII && + phy_intf_sel != PHY_INTF_SEL_SGMII && + phy_intf_sel != PHY_INTF_SEL_RMII) + phy_intf_sel = PHY_INTF_SEL_GMII_MII; + regmap_update_bits(regmap, reg, MII_PHY_SEL_MASK, FIELD_PREP(MII_PHY_SEL_MASK, phy_intf_sel)); -- 2.47.3