The early vmwrite of the PDPTRs in prepare_vmcs02_rare() is redundant, because every write it does will be performed by prepare_vmcs02() if it is actually needed. In any case where the emulator or the processor need the PDPTR, either is_pae_paging() is true on vmentry, or a write of CR0, CR4 or EFER will cause a vmexit to L0. The next vmentry will refresh the PDPTRs in the vmcs02 from vmcs12. In fact, the original version[1] of what ended up being commit c7554efc8335 ("KVM: nVMX: Copy PDPTRs to/from vmcs12 only when necessary"), the writes in what is now prepare_vmcs02_rare() were removed. When the mega-collection of optimizations was posted[2], the removal of that code got dropped as a rebase good, so reinstate it. [1] https://lore.kernel.org/all/20190507160640.4812-16-sean.j.christopherson@intel.com [2] https://lore.kernel.org/all/1560445409-17363-31-git-send-email-pbonzini@redhat.com Suggested-by: Sean Christopherson Signed-off-by: Paolo Bonzini --- arch/x86/kvm/vmx/nested.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index c1be8ef882b8..58f91e7921e3 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -2623,17 +2623,6 @@ static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12) vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->guest_sysenter_esp); vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->guest_sysenter_eip); - /* - * L1 may access the L2's PDPTR, so save them to construct - * vmcs12 - */ - if (enable_ept) { - vmcs_write64(GUEST_PDPTR0, vmcs12->guest_pdptr0); - vmcs_write64(GUEST_PDPTR1, vmcs12->guest_pdptr1); - vmcs_write64(GUEST_PDPTR2, vmcs12->guest_pdptr2); - vmcs_write64(GUEST_PDPTR3, vmcs12->guest_pdptr3); - } - if (kvm_mpx_supported() && vmx->vcpu.arch.nested_run_pending && (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_BNDCFGS)) vmcs_write64(GUEST_BNDCFGS, vmcs12->guest_bndcfgs); -- 2.52.0