From: Sandipan Das Report the host's LBR stack depth in x86_pmu_capability, so that KVM can advertise the depth the hardware actually supports rather than assuming a value. Signed-off-by: Sandipan Das Signed-off-by: Shivansh Dhiman --- Changes in v2: * New patch. Split from v1 patch 2, "KVM: SVM: Add capability for LbrExtV2", and moved right before its first user, patch 7. * Set Sandipan Das as the author. --- arch/x86/events/core.c | 1 + arch/x86/include/asm/perf_event.h | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 8b3ea0adb965..85dc065406e9 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -3162,6 +3162,7 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap) cap->bit_width_fixed = cap->num_counters_fixed ? x86_pmu.cntval_bits : 0; cap->events_mask = (unsigned int)x86_pmu.events_maskl; cap->events_mask_len = x86_pmu.events_mask_len; + cap->num_branches_lbr = x86_pmu.lbr_nr; cap->pebs_ept = x86_pmu.pebs_ept; cap->mediated = !!(pmu.capabilities & PERF_PMU_CAP_MEDIATED_VPMU); } diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 1eb13673e889..f18cf0986e12 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -306,6 +306,7 @@ struct x86_pmu_capability { int bit_width_fixed; unsigned int events_mask; int events_mask_len; + int num_branches_lbr; unsigned int pebs_ept :1; unsigned int mediated :1; }; -- 2.43.0