The RTL8922D does more settings before downloading firmware, so add them accordingly. Also, update the missed settings for RTL8922A. Signed-off-by: Ping-Ke Shih --- drivers/net/wireless/realtek/rtw89/mac_be.c | 7 +++++++ drivers/net/wireless/realtek/rtw89/reg.h | 23 +++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c index c3620db8aff6..33e39191b7c3 100644 --- a/drivers/net/wireless/realtek/rtw89/mac_be.c +++ b/drivers/net/wireless/realtek/rtw89/mac_be.c @@ -458,6 +458,7 @@ static void set_cpu_en(struct rtw89_dev *rtwdev, bool include_bb) static int wcpu_on(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw) { + const struct rtw89_chip_info *chip = rtwdev->chip; u32 val32; int ret; @@ -479,6 +480,7 @@ static int wcpu_on(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw) rtw89_write32(rtwdev, R_BE_UDM1, 0); rtw89_write32(rtwdev, R_BE_UDM2, 0); + rtw89_write32(rtwdev, R_BE_BOOT_DBG, 0x0); rtw89_write32(rtwdev, R_BE_HALT_H2C, 0); rtw89_write32(rtwdev, R_BE_HALT_C2H, 0); rtw89_write32(rtwdev, R_BE_HALT_H2C_CTRL, 0); @@ -493,6 +495,11 @@ static int wcpu_on(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw) B_BE_WDT_WAKE_PCIE_EN | B_BE_WDT_WAKE_USB_EN); rtw89_write32_clr(rtwdev, R_BE_WCPU_FW_CTRL, B_BE_WDT_PLT_RST_EN | B_BE_WCPU_ROM_CUT_GET); + rtw89_write32_clr(rtwdev, R_BE_SECURE_BOOT_MALLOC_INFO, 0); + rtw89_write32_clr(rtwdev, R_BE_GPIO_MUXCFG, B_BE_BOOT_MODE); + + if (chip->chip_id != RTL8922A) + rtw89_write32_set(rtwdev, R_BE_WCPU_FW_CTRL, B_BE_HOST_EXIST); rtw89_write16_mask(rtwdev, R_BE_BOOT_REASON, B_BE_BOOT_REASON_MASK, boot_reason); rtw89_write32_clr(rtwdev, R_BE_PLATFORM_ENABLE, B_BE_WCPU_EN); diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 152fd8366dd7..5b4a459cf29c 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -3963,6 +3963,24 @@ #define R_BE_EFUSE_CTRL_1_V1 0x0034 #define B_BE_EF_DATA_MASK GENMASK(31, 0) +#define R_BE_GPIO_MUXCFG 0x0040 +#define B_BE_WCPU_AUTO_EN BIT(26) +#define B_BE_WCPU_JTAG_EN BIT(24) +#define B_BE_WCPU_DBG_EN BIT(23) +#define B_BE_JTAG_CHAIN_EN BIT(20) +#define B_BE_BOOT_MODE BIT(19) +#define B_BE_WL_EECS_EXT_32K_SEL BIT(18) +#define B_BE_WL_SEC_BONDING_OPT_STS BIT(17) +#define B_BE_SECSIC_SEL BIT(16) +#define B_BE_ENHTP BIT(14) +#define B_BE_ENSIC BIT(12) +#define B_BE_SIC_SWRST BIT(11) +#define B_BE_PINMUX_PTA_EN BIT(10) +#define B_BE_WL_BT_PTA_SEC BIT(9) +#define B_BE_ENUARTTX BIT(8) +#define B_BE_DBG_GNT_BT_S1_POLARITY BIT(4) +#define B_BE_ENUARTRX BIT(2) + #define R_BE_GPIO_EXT_CTRL 0x0060 #define B_BE_GPIO_MOD_15_TO_8_MASK GENMASK(31, 24) #define B_BE_GPIO_MOD_9 BIT(25) @@ -4323,6 +4341,7 @@ #define B_BE_RUN_ENV_MASK GENMASK(31, 30) #define B_BE_WCPU_FWDL_STATUS_MASK GENMASK(29, 26) #define B_BE_WDT_PLT_RST_EN BIT(17) +#define B_BE_HOST_EXIST BIT(16) #define B_BE_FW_SEC_AUTH_DONE BIT(14) #define B_BE_FW_CPU_UTIL_STS_EN BIT(13) #define B_BE_BBMCU1_FWDL_EN BIT(12) @@ -4599,6 +4618,10 @@ #define B_BE_HCI_RXDMA_EN BIT(1) #define B_BE_HCI_TXDMA_EN BIT(0) +#define R_BE_BOOT_DBG 0x78F0 +#define B_BE_BOOT_STATUS_MASK GENMASK(31, 16) +#define B_BE_SECUREBOOT_STATUS_MASK GENMASK(15, 0) + #define R_BE_DBG_WOW_READY 0x815E #define B_BE_DBG_WOW_READY GENMASK(7, 0) -- 2.25.1