From: Hui Min Mina Chou If multiple VCPUs of the same Guest/VM run on the same Host CPU, hfence.vvma only flushes that Host CPU’s VS-stage TLB. Other Host CPUs may retain stale VS-stage entries. When a VCPU later migrates to a different Host CPU, it can hit these stale GVA to GPA mappings, causing unexpected faults in the Guest. To fix this, kvm_riscv_gstage_vmid_sanitize() is extended to flush both G-stage and VS-stage TLBs whenever a VCPU migrates to a different Host CPU. This ensures that no stale VS-stage mappings remain after VCPU migration. Fixes: b79bf2025dbc ("RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize()") Signed-off-by: Hui Min Mina Chou Signed-off-by: Ben Zong-You Xie --- arch/riscv/kvm/vmid.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c index 3b426c800480..38c6f532a6f8 100644 --- a/arch/riscv/kvm/vmid.c +++ b/arch/riscv/kvm/vmid.c @@ -146,4 +146,10 @@ void kvm_riscv_gstage_vmid_sanitize(struct kvm_vcpu *vcpu) vmid = READ_ONCE(vcpu->kvm->arch.vmid.vmid); kvm_riscv_local_hfence_gvma_vmid_all(vmid); + + /* + * Flush VS-stage TLBs entry after VCPU migration to avoid using + * stale entries. + */ + kvm_riscv_local_hfence_vvma_all(vmid); } -- 2.34.1