Implement following ethtool callback function: .get_ringparam .set_ringparam These callbacks allow users to utilize ethtool for detailed queue depth configuration and monitoring. Co-developed-by: Zhu Yikai Signed-off-by: Zhu Yikai Signed-off-by: Fan Gong --- .../ethernet/huawei/hinic3/hinic3_ethtool.c | 94 ++++++++++++++++ .../net/ethernet/huawei/hinic3/hinic3_irq.c | 10 +- .../net/ethernet/huawei/hinic3/hinic3_main.c | 11 ++ .../huawei/hinic3/hinic3_netdev_ops.c | 101 +++++++++++++++++- .../ethernet/huawei/hinic3/hinic3_nic_dev.h | 16 +++ .../ethernet/huawei/hinic3/hinic3_nic_io.h | 4 + 6 files changed, 231 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_ethtool.c b/drivers/net/ethernet/huawei/hinic3/hinic3_ethtool.c index 90fc16288de9..d78aff802a20 100644 --- a/drivers/net/ethernet/huawei/hinic3/hinic3_ethtool.c +++ b/drivers/net/ethernet/huawei/hinic3/hinic3_ethtool.c @@ -409,6 +409,98 @@ hinic3_get_link_ksettings(struct net_device *netdev, return 0; } +static void hinic3_get_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +{ + struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); + + ring->rx_max_pending = HINIC3_MAX_RX_QUEUE_DEPTH; + ring->tx_max_pending = HINIC3_MAX_TX_QUEUE_DEPTH; + ring->rx_pending = nic_dev->rxqs[0].q_depth; + ring->tx_pending = nic_dev->txqs[0].q_depth; +} + +static void hinic3_update_qp_depth(struct net_device *netdev, + u32 sq_depth, u32 rq_depth) +{ + struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); + u16 i; + + nic_dev->q_params.sq_depth = sq_depth; + nic_dev->q_params.rq_depth = rq_depth; + for (i = 0; i < nic_dev->max_qps; i++) { + nic_dev->txqs[i].q_depth = sq_depth; + nic_dev->txqs[i].q_mask = sq_depth - 1; + nic_dev->rxqs[i].q_depth = rq_depth; + nic_dev->rxqs[i].q_mask = rq_depth - 1; + } +} + +static int hinic3_check_ringparam_valid(struct net_device *netdev, + const struct ethtool_ringparam *ring) +{ + if (ring->rx_jumbo_pending || ring->rx_mini_pending) { + netdev_err(netdev, "Unsupported rx_jumbo_pending/rx_mini_pending\n"); + return -EINVAL; + } + + if (ring->tx_pending > HINIC3_MAX_TX_QUEUE_DEPTH || + ring->tx_pending < HINIC3_MIN_QUEUE_DEPTH || + ring->rx_pending > HINIC3_MAX_RX_QUEUE_DEPTH || + ring->rx_pending < HINIC3_MIN_QUEUE_DEPTH) { + netdev_err(netdev, + "Queue depth out of range tx[%d-%d] rx[%d-%d]\n", + HINIC3_MIN_QUEUE_DEPTH, HINIC3_MAX_TX_QUEUE_DEPTH, + HINIC3_MIN_QUEUE_DEPTH, HINIC3_MAX_RX_QUEUE_DEPTH); + return -EINVAL; + } + + return 0; +} + +static int hinic3_set_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +{ + struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); + struct hinic3_dyna_txrxq_params q_params = {}; + u32 new_sq_depth, new_rq_depth; + int err; + + err = hinic3_check_ringparam_valid(netdev, ring); + if (err) + return err; + + new_sq_depth = 1U << ilog2(ring->tx_pending); + new_rq_depth = 1U << ilog2(ring->rx_pending); + if (new_sq_depth == nic_dev->q_params.sq_depth && + new_rq_depth == nic_dev->q_params.rq_depth) + return 0; + + netdev_dbg(netdev, "Change Tx/Rx ring depth from %u/%u to %u/%u\n", + nic_dev->q_params.sq_depth, nic_dev->q_params.rq_depth, + new_sq_depth, new_rq_depth); + + if (!netif_running(netdev)) { + hinic3_update_qp_depth(netdev, new_sq_depth, new_rq_depth); + } else { + q_params = nic_dev->q_params; + q_params.sq_depth = new_sq_depth; + q_params.rq_depth = new_rq_depth; + + err = hinic3_change_channel_settings(netdev, &q_params); + if (err) { + netdev_err(netdev, "Failed to change channel settings\n"); + return err; + } + } + + return 0; +} + static const struct ethtool_ops hinic3_ethtool_ops = { .supported_coalesce_params = ETHTOOL_COALESCE_USECS | ETHTOOL_COALESCE_PKT_RATE_RX_USECS, @@ -417,6 +509,8 @@ static const struct ethtool_ops hinic3_ethtool_ops = { .get_msglevel = hinic3_get_msglevel, .set_msglevel = hinic3_set_msglevel, .get_link = ethtool_op_get_link, + .get_ringparam = hinic3_get_ringparam, + .set_ringparam = hinic3_set_ringparam, }; void hinic3_set_ethtool_ops(struct net_device *netdev) diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c b/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c index e7d6c2033b45..d3b3927b5408 100644 --- a/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c +++ b/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c @@ -135,10 +135,16 @@ static int hinic3_set_interrupt_moder(struct net_device *netdev, u16 q_id, { struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); struct hinic3_interrupt_info info = {}; + unsigned long flags; int err; - if (q_id >= nic_dev->q_params.num_qps) + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + + if (!HINIC3_CHANNEL_RES_VALID(nic_dev) || + q_id >= nic_dev->q_params.num_qps) { + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); return 0; + } info.interrupt_coalesc_set = 1; info.coalesc_timer_cfg = coalesc_timer_cfg; @@ -147,6 +153,8 @@ static int hinic3_set_interrupt_moder(struct net_device *netdev, u16 q_id, info.resend_timer_cfg = nic_dev->intr_coalesce[q_id].resend_timer_cfg; + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + err = hinic3_set_interrupt_cfg(nic_dev->hwdev, info); if (err) { netdev_err(netdev, diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_main.c b/drivers/net/ethernet/huawei/hinic3/hinic3_main.c index 0a888fe4c975..3b470978714a 100644 --- a/drivers/net/ethernet/huawei/hinic3/hinic3_main.c +++ b/drivers/net/ethernet/huawei/hinic3/hinic3_main.c @@ -179,6 +179,8 @@ static int hinic3_sw_init(struct net_device *netdev) int err; mutex_init(&nic_dev->port_state_mutex); + mutex_init(&nic_dev->channel_cfg_lock); + spin_lock_init(&nic_dev->channel_res_lock); nic_dev->q_params.sq_depth = HINIC3_SQ_DEPTH; nic_dev->q_params.rq_depth = HINIC3_RQ_DEPTH; @@ -314,6 +316,15 @@ static void hinic3_link_status_change(struct net_device *netdev, bool link_status_up) { struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); + unsigned long flags; + bool valid; + + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + valid = HINIC3_CHANNEL_RES_VALID(nic_dev); + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + + if (!valid) + return; if (link_status_up) { if (netif_carrier_ok(netdev)) diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c b/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c index da73811641a9..ae485afeb14e 100644 --- a/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c +++ b/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c @@ -428,6 +428,82 @@ static void hinic3_vport_down(struct net_device *netdev) } } +int +hinic3_change_channel_settings(struct net_device *netdev, + struct hinic3_dyna_txrxq_params *trxq_params) +{ + struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); + struct hinic3_dyna_qp_params new_qp_params = {}; + struct hinic3_dyna_qp_params cur_qp_params = {}; + bool need_teardown = false; + unsigned long flags; + int err; + + mutex_lock(&nic_dev->channel_cfg_lock); + + hinic3_config_num_qps(netdev, trxq_params); + + err = hinic3_alloc_channel_resources(netdev, &new_qp_params, + trxq_params); + if (err) { + netdev_err(netdev, "Failed to alloc channel resources\n"); + mutex_unlock(&nic_dev->channel_cfg_lock); + return err; + } + + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + if (!test_and_set_bit(HINIC3_CHANGE_RES_INVALID, &nic_dev->flags)) + need_teardown = true; + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + + if (need_teardown) { + hinic3_vport_down(netdev); + hinic3_close_channel(netdev); + hinic3_uninit_qps(nic_dev, &cur_qp_params); + hinic3_free_channel_resources(netdev, &cur_qp_params, + &nic_dev->q_params); + } + + if (nic_dev->num_qp_irq > trxq_params->num_qps) + hinic3_qp_irq_change(netdev, trxq_params->num_qps); + + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + nic_dev->q_params = *trxq_params; + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + + hinic3_init_qps(nic_dev, &new_qp_params); + + err = hinic3_open_channel(netdev); + if (err) + goto err_uninit_qps; + + err = hinic3_vport_up(netdev); + if (err) + goto err_close_channel; + + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + clear_bit(HINIC3_CHANGE_RES_INVALID, &nic_dev->flags); + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + + mutex_unlock(&nic_dev->channel_cfg_lock); + + return 0; + +err_close_channel: + hinic3_close_channel(netdev); +err_uninit_qps: + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + memset(&nic_dev->q_params, 0, sizeof(nic_dev->q_params)); + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + + hinic3_uninit_qps(nic_dev, &new_qp_params); + hinic3_free_channel_resources(netdev, &new_qp_params, trxq_params); + + mutex_unlock(&nic_dev->channel_cfg_lock); + + return err; +} + static int hinic3_open(struct net_device *netdev) { struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); @@ -487,16 +563,33 @@ static int hinic3_close(struct net_device *netdev) { struct hinic3_nic_dev *nic_dev = netdev_priv(netdev); struct hinic3_dyna_qp_params qp_params; + bool need_teardown = false; + unsigned long flags; if (!test_and_clear_bit(HINIC3_INTF_UP, &nic_dev->flags)) { netdev_dbg(netdev, "Netdev already close, do nothing\n"); return 0; } - hinic3_vport_down(netdev); - hinic3_close_channel(netdev); - hinic3_uninit_qps(nic_dev, &qp_params); - hinic3_free_channel_resources(netdev, &qp_params, &nic_dev->q_params); + mutex_lock(&nic_dev->channel_cfg_lock); + + spin_lock_irqsave(&nic_dev->channel_res_lock, flags); + if (!test_and_set_bit(HINIC3_CHANGE_RES_INVALID, &nic_dev->flags)) + need_teardown = true; + spin_unlock_irqrestore(&nic_dev->channel_res_lock, flags); + + if (need_teardown) { + hinic3_vport_down(netdev); + hinic3_close_channel(netdev); + hinic3_uninit_qps(nic_dev, &qp_params); + hinic3_free_channel_resources(netdev, &qp_params, + &nic_dev->q_params); + } + + hinic3_free_nicio_res(nic_dev); + hinic3_destroy_num_qps(netdev); + + mutex_unlock(&nic_dev->channel_cfg_lock); return 0; } diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h index 9502293ff710..55b280888ad8 100644 --- a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h +++ b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h @@ -10,6 +10,9 @@ #include "hinic3_hw_cfg.h" #include "hinic3_hwdev.h" #include "hinic3_mgmt_interface.h" +#include "hinic3_nic_io.h" +#include "hinic3_tx.h" +#include "hinic3_rx.h" #define HINIC3_VLAN_BITMAP_BYTE_SIZE(nic_dev) (sizeof(*(nic_dev)->vlan_bitmap)) #define HINIC3_VLAN_BITMAP_SIZE(nic_dev) \ @@ -20,8 +23,13 @@ enum hinic3_flags { HINIC3_MAC_FILTER_CHANGED, HINIC3_RSS_ENABLE, HINIC3_UPDATE_MAC_FILTER, + HINIC3_CHANGE_RES_INVALID, }; +#define HINIC3_CHANNEL_RES_VALID(nic_dev) \ + (test_bit(HINIC3_INTF_UP, &(nic_dev)->flags) && \ + !test_bit(HINIC3_CHANGE_RES_INVALID, &(nic_dev)->flags)) + enum hinic3_event_work_flags { HINIC3_EVENT_WORK_TX_TIMEOUT, }; @@ -129,6 +137,10 @@ struct hinic3_nic_dev { struct work_struct rx_mode_work; /* lock for enable/disable port */ struct mutex port_state_mutex; + /* lock for channel configuration */ + struct mutex channel_cfg_lock; + /* lock for channel resources */ + spinlock_t channel_res_lock; struct list_head uc_filter_list; struct list_head mc_filter_list; @@ -143,6 +155,10 @@ struct hinic3_nic_dev { void hinic3_set_netdev_ops(struct net_device *netdev); int hinic3_set_hw_features(struct net_device *netdev); +int +hinic3_change_channel_settings(struct net_device *netdev, + struct hinic3_dyna_txrxq_params *trxq_params); + int hinic3_qps_irq_init(struct net_device *netdev); void hinic3_qps_irq_uninit(struct net_device *netdev); diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h index 12eefabcf1db..3791b9bc865b 100644 --- a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h +++ b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h @@ -14,6 +14,10 @@ struct hinic3_nic_dev; #define HINIC3_RQ_WQEBB_SHIFT 3 #define HINIC3_SQ_WQEBB_SIZE BIT(HINIC3_SQ_WQEBB_SHIFT) +#define HINIC3_MAX_TX_QUEUE_DEPTH 65536 +#define HINIC3_MAX_RX_QUEUE_DEPTH 16384 +#define HINIC3_MIN_QUEUE_DEPTH 128 + /* ******************** RQ_CTRL ******************** */ enum hinic3_rq_wqe_type { HINIC3_NORMAL_RQ_WQE = 1, -- 2.43.0