The MDIO controller of the Realtek Otto switches has either 4 or 7 command registers. This depends on the number of supported ports. These registers are "scattered" around the MMIO block and their addresses depend on the specific model. Nevertheless all command registers share a common pattern: - A mask register with one bit per addressed port - A I/O data register that transfers the to be read/written data - A C45 registers that takes devnum and regnum - A C22 register (page/register) that also includes run/status bits Provide an additional structure for these command registers so it can be reused in two places. 1. For defining the register addresses in the regmap. 2. For defining the to be read/written data This will ultimately result in access patterns like static int rtl_run_cmd(u32 cmd, struct rtl_mdio_cmd_regs *cmd_regs, ...) { regmap_write(regmap, priv->info->reg->cmd_regs.c45_data, cmd_regs->c45_data); ... } static int rtl9300_write_c45(...) { struct rtl_mdio_cmd_regs cmd_regs = { .c45_data = ... .io_data = ..., .mask = ..., }; return rtl_run_cmd(RTL9300_CMD_WRITE_C45, &cmd_regs, ...); } As a first step start with the C45 register. Signed-off-by: Markus Stockhausen --- drivers/net/mdio/mdio-realtek-rtl9300.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/net/mdio/mdio-realtek-rtl9300.c b/drivers/net/mdio/mdio-realtek-rtl9300.c index 0ea691d9fc1b..e382f57b7738 100644 --- a/drivers/net/mdio/mdio-realtek-rtl9300.c +++ b/drivers/net/mdio/mdio-realtek-rtl9300.c @@ -39,7 +39,7 @@ #define SMI_ACCESS_PHY_CTRL_2 0xcb78 #define PHY_CTRL_INDATA GENMASK(31, 16) #define PHY_CTRL_DATA GENMASK(15, 0) -#define SMI_ACCESS_PHY_CTRL_3 0xcb7c +#define RTL9300_SMI_ACCESS_PHY_CTRL_3 0xcb7c #define PHY_CTRL_MMD_DEVAD GENMASK(20, 16) #define PHY_CTRL_MMD_REG GENMASK(15, 0) #define SMI_PORT0_5_ADDR_CTRL 0xcb80 @@ -53,7 +53,12 @@ #define RTL9300_NUM_PAGES 4096 #define RTL9300_NUM_PORTS 28 +struct rtl_mdio_cmd_regs { + u32 c45_data; +}; + struct rtl_mdio_info { + struct rtl_mdio_cmd_regs cmd_regs; u8 num_buses; u8 num_ports; u16 num_pages; @@ -234,7 +239,7 @@ static int rtl9300_mdio_read_c45(struct mii_bus *bus, int phy_id, int dev_addr, val = FIELD_PREP(PHY_CTRL_MMD_DEVAD, dev_addr) | FIELD_PREP(PHY_CTRL_MMD_REG, regnum); - err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_3, val); + err = regmap_write(regmap, priv->info->cmd_regs.c45_data, val); if (err) goto out_err; @@ -292,7 +297,7 @@ static int rtl9300_mdio_write_c45(struct mii_bus *bus, int phy_id, int dev_addr, val = FIELD_PREP(PHY_CTRL_MMD_DEVAD, dev_addr) | FIELD_PREP(PHY_CTRL_MMD_REG, regnum); - err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_3, val); + err = regmap_write(regmap, priv->info->cmd_regs.c45_data, val); if (err) goto out_err; @@ -513,6 +518,9 @@ static int rtl_mdiobus_probe(struct platform_device *pdev) } static const struct rtl_mdio_info rtl9300_mdio_info = { + .cmd_regs = { + .c45_data = RTL9300_SMI_ACCESS_PHY_CTRL_3, + }, .num_buses = RTL9300_NUM_BUSES, .num_ports = RTL9300_NUM_PORTS, .num_pages = RTL9300_NUM_PAGES, -- 2.54.0