From: Lad Prabhakar Add the boolean DT property `renesas,miic-phylink-active-low` to the RZN1 MIIC binding schema. This property allows configuring the active level of the PHY-link signals used by the Switch, EtherCAT, and SERCOS III interfaces. The signal polarity is controlled by fields in the MIIC_PHYLINK register: - SWLNK[3:0]: configures the Switch interface link signal level 0 - Active High 1 - Active Low - CATLNK[6:4]: configures the EtherCAT interface link signal level 0 - Active Low 1 - Active High - S3LNK[9:8]: configures the SERCOS III interface link signal level 0 - Active Low 1 - Active High When the `renesas,miic-phylink-active-low` property is present, the PHY-link signal is configured as active-low. When omitted, the signal defaults to active-high. Signed-off-by: Lad Prabhakar --- .../devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml index 3adbcf56d2be..825ae8a91e8b 100644 --- a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml +++ b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml @@ -86,6 +86,13 @@ patternProperties: and include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs. $ref: /schemas/types.yaml#/definitions/uint32 + renesas,miic-phylink-active-low: + type: boolean + description: Indicates that the PHY-link signal provided by the Ethernet switch, + EtherCAT, or SERCOS3 interface is active low. When present, this property + sets the corresponding signal polarity to active low. When omitted, the signal + defaults to active high. + required: - reg - renesas,miic-input -- 2.43.0