The RTL8211F has a PHYRSTB pin to reset the chip. For a complete PHY reset, this pin must be asserted low for at least 10ms for the internal regulator. Wait for at least 80ms (for internal circuits setting time) before accessing the PHY register. All registers will return to default values after a hardware reset Signed-off-by: Christophe Roullier --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index b5db62a0a550..0c7c29f4b71e 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -247,7 +247,7 @@ phy0_eth2: ethernet-phy@1 { compatible = "ethernet-phy-id001c.c916"; reg = <1>; reset-assert-us = <10000>; - reset-deassert-us = <300>; + reset-deassert-us = <80000>; reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>; }; }; -- 2.43.0