In a subsequent patch these defines will need to be referenced from a new file, move them as a separate patch for easy review. The comments have style violations (personal pronouns etc), do not fix them as this is just code movement. No functional change intended. Signed-off-by: Brendan Jackman --- arch/x86/include/asm/page.h | 32 ++++++++++++++++++++++++++++++++ arch/x86/mm/pgtable.c | 29 ----------------------------- 2 files changed, 32 insertions(+), 29 deletions(-) diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h index 416dc88e35c15..4de4715c3b40f 100644 --- a/arch/x86/include/asm/page.h +++ b/arch/x86/include/asm/page.h @@ -78,6 +78,38 @@ static __always_inline u64 __is_canonical_address(u64 vaddr, u8 vaddr_bits) return __canonical_address(vaddr, vaddr_bits) == vaddr; } +#ifdef CONFIG_X86_PAE + +/* + * In PAE mode, we need to do a cr3 reload (=tlb flush) when + * updating the top-level pagetable entries to guarantee the + * processor notices the update. Since this is expensive, and + * all 4 top-level entries are used almost immediately in a + * new process's life, we just pre-populate them here. + */ +#define PREALLOCATED_PMDS PTRS_PER_PGD +/* + * "USER_PMDS" are the PMDs for the user copy of the page tables when + * PTI is enabled. They do not exist when PTI is disabled. Note that + * this is distinct from the user _portion_ of the kernel page tables + * which always exists. + * + * We allocate separate PMDs for the kernel part of the user page-table + * when PTI is enabled. We need them to map the per-process LDT into the + * user-space page-table. + */ +#define PREALLOCATED_USER_PMDS (boot_cpu_has(X86_FEATURE_PTI) ? KERNEL_PGD_PTRS : 0) +#define MAX_PREALLOCATED_USER_PMDS KERNEL_PGD_PTRS + +#else /* !CONFIG_X86_PAE */ + +/* No need to prepopulate any pagetable entries in non-PAE modes. */ +#define PREALLOCATED_PMDS 0 +#define PREALLOCATED_USER_PMDS 0 +#define MAX_PREALLOCATED_USER_PMDS 0 + +#endif /* CONFIG_X86_PAE */ + #endif /* __ASSEMBLER__ */ #include diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c index fdd3709509946..8f3505b1eefec 100644 --- a/arch/x86/mm/pgtable.c +++ b/arch/x86/mm/pgtable.c @@ -100,29 +100,6 @@ static void pgd_dtor(pgd_t *pgd) } #ifdef CONFIG_X86_PAE -/* - * In PAE mode, we need to do a cr3 reload (=tlb flush) when - * updating the top-level pagetable entries to guarantee the - * processor notices the update. Since this is expensive, and - * all 4 top-level entries are used almost immediately in a - * new process's life, we just pre-populate them here. - */ -#define PREALLOCATED_PMDS PTRS_PER_PGD - -/* - * "USER_PMDS" are the PMDs for the user copy of the page tables when - * PTI is enabled. They do not exist when PTI is disabled. Note that - * this is distinct from the user _portion_ of the kernel page tables - * which always exists. - * - * We allocate separate PMDs for the kernel part of the user page-table - * when PTI is enabled. We need them to map the per-process LDT into the - * user-space page-table. - */ -#define PREALLOCATED_USER_PMDS (boot_cpu_has(X86_FEATURE_PTI) ? \ - KERNEL_PGD_PTRS : 0) -#define MAX_PREALLOCATED_USER_PMDS KERNEL_PGD_PTRS - void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) { paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT); @@ -139,12 +116,6 @@ void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) */ flush_tlb_mm(mm); } -#else /* !CONFIG_X86_PAE */ - -/* No need to prepopulate any pagetable entries in non-PAE modes. */ -#define PREALLOCATED_PMDS 0 -#define PREALLOCATED_USER_PMDS 0 -#define MAX_PREALLOCATED_USER_PMDS 0 #endif /* CONFIG_X86_PAE */ static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count) -- 2.54.0